mlx5_main.c revision 347839
1290650Shselasky/*- 2347819Shselasky * Copyright (c) 2013-2019, Mellanox Technologies, Ltd. All rights reserved. 3290650Shselasky * 4290650Shselasky * Redistribution and use in source and binary forms, with or without 5290650Shselasky * modification, are permitted provided that the following conditions 6290650Shselasky * are met: 7290650Shselasky * 1. Redistributions of source code must retain the above copyright 8290650Shselasky * notice, this list of conditions and the following disclaimer. 9290650Shselasky * 2. Redistributions in binary form must reproduce the above copyright 10290650Shselasky * notice, this list of conditions and the following disclaimer in the 11290650Shselasky * documentation and/or other materials provided with the distribution. 12290650Shselasky * 13290650Shselasky * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND 14290650Shselasky * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15290650Shselasky * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16290650Shselasky * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17290650Shselasky * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18290650Shselasky * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19290650Shselasky * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20290650Shselasky * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21290650Shselasky * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22290650Shselasky * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23290650Shselasky * SUCH DAMAGE. 24290650Shselasky * 25290650Shselasky * $FreeBSD: stable/11/sys/dev/mlx5/mlx5_core/mlx5_main.c 347839 2019-05-16 17:49:29Z hselasky $ 26290650Shselasky */ 27290650Shselasky 28290650Shselasky#include <linux/kmod.h> 29290650Shselasky#include <linux/module.h> 30290650Shselasky#include <linux/errno.h> 31290650Shselasky#include <linux/pci.h> 32290650Shselasky#include <linux/dma-mapping.h> 33290650Shselasky#include <linux/slab.h> 34290650Shselasky#include <linux/io-mapping.h> 35290650Shselasky#include <linux/interrupt.h> 36347802Shselasky#include <linux/hardirq.h> 37290650Shselasky#include <dev/mlx5/driver.h> 38290650Shselasky#include <dev/mlx5/cq.h> 39290650Shselasky#include <dev/mlx5/qp.h> 40290650Shselasky#include <dev/mlx5/srq.h> 41290650Shselasky#include <linux/delay.h> 42290650Shselasky#include <dev/mlx5/mlx5_ifc.h> 43341958Shselasky#include <dev/mlx5/mlx5_fpga/core.h> 44341958Shselasky#include <dev/mlx5/mlx5_lib/mlx5.h> 45290650Shselasky#include "mlx5_core.h" 46329200Shselasky#include "fs_core.h" 47290650Shselasky 48341948Shselaskystatic const char mlx5_version[] = "Mellanox Core driver " 49341948Shselasky DRIVER_VERSION " (" DRIVER_RELDATE ")"; 50290650ShselaskyMODULE_AUTHOR("Eli Cohen <eli@mellanox.com>"); 51290650ShselaskyMODULE_DESCRIPTION("Mellanox Connect-IB, ConnectX-4 core driver"); 52290650ShselaskyMODULE_LICENSE("Dual BSD/GPL"); 53290650ShselaskyMODULE_DEPEND(mlx5, linuxkpi, 1, 1, 1); 54347839ShselaskyMODULE_DEPEND(mlx5, mlxfw, 1, 1, 1); 55290650ShselaskyMODULE_VERSION(mlx5, 1); 56290650Shselasky 57347835ShselaskySYSCTL_NODE(_hw, OID_AUTO, mlx5, CTLFLAG_RW, 0, "mlx5 hardware controls"); 58347835Shselasky 59290650Shselaskyint mlx5_core_debug_mask; 60347835ShselaskySYSCTL_INT(_hw_mlx5, OID_AUTO, debug_mask, CTLFLAG_RWTUN, 61347835Shselasky &mlx5_core_debug_mask, 0, 62347835Shselasky "debug mask: 1 = dump cmd data, 2 = dump cmd exec time, 3 = both. Default=0"); 63290650Shselasky 64290650Shselasky#define MLX5_DEFAULT_PROF 2 65347835Shselaskystatic int mlx5_prof_sel = MLX5_DEFAULT_PROF; 66347835ShselaskySYSCTL_INT(_hw_mlx5, OID_AUTO, prof_sel, CTLFLAG_RWTUN, 67347835Shselasky &mlx5_prof_sel, 0, 68347835Shselasky "profile selector. Valid range 0 - 2"); 69290650Shselasky 70347819Shselaskystatic int mlx5_fast_unload_enabled = 1; 71347819ShselaskySYSCTL_INT(_hw_mlx5, OID_AUTO, fast_unload_enabled, CTLFLAG_RWTUN, 72347819Shselasky &mlx5_fast_unload_enabled, 0, 73347819Shselasky "Set to enable fast unload. Clear to disable."); 74347819Shselasky 75290650Shselasky#define NUMA_NO_NODE -1 76290650Shselasky 77290650Shselaskystatic LIST_HEAD(intf_list); 78290650Shselaskystatic LIST_HEAD(dev_list); 79290650Shselaskystatic DEFINE_MUTEX(intf_mutex); 80290650Shselasky 81290650Shselaskystruct mlx5_device_context { 82290650Shselasky struct list_head list; 83290650Shselasky struct mlx5_interface *intf; 84290650Shselasky void *context; 85290650Shselasky}; 86290650Shselasky 87329209Shselaskyenum { 88329209Shselasky MLX5_ATOMIC_REQ_MODE_BE = 0x0, 89329209Shselasky MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS = 0x1, 90329209Shselasky}; 91329209Shselasky 92290650Shselaskystatic struct mlx5_profile profiles[] = { 93290650Shselasky [0] = { 94290650Shselasky .mask = 0, 95290650Shselasky }, 96290650Shselasky [1] = { 97290650Shselasky .mask = MLX5_PROF_MASK_QP_SIZE, 98290650Shselasky .log_max_qp = 12, 99290650Shselasky }, 100290650Shselasky [2] = { 101290650Shselasky .mask = MLX5_PROF_MASK_QP_SIZE | 102290650Shselasky MLX5_PROF_MASK_MR_CACHE, 103290650Shselasky .log_max_qp = 17, 104290650Shselasky .mr_cache[0] = { 105290650Shselasky .size = 500, 106290650Shselasky .limit = 250 107290650Shselasky }, 108290650Shselasky .mr_cache[1] = { 109290650Shselasky .size = 500, 110290650Shselasky .limit = 250 111290650Shselasky }, 112290650Shselasky .mr_cache[2] = { 113290650Shselasky .size = 500, 114290650Shselasky .limit = 250 115290650Shselasky }, 116290650Shselasky .mr_cache[3] = { 117290650Shselasky .size = 500, 118290650Shselasky .limit = 250 119290650Shselasky }, 120290650Shselasky .mr_cache[4] = { 121290650Shselasky .size = 500, 122290650Shselasky .limit = 250 123290650Shselasky }, 124290650Shselasky .mr_cache[5] = { 125290650Shselasky .size = 500, 126290650Shselasky .limit = 250 127290650Shselasky }, 128290650Shselasky .mr_cache[6] = { 129290650Shselasky .size = 500, 130290650Shselasky .limit = 250 131290650Shselasky }, 132290650Shselasky .mr_cache[7] = { 133290650Shselasky .size = 500, 134290650Shselasky .limit = 250 135290650Shselasky }, 136290650Shselasky .mr_cache[8] = { 137290650Shselasky .size = 500, 138290650Shselasky .limit = 250 139290650Shselasky }, 140290650Shselasky .mr_cache[9] = { 141290650Shselasky .size = 500, 142290650Shselasky .limit = 250 143290650Shselasky }, 144290650Shselasky .mr_cache[10] = { 145290650Shselasky .size = 500, 146290650Shselasky .limit = 250 147290650Shselasky }, 148290650Shselasky .mr_cache[11] = { 149290650Shselasky .size = 500, 150290650Shselasky .limit = 250 151290650Shselasky }, 152290650Shselasky .mr_cache[12] = { 153290650Shselasky .size = 64, 154290650Shselasky .limit = 32 155290650Shselasky }, 156290650Shselasky .mr_cache[13] = { 157290650Shselasky .size = 32, 158290650Shselasky .limit = 16 159290650Shselasky }, 160290650Shselasky .mr_cache[14] = { 161290650Shselasky .size = 16, 162290650Shselasky .limit = 8 163290650Shselasky }, 164290650Shselasky }, 165290650Shselasky [3] = { 166290650Shselasky .mask = MLX5_PROF_MASK_QP_SIZE, 167290650Shselasky .log_max_qp = 17, 168290650Shselasky }, 169290650Shselasky}; 170290650Shselasky 171290650Shselaskystatic int set_dma_caps(struct pci_dev *pdev) 172290650Shselasky{ 173290650Shselasky int err; 174290650Shselasky 175290650Shselasky err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 176290650Shselasky if (err) { 177290650Shselasky device_printf((&pdev->dev)->bsddev, "WARN: ""Warning: couldn't set 64-bit PCI DMA mask\n"); 178290650Shselasky err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 179290650Shselasky if (err) { 180290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Can't set PCI DMA mask, aborting\n"); 181290650Shselasky return err; 182290650Shselasky } 183290650Shselasky } 184290650Shselasky 185290650Shselasky err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 186290650Shselasky if (err) { 187290650Shselasky device_printf((&pdev->dev)->bsddev, "WARN: ""Warning: couldn't set 64-bit consistent PCI DMA mask\n"); 188290650Shselasky err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 189290650Shselasky if (err) { 190290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Can't set consistent PCI DMA mask, aborting\n"); 191290650Shselasky return err; 192290650Shselasky } 193290650Shselasky } 194290650Shselasky 195290650Shselasky dma_set_max_seg_size(&pdev->dev, 2u * 1024 * 1024 * 1024); 196290650Shselasky return err; 197290650Shselasky} 198290650Shselasky 199331580Shselaskystatic int mlx5_pci_enable_device(struct mlx5_core_dev *dev) 200331580Shselasky{ 201331580Shselasky struct pci_dev *pdev = dev->pdev; 202331580Shselasky int err = 0; 203331580Shselasky 204331580Shselasky mutex_lock(&dev->pci_status_mutex); 205331580Shselasky if (dev->pci_status == MLX5_PCI_STATUS_DISABLED) { 206331580Shselasky err = pci_enable_device(pdev); 207331580Shselasky if (!err) 208331580Shselasky dev->pci_status = MLX5_PCI_STATUS_ENABLED; 209331580Shselasky } 210331580Shselasky mutex_unlock(&dev->pci_status_mutex); 211331580Shselasky 212331580Shselasky return err; 213331580Shselasky} 214331580Shselasky 215331580Shselaskystatic void mlx5_pci_disable_device(struct mlx5_core_dev *dev) 216331580Shselasky{ 217331580Shselasky struct pci_dev *pdev = dev->pdev; 218331580Shselasky 219331580Shselasky mutex_lock(&dev->pci_status_mutex); 220331580Shselasky if (dev->pci_status == MLX5_PCI_STATUS_ENABLED) { 221331580Shselasky pci_disable_device(pdev); 222331580Shselasky dev->pci_status = MLX5_PCI_STATUS_DISABLED; 223331580Shselasky } 224331580Shselasky mutex_unlock(&dev->pci_status_mutex); 225331580Shselasky} 226331580Shselasky 227290650Shselaskystatic int request_bar(struct pci_dev *pdev) 228290650Shselasky{ 229290650Shselasky int err = 0; 230290650Shselasky 231290650Shselasky if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { 232290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Missing registers BAR, aborting\n"); 233290650Shselasky return -ENODEV; 234290650Shselasky } 235290650Shselasky 236290650Shselasky err = pci_request_regions(pdev, DRIVER_NAME); 237290650Shselasky if (err) 238290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Couldn't get PCI resources, aborting\n"); 239290650Shselasky 240290650Shselasky return err; 241290650Shselasky} 242290650Shselasky 243290650Shselaskystatic void release_bar(struct pci_dev *pdev) 244290650Shselasky{ 245290650Shselasky pci_release_regions(pdev); 246290650Shselasky} 247290650Shselasky 248290650Shselaskystatic int mlx5_enable_msix(struct mlx5_core_dev *dev) 249290650Shselasky{ 250290650Shselasky struct mlx5_priv *priv = &dev->priv; 251290650Shselasky struct mlx5_eq_table *table = &priv->eq_table; 252290650Shselasky int num_eqs = 1 << MLX5_CAP_GEN(dev, log_max_eq); 253338554Shselasky int limit = dev->msix_eqvec; 254337112Shselasky int nvec = MLX5_EQ_VEC_COMP_BASE; 255290650Shselasky int i; 256290650Shselasky 257337112Shselasky if (limit > 0) 258337112Shselasky nvec += limit; 259337112Shselasky else 260337112Shselasky nvec += MLX5_CAP_GEN(dev, num_ports) * num_online_cpus(); 261337112Shselasky 262290650Shselasky nvec = min_t(int, nvec, num_eqs); 263290650Shselasky if (nvec <= MLX5_EQ_VEC_COMP_BASE) 264290650Shselasky return -ENOMEM; 265290650Shselasky 266290650Shselasky priv->msix_arr = kzalloc(nvec * sizeof(*priv->msix_arr), GFP_KERNEL); 267290650Shselasky 268290650Shselasky priv->irq_info = kzalloc(nvec * sizeof(*priv->irq_info), GFP_KERNEL); 269290650Shselasky 270290650Shselasky for (i = 0; i < nvec; i++) 271290650Shselasky priv->msix_arr[i].entry = i; 272290650Shselasky 273290650Shselasky nvec = pci_enable_msix_range(dev->pdev, priv->msix_arr, 274290650Shselasky MLX5_EQ_VEC_COMP_BASE + 1, nvec); 275290650Shselasky if (nvec < 0) 276290650Shselasky return nvec; 277290650Shselasky 278290650Shselasky table->num_comp_vectors = nvec - MLX5_EQ_VEC_COMP_BASE; 279290650Shselasky 280290650Shselasky return 0; 281290650Shselasky 282290650Shselasky} 283290650Shselasky 284290650Shselaskystatic void mlx5_disable_msix(struct mlx5_core_dev *dev) 285290650Shselasky{ 286290650Shselasky struct mlx5_priv *priv = &dev->priv; 287290650Shselasky 288290650Shselasky pci_disable_msix(dev->pdev); 289290650Shselasky kfree(priv->irq_info); 290290650Shselasky kfree(priv->msix_arr); 291290650Shselasky} 292290650Shselasky 293290650Shselaskystruct mlx5_reg_host_endianess { 294290650Shselasky u8 he; 295290650Shselasky u8 rsvd[15]; 296290650Shselasky}; 297290650Shselasky 298290650Shselasky 299290650Shselasky#define CAP_MASK(pos, size) ((u64)((1 << (size)) - 1) << (pos)) 300290650Shselasky 301290650Shselaskyenum { 302290650Shselasky MLX5_CAP_BITS_RW_MASK = CAP_MASK(MLX5_CAP_OFF_CMDIF_CSUM, 2) | 303306233Shselasky MLX5_DEV_CAP_FLAG_DCT | 304306233Shselasky MLX5_DEV_CAP_FLAG_DRAIN_SIGERR, 305290650Shselasky}; 306290650Shselasky 307290650Shselaskystatic u16 to_fw_pkey_sz(u32 size) 308290650Shselasky{ 309290650Shselasky switch (size) { 310290650Shselasky case 128: 311290650Shselasky return 0; 312290650Shselasky case 256: 313290650Shselasky return 1; 314290650Shselasky case 512: 315290650Shselasky return 2; 316290650Shselasky case 1024: 317290650Shselasky return 3; 318290650Shselasky case 2048: 319290650Shselasky return 4; 320290650Shselasky case 4096: 321290650Shselasky return 5; 322290650Shselasky default: 323290650Shselasky printf("mlx5_core: WARN: ""invalid pkey table size %d\n", size); 324290650Shselasky return 0; 325290650Shselasky } 326290650Shselasky} 327290650Shselasky 328331807Shselaskystatic int mlx5_core_get_caps_mode(struct mlx5_core_dev *dev, 329331807Shselasky enum mlx5_cap_type cap_type, 330331807Shselasky enum mlx5_cap_mode cap_mode) 331290650Shselasky{ 332290650Shselasky u8 in[MLX5_ST_SZ_BYTES(query_hca_cap_in)]; 333290650Shselasky int out_sz = MLX5_ST_SZ_BYTES(query_hca_cap_out); 334290650Shselasky void *out, *hca_caps; 335290650Shselasky u16 opmod = (cap_type << 1) | (cap_mode & 0x01); 336290650Shselasky int err; 337290650Shselasky 338290650Shselasky memset(in, 0, sizeof(in)); 339290650Shselasky out = kzalloc(out_sz, GFP_KERNEL); 340290650Shselasky 341290650Shselasky MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP); 342290650Shselasky MLX5_SET(query_hca_cap_in, in, op_mod, opmod); 343290650Shselasky err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz); 344290650Shselasky if (err) { 345290650Shselasky mlx5_core_warn(dev, 346290650Shselasky "QUERY_HCA_CAP : type(%x) opmode(%x) Failed(%d)\n", 347290650Shselasky cap_type, cap_mode, err); 348290650Shselasky goto query_ex; 349290650Shselasky } 350290650Shselasky 351290650Shselasky hca_caps = MLX5_ADDR_OF(query_hca_cap_out, out, capability); 352290650Shselasky 353290650Shselasky switch (cap_mode) { 354290650Shselasky case HCA_CAP_OPMOD_GET_MAX: 355290650Shselasky memcpy(dev->hca_caps_max[cap_type], hca_caps, 356290650Shselasky MLX5_UN_SZ_BYTES(hca_cap_union)); 357290650Shselasky break; 358290650Shselasky case HCA_CAP_OPMOD_GET_CUR: 359290650Shselasky memcpy(dev->hca_caps_cur[cap_type], hca_caps, 360290650Shselasky MLX5_UN_SZ_BYTES(hca_cap_union)); 361290650Shselasky break; 362290650Shselasky default: 363290650Shselasky mlx5_core_warn(dev, 364290650Shselasky "Tried to query dev cap type(%x) with wrong opmode(%x)\n", 365290650Shselasky cap_type, cap_mode); 366290650Shselasky err = -EINVAL; 367290650Shselasky break; 368290650Shselasky } 369290650Shselaskyquery_ex: 370290650Shselasky kfree(out); 371290650Shselasky return err; 372290650Shselasky} 373290650Shselasky 374331807Shselaskyint mlx5_core_get_caps(struct mlx5_core_dev *dev, enum mlx5_cap_type cap_type) 375331807Shselasky{ 376331807Shselasky int ret; 377331807Shselasky 378331807Shselasky ret = mlx5_core_get_caps_mode(dev, cap_type, HCA_CAP_OPMOD_GET_CUR); 379331807Shselasky if (ret) 380331807Shselasky return ret; 381331807Shselasky 382331807Shselasky return mlx5_core_get_caps_mode(dev, cap_type, HCA_CAP_OPMOD_GET_MAX); 383331807Shselasky} 384331807Shselasky 385290650Shselaskystatic int set_caps(struct mlx5_core_dev *dev, void *in, int in_sz) 386290650Shselasky{ 387331807Shselasky u32 out[MLX5_ST_SZ_DW(set_hca_cap_out)] = {0}; 388290650Shselasky 389290650Shselasky MLX5_SET(set_hca_cap_in, in, opcode, MLX5_CMD_OP_SET_HCA_CAP); 390290650Shselasky 391331807Shselasky return mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out)); 392290650Shselasky} 393290650Shselasky 394290650Shselaskystatic int handle_hca_cap(struct mlx5_core_dev *dev) 395290650Shselasky{ 396290650Shselasky void *set_ctx = NULL; 397290650Shselasky struct mlx5_profile *prof = dev->profile; 398290650Shselasky int err = -ENOMEM; 399290650Shselasky int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in); 400290650Shselasky void *set_hca_cap; 401290650Shselasky 402290650Shselasky set_ctx = kzalloc(set_sz, GFP_KERNEL); 403290650Shselasky 404331807Shselasky err = mlx5_core_get_caps(dev, MLX5_CAP_GENERAL); 405290650Shselasky if (err) 406290650Shselasky goto query_ex; 407290650Shselasky 408290650Shselasky set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, 409290650Shselasky capability); 410290650Shselasky memcpy(set_hca_cap, dev->hca_caps_cur[MLX5_CAP_GENERAL], 411290650Shselasky MLX5_ST_SZ_BYTES(cmd_hca_cap)); 412290650Shselasky 413290650Shselasky mlx5_core_dbg(dev, "Current Pkey table size %d Setting new size %d\n", 414290650Shselasky mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size)), 415290650Shselasky 128); 416290650Shselasky /* we limit the size of the pkey table to 128 entries for now */ 417290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, pkey_table_size, 418290650Shselasky to_fw_pkey_sz(128)); 419290650Shselasky 420290650Shselasky if (prof->mask & MLX5_PROF_MASK_QP_SIZE) 421290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, log_max_qp, 422290650Shselasky prof->log_max_qp); 423290650Shselasky 424290650Shselasky /* disable cmdif checksum */ 425290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, cmdif_checksum, 0); 426290650Shselasky 427306233Shselasky /* enable drain sigerr */ 428306233Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, drain_sigerr, 1); 429306233Shselasky 430290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, log_uar_page_sz, PAGE_SHIFT - 12); 431290650Shselasky 432290650Shselasky err = set_caps(dev, set_ctx, set_sz); 433290650Shselasky 434290650Shselaskyquery_ex: 435290650Shselasky kfree(set_ctx); 436290650Shselasky return err; 437290650Shselasky} 438290650Shselasky 439329209Shselaskystatic int handle_hca_cap_atomic(struct mlx5_core_dev *dev) 440329209Shselasky{ 441329209Shselasky void *set_ctx; 442329209Shselasky void *set_hca_cap; 443329209Shselasky int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in); 444329209Shselasky int req_endianness; 445329209Shselasky int err; 446329209Shselasky 447329209Shselasky if (MLX5_CAP_GEN(dev, atomic)) { 448331807Shselasky err = mlx5_core_get_caps(dev, MLX5_CAP_ATOMIC); 449329209Shselasky if (err) 450329209Shselasky return err; 451329209Shselasky } else { 452329209Shselasky return 0; 453329209Shselasky } 454329209Shselasky 455329209Shselasky req_endianness = 456329209Shselasky MLX5_CAP_ATOMIC(dev, 457329209Shselasky supported_atomic_req_8B_endianess_mode_1); 458329209Shselasky 459329209Shselasky if (req_endianness != MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS) 460329209Shselasky return 0; 461329209Shselasky 462329209Shselasky set_ctx = kzalloc(set_sz, GFP_KERNEL); 463329209Shselasky if (!set_ctx) 464329209Shselasky return -ENOMEM; 465329209Shselasky 466329209Shselasky MLX5_SET(set_hca_cap_in, set_ctx, op_mod, 467329209Shselasky MLX5_SET_HCA_CAP_OP_MOD_ATOMIC << 1); 468329209Shselasky set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, capability); 469329209Shselasky 470329209Shselasky /* Set requestor to host endianness */ 471329209Shselasky MLX5_SET(atomic_caps, set_hca_cap, atomic_req_8B_endianess_mode, 472329209Shselasky MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS); 473329209Shselasky 474329209Shselasky err = set_caps(dev, set_ctx, set_sz); 475329209Shselasky 476329209Shselasky kfree(set_ctx); 477329209Shselasky return err; 478329209Shselasky} 479329209Shselasky 480290650Shselaskystatic int set_hca_ctrl(struct mlx5_core_dev *dev) 481290650Shselasky{ 482290650Shselasky struct mlx5_reg_host_endianess he_in; 483290650Shselasky struct mlx5_reg_host_endianess he_out; 484290650Shselasky int err; 485290650Shselasky 486306233Shselasky if (MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_ETH && 487306233Shselasky !MLX5_CAP_GEN(dev, roce)) 488306233Shselasky return 0; 489306233Shselasky 490290650Shselasky memset(&he_in, 0, sizeof(he_in)); 491290650Shselasky he_in.he = MLX5_SET_HOST_ENDIANNESS; 492290650Shselasky err = mlx5_core_access_reg(dev, &he_in, sizeof(he_in), 493290650Shselasky &he_out, sizeof(he_out), 494290650Shselasky MLX5_REG_HOST_ENDIANNESS, 0, 1); 495290650Shselasky return err; 496290650Shselasky} 497290650Shselasky 498290650Shselaskystatic int mlx5_core_enable_hca(struct mlx5_core_dev *dev) 499290650Shselasky{ 500331807Shselasky u32 out[MLX5_ST_SZ_DW(enable_hca_out)] = {0}; 501331807Shselasky u32 in[MLX5_ST_SZ_DW(enable_hca_in)] = {0}; 502290650Shselasky 503290650Shselasky MLX5_SET(enable_hca_in, in, opcode, MLX5_CMD_OP_ENABLE_HCA); 504331807Shselasky return mlx5_cmd_exec(dev, &in, sizeof(in), &out, sizeof(out)); 505290650Shselasky} 506290650Shselasky 507290650Shselaskystatic int mlx5_core_disable_hca(struct mlx5_core_dev *dev) 508290650Shselasky{ 509331807Shselasky u32 out[MLX5_ST_SZ_DW(disable_hca_out)] = {0}; 510331807Shselasky u32 in[MLX5_ST_SZ_DW(disable_hca_in)] = {0}; 511290650Shselasky 512290650Shselasky MLX5_SET(disable_hca_in, in, opcode, MLX5_CMD_OP_DISABLE_HCA); 513331807Shselasky return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); 514290650Shselasky} 515290650Shselasky 516290650Shselaskystatic int mlx5_core_set_issi(struct mlx5_core_dev *dev) 517290650Shselasky{ 518331807Shselasky u32 query_in[MLX5_ST_SZ_DW(query_issi_in)] = {0}; 519331807Shselasky u32 query_out[MLX5_ST_SZ_DW(query_issi_out)] = {0}; 520331807Shselasky u32 sup_issi; 521290650Shselasky int err; 522290650Shselasky 523290650Shselasky MLX5_SET(query_issi_in, query_in, opcode, MLX5_CMD_OP_QUERY_ISSI); 524290650Shselasky 525331807Shselasky err = mlx5_cmd_exec(dev, query_in, sizeof(query_in), query_out, sizeof(query_out)); 526290650Shselasky if (err) { 527331807Shselasky u32 syndrome; 528331807Shselasky u8 status; 529331807Shselasky 530331807Shselasky mlx5_cmd_mbox_status(query_out, &status, &syndrome); 531331807Shselasky if (status == MLX5_CMD_STAT_BAD_OP_ERR) { 532290650Shselasky pr_debug("Only ISSI 0 is supported\n"); 533290650Shselasky return 0; 534290650Shselasky } 535290650Shselasky 536290650Shselasky printf("mlx5_core: ERR: ""failed to query ISSI\n"); 537290650Shselasky return err; 538290650Shselasky } 539290650Shselasky 540290650Shselasky sup_issi = MLX5_GET(query_issi_out, query_out, supported_issi_dw0); 541290650Shselasky 542290650Shselasky if (sup_issi & (1 << 1)) { 543331807Shselasky u32 set_in[MLX5_ST_SZ_DW(set_issi_in)] = {0}; 544331807Shselasky u32 set_out[MLX5_ST_SZ_DW(set_issi_out)] = {0}; 545290650Shselasky 546290650Shselasky MLX5_SET(set_issi_in, set_in, opcode, MLX5_CMD_OP_SET_ISSI); 547290650Shselasky MLX5_SET(set_issi_in, set_in, current_issi, 1); 548290650Shselasky 549331807Shselasky err = mlx5_cmd_exec(dev, set_in, sizeof(set_in), set_out, sizeof(set_out)); 550290650Shselasky if (err) { 551331807Shselasky printf("mlx5_core: ERR: ""failed to set ISSI=1 err(%d)\n", err); 552290650Shselasky return err; 553290650Shselasky } 554290650Shselasky 555290650Shselasky dev->issi = 1; 556290650Shselasky 557290650Shselasky return 0; 558290650Shselasky } else if (sup_issi & (1 << 0)) { 559290650Shselasky return 0; 560290650Shselasky } 561290650Shselasky 562290650Shselasky return -ENOTSUPP; 563290650Shselasky} 564290650Shselasky 565290650Shselasky 566290650Shselaskyint mlx5_vector2eqn(struct mlx5_core_dev *dev, int vector, int *eqn, int *irqn) 567290650Shselasky{ 568290650Shselasky struct mlx5_eq_table *table = &dev->priv.eq_table; 569290650Shselasky struct mlx5_eq *eq; 570290650Shselasky int err = -ENOENT; 571290650Shselasky 572290650Shselasky spin_lock(&table->lock); 573290650Shselasky list_for_each_entry(eq, &table->comp_eqs_list, list) { 574290650Shselasky if (eq->index == vector) { 575290650Shselasky *eqn = eq->eqn; 576290650Shselasky *irqn = eq->irqn; 577290650Shselasky err = 0; 578290650Shselasky break; 579290650Shselasky } 580290650Shselasky } 581290650Shselasky spin_unlock(&table->lock); 582290650Shselasky 583290650Shselasky return err; 584290650Shselasky} 585290650ShselaskyEXPORT_SYMBOL(mlx5_vector2eqn); 586290650Shselasky 587290650Shselaskyint mlx5_rename_eq(struct mlx5_core_dev *dev, int eq_ix, char *name) 588290650Shselasky{ 589290650Shselasky struct mlx5_priv *priv = &dev->priv; 590290650Shselasky struct mlx5_eq_table *table = &priv->eq_table; 591290650Shselasky struct mlx5_eq *eq; 592290650Shselasky int err = -ENOENT; 593290650Shselasky 594290650Shselasky spin_lock(&table->lock); 595290650Shselasky list_for_each_entry(eq, &table->comp_eqs_list, list) { 596290650Shselasky if (eq->index == eq_ix) { 597290650Shselasky int irq_ix = eq_ix + MLX5_EQ_VEC_COMP_BASE; 598290650Shselasky 599290650Shselasky snprintf(priv->irq_info[irq_ix].name, MLX5_MAX_IRQ_NAME, 600290650Shselasky "%s-%d", name, eq_ix); 601290650Shselasky 602290650Shselasky err = 0; 603290650Shselasky break; 604290650Shselasky } 605290650Shselasky } 606290650Shselasky spin_unlock(&table->lock); 607290650Shselasky 608290650Shselasky return err; 609290650Shselasky} 610290650Shselasky 611290650Shselaskystatic void free_comp_eqs(struct mlx5_core_dev *dev) 612290650Shselasky{ 613290650Shselasky struct mlx5_eq_table *table = &dev->priv.eq_table; 614290650Shselasky struct mlx5_eq *eq, *n; 615290650Shselasky 616290650Shselasky spin_lock(&table->lock); 617290650Shselasky list_for_each_entry_safe(eq, n, &table->comp_eqs_list, list) { 618290650Shselasky list_del(&eq->list); 619290650Shselasky spin_unlock(&table->lock); 620290650Shselasky if (mlx5_destroy_unmap_eq(dev, eq)) 621290650Shselasky mlx5_core_warn(dev, "failed to destroy EQ 0x%x\n", 622290650Shselasky eq->eqn); 623290650Shselasky kfree(eq); 624290650Shselasky spin_lock(&table->lock); 625290650Shselasky } 626290650Shselasky spin_unlock(&table->lock); 627290650Shselasky} 628290650Shselasky 629290650Shselaskystatic int alloc_comp_eqs(struct mlx5_core_dev *dev) 630290650Shselasky{ 631290650Shselasky struct mlx5_eq_table *table = &dev->priv.eq_table; 632290650Shselasky char name[MLX5_MAX_IRQ_NAME]; 633290650Shselasky struct mlx5_eq *eq; 634290650Shselasky int ncomp_vec; 635290650Shselasky int nent; 636290650Shselasky int err; 637290650Shselasky int i; 638290650Shselasky 639290650Shselasky INIT_LIST_HEAD(&table->comp_eqs_list); 640290650Shselasky ncomp_vec = table->num_comp_vectors; 641290650Shselasky nent = MLX5_COMP_EQ_SIZE; 642290650Shselasky for (i = 0; i < ncomp_vec; i++) { 643290650Shselasky eq = kzalloc(sizeof(*eq), GFP_KERNEL); 644290650Shselasky 645290650Shselasky snprintf(name, MLX5_MAX_IRQ_NAME, "mlx5_comp%d", i); 646290650Shselasky err = mlx5_create_map_eq(dev, eq, 647290650Shselasky i + MLX5_EQ_VEC_COMP_BASE, nent, 0, 648290650Shselasky name, &dev->priv.uuari.uars[0]); 649290650Shselasky if (err) { 650290650Shselasky kfree(eq); 651290650Shselasky goto clean; 652290650Shselasky } 653290650Shselasky mlx5_core_dbg(dev, "allocated completion EQN %d\n", eq->eqn); 654290650Shselasky eq->index = i; 655290650Shselasky spin_lock(&table->lock); 656290650Shselasky list_add_tail(&eq->list, &table->comp_eqs_list); 657290650Shselasky spin_unlock(&table->lock); 658290650Shselasky } 659290650Shselasky 660290650Shselasky return 0; 661290650Shselasky 662290650Shselaskyclean: 663290650Shselasky free_comp_eqs(dev); 664290650Shselasky return err; 665290650Shselasky} 666290650Shselasky 667290650Shselaskystatic int map_bf_area(struct mlx5_core_dev *dev) 668290650Shselasky{ 669290650Shselasky resource_size_t bf_start = pci_resource_start(dev->pdev, 0); 670290650Shselasky resource_size_t bf_len = pci_resource_len(dev->pdev, 0); 671290650Shselasky 672290650Shselasky dev->priv.bf_mapping = io_mapping_create_wc(bf_start, bf_len); 673290650Shselasky 674290650Shselasky return dev->priv.bf_mapping ? 0 : -ENOMEM; 675290650Shselasky} 676290650Shselasky 677290650Shselaskystatic void unmap_bf_area(struct mlx5_core_dev *dev) 678290650Shselasky{ 679290650Shselasky if (dev->priv.bf_mapping) 680290650Shselasky io_mapping_free(dev->priv.bf_mapping); 681290650Shselasky} 682290650Shselasky 683290650Shselaskystatic inline int fw_initializing(struct mlx5_core_dev *dev) 684290650Shselasky{ 685290650Shselasky return ioread32be(&dev->iseg->initializing) >> 31; 686290650Shselasky} 687290650Shselasky 688290650Shselaskystatic int wait_fw_init(struct mlx5_core_dev *dev, u32 max_wait_mili) 689290650Shselasky{ 690290650Shselasky u64 end = jiffies + msecs_to_jiffies(max_wait_mili); 691290650Shselasky int err = 0; 692290650Shselasky 693290650Shselasky while (fw_initializing(dev)) { 694290650Shselasky if (time_after(jiffies, end)) { 695290650Shselasky err = -EBUSY; 696290650Shselasky break; 697290650Shselasky } 698290650Shselasky msleep(FW_INIT_WAIT_MS); 699290650Shselasky } 700290650Shselasky 701290650Shselasky return err; 702290650Shselasky} 703290650Shselasky 704331580Shselaskystatic void mlx5_add_device(struct mlx5_interface *intf, struct mlx5_priv *priv) 705290650Shselasky{ 706331580Shselasky struct mlx5_device_context *dev_ctx; 707331580Shselasky struct mlx5_core_dev *dev = container_of(priv, struct mlx5_core_dev, priv); 708331580Shselasky 709331580Shselasky dev_ctx = kzalloc(sizeof(*dev_ctx), GFP_KERNEL); 710331580Shselasky if (!dev_ctx) 711331580Shselasky return; 712331580Shselasky 713331580Shselasky dev_ctx->intf = intf; 714331580Shselasky CURVNET_SET_QUIET(vnet0); 715331580Shselasky dev_ctx->context = intf->add(dev); 716331580Shselasky CURVNET_RESTORE(); 717331580Shselasky 718331580Shselasky if (dev_ctx->context) { 719331580Shselasky spin_lock_irq(&priv->ctx_lock); 720331580Shselasky list_add_tail(&dev_ctx->list, &priv->ctx_list); 721331580Shselasky spin_unlock_irq(&priv->ctx_lock); 722331580Shselasky } else { 723331580Shselasky kfree(dev_ctx); 724331580Shselasky } 725331580Shselasky} 726331580Shselasky 727331580Shselaskystatic void mlx5_remove_device(struct mlx5_interface *intf, struct mlx5_priv *priv) 728331580Shselasky{ 729331580Shselasky struct mlx5_device_context *dev_ctx; 730331580Shselasky struct mlx5_core_dev *dev = container_of(priv, struct mlx5_core_dev, priv); 731331580Shselasky 732331580Shselasky list_for_each_entry(dev_ctx, &priv->ctx_list, list) 733331580Shselasky if (dev_ctx->intf == intf) { 734331580Shselasky spin_lock_irq(&priv->ctx_lock); 735331580Shselasky list_del(&dev_ctx->list); 736331580Shselasky spin_unlock_irq(&priv->ctx_lock); 737331580Shselasky 738331580Shselasky intf->remove(dev, dev_ctx->context); 739331580Shselasky kfree(dev_ctx); 740331580Shselasky return; 741331580Shselasky } 742331580Shselasky} 743331580Shselasky 744341958Shselaskyint 745341958Shselaskymlx5_register_device(struct mlx5_core_dev *dev) 746331580Shselasky{ 747290650Shselasky struct mlx5_priv *priv = &dev->priv; 748331580Shselasky struct mlx5_interface *intf; 749290650Shselasky 750331580Shselasky mutex_lock(&intf_mutex); 751331580Shselasky list_add_tail(&priv->dev_list, &dev_list); 752331580Shselasky list_for_each_entry(intf, &intf_list, list) 753331580Shselasky mlx5_add_device(intf, priv); 754331580Shselasky mutex_unlock(&intf_mutex); 755331580Shselasky 756331580Shselasky return 0; 757331580Shselasky} 758331580Shselasky 759341958Shselaskyvoid 760341958Shselaskymlx5_unregister_device(struct mlx5_core_dev *dev) 761331580Shselasky{ 762331580Shselasky struct mlx5_priv *priv = &dev->priv; 763331580Shselasky struct mlx5_interface *intf; 764331580Shselasky 765331580Shselasky mutex_lock(&intf_mutex); 766331580Shselasky list_for_each_entry(intf, &intf_list, list) 767331580Shselasky mlx5_remove_device(intf, priv); 768331580Shselasky list_del(&priv->dev_list); 769331580Shselasky mutex_unlock(&intf_mutex); 770331580Shselasky} 771331580Shselasky 772331580Shselaskyint mlx5_register_interface(struct mlx5_interface *intf) 773331580Shselasky{ 774331580Shselasky struct mlx5_priv *priv; 775331580Shselasky 776331580Shselasky if (!intf->add || !intf->remove) 777331580Shselasky return -EINVAL; 778331580Shselasky 779331580Shselasky mutex_lock(&intf_mutex); 780331580Shselasky list_add_tail(&intf->list, &intf_list); 781331580Shselasky list_for_each_entry(priv, &dev_list, dev_list) 782331580Shselasky mlx5_add_device(intf, priv); 783331580Shselasky mutex_unlock(&intf_mutex); 784331580Shselasky 785331580Shselasky return 0; 786331580Shselasky} 787331580ShselaskyEXPORT_SYMBOL(mlx5_register_interface); 788331580Shselasky 789331580Shselaskyvoid mlx5_unregister_interface(struct mlx5_interface *intf) 790331580Shselasky{ 791331580Shselasky struct mlx5_priv *priv; 792331580Shselasky 793331580Shselasky mutex_lock(&intf_mutex); 794331580Shselasky list_for_each_entry(priv, &dev_list, dev_list) 795331580Shselasky mlx5_remove_device(intf, priv); 796331580Shselasky list_del(&intf->list); 797331580Shselasky mutex_unlock(&intf_mutex); 798331580Shselasky} 799331580ShselaskyEXPORT_SYMBOL(mlx5_unregister_interface); 800331580Shselasky 801331580Shselaskyvoid *mlx5_get_protocol_dev(struct mlx5_core_dev *mdev, int protocol) 802331580Shselasky{ 803331580Shselasky struct mlx5_priv *priv = &mdev->priv; 804331580Shselasky struct mlx5_device_context *dev_ctx; 805331580Shselasky unsigned long flags; 806331580Shselasky void *result = NULL; 807331580Shselasky 808331580Shselasky spin_lock_irqsave(&priv->ctx_lock, flags); 809331580Shselasky 810331580Shselasky list_for_each_entry(dev_ctx, &mdev->priv.ctx_list, list) 811331580Shselasky if ((dev_ctx->intf->protocol == protocol) && 812331580Shselasky dev_ctx->intf->get_dev) { 813331580Shselasky result = dev_ctx->intf->get_dev(dev_ctx->context); 814331580Shselasky break; 815331580Shselasky } 816331580Shselasky 817331580Shselasky spin_unlock_irqrestore(&priv->ctx_lock, flags); 818331580Shselasky 819331580Shselasky return result; 820331580Shselasky} 821331580ShselaskyEXPORT_SYMBOL(mlx5_get_protocol_dev); 822331580Shselasky 823331580Shselaskystatic int mlx5_pci_init(struct mlx5_core_dev *dev, struct mlx5_priv *priv) 824331580Shselasky{ 825331580Shselasky struct pci_dev *pdev = dev->pdev; 826331580Shselasky int err = 0; 827331580Shselasky 828290650Shselasky pci_set_drvdata(dev->pdev, dev); 829290650Shselasky strncpy(priv->name, dev_name(&pdev->dev), MLX5_MAX_NAME_LEN); 830290650Shselasky priv->name[MLX5_MAX_NAME_LEN - 1] = 0; 831290650Shselasky 832290650Shselasky mutex_init(&priv->pgdir_mutex); 833290650Shselasky INIT_LIST_HEAD(&priv->pgdir_list); 834290650Shselasky spin_lock_init(&priv->mkey_lock); 835290650Shselasky 836290650Shselasky priv->numa_node = NUMA_NO_NODE; 837290650Shselasky 838331580Shselasky err = mlx5_pci_enable_device(dev); 839290650Shselasky if (err) { 840290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Cannot enable PCI device, aborting\n"); 841290650Shselasky goto err_dbg; 842290650Shselasky } 843290650Shselasky 844290650Shselasky err = request_bar(pdev); 845290650Shselasky if (err) { 846290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""error requesting BARs, aborting\n"); 847290650Shselasky goto err_disable; 848290650Shselasky } 849290650Shselasky 850290650Shselasky pci_set_master(pdev); 851290650Shselasky 852290650Shselasky err = set_dma_caps(pdev); 853290650Shselasky if (err) { 854290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed setting DMA capabilities mask, aborting\n"); 855290650Shselasky goto err_clr_master; 856290650Shselasky } 857290650Shselasky 858329212Shselasky dev->iseg_base = pci_resource_start(dev->pdev, 0); 859329212Shselasky dev->iseg = ioremap(dev->iseg_base, sizeof(*dev->iseg)); 860290650Shselasky if (!dev->iseg) { 861290650Shselasky err = -ENOMEM; 862290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed mapping initialization segment, aborting\n"); 863290650Shselasky goto err_clr_master; 864290650Shselasky } 865331580Shselasky 866337105Shselasky return 0; 867331585Shselasky 868331580Shselaskyerr_clr_master: 869331580Shselasky pci_clear_master(dev->pdev); 870331580Shselasky release_bar(dev->pdev); 871331580Shselaskyerr_disable: 872331580Shselasky mlx5_pci_disable_device(dev); 873331580Shselaskyerr_dbg: 874331580Shselasky return err; 875331580Shselasky} 876331580Shselasky 877331580Shselaskystatic void mlx5_pci_close(struct mlx5_core_dev *dev, struct mlx5_priv *priv) 878331580Shselasky{ 879331580Shselasky iounmap(dev->iseg); 880331580Shselasky pci_clear_master(dev->pdev); 881331580Shselasky release_bar(dev->pdev); 882331580Shselasky mlx5_pci_disable_device(dev); 883331580Shselasky} 884331580Shselasky 885331810Shselaskystatic int mlx5_init_once(struct mlx5_core_dev *dev, struct mlx5_priv *priv) 886331580Shselasky{ 887331580Shselasky struct pci_dev *pdev = dev->pdev; 888331580Shselasky int err; 889331580Shselasky 890337103Shselasky err = mlx5_vsc_find_cap(dev); 891337103Shselasky if (err) 892337103Shselasky dev_err(&pdev->dev, "Unable to find vendor specific capabilities\n"); 893331815Shselasky 894331810Shselasky err = mlx5_query_hca_caps(dev); 895331810Shselasky if (err) { 896331810Shselasky dev_err(&pdev->dev, "query hca failed\n"); 897331810Shselasky goto out; 898331810Shselasky } 899331810Shselasky 900331810Shselasky err = mlx5_query_board_id(dev); 901331810Shselasky if (err) { 902331810Shselasky dev_err(&pdev->dev, "query board id failed\n"); 903331810Shselasky goto out; 904331810Shselasky } 905331810Shselasky 906331810Shselasky err = mlx5_eq_init(dev); 907331810Shselasky if (err) { 908331810Shselasky dev_err(&pdev->dev, "failed to initialize eq\n"); 909331810Shselasky goto out; 910331810Shselasky } 911331810Shselasky 912331810Shselasky MLX5_INIT_DOORBELL_LOCK(&priv->cq_uar_lock); 913331810Shselasky 914331810Shselasky err = mlx5_init_cq_table(dev); 915331810Shselasky if (err) { 916331810Shselasky dev_err(&pdev->dev, "failed to initialize cq table\n"); 917331810Shselasky goto err_eq_cleanup; 918331810Shselasky } 919331810Shselasky 920331810Shselasky mlx5_init_qp_table(dev); 921331810Shselasky mlx5_init_srq_table(dev); 922331810Shselasky mlx5_init_mr_table(dev); 923331810Shselasky 924341958Shselasky mlx5_init_reserved_gids(dev); 925341958Shselasky mlx5_fpga_init(dev); 926341958Shselasky 927331810Shselasky return 0; 928331810Shselasky 929331810Shselaskyerr_eq_cleanup: 930331810Shselasky mlx5_eq_cleanup(dev); 931331810Shselasky 932331810Shselaskyout: 933331810Shselasky return err; 934331810Shselasky} 935331810Shselasky 936331810Shselaskystatic void mlx5_cleanup_once(struct mlx5_core_dev *dev) 937331810Shselasky{ 938341958Shselasky mlx5_fpga_cleanup(dev); 939341958Shselasky mlx5_cleanup_reserved_gids(dev); 940331810Shselasky mlx5_cleanup_mr_table(dev); 941331810Shselasky mlx5_cleanup_srq_table(dev); 942331810Shselasky mlx5_cleanup_qp_table(dev); 943331810Shselasky mlx5_cleanup_cq_table(dev); 944331810Shselasky mlx5_eq_cleanup(dev); 945331810Shselasky} 946331810Shselasky 947331810Shselaskystatic int mlx5_load_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv, 948331810Shselasky bool boot) 949331810Shselasky{ 950331810Shselasky struct pci_dev *pdev = dev->pdev; 951331810Shselasky int err; 952331810Shselasky 953331580Shselasky mutex_lock(&dev->intf_state_mutex); 954331580Shselasky if (test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) { 955331580Shselasky dev_warn(&dev->pdev->dev, "%s: interface is up, NOP\n", 956331580Shselasky __func__); 957331580Shselasky goto out; 958331580Shselasky } 959331580Shselasky 960290650Shselasky device_printf((&pdev->dev)->bsddev, "INFO: ""firmware version: %d.%d.%d\n", fw_rev_maj(dev), fw_rev_min(dev), fw_rev_sub(dev)); 961290650Shselasky 962306233Shselasky /* 963306233Shselasky * On load removing any previous indication of internal error, 964306233Shselasky * device is up 965306233Shselasky */ 966306233Shselasky dev->state = MLX5_DEVICE_STATE_UP; 967306233Shselasky 968290650Shselasky err = mlx5_cmd_init(dev); 969290650Shselasky if (err) { 970290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed initializing command interface, aborting\n"); 971331580Shselasky goto out_err; 972290650Shselasky } 973290650Shselasky 974290650Shselasky err = wait_fw_init(dev, FW_INIT_TIMEOUT_MILI); 975290650Shselasky if (err) { 976290650Shselasky device_printf((&dev->pdev->dev)->bsddev, "ERR: ""Firmware over %d MS in initializing state, aborting\n", FW_INIT_TIMEOUT_MILI); 977290650Shselasky goto err_cmd_cleanup; 978290650Shselasky } 979290650Shselasky 980290650Shselasky err = mlx5_core_enable_hca(dev); 981290650Shselasky if (err) { 982290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""enable hca failed\n"); 983331810Shselasky goto err_cmd_cleanup; 984290650Shselasky } 985290650Shselasky 986290650Shselasky err = mlx5_core_set_issi(dev); 987290650Shselasky if (err) { 988290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""failed to set issi\n"); 989290650Shselasky goto err_disable_hca; 990290650Shselasky } 991290650Shselasky 992290650Shselasky err = mlx5_pagealloc_start(dev); 993290650Shselasky if (err) { 994290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""mlx5_pagealloc_start failed\n"); 995290650Shselasky goto err_disable_hca; 996290650Shselasky } 997290650Shselasky 998290650Shselasky err = mlx5_satisfy_startup_pages(dev, 1); 999290650Shselasky if (err) { 1000290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""failed to allocate boot pages\n"); 1001290650Shselasky goto err_pagealloc_stop; 1002290650Shselasky } 1003290650Shselasky 1004329209Shselasky err = set_hca_ctrl(dev); 1005329209Shselasky if (err) { 1006329209Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""set_hca_ctrl failed\n"); 1007329209Shselasky goto reclaim_boot_pages; 1008329209Shselasky } 1009329209Shselasky 1010306233Shselasky err = handle_hca_cap(dev); 1011290650Shselasky if (err) { 1012306233Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""handle_hca_cap failed\n"); 1013290650Shselasky goto reclaim_boot_pages; 1014290650Shselasky } 1015290650Shselasky 1016329209Shselasky err = handle_hca_cap_atomic(dev); 1017290650Shselasky if (err) { 1018329209Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""handle_hca_cap_atomic failed\n"); 1019290650Shselasky goto reclaim_boot_pages; 1020290650Shselasky } 1021290650Shselasky 1022290650Shselasky err = mlx5_satisfy_startup_pages(dev, 0); 1023290650Shselasky if (err) { 1024290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""failed to allocate init pages\n"); 1025290650Shselasky goto reclaim_boot_pages; 1026290650Shselasky } 1027290650Shselasky 1028290650Shselasky err = mlx5_cmd_init_hca(dev); 1029290650Shselasky if (err) { 1030290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""init hca failed\n"); 1031290650Shselasky goto reclaim_boot_pages; 1032290650Shselasky } 1033290650Shselasky 1034290650Shselasky mlx5_start_health_poll(dev); 1035290650Shselasky 1036331810Shselasky if (boot && mlx5_init_once(dev, priv)) { 1037331810Shselasky dev_err(&pdev->dev, "sw objs init failed\n"); 1038290650Shselasky goto err_stop_poll; 1039290650Shselasky } 1040290650Shselasky 1041290650Shselasky err = mlx5_enable_msix(dev); 1042290650Shselasky if (err) { 1043290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""enable msix failed\n"); 1044331810Shselasky goto err_cleanup_once; 1045290650Shselasky } 1046290650Shselasky 1047290650Shselasky err = mlx5_alloc_uuars(dev, &priv->uuari); 1048290650Shselasky if (err) { 1049290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed allocating uar, aborting\n"); 1050331810Shselasky goto err_disable_msix; 1051290650Shselasky } 1052290650Shselasky 1053290650Shselasky err = mlx5_start_eqs(dev); 1054290650Shselasky if (err) { 1055290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed to start pages and async EQs\n"); 1056290650Shselasky goto err_free_uar; 1057290650Shselasky } 1058290650Shselasky 1059290650Shselasky err = alloc_comp_eqs(dev); 1060290650Shselasky if (err) { 1061290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed to alloc completion EQs\n"); 1062290650Shselasky goto err_stop_eqs; 1063290650Shselasky } 1064290650Shselasky 1065290650Shselasky if (map_bf_area(dev)) 1066290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed to map blue flame area\n"); 1067290650Shselasky 1068329200Shselasky err = mlx5_init_fs(dev); 1069329200Shselasky if (err) { 1070329200Shselasky mlx5_core_err(dev, "flow steering init %d\n", err); 1071331810Shselasky goto err_free_comp_eqs; 1072329200Shselasky } 1073329200Shselasky 1074341958Shselasky err = mlx5_fpga_device_start(dev); 1075341958Shselasky if (err) { 1076341958Shselasky dev_err(&pdev->dev, "fpga device start failed %d\n", err); 1077341958Shselasky goto err_fpga_start; 1078341958Shselasky } 1079341958Shselasky 1080331580Shselasky err = mlx5_register_device(dev); 1081331580Shselasky if (err) { 1082331580Shselasky dev_err(&pdev->dev, "mlx5_register_device failed %d\n", err); 1083331810Shselasky goto err_fs; 1084331580Shselasky } 1085331580Shselasky 1086331580Shselasky set_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state); 1087331580Shselasky 1088331580Shselaskyout: 1089331580Shselasky mutex_unlock(&dev->intf_state_mutex); 1090290650Shselasky return 0; 1091290650Shselasky 1092341958Shselaskyerr_fpga_start: 1093331810Shselaskyerr_fs: 1094331580Shselasky mlx5_cleanup_fs(dev); 1095331810Shselasky 1096331810Shselaskyerr_free_comp_eqs: 1097331810Shselasky free_comp_eqs(dev); 1098329200Shselasky unmap_bf_area(dev); 1099329200Shselasky 1100290650Shselaskyerr_stop_eqs: 1101290650Shselasky mlx5_stop_eqs(dev); 1102290650Shselasky 1103290650Shselaskyerr_free_uar: 1104290650Shselasky mlx5_free_uuars(dev, &priv->uuari); 1105290650Shselasky 1106331810Shselaskyerr_disable_msix: 1107290650Shselasky mlx5_disable_msix(dev); 1108290650Shselasky 1109331810Shselaskyerr_cleanup_once: 1110331810Shselasky if (boot) 1111331810Shselasky mlx5_cleanup_once(dev); 1112331810Shselasky 1113290650Shselaskyerr_stop_poll: 1114341934Shselasky mlx5_stop_health_poll(dev, boot); 1115290650Shselasky if (mlx5_cmd_teardown_hca(dev)) { 1116290650Shselasky device_printf((&dev->pdev->dev)->bsddev, "ERR: ""tear_down_hca failed, skip cleanup\n"); 1117331580Shselasky goto out_err; 1118290650Shselasky } 1119290650Shselasky 1120290650Shselaskyreclaim_boot_pages: 1121290650Shselasky mlx5_reclaim_startup_pages(dev); 1122290650Shselasky 1123290650Shselaskyerr_pagealloc_stop: 1124290650Shselasky mlx5_pagealloc_stop(dev); 1125290650Shselasky 1126290650Shselaskyerr_disable_hca: 1127290650Shselasky mlx5_core_disable_hca(dev); 1128290650Shselasky 1129290650Shselaskyerr_cmd_cleanup: 1130290650Shselasky mlx5_cmd_cleanup(dev); 1131290650Shselasky 1132331580Shselaskyout_err: 1133331580Shselasky dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR; 1134331580Shselasky mutex_unlock(&dev->intf_state_mutex); 1135290650Shselasky 1136290650Shselasky return err; 1137290650Shselasky} 1138290650Shselasky 1139331810Shselaskystatic int mlx5_unload_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv, 1140331810Shselasky bool cleanup) 1141290650Shselasky{ 1142331580Shselasky int err = 0; 1143290650Shselasky 1144331811Shselasky if (cleanup) 1145331811Shselasky mlx5_drain_health_recovery(dev); 1146331811Shselasky 1147331580Shselasky mutex_lock(&dev->intf_state_mutex); 1148347799Shselasky if (!test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) { 1149331580Shselasky dev_warn(&dev->pdev->dev, "%s: interface is down, NOP\n", __func__); 1150331810Shselasky if (cleanup) 1151331810Shselasky mlx5_cleanup_once(dev); 1152331580Shselasky goto out; 1153331580Shselasky } 1154331580Shselasky 1155331580Shselasky mlx5_unregister_device(dev); 1156331580Shselasky 1157341958Shselasky mlx5_fpga_device_stop(dev); 1158329200Shselasky mlx5_cleanup_fs(dev); 1159290650Shselasky unmap_bf_area(dev); 1160322144Shselasky mlx5_wait_for_reclaim_vfs_pages(dev); 1161290650Shselasky free_comp_eqs(dev); 1162290650Shselasky mlx5_stop_eqs(dev); 1163290650Shselasky mlx5_free_uuars(dev, &priv->uuari); 1164290650Shselasky mlx5_disable_msix(dev); 1165331810Shselasky if (cleanup) 1166331810Shselasky mlx5_cleanup_once(dev); 1167341934Shselasky mlx5_stop_health_poll(dev, cleanup); 1168331580Shselasky err = mlx5_cmd_teardown_hca(dev); 1169331580Shselasky if (err) { 1170290650Shselasky device_printf((&dev->pdev->dev)->bsddev, "ERR: ""tear_down_hca failed, skip cleanup\n"); 1171331580Shselasky goto out; 1172290650Shselasky } 1173290650Shselasky mlx5_pagealloc_stop(dev); 1174290650Shselasky mlx5_reclaim_startup_pages(dev); 1175290650Shselasky mlx5_core_disable_hca(dev); 1176290650Shselasky mlx5_cmd_cleanup(dev); 1177290650Shselasky 1178331580Shselaskyout: 1179331580Shselasky clear_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state); 1180331580Shselasky mutex_unlock(&dev->intf_state_mutex); 1181331580Shselasky return err; 1182290650Shselasky} 1183290650Shselasky 1184331580Shselaskyvoid mlx5_core_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event, 1185331580Shselasky unsigned long param) 1186290650Shselasky{ 1187290650Shselasky struct mlx5_priv *priv = &dev->priv; 1188290650Shselasky struct mlx5_device_context *dev_ctx; 1189290650Shselasky unsigned long flags; 1190290650Shselasky 1191290650Shselasky spin_lock_irqsave(&priv->ctx_lock, flags); 1192290650Shselasky 1193290650Shselasky list_for_each_entry(dev_ctx, &priv->ctx_list, list) 1194290650Shselasky if (dev_ctx->intf->event) 1195290650Shselasky dev_ctx->intf->event(dev, dev_ctx->context, event, param); 1196290650Shselasky 1197290650Shselasky spin_unlock_irqrestore(&priv->ctx_lock, flags); 1198290650Shselasky} 1199290650Shselasky 1200290650Shselaskystruct mlx5_core_event_handler { 1201290650Shselasky void (*event)(struct mlx5_core_dev *dev, 1202290650Shselasky enum mlx5_dev_event event, 1203290650Shselasky void *data); 1204290650Shselasky}; 1205290650Shselasky 1206290650Shselaskystatic int init_one(struct pci_dev *pdev, 1207290650Shselasky const struct pci_device_id *id) 1208290650Shselasky{ 1209290650Shselasky struct mlx5_core_dev *dev; 1210290650Shselasky struct mlx5_priv *priv; 1211338554Shselasky device_t bsddev = pdev->dev.bsddev; 1212290650Shselasky int err; 1213290650Shselasky 1214290650Shselasky dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1215290650Shselasky priv = &dev->priv; 1216306233Shselasky if (id) 1217306233Shselasky priv->pci_dev_data = id->driver_data; 1218290650Shselasky 1219347835Shselasky if (mlx5_prof_sel < 0 || mlx5_prof_sel >= ARRAY_SIZE(profiles)) { 1220341930Shselasky device_printf(bsddev, "WARN: selected profile out of range, selecting default (%d)\n", MLX5_DEFAULT_PROF); 1221347835Shselasky mlx5_prof_sel = MLX5_DEFAULT_PROF; 1222290650Shselasky } 1223347835Shselasky dev->profile = &profiles[mlx5_prof_sel]; 1224331580Shselasky dev->pdev = pdev; 1225290650Shselasky dev->event = mlx5_core_event; 1226290650Shselasky 1227341948Shselasky /* Set desc */ 1228341948Shselasky device_set_desc(bsddev, mlx5_version); 1229341948Shselasky 1230338554Shselasky sysctl_ctx_init(&dev->sysctl_ctx); 1231338554Shselasky SYSCTL_ADD_INT(&dev->sysctl_ctx, 1232338554Shselasky SYSCTL_CHILDREN(device_get_sysctl_tree(bsddev)), 1233338554Shselasky OID_AUTO, "msix_eqvec", CTLFLAG_RDTUN, &dev->msix_eqvec, 0, 1234338554Shselasky "Maximum number of MSIX event queue vectors, if set"); 1235338554Shselasky 1236290650Shselasky INIT_LIST_HEAD(&priv->ctx_list); 1237290650Shselasky spin_lock_init(&priv->ctx_lock); 1238341930Shselasky mutex_init(&dev->pci_status_mutex); 1239341930Shselasky mutex_init(&dev->intf_state_mutex); 1240331580Shselasky err = mlx5_pci_init(dev, priv); 1241290650Shselasky if (err) { 1242341930Shselasky device_printf(bsddev, "ERR: mlx5_pci_init failed %d\n", err); 1243331580Shselasky goto clean_dev; 1244290650Shselasky } 1245290650Shselasky 1246341930Shselasky err = mlx5_health_init(dev); 1247341930Shselasky if (err) { 1248341930Shselasky device_printf(bsddev, "ERR: mlx5_health_init failed %d\n", err); 1249341930Shselasky goto close_pci; 1250341930Shselasky } 1251331580Shselasky 1252331810Shselasky mlx5_pagealloc_init(dev); 1253331810Shselasky 1254331810Shselasky err = mlx5_load_one(dev, priv, true); 1255290650Shselasky if (err) { 1256341930Shselasky device_printf(bsddev, "ERR: mlx5_load_one failed %d\n", err); 1257331580Shselasky goto clean_health; 1258290650Shselasky } 1259290650Shselasky 1260331914Shselasky mlx5_fwdump_prep(dev); 1261331914Shselasky 1262341930Shselasky pci_save_state(bsddev); 1263290650Shselasky return 0; 1264290650Shselasky 1265331580Shselaskyclean_health: 1266331810Shselasky mlx5_pagealloc_cleanup(dev); 1267341930Shselasky mlx5_health_cleanup(dev); 1268331580Shselaskyclose_pci: 1269341930Shselasky mlx5_pci_close(dev, priv); 1270331580Shselaskyclean_dev: 1271338554Shselasky sysctl_ctx_free(&dev->sysctl_ctx); 1272290650Shselasky kfree(dev); 1273290650Shselasky return err; 1274290650Shselasky} 1275290650Shselasky 1276290650Shselaskystatic void remove_one(struct pci_dev *pdev) 1277290650Shselasky{ 1278290650Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1279331580Shselasky struct mlx5_priv *priv = &dev->priv; 1280290650Shselasky 1281331810Shselasky if (mlx5_unload_one(dev, priv, true)) { 1282331580Shselasky dev_err(&dev->pdev->dev, "mlx5_unload_one failed\n"); 1283331580Shselasky mlx5_health_cleanup(dev); 1284331580Shselasky return; 1285331580Shselasky } 1286331580Shselasky 1287331914Shselasky mlx5_fwdump_clean(dev); 1288331810Shselasky mlx5_pagealloc_cleanup(dev); 1289331580Shselasky mlx5_health_cleanup(dev); 1290331580Shselasky mlx5_pci_close(dev, priv); 1291331580Shselasky pci_set_drvdata(pdev, NULL); 1292338554Shselasky sysctl_ctx_free(&dev->sysctl_ctx); 1293290650Shselasky kfree(dev); 1294290650Shselasky} 1295290650Shselasky 1296331580Shselaskystatic pci_ers_result_t mlx5_pci_err_detected(struct pci_dev *pdev, 1297331580Shselasky pci_channel_state_t state) 1298331580Shselasky{ 1299331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1300331580Shselasky struct mlx5_priv *priv = &dev->priv; 1301331580Shselasky 1302331580Shselasky dev_info(&pdev->dev, "%s was called\n", __func__); 1303331810Shselasky mlx5_enter_error_state(dev, false); 1304331810Shselasky mlx5_unload_one(dev, priv, false); 1305331914Shselasky 1306331582Shselasky if (state) { 1307331582Shselasky mlx5_drain_health_wq(dev); 1308331582Shselasky mlx5_pci_disable_device(dev); 1309331582Shselasky } 1310331582Shselasky 1311331580Shselasky return state == pci_channel_io_perm_failure ? 1312331580Shselasky PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_NEED_RESET; 1313331580Shselasky} 1314331580Shselasky 1315331580Shselaskystatic pci_ers_result_t mlx5_pci_slot_reset(struct pci_dev *pdev) 1316331580Shselasky{ 1317331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1318331580Shselasky int err = 0; 1319331580Shselasky 1320331580Shselasky dev_info(&pdev->dev, "%s was called\n", __func__); 1321331580Shselasky 1322331580Shselasky err = mlx5_pci_enable_device(dev); 1323331580Shselasky if (err) { 1324331580Shselasky dev_err(&pdev->dev, "%s: mlx5_pci_enable_device failed with error code: %d\n" 1325331580Shselasky , __func__, err); 1326331580Shselasky return PCI_ERS_RESULT_DISCONNECT; 1327331580Shselasky } 1328331580Shselasky pci_set_master(pdev); 1329331580Shselasky pci_set_powerstate(pdev->dev.bsddev, PCI_POWERSTATE_D0); 1330331580Shselasky pci_restore_state(pdev->dev.bsddev); 1331331816Shselasky pci_save_state(pdev->dev.bsddev); 1332331580Shselasky 1333331580Shselasky return err ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED; 1334331580Shselasky} 1335331580Shselasky 1336331580Shselasky/* wait for the device to show vital signs. For now we check 1337331580Shselasky * that we can read the device ID and that the health buffer 1338331580Shselasky * shows a non zero value which is different than 0xffffffff 1339331580Shselasky */ 1340331580Shselaskystatic void wait_vital(struct pci_dev *pdev) 1341331580Shselasky{ 1342331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1343331580Shselasky struct mlx5_core_health *health = &dev->priv.health; 1344331580Shselasky const int niter = 100; 1345331580Shselasky u32 count; 1346331580Shselasky u16 did; 1347331580Shselasky int i; 1348331580Shselasky 1349331580Shselasky /* Wait for firmware to be ready after reset */ 1350331580Shselasky msleep(1000); 1351331580Shselasky for (i = 0; i < niter; i++) { 1352331580Shselasky if (pci_read_config_word(pdev, 2, &did)) { 1353331580Shselasky dev_warn(&pdev->dev, "failed reading config word\n"); 1354331580Shselasky break; 1355331580Shselasky } 1356331580Shselasky if (did == pdev->device) { 1357331580Shselasky dev_info(&pdev->dev, "device ID correctly read after %d iterations\n", i); 1358331580Shselasky break; 1359331580Shselasky } 1360331580Shselasky msleep(50); 1361331580Shselasky } 1362331580Shselasky if (i == niter) 1363331580Shselasky dev_warn(&pdev->dev, "%s-%d: could not read device ID\n", __func__, __LINE__); 1364331580Shselasky 1365331580Shselasky for (i = 0; i < niter; i++) { 1366331580Shselasky count = ioread32be(health->health_counter); 1367331580Shselasky if (count && count != 0xffffffff) { 1368331580Shselasky dev_info(&pdev->dev, "Counter value 0x%x after %d iterations\n", count, i); 1369331580Shselasky break; 1370331580Shselasky } 1371331580Shselasky msleep(50); 1372331580Shselasky } 1373331580Shselasky 1374331580Shselasky if (i == niter) 1375331580Shselasky dev_warn(&pdev->dev, "%s-%d: could not read device ID\n", __func__, __LINE__); 1376331580Shselasky} 1377331580Shselasky 1378331580Shselaskystatic void mlx5_pci_resume(struct pci_dev *pdev) 1379331580Shselasky{ 1380331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1381331580Shselasky struct mlx5_priv *priv = &dev->priv; 1382331580Shselasky int err; 1383331580Shselasky 1384331580Shselasky dev_info(&pdev->dev, "%s was called\n", __func__); 1385331580Shselasky 1386331580Shselasky wait_vital(pdev); 1387331580Shselasky 1388331810Shselasky err = mlx5_load_one(dev, priv, false); 1389331580Shselasky if (err) 1390331580Shselasky dev_err(&pdev->dev, "%s: mlx5_load_one failed with error code: %d\n" 1391331580Shselasky , __func__, err); 1392331580Shselasky else 1393331580Shselasky dev_info(&pdev->dev, "%s: device recovered\n", __func__); 1394331580Shselasky} 1395331580Shselasky 1396331580Shselaskystatic const struct pci_error_handlers mlx5_err_handler = { 1397331580Shselasky .error_detected = mlx5_pci_err_detected, 1398331580Shselasky .slot_reset = mlx5_pci_slot_reset, 1399331580Shselasky .resume = mlx5_pci_resume 1400331580Shselasky}; 1401331580Shselasky 1402331810Shselaskystatic int mlx5_try_fast_unload(struct mlx5_core_dev *dev) 1403331810Shselasky{ 1404347818Shselasky bool fast_teardown, force_teardown; 1405331810Shselasky int err; 1406331810Shselasky 1407347819Shselasky if (!mlx5_fast_unload_enabled) { 1408347819Shselasky mlx5_core_dbg(dev, "fast unload is disabled by user\n"); 1409347819Shselasky return -EOPNOTSUPP; 1410347819Shselasky } 1411347819Shselasky 1412347818Shselasky fast_teardown = MLX5_CAP_GEN(dev, fast_teardown); 1413347818Shselasky force_teardown = MLX5_CAP_GEN(dev, force_teardown); 1414347818Shselasky 1415347818Shselasky mlx5_core_dbg(dev, "force teardown firmware support=%d\n", force_teardown); 1416347818Shselasky mlx5_core_dbg(dev, "fast teardown firmware support=%d\n", fast_teardown); 1417347818Shselasky 1418347818Shselasky if (!fast_teardown && !force_teardown) 1419331810Shselasky return -EOPNOTSUPP; 1420331810Shselasky 1421331810Shselasky if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 1422331810Shselasky mlx5_core_dbg(dev, "Device in internal error state, giving up\n"); 1423331810Shselasky return -EAGAIN; 1424331810Shselasky } 1425331810Shselasky 1426341934Shselasky /* Panic tear down fw command will stop the PCI bus communication 1427341934Shselasky * with the HCA, so the health polll is no longer needed. 1428341934Shselasky */ 1429341934Shselasky mlx5_drain_health_wq(dev); 1430341934Shselasky mlx5_stop_health_poll(dev, false); 1431341934Shselasky 1432347818Shselasky err = mlx5_cmd_fast_teardown_hca(dev); 1433347818Shselasky if (!err) 1434347818Shselasky goto done; 1435347818Shselasky 1436331810Shselasky err = mlx5_cmd_force_teardown_hca(dev); 1437347818Shselasky if (!err) 1438347818Shselasky goto done; 1439331810Shselasky 1440347818Shselasky mlx5_core_dbg(dev, "Firmware couldn't do fast unload error: %d\n", err); 1441347818Shselasky mlx5_start_health_poll(dev); 1442347818Shselasky return err; 1443347818Shselaskydone: 1444331810Shselasky mlx5_enter_error_state(dev, true); 1445331810Shselasky return 0; 1446331810Shselasky} 1447331810Shselasky 1448347802Shselaskystatic void mlx5_disable_interrupts(struct mlx5_core_dev *mdev) 1449347802Shselasky{ 1450347802Shselasky int nvec = mdev->priv.eq_table.num_comp_vectors + MLX5_EQ_VEC_COMP_BASE; 1451347802Shselasky int x; 1452347802Shselasky 1453347802Shselasky mdev->priv.disable_irqs = 1; 1454347802Shselasky 1455347802Shselasky /* wait for all IRQ handlers to finish processing */ 1456347802Shselasky for (x = 0; x != nvec; x++) 1457347802Shselasky synchronize_irq(mdev->priv.msix_arr[x].vector); 1458347802Shselasky} 1459347802Shselasky 1460329211Shselaskystatic void shutdown_one(struct pci_dev *pdev) 1461329211Shselasky{ 1462331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1463331580Shselasky struct mlx5_priv *priv = &dev->priv; 1464331810Shselasky int err; 1465331580Shselasky 1466347802Shselasky /* enter polling mode */ 1467347802Shselasky mlx5_cmd_use_polling(dev); 1468347802Shselasky 1469347802Shselasky /* disable all interrupts */ 1470347802Shselasky mlx5_disable_interrupts(dev); 1471347802Shselasky 1472331810Shselasky err = mlx5_try_fast_unload(dev); 1473331810Shselasky if (err) 1474331810Shselasky mlx5_unload_one(dev, priv, false); 1475331580Shselasky mlx5_pci_disable_device(dev); 1476329211Shselasky} 1477329211Shselasky 1478290650Shselaskystatic const struct pci_device_id mlx5_core_pci_table[] = { 1479290650Shselasky { PCI_VDEVICE(MELLANOX, 4113) }, /* Connect-IB */ 1480290650Shselasky { PCI_VDEVICE(MELLANOX, 4114) }, /* Connect-IB VF */ 1481290650Shselasky { PCI_VDEVICE(MELLANOX, 4115) }, /* ConnectX-4 */ 1482290650Shselasky { PCI_VDEVICE(MELLANOX, 4116) }, /* ConnectX-4 VF */ 1483290650Shselasky { PCI_VDEVICE(MELLANOX, 4117) }, /* ConnectX-4LX */ 1484290650Shselasky { PCI_VDEVICE(MELLANOX, 4118) }, /* ConnectX-4LX VF */ 1485306233Shselasky { PCI_VDEVICE(MELLANOX, 4119) }, /* ConnectX-5 */ 1486306233Shselasky { PCI_VDEVICE(MELLANOX, 4120) }, /* ConnectX-5 VF */ 1487290650Shselasky { PCI_VDEVICE(MELLANOX, 4121) }, 1488290650Shselasky { PCI_VDEVICE(MELLANOX, 4122) }, 1489290650Shselasky { PCI_VDEVICE(MELLANOX, 4123) }, 1490290650Shselasky { PCI_VDEVICE(MELLANOX, 4124) }, 1491290650Shselasky { PCI_VDEVICE(MELLANOX, 4125) }, 1492290650Shselasky { PCI_VDEVICE(MELLANOX, 4126) }, 1493290650Shselasky { PCI_VDEVICE(MELLANOX, 4127) }, 1494290650Shselasky { PCI_VDEVICE(MELLANOX, 4128) }, 1495290650Shselasky { PCI_VDEVICE(MELLANOX, 4129) }, 1496290650Shselasky { PCI_VDEVICE(MELLANOX, 4130) }, 1497290650Shselasky { PCI_VDEVICE(MELLANOX, 4131) }, 1498290650Shselasky { PCI_VDEVICE(MELLANOX, 4132) }, 1499290650Shselasky { PCI_VDEVICE(MELLANOX, 4133) }, 1500290650Shselasky { PCI_VDEVICE(MELLANOX, 4134) }, 1501290650Shselasky { PCI_VDEVICE(MELLANOX, 4135) }, 1502290650Shselasky { PCI_VDEVICE(MELLANOX, 4136) }, 1503290650Shselasky { PCI_VDEVICE(MELLANOX, 4137) }, 1504290650Shselasky { PCI_VDEVICE(MELLANOX, 4138) }, 1505290650Shselasky { PCI_VDEVICE(MELLANOX, 4139) }, 1506290650Shselasky { PCI_VDEVICE(MELLANOX, 4140) }, 1507290650Shselasky { PCI_VDEVICE(MELLANOX, 4141) }, 1508290650Shselasky { PCI_VDEVICE(MELLANOX, 4142) }, 1509290650Shselasky { PCI_VDEVICE(MELLANOX, 4143) }, 1510290650Shselasky { PCI_VDEVICE(MELLANOX, 4144) }, 1511290650Shselasky { 0, } 1512290650Shselasky}; 1513290650Shselasky 1514290650ShselaskyMODULE_DEVICE_TABLE(pci, mlx5_core_pci_table); 1515290650Shselasky 1516331809Shselaskyvoid mlx5_disable_device(struct mlx5_core_dev *dev) 1517331809Shselasky{ 1518331809Shselasky mlx5_pci_err_detected(dev->pdev, 0); 1519331809Shselasky} 1520331809Shselasky 1521331809Shselaskyvoid mlx5_recover_device(struct mlx5_core_dev *dev) 1522331809Shselasky{ 1523331809Shselasky mlx5_pci_disable_device(dev); 1524331809Shselasky if (mlx5_pci_slot_reset(dev->pdev) == PCI_ERS_RESULT_RECOVERED) 1525331809Shselasky mlx5_pci_resume(dev->pdev); 1526331809Shselasky} 1527331809Shselasky 1528331586Shselaskystruct pci_driver mlx5_core_driver = { 1529290650Shselasky .name = DRIVER_NAME, 1530290650Shselasky .id_table = mlx5_core_pci_table, 1531329211Shselasky .shutdown = shutdown_one, 1532290650Shselasky .probe = init_one, 1533331580Shselasky .remove = remove_one, 1534331580Shselasky .err_handler = &mlx5_err_handler 1535290650Shselasky}; 1536290650Shselasky 1537290650Shselaskystatic int __init init(void) 1538290650Shselasky{ 1539290650Shselasky int err; 1540290650Shselasky 1541290650Shselasky err = pci_register_driver(&mlx5_core_driver); 1542290650Shselasky if (err) 1543331580Shselasky goto err_debug; 1544290650Shselasky 1545331586Shselasky err = mlx5_fwdump_init(); 1546331586Shselasky if (err) 1547331586Shselasky goto err_fwdump; 1548331586Shselasky 1549331586Shselasky return 0; 1550331586Shselasky 1551331586Shselaskyerr_fwdump: 1552331586Shselasky pci_unregister_driver(&mlx5_core_driver); 1553290650Shselasky 1554290650Shselaskyerr_debug: 1555290650Shselasky return err; 1556290650Shselasky} 1557290650Shselasky 1558290650Shselaskystatic void __exit cleanup(void) 1559290650Shselasky{ 1560331586Shselasky mlx5_fwdump_fini(); 1561290650Shselasky pci_unregister_driver(&mlx5_core_driver); 1562290650Shselasky} 1563290650Shselasky 1564290650Shselaskymodule_init(init); 1565290650Shselaskymodule_exit(cleanup); 1566