mlx5_main.c revision 337112
1290650Shselasky/*- 2329200Shselasky * Copyright (c) 2013-2017, Mellanox Technologies, Ltd. All rights reserved. 3290650Shselasky * 4290650Shselasky * Redistribution and use in source and binary forms, with or without 5290650Shselasky * modification, are permitted provided that the following conditions 6290650Shselasky * are met: 7290650Shselasky * 1. Redistributions of source code must retain the above copyright 8290650Shselasky * notice, this list of conditions and the following disclaimer. 9290650Shselasky * 2. Redistributions in binary form must reproduce the above copyright 10290650Shselasky * notice, this list of conditions and the following disclaimer in the 11290650Shselasky * documentation and/or other materials provided with the distribution. 12290650Shselasky * 13290650Shselasky * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND 14290650Shselasky * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15290650Shselasky * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16290650Shselasky * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17290650Shselasky * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18290650Shselasky * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19290650Shselasky * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20290650Shselasky * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21290650Shselasky * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22290650Shselasky * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23290650Shselasky * SUCH DAMAGE. 24290650Shselasky * 25290650Shselasky * $FreeBSD: stable/11/sys/dev/mlx5/mlx5_core/mlx5_main.c 337112 2018-08-02 08:51:55Z hselasky $ 26290650Shselasky */ 27290650Shselasky 28300676Shselasky#define LINUXKPI_PARAM_PREFIX mlx5_ 29300676Shselasky 30290650Shselasky#include <linux/kmod.h> 31290650Shselasky#include <linux/module.h> 32290650Shselasky#include <linux/errno.h> 33290650Shselasky#include <linux/pci.h> 34290650Shselasky#include <linux/dma-mapping.h> 35290650Shselasky#include <linux/slab.h> 36290650Shselasky#include <linux/io-mapping.h> 37290650Shselasky#include <linux/interrupt.h> 38290650Shselasky#include <dev/mlx5/driver.h> 39290650Shselasky#include <dev/mlx5/cq.h> 40290650Shselasky#include <dev/mlx5/qp.h> 41290650Shselasky#include <dev/mlx5/srq.h> 42290650Shselasky#include <linux/delay.h> 43290650Shselasky#include <dev/mlx5/mlx5_ifc.h> 44290650Shselasky#include "mlx5_core.h" 45329200Shselasky#include "fs_core.h" 46290650Shselasky 47290650ShselaskyMODULE_AUTHOR("Eli Cohen <eli@mellanox.com>"); 48290650ShselaskyMODULE_DESCRIPTION("Mellanox Connect-IB, ConnectX-4 core driver"); 49290650ShselaskyMODULE_LICENSE("Dual BSD/GPL"); 50290650Shselasky#if (__FreeBSD_version >= 1100000) 51290650ShselaskyMODULE_DEPEND(mlx5, linuxkpi, 1, 1, 1); 52290650Shselasky#endif 53290650ShselaskyMODULE_VERSION(mlx5, 1); 54290650Shselasky 55290650Shselaskyint mlx5_core_debug_mask; 56290650Shselaskymodule_param_named(debug_mask, mlx5_core_debug_mask, int, 0644); 57290650ShselaskyMODULE_PARM_DESC(debug_mask, "debug mask: 1 = dump cmd data, 2 = dump cmd exec time, 3 = both. Default=0"); 58290650Shselasky 59290650Shselasky#define MLX5_DEFAULT_PROF 2 60290650Shselaskystatic int prof_sel = MLX5_DEFAULT_PROF; 61290650Shselaskymodule_param_named(prof_sel, prof_sel, int, 0444); 62290650ShselaskyMODULE_PARM_DESC(prof_sel, "profile selector. Valid range 0 - 2"); 63290650Shselasky 64337112Shselaskystatic int mlx5_core_msix_eqvec; 65337112Shselaskymodule_param_named(msix_eqvec, mlx5_core_msix_eqvec, int, 0644); 66337112ShselaskyMODULE_PARM_DESC(msix_eqvec, "Maximum number of MSIX event queue vectors"); 67337112Shselasky 68290650Shselasky#define NUMA_NO_NODE -1 69290650Shselasky 70290650Shselaskystatic LIST_HEAD(intf_list); 71290650Shselaskystatic LIST_HEAD(dev_list); 72290650Shselaskystatic DEFINE_MUTEX(intf_mutex); 73290650Shselasky 74290650Shselaskystruct mlx5_device_context { 75290650Shselasky struct list_head list; 76290650Shselasky struct mlx5_interface *intf; 77290650Shselasky void *context; 78290650Shselasky}; 79290650Shselasky 80329209Shselaskyenum { 81329209Shselasky MLX5_ATOMIC_REQ_MODE_BE = 0x0, 82329209Shselasky MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS = 0x1, 83329209Shselasky}; 84329209Shselasky 85290650Shselaskystatic struct mlx5_profile profiles[] = { 86290650Shselasky [0] = { 87290650Shselasky .mask = 0, 88290650Shselasky }, 89290650Shselasky [1] = { 90290650Shselasky .mask = MLX5_PROF_MASK_QP_SIZE, 91290650Shselasky .log_max_qp = 12, 92290650Shselasky }, 93290650Shselasky [2] = { 94290650Shselasky .mask = MLX5_PROF_MASK_QP_SIZE | 95290650Shselasky MLX5_PROF_MASK_MR_CACHE, 96290650Shselasky .log_max_qp = 17, 97290650Shselasky .mr_cache[0] = { 98290650Shselasky .size = 500, 99290650Shselasky .limit = 250 100290650Shselasky }, 101290650Shselasky .mr_cache[1] = { 102290650Shselasky .size = 500, 103290650Shselasky .limit = 250 104290650Shselasky }, 105290650Shselasky .mr_cache[2] = { 106290650Shselasky .size = 500, 107290650Shselasky .limit = 250 108290650Shselasky }, 109290650Shselasky .mr_cache[3] = { 110290650Shselasky .size = 500, 111290650Shselasky .limit = 250 112290650Shselasky }, 113290650Shselasky .mr_cache[4] = { 114290650Shselasky .size = 500, 115290650Shselasky .limit = 250 116290650Shselasky }, 117290650Shselasky .mr_cache[5] = { 118290650Shselasky .size = 500, 119290650Shselasky .limit = 250 120290650Shselasky }, 121290650Shselasky .mr_cache[6] = { 122290650Shselasky .size = 500, 123290650Shselasky .limit = 250 124290650Shselasky }, 125290650Shselasky .mr_cache[7] = { 126290650Shselasky .size = 500, 127290650Shselasky .limit = 250 128290650Shselasky }, 129290650Shselasky .mr_cache[8] = { 130290650Shselasky .size = 500, 131290650Shselasky .limit = 250 132290650Shselasky }, 133290650Shselasky .mr_cache[9] = { 134290650Shselasky .size = 500, 135290650Shselasky .limit = 250 136290650Shselasky }, 137290650Shselasky .mr_cache[10] = { 138290650Shselasky .size = 500, 139290650Shselasky .limit = 250 140290650Shselasky }, 141290650Shselasky .mr_cache[11] = { 142290650Shselasky .size = 500, 143290650Shselasky .limit = 250 144290650Shselasky }, 145290650Shselasky .mr_cache[12] = { 146290650Shselasky .size = 64, 147290650Shselasky .limit = 32 148290650Shselasky }, 149290650Shselasky .mr_cache[13] = { 150290650Shselasky .size = 32, 151290650Shselasky .limit = 16 152290650Shselasky }, 153290650Shselasky .mr_cache[14] = { 154290650Shselasky .size = 16, 155290650Shselasky .limit = 8 156290650Shselasky }, 157290650Shselasky }, 158290650Shselasky [3] = { 159290650Shselasky .mask = MLX5_PROF_MASK_QP_SIZE, 160290650Shselasky .log_max_qp = 17, 161290650Shselasky }, 162290650Shselasky}; 163290650Shselasky 164290650Shselaskystatic int set_dma_caps(struct pci_dev *pdev) 165290650Shselasky{ 166290650Shselasky int err; 167290650Shselasky 168290650Shselasky err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 169290650Shselasky if (err) { 170290650Shselasky device_printf((&pdev->dev)->bsddev, "WARN: ""Warning: couldn't set 64-bit PCI DMA mask\n"); 171290650Shselasky err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 172290650Shselasky if (err) { 173290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Can't set PCI DMA mask, aborting\n"); 174290650Shselasky return err; 175290650Shselasky } 176290650Shselasky } 177290650Shselasky 178290650Shselasky err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 179290650Shselasky if (err) { 180290650Shselasky device_printf((&pdev->dev)->bsddev, "WARN: ""Warning: couldn't set 64-bit consistent PCI DMA mask\n"); 181290650Shselasky err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 182290650Shselasky if (err) { 183290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Can't set consistent PCI DMA mask, aborting\n"); 184290650Shselasky return err; 185290650Shselasky } 186290650Shselasky } 187290650Shselasky 188290650Shselasky dma_set_max_seg_size(&pdev->dev, 2u * 1024 * 1024 * 1024); 189290650Shselasky return err; 190290650Shselasky} 191290650Shselasky 192331580Shselaskystatic int mlx5_pci_enable_device(struct mlx5_core_dev *dev) 193331580Shselasky{ 194331580Shselasky struct pci_dev *pdev = dev->pdev; 195331580Shselasky int err = 0; 196331580Shselasky 197331580Shselasky mutex_lock(&dev->pci_status_mutex); 198331580Shselasky if (dev->pci_status == MLX5_PCI_STATUS_DISABLED) { 199331580Shselasky err = pci_enable_device(pdev); 200331580Shselasky if (!err) 201331580Shselasky dev->pci_status = MLX5_PCI_STATUS_ENABLED; 202331580Shselasky } 203331580Shselasky mutex_unlock(&dev->pci_status_mutex); 204331580Shselasky 205331580Shselasky return err; 206331580Shselasky} 207331580Shselasky 208331580Shselaskystatic void mlx5_pci_disable_device(struct mlx5_core_dev *dev) 209331580Shselasky{ 210331580Shselasky struct pci_dev *pdev = dev->pdev; 211331580Shselasky 212331580Shselasky mutex_lock(&dev->pci_status_mutex); 213331580Shselasky if (dev->pci_status == MLX5_PCI_STATUS_ENABLED) { 214331580Shselasky pci_disable_device(pdev); 215331580Shselasky dev->pci_status = MLX5_PCI_STATUS_DISABLED; 216331580Shselasky } 217331580Shselasky mutex_unlock(&dev->pci_status_mutex); 218331580Shselasky} 219331580Shselasky 220290650Shselaskystatic int request_bar(struct pci_dev *pdev) 221290650Shselasky{ 222290650Shselasky int err = 0; 223290650Shselasky 224290650Shselasky if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { 225290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Missing registers BAR, aborting\n"); 226290650Shselasky return -ENODEV; 227290650Shselasky } 228290650Shselasky 229290650Shselasky err = pci_request_regions(pdev, DRIVER_NAME); 230290650Shselasky if (err) 231290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Couldn't get PCI resources, aborting\n"); 232290650Shselasky 233290650Shselasky return err; 234290650Shselasky} 235290650Shselasky 236290650Shselaskystatic void release_bar(struct pci_dev *pdev) 237290650Shselasky{ 238290650Shselasky pci_release_regions(pdev); 239290650Shselasky} 240290650Shselasky 241290650Shselaskystatic int mlx5_enable_msix(struct mlx5_core_dev *dev) 242290650Shselasky{ 243290650Shselasky struct mlx5_priv *priv = &dev->priv; 244290650Shselasky struct mlx5_eq_table *table = &priv->eq_table; 245290650Shselasky int num_eqs = 1 << MLX5_CAP_GEN(dev, log_max_eq); 246337112Shselasky int limit = mlx5_core_msix_eqvec; 247337112Shselasky int nvec = MLX5_EQ_VEC_COMP_BASE; 248290650Shselasky int i; 249290650Shselasky 250337112Shselasky if (limit > 0) 251337112Shselasky nvec += limit; 252337112Shselasky else 253337112Shselasky nvec += MLX5_CAP_GEN(dev, num_ports) * num_online_cpus(); 254337112Shselasky 255290650Shselasky nvec = min_t(int, nvec, num_eqs); 256290650Shselasky if (nvec <= MLX5_EQ_VEC_COMP_BASE) 257290650Shselasky return -ENOMEM; 258290650Shselasky 259290650Shselasky priv->msix_arr = kzalloc(nvec * sizeof(*priv->msix_arr), GFP_KERNEL); 260290650Shselasky 261290650Shselasky priv->irq_info = kzalloc(nvec * sizeof(*priv->irq_info), GFP_KERNEL); 262290650Shselasky 263290650Shselasky for (i = 0; i < nvec; i++) 264290650Shselasky priv->msix_arr[i].entry = i; 265290650Shselasky 266290650Shselasky nvec = pci_enable_msix_range(dev->pdev, priv->msix_arr, 267290650Shselasky MLX5_EQ_VEC_COMP_BASE + 1, nvec); 268290650Shselasky if (nvec < 0) 269290650Shselasky return nvec; 270290650Shselasky 271290650Shselasky table->num_comp_vectors = nvec - MLX5_EQ_VEC_COMP_BASE; 272290650Shselasky 273290650Shselasky return 0; 274290650Shselasky 275290650Shselasky} 276290650Shselasky 277290650Shselaskystatic void mlx5_disable_msix(struct mlx5_core_dev *dev) 278290650Shselasky{ 279290650Shselasky struct mlx5_priv *priv = &dev->priv; 280290650Shselasky 281290650Shselasky pci_disable_msix(dev->pdev); 282290650Shselasky kfree(priv->irq_info); 283290650Shselasky kfree(priv->msix_arr); 284290650Shselasky} 285290650Shselasky 286290650Shselaskystruct mlx5_reg_host_endianess { 287290650Shselasky u8 he; 288290650Shselasky u8 rsvd[15]; 289290650Shselasky}; 290290650Shselasky 291290650Shselasky 292290650Shselasky#define CAP_MASK(pos, size) ((u64)((1 << (size)) - 1) << (pos)) 293290650Shselasky 294290650Shselaskyenum { 295290650Shselasky MLX5_CAP_BITS_RW_MASK = CAP_MASK(MLX5_CAP_OFF_CMDIF_CSUM, 2) | 296306233Shselasky MLX5_DEV_CAP_FLAG_DCT | 297306233Shselasky MLX5_DEV_CAP_FLAG_DRAIN_SIGERR, 298290650Shselasky}; 299290650Shselasky 300290650Shselaskystatic u16 to_fw_pkey_sz(u32 size) 301290650Shselasky{ 302290650Shselasky switch (size) { 303290650Shselasky case 128: 304290650Shselasky return 0; 305290650Shselasky case 256: 306290650Shselasky return 1; 307290650Shselasky case 512: 308290650Shselasky return 2; 309290650Shselasky case 1024: 310290650Shselasky return 3; 311290650Shselasky case 2048: 312290650Shselasky return 4; 313290650Shselasky case 4096: 314290650Shselasky return 5; 315290650Shselasky default: 316290650Shselasky printf("mlx5_core: WARN: ""invalid pkey table size %d\n", size); 317290650Shselasky return 0; 318290650Shselasky } 319290650Shselasky} 320290650Shselasky 321331807Shselaskystatic int mlx5_core_get_caps_mode(struct mlx5_core_dev *dev, 322331807Shselasky enum mlx5_cap_type cap_type, 323331807Shselasky enum mlx5_cap_mode cap_mode) 324290650Shselasky{ 325290650Shselasky u8 in[MLX5_ST_SZ_BYTES(query_hca_cap_in)]; 326290650Shselasky int out_sz = MLX5_ST_SZ_BYTES(query_hca_cap_out); 327290650Shselasky void *out, *hca_caps; 328290650Shselasky u16 opmod = (cap_type << 1) | (cap_mode & 0x01); 329290650Shselasky int err; 330290650Shselasky 331290650Shselasky memset(in, 0, sizeof(in)); 332290650Shselasky out = kzalloc(out_sz, GFP_KERNEL); 333290650Shselasky 334290650Shselasky MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP); 335290650Shselasky MLX5_SET(query_hca_cap_in, in, op_mod, opmod); 336290650Shselasky err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz); 337290650Shselasky if (err) { 338290650Shselasky mlx5_core_warn(dev, 339290650Shselasky "QUERY_HCA_CAP : type(%x) opmode(%x) Failed(%d)\n", 340290650Shselasky cap_type, cap_mode, err); 341290650Shselasky goto query_ex; 342290650Shselasky } 343290650Shselasky 344290650Shselasky hca_caps = MLX5_ADDR_OF(query_hca_cap_out, out, capability); 345290650Shselasky 346290650Shselasky switch (cap_mode) { 347290650Shselasky case HCA_CAP_OPMOD_GET_MAX: 348290650Shselasky memcpy(dev->hca_caps_max[cap_type], hca_caps, 349290650Shselasky MLX5_UN_SZ_BYTES(hca_cap_union)); 350290650Shselasky break; 351290650Shselasky case HCA_CAP_OPMOD_GET_CUR: 352290650Shselasky memcpy(dev->hca_caps_cur[cap_type], hca_caps, 353290650Shselasky MLX5_UN_SZ_BYTES(hca_cap_union)); 354290650Shselasky break; 355290650Shselasky default: 356290650Shselasky mlx5_core_warn(dev, 357290650Shselasky "Tried to query dev cap type(%x) with wrong opmode(%x)\n", 358290650Shselasky cap_type, cap_mode); 359290650Shselasky err = -EINVAL; 360290650Shselasky break; 361290650Shselasky } 362290650Shselaskyquery_ex: 363290650Shselasky kfree(out); 364290650Shselasky return err; 365290650Shselasky} 366290650Shselasky 367331807Shselaskyint mlx5_core_get_caps(struct mlx5_core_dev *dev, enum mlx5_cap_type cap_type) 368331807Shselasky{ 369331807Shselasky int ret; 370331807Shselasky 371331807Shselasky ret = mlx5_core_get_caps_mode(dev, cap_type, HCA_CAP_OPMOD_GET_CUR); 372331807Shselasky if (ret) 373331807Shselasky return ret; 374331807Shselasky 375331807Shselasky return mlx5_core_get_caps_mode(dev, cap_type, HCA_CAP_OPMOD_GET_MAX); 376331807Shselasky} 377331807Shselasky 378290650Shselaskystatic int set_caps(struct mlx5_core_dev *dev, void *in, int in_sz) 379290650Shselasky{ 380331807Shselasky u32 out[MLX5_ST_SZ_DW(set_hca_cap_out)] = {0}; 381290650Shselasky 382290650Shselasky MLX5_SET(set_hca_cap_in, in, opcode, MLX5_CMD_OP_SET_HCA_CAP); 383290650Shselasky 384331807Shselasky return mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out)); 385290650Shselasky} 386290650Shselasky 387290650Shselaskystatic int handle_hca_cap(struct mlx5_core_dev *dev) 388290650Shselasky{ 389290650Shselasky void *set_ctx = NULL; 390290650Shselasky struct mlx5_profile *prof = dev->profile; 391290650Shselasky int err = -ENOMEM; 392290650Shselasky int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in); 393290650Shselasky void *set_hca_cap; 394290650Shselasky 395290650Shselasky set_ctx = kzalloc(set_sz, GFP_KERNEL); 396290650Shselasky 397331807Shselasky err = mlx5_core_get_caps(dev, MLX5_CAP_GENERAL); 398290650Shselasky if (err) 399290650Shselasky goto query_ex; 400290650Shselasky 401290650Shselasky set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, 402290650Shselasky capability); 403290650Shselasky memcpy(set_hca_cap, dev->hca_caps_cur[MLX5_CAP_GENERAL], 404290650Shselasky MLX5_ST_SZ_BYTES(cmd_hca_cap)); 405290650Shselasky 406290650Shselasky mlx5_core_dbg(dev, "Current Pkey table size %d Setting new size %d\n", 407290650Shselasky mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size)), 408290650Shselasky 128); 409290650Shselasky /* we limit the size of the pkey table to 128 entries for now */ 410290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, pkey_table_size, 411290650Shselasky to_fw_pkey_sz(128)); 412290650Shselasky 413290650Shselasky if (prof->mask & MLX5_PROF_MASK_QP_SIZE) 414290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, log_max_qp, 415290650Shselasky prof->log_max_qp); 416290650Shselasky 417290650Shselasky /* disable cmdif checksum */ 418290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, cmdif_checksum, 0); 419290650Shselasky 420306233Shselasky /* enable drain sigerr */ 421306233Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, drain_sigerr, 1); 422306233Shselasky 423290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, log_uar_page_sz, PAGE_SHIFT - 12); 424290650Shselasky 425290650Shselasky err = set_caps(dev, set_ctx, set_sz); 426290650Shselasky 427290650Shselaskyquery_ex: 428290650Shselasky kfree(set_ctx); 429290650Shselasky return err; 430290650Shselasky} 431290650Shselasky 432329209Shselaskystatic int handle_hca_cap_atomic(struct mlx5_core_dev *dev) 433329209Shselasky{ 434329209Shselasky void *set_ctx; 435329209Shselasky void *set_hca_cap; 436329209Shselasky int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in); 437329209Shselasky int req_endianness; 438329209Shselasky int err; 439329209Shselasky 440329209Shselasky if (MLX5_CAP_GEN(dev, atomic)) { 441331807Shselasky err = mlx5_core_get_caps(dev, MLX5_CAP_ATOMIC); 442329209Shselasky if (err) 443329209Shselasky return err; 444329209Shselasky } else { 445329209Shselasky return 0; 446329209Shselasky } 447329209Shselasky 448329209Shselasky req_endianness = 449329209Shselasky MLX5_CAP_ATOMIC(dev, 450329209Shselasky supported_atomic_req_8B_endianess_mode_1); 451329209Shselasky 452329209Shselasky if (req_endianness != MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS) 453329209Shselasky return 0; 454329209Shselasky 455329209Shselasky set_ctx = kzalloc(set_sz, GFP_KERNEL); 456329209Shselasky if (!set_ctx) 457329209Shselasky return -ENOMEM; 458329209Shselasky 459329209Shselasky MLX5_SET(set_hca_cap_in, set_ctx, op_mod, 460329209Shselasky MLX5_SET_HCA_CAP_OP_MOD_ATOMIC << 1); 461329209Shselasky set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, capability); 462329209Shselasky 463329209Shselasky /* Set requestor to host endianness */ 464329209Shselasky MLX5_SET(atomic_caps, set_hca_cap, atomic_req_8B_endianess_mode, 465329209Shselasky MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS); 466329209Shselasky 467329209Shselasky err = set_caps(dev, set_ctx, set_sz); 468329209Shselasky 469329209Shselasky kfree(set_ctx); 470329209Shselasky return err; 471329209Shselasky} 472329209Shselasky 473290650Shselaskystatic int set_hca_ctrl(struct mlx5_core_dev *dev) 474290650Shselasky{ 475290650Shselasky struct mlx5_reg_host_endianess he_in; 476290650Shselasky struct mlx5_reg_host_endianess he_out; 477290650Shselasky int err; 478290650Shselasky 479306233Shselasky if (MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_ETH && 480306233Shselasky !MLX5_CAP_GEN(dev, roce)) 481306233Shselasky return 0; 482306233Shselasky 483290650Shselasky memset(&he_in, 0, sizeof(he_in)); 484290650Shselasky he_in.he = MLX5_SET_HOST_ENDIANNESS; 485290650Shselasky err = mlx5_core_access_reg(dev, &he_in, sizeof(he_in), 486290650Shselasky &he_out, sizeof(he_out), 487290650Shselasky MLX5_REG_HOST_ENDIANNESS, 0, 1); 488290650Shselasky return err; 489290650Shselasky} 490290650Shselasky 491290650Shselaskystatic int mlx5_core_enable_hca(struct mlx5_core_dev *dev) 492290650Shselasky{ 493331807Shselasky u32 out[MLX5_ST_SZ_DW(enable_hca_out)] = {0}; 494331807Shselasky u32 in[MLX5_ST_SZ_DW(enable_hca_in)] = {0}; 495290650Shselasky 496290650Shselasky MLX5_SET(enable_hca_in, in, opcode, MLX5_CMD_OP_ENABLE_HCA); 497331807Shselasky return mlx5_cmd_exec(dev, &in, sizeof(in), &out, sizeof(out)); 498290650Shselasky} 499290650Shselasky 500290650Shselaskystatic int mlx5_core_disable_hca(struct mlx5_core_dev *dev) 501290650Shselasky{ 502331807Shselasky u32 out[MLX5_ST_SZ_DW(disable_hca_out)] = {0}; 503331807Shselasky u32 in[MLX5_ST_SZ_DW(disable_hca_in)] = {0}; 504290650Shselasky 505290650Shselasky MLX5_SET(disable_hca_in, in, opcode, MLX5_CMD_OP_DISABLE_HCA); 506331807Shselasky return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); 507290650Shselasky} 508290650Shselasky 509290650Shselaskystatic int mlx5_core_set_issi(struct mlx5_core_dev *dev) 510290650Shselasky{ 511331807Shselasky u32 query_in[MLX5_ST_SZ_DW(query_issi_in)] = {0}; 512331807Shselasky u32 query_out[MLX5_ST_SZ_DW(query_issi_out)] = {0}; 513331807Shselasky u32 sup_issi; 514290650Shselasky int err; 515290650Shselasky 516290650Shselasky MLX5_SET(query_issi_in, query_in, opcode, MLX5_CMD_OP_QUERY_ISSI); 517290650Shselasky 518331807Shselasky err = mlx5_cmd_exec(dev, query_in, sizeof(query_in), query_out, sizeof(query_out)); 519290650Shselasky if (err) { 520331807Shselasky u32 syndrome; 521331807Shselasky u8 status; 522331807Shselasky 523331807Shselasky mlx5_cmd_mbox_status(query_out, &status, &syndrome); 524331807Shselasky if (status == MLX5_CMD_STAT_BAD_OP_ERR) { 525290650Shselasky pr_debug("Only ISSI 0 is supported\n"); 526290650Shselasky return 0; 527290650Shselasky } 528290650Shselasky 529290650Shselasky printf("mlx5_core: ERR: ""failed to query ISSI\n"); 530290650Shselasky return err; 531290650Shselasky } 532290650Shselasky 533290650Shselasky sup_issi = MLX5_GET(query_issi_out, query_out, supported_issi_dw0); 534290650Shselasky 535290650Shselasky if (sup_issi & (1 << 1)) { 536331807Shselasky u32 set_in[MLX5_ST_SZ_DW(set_issi_in)] = {0}; 537331807Shselasky u32 set_out[MLX5_ST_SZ_DW(set_issi_out)] = {0}; 538290650Shselasky 539290650Shselasky MLX5_SET(set_issi_in, set_in, opcode, MLX5_CMD_OP_SET_ISSI); 540290650Shselasky MLX5_SET(set_issi_in, set_in, current_issi, 1); 541290650Shselasky 542331807Shselasky err = mlx5_cmd_exec(dev, set_in, sizeof(set_in), set_out, sizeof(set_out)); 543290650Shselasky if (err) { 544331807Shselasky printf("mlx5_core: ERR: ""failed to set ISSI=1 err(%d)\n", err); 545290650Shselasky return err; 546290650Shselasky } 547290650Shselasky 548290650Shselasky dev->issi = 1; 549290650Shselasky 550290650Shselasky return 0; 551290650Shselasky } else if (sup_issi & (1 << 0)) { 552290650Shselasky return 0; 553290650Shselasky } 554290650Shselasky 555290650Shselasky return -ENOTSUPP; 556290650Shselasky} 557290650Shselasky 558290650Shselasky 559290650Shselaskyint mlx5_vector2eqn(struct mlx5_core_dev *dev, int vector, int *eqn, int *irqn) 560290650Shselasky{ 561290650Shselasky struct mlx5_eq_table *table = &dev->priv.eq_table; 562290650Shselasky struct mlx5_eq *eq; 563290650Shselasky int err = -ENOENT; 564290650Shselasky 565290650Shselasky spin_lock(&table->lock); 566290650Shselasky list_for_each_entry(eq, &table->comp_eqs_list, list) { 567290650Shselasky if (eq->index == vector) { 568290650Shselasky *eqn = eq->eqn; 569290650Shselasky *irqn = eq->irqn; 570290650Shselasky err = 0; 571290650Shselasky break; 572290650Shselasky } 573290650Shselasky } 574290650Shselasky spin_unlock(&table->lock); 575290650Shselasky 576290650Shselasky return err; 577290650Shselasky} 578290650ShselaskyEXPORT_SYMBOL(mlx5_vector2eqn); 579290650Shselasky 580290650Shselaskyint mlx5_rename_eq(struct mlx5_core_dev *dev, int eq_ix, char *name) 581290650Shselasky{ 582290650Shselasky struct mlx5_priv *priv = &dev->priv; 583290650Shselasky struct mlx5_eq_table *table = &priv->eq_table; 584290650Shselasky struct mlx5_eq *eq; 585290650Shselasky int err = -ENOENT; 586290650Shselasky 587290650Shselasky spin_lock(&table->lock); 588290650Shselasky list_for_each_entry(eq, &table->comp_eqs_list, list) { 589290650Shselasky if (eq->index == eq_ix) { 590290650Shselasky int irq_ix = eq_ix + MLX5_EQ_VEC_COMP_BASE; 591290650Shselasky 592290650Shselasky snprintf(priv->irq_info[irq_ix].name, MLX5_MAX_IRQ_NAME, 593290650Shselasky "%s-%d", name, eq_ix); 594290650Shselasky 595290650Shselasky err = 0; 596290650Shselasky break; 597290650Shselasky } 598290650Shselasky } 599290650Shselasky spin_unlock(&table->lock); 600290650Shselasky 601290650Shselasky return err; 602290650Shselasky} 603290650Shselasky 604290650Shselaskystatic void free_comp_eqs(struct mlx5_core_dev *dev) 605290650Shselasky{ 606290650Shselasky struct mlx5_eq_table *table = &dev->priv.eq_table; 607290650Shselasky struct mlx5_eq *eq, *n; 608290650Shselasky 609290650Shselasky spin_lock(&table->lock); 610290650Shselasky list_for_each_entry_safe(eq, n, &table->comp_eqs_list, list) { 611290650Shselasky list_del(&eq->list); 612290650Shselasky spin_unlock(&table->lock); 613290650Shselasky if (mlx5_destroy_unmap_eq(dev, eq)) 614290650Shselasky mlx5_core_warn(dev, "failed to destroy EQ 0x%x\n", 615290650Shselasky eq->eqn); 616290650Shselasky kfree(eq); 617290650Shselasky spin_lock(&table->lock); 618290650Shselasky } 619290650Shselasky spin_unlock(&table->lock); 620290650Shselasky} 621290650Shselasky 622290650Shselaskystatic int alloc_comp_eqs(struct mlx5_core_dev *dev) 623290650Shselasky{ 624290650Shselasky struct mlx5_eq_table *table = &dev->priv.eq_table; 625290650Shselasky char name[MLX5_MAX_IRQ_NAME]; 626290650Shselasky struct mlx5_eq *eq; 627290650Shselasky int ncomp_vec; 628290650Shselasky int nent; 629290650Shselasky int err; 630290650Shselasky int i; 631290650Shselasky 632290650Shselasky INIT_LIST_HEAD(&table->comp_eqs_list); 633290650Shselasky ncomp_vec = table->num_comp_vectors; 634290650Shselasky nent = MLX5_COMP_EQ_SIZE; 635290650Shselasky for (i = 0; i < ncomp_vec; i++) { 636290650Shselasky eq = kzalloc(sizeof(*eq), GFP_KERNEL); 637290650Shselasky 638290650Shselasky snprintf(name, MLX5_MAX_IRQ_NAME, "mlx5_comp%d", i); 639290650Shselasky err = mlx5_create_map_eq(dev, eq, 640290650Shselasky i + MLX5_EQ_VEC_COMP_BASE, nent, 0, 641290650Shselasky name, &dev->priv.uuari.uars[0]); 642290650Shselasky if (err) { 643290650Shselasky kfree(eq); 644290650Shselasky goto clean; 645290650Shselasky } 646290650Shselasky mlx5_core_dbg(dev, "allocated completion EQN %d\n", eq->eqn); 647290650Shselasky eq->index = i; 648290650Shselasky spin_lock(&table->lock); 649290650Shselasky list_add_tail(&eq->list, &table->comp_eqs_list); 650290650Shselasky spin_unlock(&table->lock); 651290650Shselasky } 652290650Shselasky 653290650Shselasky return 0; 654290650Shselasky 655290650Shselaskyclean: 656290650Shselasky free_comp_eqs(dev); 657290650Shselasky return err; 658290650Shselasky} 659290650Shselasky 660290650Shselaskystatic int map_bf_area(struct mlx5_core_dev *dev) 661290650Shselasky{ 662290650Shselasky resource_size_t bf_start = pci_resource_start(dev->pdev, 0); 663290650Shselasky resource_size_t bf_len = pci_resource_len(dev->pdev, 0); 664290650Shselasky 665290650Shselasky dev->priv.bf_mapping = io_mapping_create_wc(bf_start, bf_len); 666290650Shselasky 667290650Shselasky return dev->priv.bf_mapping ? 0 : -ENOMEM; 668290650Shselasky} 669290650Shselasky 670290650Shselaskystatic void unmap_bf_area(struct mlx5_core_dev *dev) 671290650Shselasky{ 672290650Shselasky if (dev->priv.bf_mapping) 673290650Shselasky io_mapping_free(dev->priv.bf_mapping); 674290650Shselasky} 675290650Shselasky 676290650Shselaskystatic inline int fw_initializing(struct mlx5_core_dev *dev) 677290650Shselasky{ 678290650Shselasky return ioread32be(&dev->iseg->initializing) >> 31; 679290650Shselasky} 680290650Shselasky 681290650Shselaskystatic int wait_fw_init(struct mlx5_core_dev *dev, u32 max_wait_mili) 682290650Shselasky{ 683290650Shselasky u64 end = jiffies + msecs_to_jiffies(max_wait_mili); 684290650Shselasky int err = 0; 685290650Shselasky 686290650Shselasky while (fw_initializing(dev)) { 687290650Shselasky if (time_after(jiffies, end)) { 688290650Shselasky err = -EBUSY; 689290650Shselasky break; 690290650Shselasky } 691290650Shselasky msleep(FW_INIT_WAIT_MS); 692290650Shselasky } 693290650Shselasky 694290650Shselasky return err; 695290650Shselasky} 696290650Shselasky 697331580Shselaskystatic void mlx5_add_device(struct mlx5_interface *intf, struct mlx5_priv *priv) 698290650Shselasky{ 699331580Shselasky struct mlx5_device_context *dev_ctx; 700331580Shselasky struct mlx5_core_dev *dev = container_of(priv, struct mlx5_core_dev, priv); 701331580Shselasky 702331580Shselasky dev_ctx = kzalloc(sizeof(*dev_ctx), GFP_KERNEL); 703331580Shselasky if (!dev_ctx) 704331580Shselasky return; 705331580Shselasky 706331580Shselasky dev_ctx->intf = intf; 707331580Shselasky CURVNET_SET_QUIET(vnet0); 708331580Shselasky dev_ctx->context = intf->add(dev); 709331580Shselasky CURVNET_RESTORE(); 710331580Shselasky 711331580Shselasky if (dev_ctx->context) { 712331580Shselasky spin_lock_irq(&priv->ctx_lock); 713331580Shselasky list_add_tail(&dev_ctx->list, &priv->ctx_list); 714331580Shselasky spin_unlock_irq(&priv->ctx_lock); 715331580Shselasky } else { 716331580Shselasky kfree(dev_ctx); 717331580Shselasky } 718331580Shselasky} 719331580Shselasky 720331580Shselaskystatic void mlx5_remove_device(struct mlx5_interface *intf, struct mlx5_priv *priv) 721331580Shselasky{ 722331580Shselasky struct mlx5_device_context *dev_ctx; 723331580Shselasky struct mlx5_core_dev *dev = container_of(priv, struct mlx5_core_dev, priv); 724331580Shselasky 725331580Shselasky list_for_each_entry(dev_ctx, &priv->ctx_list, list) 726331580Shselasky if (dev_ctx->intf == intf) { 727331580Shselasky spin_lock_irq(&priv->ctx_lock); 728331580Shselasky list_del(&dev_ctx->list); 729331580Shselasky spin_unlock_irq(&priv->ctx_lock); 730331580Shselasky 731331580Shselasky intf->remove(dev, dev_ctx->context); 732331580Shselasky kfree(dev_ctx); 733331580Shselasky return; 734331580Shselasky } 735331580Shselasky} 736331580Shselasky 737331580Shselaskystatic int mlx5_register_device(struct mlx5_core_dev *dev) 738331580Shselasky{ 739290650Shselasky struct mlx5_priv *priv = &dev->priv; 740331580Shselasky struct mlx5_interface *intf; 741290650Shselasky 742331580Shselasky mutex_lock(&intf_mutex); 743331580Shselasky list_add_tail(&priv->dev_list, &dev_list); 744331580Shselasky list_for_each_entry(intf, &intf_list, list) 745331580Shselasky mlx5_add_device(intf, priv); 746331580Shselasky mutex_unlock(&intf_mutex); 747331580Shselasky 748331580Shselasky return 0; 749331580Shselasky} 750331580Shselasky 751331580Shselaskystatic void mlx5_unregister_device(struct mlx5_core_dev *dev) 752331580Shselasky{ 753331580Shselasky struct mlx5_priv *priv = &dev->priv; 754331580Shselasky struct mlx5_interface *intf; 755331580Shselasky 756331580Shselasky mutex_lock(&intf_mutex); 757331580Shselasky list_for_each_entry(intf, &intf_list, list) 758331580Shselasky mlx5_remove_device(intf, priv); 759331580Shselasky list_del(&priv->dev_list); 760331580Shselasky mutex_unlock(&intf_mutex); 761331580Shselasky} 762331580Shselasky 763331580Shselaskyint mlx5_register_interface(struct mlx5_interface *intf) 764331580Shselasky{ 765331580Shselasky struct mlx5_priv *priv; 766331580Shselasky 767331580Shselasky if (!intf->add || !intf->remove) 768331580Shselasky return -EINVAL; 769331580Shselasky 770331580Shselasky mutex_lock(&intf_mutex); 771331580Shselasky list_add_tail(&intf->list, &intf_list); 772331580Shselasky list_for_each_entry(priv, &dev_list, dev_list) 773331580Shselasky mlx5_add_device(intf, priv); 774331580Shselasky mutex_unlock(&intf_mutex); 775331580Shselasky 776331580Shselasky return 0; 777331580Shselasky} 778331580ShselaskyEXPORT_SYMBOL(mlx5_register_interface); 779331580Shselasky 780331580Shselaskyvoid mlx5_unregister_interface(struct mlx5_interface *intf) 781331580Shselasky{ 782331580Shselasky struct mlx5_priv *priv; 783331580Shselasky 784331580Shselasky mutex_lock(&intf_mutex); 785331580Shselasky list_for_each_entry(priv, &dev_list, dev_list) 786331580Shselasky mlx5_remove_device(intf, priv); 787331580Shselasky list_del(&intf->list); 788331580Shselasky mutex_unlock(&intf_mutex); 789331580Shselasky} 790331580ShselaskyEXPORT_SYMBOL(mlx5_unregister_interface); 791331580Shselasky 792331580Shselaskyvoid *mlx5_get_protocol_dev(struct mlx5_core_dev *mdev, int protocol) 793331580Shselasky{ 794331580Shselasky struct mlx5_priv *priv = &mdev->priv; 795331580Shselasky struct mlx5_device_context *dev_ctx; 796331580Shselasky unsigned long flags; 797331580Shselasky void *result = NULL; 798331580Shselasky 799331580Shselasky spin_lock_irqsave(&priv->ctx_lock, flags); 800331580Shselasky 801331580Shselasky list_for_each_entry(dev_ctx, &mdev->priv.ctx_list, list) 802331580Shselasky if ((dev_ctx->intf->protocol == protocol) && 803331580Shselasky dev_ctx->intf->get_dev) { 804331580Shselasky result = dev_ctx->intf->get_dev(dev_ctx->context); 805331580Shselasky break; 806331580Shselasky } 807331580Shselasky 808331580Shselasky spin_unlock_irqrestore(&priv->ctx_lock, flags); 809331580Shselasky 810331580Shselasky return result; 811331580Shselasky} 812331580ShselaskyEXPORT_SYMBOL(mlx5_get_protocol_dev); 813331580Shselasky 814331580Shselaskystatic int mlx5_pci_init(struct mlx5_core_dev *dev, struct mlx5_priv *priv) 815331580Shselasky{ 816331580Shselasky struct pci_dev *pdev = dev->pdev; 817331580Shselasky int err = 0; 818331580Shselasky 819290650Shselasky pci_set_drvdata(dev->pdev, dev); 820290650Shselasky strncpy(priv->name, dev_name(&pdev->dev), MLX5_MAX_NAME_LEN); 821290650Shselasky priv->name[MLX5_MAX_NAME_LEN - 1] = 0; 822290650Shselasky 823290650Shselasky mutex_init(&priv->pgdir_mutex); 824290650Shselasky INIT_LIST_HEAD(&priv->pgdir_list); 825290650Shselasky spin_lock_init(&priv->mkey_lock); 826290650Shselasky 827290650Shselasky priv->numa_node = NUMA_NO_NODE; 828290650Shselasky 829331580Shselasky err = mlx5_pci_enable_device(dev); 830290650Shselasky if (err) { 831290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Cannot enable PCI device, aborting\n"); 832290650Shselasky goto err_dbg; 833290650Shselasky } 834290650Shselasky 835290650Shselasky err = request_bar(pdev); 836290650Shselasky if (err) { 837290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""error requesting BARs, aborting\n"); 838290650Shselasky goto err_disable; 839290650Shselasky } 840290650Shselasky 841290650Shselasky pci_set_master(pdev); 842290650Shselasky 843290650Shselasky err = set_dma_caps(pdev); 844290650Shselasky if (err) { 845290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed setting DMA capabilities mask, aborting\n"); 846290650Shselasky goto err_clr_master; 847290650Shselasky } 848290650Shselasky 849329212Shselasky dev->iseg_base = pci_resource_start(dev->pdev, 0); 850329212Shselasky dev->iseg = ioremap(dev->iseg_base, sizeof(*dev->iseg)); 851290650Shselasky if (!dev->iseg) { 852290650Shselasky err = -ENOMEM; 853290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed mapping initialization segment, aborting\n"); 854290650Shselasky goto err_clr_master; 855290650Shselasky } 856331580Shselasky 857337105Shselasky return 0; 858331585Shselasky 859331580Shselaskyerr_clr_master: 860331580Shselasky pci_clear_master(dev->pdev); 861331580Shselasky release_bar(dev->pdev); 862331580Shselaskyerr_disable: 863331580Shselasky mlx5_pci_disable_device(dev); 864331580Shselaskyerr_dbg: 865331580Shselasky return err; 866331580Shselasky} 867331580Shselasky 868331580Shselaskystatic void mlx5_pci_close(struct mlx5_core_dev *dev, struct mlx5_priv *priv) 869331580Shselasky{ 870331580Shselasky iounmap(dev->iseg); 871331580Shselasky pci_clear_master(dev->pdev); 872331580Shselasky release_bar(dev->pdev); 873331580Shselasky mlx5_pci_disable_device(dev); 874331580Shselasky} 875331580Shselasky 876331810Shselaskystatic int mlx5_init_once(struct mlx5_core_dev *dev, struct mlx5_priv *priv) 877331580Shselasky{ 878331580Shselasky struct pci_dev *pdev = dev->pdev; 879331580Shselasky int err; 880331580Shselasky 881337103Shselasky err = mlx5_vsc_find_cap(dev); 882337103Shselasky if (err) 883337103Shselasky dev_err(&pdev->dev, "Unable to find vendor specific capabilities\n"); 884331815Shselasky 885331810Shselasky err = mlx5_query_hca_caps(dev); 886331810Shselasky if (err) { 887331810Shselasky dev_err(&pdev->dev, "query hca failed\n"); 888331810Shselasky goto out; 889331810Shselasky } 890331810Shselasky 891331810Shselasky err = mlx5_query_board_id(dev); 892331810Shselasky if (err) { 893331810Shselasky dev_err(&pdev->dev, "query board id failed\n"); 894331810Shselasky goto out; 895331810Shselasky } 896331810Shselasky 897331810Shselasky err = mlx5_eq_init(dev); 898331810Shselasky if (err) { 899331810Shselasky dev_err(&pdev->dev, "failed to initialize eq\n"); 900331810Shselasky goto out; 901331810Shselasky } 902331810Shselasky 903331810Shselasky MLX5_INIT_DOORBELL_LOCK(&priv->cq_uar_lock); 904331810Shselasky 905331810Shselasky err = mlx5_init_cq_table(dev); 906331810Shselasky if (err) { 907331810Shselasky dev_err(&pdev->dev, "failed to initialize cq table\n"); 908331810Shselasky goto err_eq_cleanup; 909331810Shselasky } 910331810Shselasky 911331810Shselasky mlx5_init_qp_table(dev); 912331810Shselasky mlx5_init_srq_table(dev); 913331810Shselasky mlx5_init_mr_table(dev); 914331810Shselasky 915331810Shselasky return 0; 916331810Shselasky 917331810Shselaskyerr_eq_cleanup: 918331810Shselasky mlx5_eq_cleanup(dev); 919331810Shselasky 920331810Shselaskyout: 921331810Shselasky return err; 922331810Shselasky} 923331810Shselasky 924331810Shselaskystatic void mlx5_cleanup_once(struct mlx5_core_dev *dev) 925331810Shselasky{ 926331810Shselasky mlx5_cleanup_mr_table(dev); 927331810Shselasky mlx5_cleanup_srq_table(dev); 928331810Shselasky mlx5_cleanup_qp_table(dev); 929331810Shselasky mlx5_cleanup_cq_table(dev); 930331810Shselasky mlx5_eq_cleanup(dev); 931331810Shselasky} 932331810Shselasky 933331810Shselaskystatic int mlx5_load_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv, 934331810Shselasky bool boot) 935331810Shselasky{ 936331810Shselasky struct pci_dev *pdev = dev->pdev; 937331810Shselasky int err; 938331810Shselasky 939331580Shselasky mutex_lock(&dev->intf_state_mutex); 940331580Shselasky if (test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) { 941331580Shselasky dev_warn(&dev->pdev->dev, "%s: interface is up, NOP\n", 942331580Shselasky __func__); 943331580Shselasky goto out; 944331580Shselasky } 945331580Shselasky 946290650Shselasky device_printf((&pdev->dev)->bsddev, "INFO: ""firmware version: %d.%d.%d\n", fw_rev_maj(dev), fw_rev_min(dev), fw_rev_sub(dev)); 947290650Shselasky 948306233Shselasky /* 949306233Shselasky * On load removing any previous indication of internal error, 950306233Shselasky * device is up 951306233Shselasky */ 952306233Shselasky dev->state = MLX5_DEVICE_STATE_UP; 953306233Shselasky 954290650Shselasky err = mlx5_cmd_init(dev); 955290650Shselasky if (err) { 956290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed initializing command interface, aborting\n"); 957331580Shselasky goto out_err; 958290650Shselasky } 959290650Shselasky 960290650Shselasky err = wait_fw_init(dev, FW_INIT_TIMEOUT_MILI); 961290650Shselasky if (err) { 962290650Shselasky device_printf((&dev->pdev->dev)->bsddev, "ERR: ""Firmware over %d MS in initializing state, aborting\n", FW_INIT_TIMEOUT_MILI); 963290650Shselasky goto err_cmd_cleanup; 964290650Shselasky } 965290650Shselasky 966290650Shselasky err = mlx5_core_enable_hca(dev); 967290650Shselasky if (err) { 968290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""enable hca failed\n"); 969331810Shselasky goto err_cmd_cleanup; 970290650Shselasky } 971290650Shselasky 972290650Shselasky err = mlx5_core_set_issi(dev); 973290650Shselasky if (err) { 974290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""failed to set issi\n"); 975290650Shselasky goto err_disable_hca; 976290650Shselasky } 977290650Shselasky 978290650Shselasky err = mlx5_pagealloc_start(dev); 979290650Shselasky if (err) { 980290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""mlx5_pagealloc_start failed\n"); 981290650Shselasky goto err_disable_hca; 982290650Shselasky } 983290650Shselasky 984290650Shselasky err = mlx5_satisfy_startup_pages(dev, 1); 985290650Shselasky if (err) { 986290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""failed to allocate boot pages\n"); 987290650Shselasky goto err_pagealloc_stop; 988290650Shselasky } 989290650Shselasky 990329209Shselasky err = set_hca_ctrl(dev); 991329209Shselasky if (err) { 992329209Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""set_hca_ctrl failed\n"); 993329209Shselasky goto reclaim_boot_pages; 994329209Shselasky } 995329209Shselasky 996306233Shselasky err = handle_hca_cap(dev); 997290650Shselasky if (err) { 998306233Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""handle_hca_cap failed\n"); 999290650Shselasky goto reclaim_boot_pages; 1000290650Shselasky } 1001290650Shselasky 1002329209Shselasky err = handle_hca_cap_atomic(dev); 1003290650Shselasky if (err) { 1004329209Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""handle_hca_cap_atomic failed\n"); 1005290650Shselasky goto reclaim_boot_pages; 1006290650Shselasky } 1007290650Shselasky 1008290650Shselasky err = mlx5_satisfy_startup_pages(dev, 0); 1009290650Shselasky if (err) { 1010290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""failed to allocate init pages\n"); 1011290650Shselasky goto reclaim_boot_pages; 1012290650Shselasky } 1013290650Shselasky 1014290650Shselasky err = mlx5_cmd_init_hca(dev); 1015290650Shselasky if (err) { 1016290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""init hca failed\n"); 1017290650Shselasky goto reclaim_boot_pages; 1018290650Shselasky } 1019290650Shselasky 1020290650Shselasky mlx5_start_health_poll(dev); 1021290650Shselasky 1022331810Shselasky if (boot && mlx5_init_once(dev, priv)) { 1023331810Shselasky dev_err(&pdev->dev, "sw objs init failed\n"); 1024290650Shselasky goto err_stop_poll; 1025290650Shselasky } 1026290650Shselasky 1027290650Shselasky err = mlx5_enable_msix(dev); 1028290650Shselasky if (err) { 1029290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""enable msix failed\n"); 1030331810Shselasky goto err_cleanup_once; 1031290650Shselasky } 1032290650Shselasky 1033290650Shselasky err = mlx5_alloc_uuars(dev, &priv->uuari); 1034290650Shselasky if (err) { 1035290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed allocating uar, aborting\n"); 1036331810Shselasky goto err_disable_msix; 1037290650Shselasky } 1038290650Shselasky 1039290650Shselasky err = mlx5_start_eqs(dev); 1040290650Shselasky if (err) { 1041290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed to start pages and async EQs\n"); 1042290650Shselasky goto err_free_uar; 1043290650Shselasky } 1044290650Shselasky 1045290650Shselasky err = alloc_comp_eqs(dev); 1046290650Shselasky if (err) { 1047290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed to alloc completion EQs\n"); 1048290650Shselasky goto err_stop_eqs; 1049290650Shselasky } 1050290650Shselasky 1051290650Shselasky if (map_bf_area(dev)) 1052290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed to map blue flame area\n"); 1053290650Shselasky 1054329200Shselasky err = mlx5_init_fs(dev); 1055329200Shselasky if (err) { 1056329200Shselasky mlx5_core_err(dev, "flow steering init %d\n", err); 1057331810Shselasky goto err_free_comp_eqs; 1058329200Shselasky } 1059329200Shselasky 1060331580Shselasky err = mlx5_register_device(dev); 1061331580Shselasky if (err) { 1062331580Shselasky dev_err(&pdev->dev, "mlx5_register_device failed %d\n", err); 1063331810Shselasky goto err_fs; 1064331580Shselasky } 1065331580Shselasky 1066331580Shselasky clear_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state); 1067331580Shselasky set_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state); 1068331580Shselasky 1069331580Shselaskyout: 1070331580Shselasky mutex_unlock(&dev->intf_state_mutex); 1071290650Shselasky return 0; 1072290650Shselasky 1073331810Shselaskyerr_fs: 1074331580Shselasky mlx5_cleanup_fs(dev); 1075331810Shselasky 1076331810Shselaskyerr_free_comp_eqs: 1077331810Shselasky free_comp_eqs(dev); 1078329200Shselasky unmap_bf_area(dev); 1079329200Shselasky 1080290650Shselaskyerr_stop_eqs: 1081290650Shselasky mlx5_stop_eqs(dev); 1082290650Shselasky 1083290650Shselaskyerr_free_uar: 1084290650Shselasky mlx5_free_uuars(dev, &priv->uuari); 1085290650Shselasky 1086331810Shselaskyerr_disable_msix: 1087290650Shselasky mlx5_disable_msix(dev); 1088290650Shselasky 1089331810Shselaskyerr_cleanup_once: 1090331810Shselasky if (boot) 1091331810Shselasky mlx5_cleanup_once(dev); 1092331810Shselasky 1093290650Shselaskyerr_stop_poll: 1094290650Shselasky mlx5_stop_health_poll(dev); 1095290650Shselasky if (mlx5_cmd_teardown_hca(dev)) { 1096290650Shselasky device_printf((&dev->pdev->dev)->bsddev, "ERR: ""tear_down_hca failed, skip cleanup\n"); 1097331580Shselasky goto out_err; 1098290650Shselasky } 1099290650Shselasky 1100290650Shselaskyreclaim_boot_pages: 1101290650Shselasky mlx5_reclaim_startup_pages(dev); 1102290650Shselasky 1103290650Shselaskyerr_pagealloc_stop: 1104290650Shselasky mlx5_pagealloc_stop(dev); 1105290650Shselasky 1106290650Shselaskyerr_disable_hca: 1107290650Shselasky mlx5_core_disable_hca(dev); 1108290650Shselasky 1109290650Shselaskyerr_cmd_cleanup: 1110290650Shselasky mlx5_cmd_cleanup(dev); 1111290650Shselasky 1112331580Shselaskyout_err: 1113331580Shselasky dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR; 1114331580Shselasky mutex_unlock(&dev->intf_state_mutex); 1115290650Shselasky 1116290650Shselasky return err; 1117290650Shselasky} 1118290650Shselasky 1119331810Shselaskystatic int mlx5_unload_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv, 1120331810Shselasky bool cleanup) 1121290650Shselasky{ 1122331580Shselasky int err = 0; 1123290650Shselasky 1124331811Shselasky if (cleanup) 1125331811Shselasky mlx5_drain_health_recovery(dev); 1126331811Shselasky 1127331580Shselasky mutex_lock(&dev->intf_state_mutex); 1128331580Shselasky if (test_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state)) { 1129331580Shselasky dev_warn(&dev->pdev->dev, "%s: interface is down, NOP\n", __func__); 1130331810Shselasky if (cleanup) 1131331810Shselasky mlx5_cleanup_once(dev); 1132331580Shselasky goto out; 1133331580Shselasky } 1134331580Shselasky 1135331580Shselasky mlx5_unregister_device(dev); 1136331580Shselasky 1137329200Shselasky mlx5_cleanup_fs(dev); 1138290650Shselasky unmap_bf_area(dev); 1139322144Shselasky mlx5_wait_for_reclaim_vfs_pages(dev); 1140290650Shselasky free_comp_eqs(dev); 1141290650Shselasky mlx5_stop_eqs(dev); 1142290650Shselasky mlx5_free_uuars(dev, &priv->uuari); 1143290650Shselasky mlx5_disable_msix(dev); 1144331810Shselasky if (cleanup) 1145331810Shselasky mlx5_cleanup_once(dev); 1146290650Shselasky mlx5_stop_health_poll(dev); 1147331580Shselasky err = mlx5_cmd_teardown_hca(dev); 1148331580Shselasky if (err) { 1149290650Shselasky device_printf((&dev->pdev->dev)->bsddev, "ERR: ""tear_down_hca failed, skip cleanup\n"); 1150331580Shselasky goto out; 1151290650Shselasky } 1152290650Shselasky mlx5_pagealloc_stop(dev); 1153290650Shselasky mlx5_reclaim_startup_pages(dev); 1154290650Shselasky mlx5_core_disable_hca(dev); 1155290650Shselasky mlx5_cmd_cleanup(dev); 1156290650Shselasky 1157331580Shselaskyout: 1158331580Shselasky clear_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state); 1159331580Shselasky set_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state); 1160331580Shselasky mutex_unlock(&dev->intf_state_mutex); 1161331580Shselasky return err; 1162290650Shselasky} 1163290650Shselasky 1164331580Shselaskyvoid mlx5_core_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event, 1165331580Shselasky unsigned long param) 1166290650Shselasky{ 1167290650Shselasky struct mlx5_priv *priv = &dev->priv; 1168290650Shselasky struct mlx5_device_context *dev_ctx; 1169290650Shselasky unsigned long flags; 1170290650Shselasky 1171290650Shselasky spin_lock_irqsave(&priv->ctx_lock, flags); 1172290650Shselasky 1173290650Shselasky list_for_each_entry(dev_ctx, &priv->ctx_list, list) 1174290650Shselasky if (dev_ctx->intf->event) 1175290650Shselasky dev_ctx->intf->event(dev, dev_ctx->context, event, param); 1176290650Shselasky 1177290650Shselasky spin_unlock_irqrestore(&priv->ctx_lock, flags); 1178290650Shselasky} 1179290650Shselasky 1180290650Shselaskystruct mlx5_core_event_handler { 1181290650Shselasky void (*event)(struct mlx5_core_dev *dev, 1182290650Shselasky enum mlx5_dev_event event, 1183290650Shselasky void *data); 1184290650Shselasky}; 1185290650Shselasky 1186290650Shselaskystatic int init_one(struct pci_dev *pdev, 1187290650Shselasky const struct pci_device_id *id) 1188290650Shselasky{ 1189290650Shselasky struct mlx5_core_dev *dev; 1190290650Shselasky struct mlx5_priv *priv; 1191290650Shselasky int err; 1192290650Shselasky 1193290650Shselasky dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1194290650Shselasky priv = &dev->priv; 1195306233Shselasky if (id) 1196306233Shselasky priv->pci_dev_data = id->driver_data; 1197290650Shselasky 1198290650Shselasky if (prof_sel < 0 || prof_sel >= ARRAY_SIZE(profiles)) { 1199290650Shselasky printf("mlx5_core: WARN: ""selected profile out of range, selecting default (%d)\n", MLX5_DEFAULT_PROF); 1200290650Shselasky prof_sel = MLX5_DEFAULT_PROF; 1201290650Shselasky } 1202290650Shselasky dev->profile = &profiles[prof_sel]; 1203331580Shselasky dev->pdev = pdev; 1204290650Shselasky dev->event = mlx5_core_event; 1205290650Shselasky 1206290650Shselasky INIT_LIST_HEAD(&priv->ctx_list); 1207290650Shselasky spin_lock_init(&priv->ctx_lock); 1208331580Shselasky mutex_init(&dev->pci_status_mutex); 1209331580Shselasky mutex_init(&dev->intf_state_mutex); 1210331580Shselasky err = mlx5_pci_init(dev, priv); 1211290650Shselasky if (err) { 1212331580Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""mlx5_pci_init failed %d\n", err); 1213331580Shselasky goto clean_dev; 1214290650Shselasky } 1215290650Shselasky 1216331580Shselasky err = mlx5_health_init(dev); 1217331580Shselasky if (err) { 1218331580Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""mlx5_health_init failed %d\n", err); 1219331580Shselasky goto close_pci; 1220331580Shselasky } 1221331580Shselasky 1222331810Shselasky mlx5_pagealloc_init(dev); 1223331810Shselasky 1224331810Shselasky err = mlx5_load_one(dev, priv, true); 1225290650Shselasky if (err) { 1226290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""mlx5_register_device failed %d\n", err); 1227331580Shselasky goto clean_health; 1228290650Shselasky } 1229290650Shselasky 1230331914Shselasky mlx5_fwdump_prep(dev); 1231331914Shselasky 1232331816Shselasky pci_save_state(pdev->dev.bsddev); 1233290650Shselasky return 0; 1234290650Shselasky 1235331580Shselaskyclean_health: 1236331810Shselasky mlx5_pagealloc_cleanup(dev); 1237331580Shselasky mlx5_health_cleanup(dev); 1238331580Shselaskyclose_pci: 1239331580Shselasky mlx5_pci_close(dev, priv); 1240331580Shselaskyclean_dev: 1241290650Shselasky kfree(dev); 1242290650Shselasky return err; 1243290650Shselasky} 1244290650Shselasky 1245290650Shselaskystatic void remove_one(struct pci_dev *pdev) 1246290650Shselasky{ 1247290650Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1248331580Shselasky struct mlx5_priv *priv = &dev->priv; 1249290650Shselasky 1250331810Shselasky if (mlx5_unload_one(dev, priv, true)) { 1251331580Shselasky dev_err(&dev->pdev->dev, "mlx5_unload_one failed\n"); 1252331580Shselasky mlx5_health_cleanup(dev); 1253331580Shselasky return; 1254331580Shselasky } 1255331580Shselasky 1256331914Shselasky mlx5_fwdump_clean(dev); 1257331810Shselasky mlx5_pagealloc_cleanup(dev); 1258331580Shselasky mlx5_health_cleanup(dev); 1259331580Shselasky mlx5_pci_close(dev, priv); 1260331580Shselasky pci_set_drvdata(pdev, NULL); 1261290650Shselasky kfree(dev); 1262290650Shselasky} 1263290650Shselasky 1264331580Shselaskystatic pci_ers_result_t mlx5_pci_err_detected(struct pci_dev *pdev, 1265331580Shselasky pci_channel_state_t state) 1266331580Shselasky{ 1267331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1268331580Shselasky struct mlx5_priv *priv = &dev->priv; 1269331580Shselasky 1270331580Shselasky dev_info(&pdev->dev, "%s was called\n", __func__); 1271331810Shselasky mlx5_enter_error_state(dev, false); 1272331810Shselasky mlx5_unload_one(dev, priv, false); 1273331914Shselasky 1274331582Shselasky if (state) { 1275331582Shselasky mlx5_drain_health_wq(dev); 1276331582Shselasky mlx5_pci_disable_device(dev); 1277331582Shselasky } 1278331582Shselasky 1279331580Shselasky return state == pci_channel_io_perm_failure ? 1280331580Shselasky PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_NEED_RESET; 1281331580Shselasky} 1282331580Shselasky 1283331580Shselaskystatic pci_ers_result_t mlx5_pci_slot_reset(struct pci_dev *pdev) 1284331580Shselasky{ 1285331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1286331580Shselasky int err = 0; 1287331580Shselasky 1288331580Shselasky dev_info(&pdev->dev, "%s was called\n", __func__); 1289331580Shselasky 1290331580Shselasky err = mlx5_pci_enable_device(dev); 1291331580Shselasky if (err) { 1292331580Shselasky dev_err(&pdev->dev, "%s: mlx5_pci_enable_device failed with error code: %d\n" 1293331580Shselasky , __func__, err); 1294331580Shselasky return PCI_ERS_RESULT_DISCONNECT; 1295331580Shselasky } 1296331580Shselasky pci_set_master(pdev); 1297331580Shselasky pci_set_powerstate(pdev->dev.bsddev, PCI_POWERSTATE_D0); 1298331580Shselasky pci_restore_state(pdev->dev.bsddev); 1299331816Shselasky pci_save_state(pdev->dev.bsddev); 1300331580Shselasky 1301331580Shselasky return err ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED; 1302331580Shselasky} 1303331580Shselasky 1304331580Shselasky/* wait for the device to show vital signs. For now we check 1305331580Shselasky * that we can read the device ID and that the health buffer 1306331580Shselasky * shows a non zero value which is different than 0xffffffff 1307331580Shselasky */ 1308331580Shselaskystatic void wait_vital(struct pci_dev *pdev) 1309331580Shselasky{ 1310331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1311331580Shselasky struct mlx5_core_health *health = &dev->priv.health; 1312331580Shselasky const int niter = 100; 1313331580Shselasky u32 count; 1314331580Shselasky u16 did; 1315331580Shselasky int i; 1316331580Shselasky 1317331580Shselasky /* Wait for firmware to be ready after reset */ 1318331580Shselasky msleep(1000); 1319331580Shselasky for (i = 0; i < niter; i++) { 1320331580Shselasky if (pci_read_config_word(pdev, 2, &did)) { 1321331580Shselasky dev_warn(&pdev->dev, "failed reading config word\n"); 1322331580Shselasky break; 1323331580Shselasky } 1324331580Shselasky if (did == pdev->device) { 1325331580Shselasky dev_info(&pdev->dev, "device ID correctly read after %d iterations\n", i); 1326331580Shselasky break; 1327331580Shselasky } 1328331580Shselasky msleep(50); 1329331580Shselasky } 1330331580Shselasky if (i == niter) 1331331580Shselasky dev_warn(&pdev->dev, "%s-%d: could not read device ID\n", __func__, __LINE__); 1332331580Shselasky 1333331580Shselasky for (i = 0; i < niter; i++) { 1334331580Shselasky count = ioread32be(health->health_counter); 1335331580Shselasky if (count && count != 0xffffffff) { 1336331580Shselasky dev_info(&pdev->dev, "Counter value 0x%x after %d iterations\n", count, i); 1337331580Shselasky break; 1338331580Shselasky } 1339331580Shselasky msleep(50); 1340331580Shselasky } 1341331580Shselasky 1342331580Shselasky if (i == niter) 1343331580Shselasky dev_warn(&pdev->dev, "%s-%d: could not read device ID\n", __func__, __LINE__); 1344331580Shselasky} 1345331580Shselasky 1346331580Shselaskystatic void mlx5_pci_resume(struct pci_dev *pdev) 1347331580Shselasky{ 1348331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1349331580Shselasky struct mlx5_priv *priv = &dev->priv; 1350331580Shselasky int err; 1351331580Shselasky 1352331580Shselasky dev_info(&pdev->dev, "%s was called\n", __func__); 1353331580Shselasky 1354331580Shselasky wait_vital(pdev); 1355331580Shselasky 1356331810Shselasky err = mlx5_load_one(dev, priv, false); 1357331580Shselasky if (err) 1358331580Shselasky dev_err(&pdev->dev, "%s: mlx5_load_one failed with error code: %d\n" 1359331580Shselasky , __func__, err); 1360331580Shselasky else 1361331580Shselasky dev_info(&pdev->dev, "%s: device recovered\n", __func__); 1362331580Shselasky} 1363331580Shselasky 1364331580Shselaskystatic const struct pci_error_handlers mlx5_err_handler = { 1365331580Shselasky .error_detected = mlx5_pci_err_detected, 1366331580Shselasky .slot_reset = mlx5_pci_slot_reset, 1367331580Shselasky .resume = mlx5_pci_resume 1368331580Shselasky}; 1369331580Shselasky 1370331810Shselaskystatic int mlx5_try_fast_unload(struct mlx5_core_dev *dev) 1371331810Shselasky{ 1372331810Shselasky int err; 1373331810Shselasky 1374331810Shselasky if (!MLX5_CAP_GEN(dev, force_teardown)) { 1375331810Shselasky mlx5_core_dbg(dev, "force teardown is not supported in the firmware\n"); 1376331810Shselasky return -EOPNOTSUPP; 1377331810Shselasky } 1378331810Shselasky 1379331810Shselasky if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 1380331810Shselasky mlx5_core_dbg(dev, "Device in internal error state, giving up\n"); 1381331810Shselasky return -EAGAIN; 1382331810Shselasky } 1383331810Shselasky 1384331810Shselasky err = mlx5_cmd_force_teardown_hca(dev); 1385331810Shselasky if (err) { 1386331810Shselasky mlx5_core_dbg(dev, "Firmware couldn't do fast unload error: %d\n", err); 1387331810Shselasky return err; 1388331810Shselasky } 1389331810Shselasky 1390331810Shselasky mlx5_enter_error_state(dev, true); 1391331810Shselasky 1392331810Shselasky return 0; 1393331810Shselasky} 1394331810Shselasky 1395329211Shselaskystatic void shutdown_one(struct pci_dev *pdev) 1396329211Shselasky{ 1397331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1398331580Shselasky struct mlx5_priv *priv = &dev->priv; 1399331810Shselasky int err; 1400331580Shselasky 1401331580Shselasky set_bit(MLX5_INTERFACE_STATE_SHUTDOWN, &dev->intf_state); 1402331810Shselasky err = mlx5_try_fast_unload(dev); 1403331810Shselasky if (err) 1404331810Shselasky mlx5_unload_one(dev, priv, false); 1405331580Shselasky mlx5_pci_disable_device(dev); 1406329211Shselasky} 1407329211Shselasky 1408290650Shselaskystatic const struct pci_device_id mlx5_core_pci_table[] = { 1409290650Shselasky { PCI_VDEVICE(MELLANOX, 4113) }, /* Connect-IB */ 1410290650Shselasky { PCI_VDEVICE(MELLANOX, 4114) }, /* Connect-IB VF */ 1411290650Shselasky { PCI_VDEVICE(MELLANOX, 4115) }, /* ConnectX-4 */ 1412290650Shselasky { PCI_VDEVICE(MELLANOX, 4116) }, /* ConnectX-4 VF */ 1413290650Shselasky { PCI_VDEVICE(MELLANOX, 4117) }, /* ConnectX-4LX */ 1414290650Shselasky { PCI_VDEVICE(MELLANOX, 4118) }, /* ConnectX-4LX VF */ 1415306233Shselasky { PCI_VDEVICE(MELLANOX, 4119) }, /* ConnectX-5 */ 1416306233Shselasky { PCI_VDEVICE(MELLANOX, 4120) }, /* ConnectX-5 VF */ 1417290650Shselasky { PCI_VDEVICE(MELLANOX, 4121) }, 1418290650Shselasky { PCI_VDEVICE(MELLANOX, 4122) }, 1419290650Shselasky { PCI_VDEVICE(MELLANOX, 4123) }, 1420290650Shselasky { PCI_VDEVICE(MELLANOX, 4124) }, 1421290650Shselasky { PCI_VDEVICE(MELLANOX, 4125) }, 1422290650Shselasky { PCI_VDEVICE(MELLANOX, 4126) }, 1423290650Shselasky { PCI_VDEVICE(MELLANOX, 4127) }, 1424290650Shselasky { PCI_VDEVICE(MELLANOX, 4128) }, 1425290650Shselasky { PCI_VDEVICE(MELLANOX, 4129) }, 1426290650Shselasky { PCI_VDEVICE(MELLANOX, 4130) }, 1427290650Shselasky { PCI_VDEVICE(MELLANOX, 4131) }, 1428290650Shselasky { PCI_VDEVICE(MELLANOX, 4132) }, 1429290650Shselasky { PCI_VDEVICE(MELLANOX, 4133) }, 1430290650Shselasky { PCI_VDEVICE(MELLANOX, 4134) }, 1431290650Shselasky { PCI_VDEVICE(MELLANOX, 4135) }, 1432290650Shselasky { PCI_VDEVICE(MELLANOX, 4136) }, 1433290650Shselasky { PCI_VDEVICE(MELLANOX, 4137) }, 1434290650Shselasky { PCI_VDEVICE(MELLANOX, 4138) }, 1435290650Shselasky { PCI_VDEVICE(MELLANOX, 4139) }, 1436290650Shselasky { PCI_VDEVICE(MELLANOX, 4140) }, 1437290650Shselasky { PCI_VDEVICE(MELLANOX, 4141) }, 1438290650Shselasky { PCI_VDEVICE(MELLANOX, 4142) }, 1439290650Shselasky { PCI_VDEVICE(MELLANOX, 4143) }, 1440290650Shselasky { PCI_VDEVICE(MELLANOX, 4144) }, 1441290650Shselasky { 0, } 1442290650Shselasky}; 1443290650Shselasky 1444290650ShselaskyMODULE_DEVICE_TABLE(pci, mlx5_core_pci_table); 1445290650Shselasky 1446331809Shselaskyvoid mlx5_disable_device(struct mlx5_core_dev *dev) 1447331809Shselasky{ 1448331809Shselasky mlx5_pci_err_detected(dev->pdev, 0); 1449331809Shselasky} 1450331809Shselasky 1451331809Shselaskyvoid mlx5_recover_device(struct mlx5_core_dev *dev) 1452331809Shselasky{ 1453331809Shselasky mlx5_pci_disable_device(dev); 1454331809Shselasky if (mlx5_pci_slot_reset(dev->pdev) == PCI_ERS_RESULT_RECOVERED) 1455331809Shselasky mlx5_pci_resume(dev->pdev); 1456331809Shselasky} 1457331809Shselasky 1458331586Shselaskystruct pci_driver mlx5_core_driver = { 1459290650Shselasky .name = DRIVER_NAME, 1460290650Shselasky .id_table = mlx5_core_pci_table, 1461329211Shselasky .shutdown = shutdown_one, 1462290650Shselasky .probe = init_one, 1463331580Shselasky .remove = remove_one, 1464331580Shselasky .err_handler = &mlx5_err_handler 1465290650Shselasky}; 1466290650Shselasky 1467290650Shselaskystatic int __init init(void) 1468290650Shselasky{ 1469290650Shselasky int err; 1470290650Shselasky 1471290650Shselasky err = pci_register_driver(&mlx5_core_driver); 1472290650Shselasky if (err) 1473331580Shselasky goto err_debug; 1474290650Shselasky 1475331586Shselasky err = mlx5_fwdump_init(); 1476331586Shselasky if (err) 1477331586Shselasky goto err_fwdump; 1478331586Shselasky 1479331586Shselasky return 0; 1480331586Shselasky 1481331586Shselaskyerr_fwdump: 1482331586Shselasky pci_unregister_driver(&mlx5_core_driver); 1483290650Shselasky 1484290650Shselaskyerr_debug: 1485290650Shselasky return err; 1486290650Shselasky} 1487290650Shselasky 1488290650Shselaskystatic void __exit cleanup(void) 1489290650Shselasky{ 1490331586Shselasky mlx5_fwdump_fini(); 1491290650Shselasky pci_unregister_driver(&mlx5_core_driver); 1492290650Shselasky} 1493290650Shselasky 1494290650Shselaskymodule_init(init); 1495290650Shselaskymodule_exit(cleanup); 1496