mlx5_main.c revision 331816
1290650Shselasky/*- 2329200Shselasky * Copyright (c) 2013-2017, Mellanox Technologies, Ltd. All rights reserved. 3290650Shselasky * 4290650Shselasky * Redistribution and use in source and binary forms, with or without 5290650Shselasky * modification, are permitted provided that the following conditions 6290650Shselasky * are met: 7290650Shselasky * 1. Redistributions of source code must retain the above copyright 8290650Shselasky * notice, this list of conditions and the following disclaimer. 9290650Shselasky * 2. Redistributions in binary form must reproduce the above copyright 10290650Shselasky * notice, this list of conditions and the following disclaimer in the 11290650Shselasky * documentation and/or other materials provided with the distribution. 12290650Shselasky * 13290650Shselasky * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND 14290650Shselasky * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15290650Shselasky * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16290650Shselasky * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17290650Shselasky * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18290650Shselasky * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19290650Shselasky * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20290650Shselasky * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21290650Shselasky * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22290650Shselasky * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23290650Shselasky * SUCH DAMAGE. 24290650Shselasky * 25290650Shselasky * $FreeBSD: stable/11/sys/dev/mlx5/mlx5_core/mlx5_main.c 331816 2018-03-30 19:24:49Z hselasky $ 26290650Shselasky */ 27290650Shselasky 28300676Shselasky#define LINUXKPI_PARAM_PREFIX mlx5_ 29300676Shselasky 30290650Shselasky#include <linux/kmod.h> 31290650Shselasky#include <linux/module.h> 32290650Shselasky#include <linux/errno.h> 33290650Shselasky#include <linux/pci.h> 34290650Shselasky#include <linux/dma-mapping.h> 35290650Shselasky#include <linux/slab.h> 36290650Shselasky#include <linux/io-mapping.h> 37290650Shselasky#include <linux/interrupt.h> 38290650Shselasky#include <dev/mlx5/driver.h> 39290650Shselasky#include <dev/mlx5/cq.h> 40290650Shselasky#include <dev/mlx5/qp.h> 41290650Shselasky#include <dev/mlx5/srq.h> 42290650Shselasky#include <linux/delay.h> 43290650Shselasky#include <dev/mlx5/mlx5_ifc.h> 44290650Shselasky#include "mlx5_core.h" 45329200Shselasky#include "fs_core.h" 46290650Shselasky 47290650ShselaskyMODULE_AUTHOR("Eli Cohen <eli@mellanox.com>"); 48290650ShselaskyMODULE_DESCRIPTION("Mellanox Connect-IB, ConnectX-4 core driver"); 49290650ShselaskyMODULE_LICENSE("Dual BSD/GPL"); 50290650Shselasky#if (__FreeBSD_version >= 1100000) 51290650ShselaskyMODULE_DEPEND(mlx5, linuxkpi, 1, 1, 1); 52290650Shselasky#endif 53290650ShselaskyMODULE_VERSION(mlx5, 1); 54290650Shselasky 55290650Shselaskyint mlx5_core_debug_mask; 56290650Shselaskymodule_param_named(debug_mask, mlx5_core_debug_mask, int, 0644); 57290650ShselaskyMODULE_PARM_DESC(debug_mask, "debug mask: 1 = dump cmd data, 2 = dump cmd exec time, 3 = both. Default=0"); 58290650Shselasky 59290650Shselasky#define MLX5_DEFAULT_PROF 2 60290650Shselaskystatic int prof_sel = MLX5_DEFAULT_PROF; 61290650Shselaskymodule_param_named(prof_sel, prof_sel, int, 0444); 62290650ShselaskyMODULE_PARM_DESC(prof_sel, "profile selector. Valid range 0 - 2"); 63290650Shselasky 64290650Shselasky#define NUMA_NO_NODE -1 65290650Shselasky 66290650Shselaskystatic LIST_HEAD(intf_list); 67290650Shselaskystatic LIST_HEAD(dev_list); 68290650Shselaskystatic DEFINE_MUTEX(intf_mutex); 69290650Shselasky 70290650Shselaskystruct mlx5_device_context { 71290650Shselasky struct list_head list; 72290650Shselasky struct mlx5_interface *intf; 73290650Shselasky void *context; 74290650Shselasky}; 75290650Shselasky 76329209Shselaskyenum { 77329209Shselasky MLX5_ATOMIC_REQ_MODE_BE = 0x0, 78329209Shselasky MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS = 0x1, 79329209Shselasky}; 80329209Shselasky 81290650Shselaskystatic struct mlx5_profile profiles[] = { 82290650Shselasky [0] = { 83290650Shselasky .mask = 0, 84290650Shselasky }, 85290650Shselasky [1] = { 86290650Shselasky .mask = MLX5_PROF_MASK_QP_SIZE, 87290650Shselasky .log_max_qp = 12, 88290650Shselasky }, 89290650Shselasky [2] = { 90290650Shselasky .mask = MLX5_PROF_MASK_QP_SIZE | 91290650Shselasky MLX5_PROF_MASK_MR_CACHE, 92290650Shselasky .log_max_qp = 17, 93290650Shselasky .mr_cache[0] = { 94290650Shselasky .size = 500, 95290650Shselasky .limit = 250 96290650Shselasky }, 97290650Shselasky .mr_cache[1] = { 98290650Shselasky .size = 500, 99290650Shselasky .limit = 250 100290650Shselasky }, 101290650Shselasky .mr_cache[2] = { 102290650Shselasky .size = 500, 103290650Shselasky .limit = 250 104290650Shselasky }, 105290650Shselasky .mr_cache[3] = { 106290650Shselasky .size = 500, 107290650Shselasky .limit = 250 108290650Shselasky }, 109290650Shselasky .mr_cache[4] = { 110290650Shselasky .size = 500, 111290650Shselasky .limit = 250 112290650Shselasky }, 113290650Shselasky .mr_cache[5] = { 114290650Shselasky .size = 500, 115290650Shselasky .limit = 250 116290650Shselasky }, 117290650Shselasky .mr_cache[6] = { 118290650Shselasky .size = 500, 119290650Shselasky .limit = 250 120290650Shselasky }, 121290650Shselasky .mr_cache[7] = { 122290650Shselasky .size = 500, 123290650Shselasky .limit = 250 124290650Shselasky }, 125290650Shselasky .mr_cache[8] = { 126290650Shselasky .size = 500, 127290650Shselasky .limit = 250 128290650Shselasky }, 129290650Shselasky .mr_cache[9] = { 130290650Shselasky .size = 500, 131290650Shselasky .limit = 250 132290650Shselasky }, 133290650Shselasky .mr_cache[10] = { 134290650Shselasky .size = 500, 135290650Shselasky .limit = 250 136290650Shselasky }, 137290650Shselasky .mr_cache[11] = { 138290650Shselasky .size = 500, 139290650Shselasky .limit = 250 140290650Shselasky }, 141290650Shselasky .mr_cache[12] = { 142290650Shselasky .size = 64, 143290650Shselasky .limit = 32 144290650Shselasky }, 145290650Shselasky .mr_cache[13] = { 146290650Shselasky .size = 32, 147290650Shselasky .limit = 16 148290650Shselasky }, 149290650Shselasky .mr_cache[14] = { 150290650Shselasky .size = 16, 151290650Shselasky .limit = 8 152290650Shselasky }, 153290650Shselasky }, 154290650Shselasky [3] = { 155290650Shselasky .mask = MLX5_PROF_MASK_QP_SIZE, 156290650Shselasky .log_max_qp = 17, 157290650Shselasky }, 158290650Shselasky}; 159290650Shselasky 160290650Shselaskystatic int set_dma_caps(struct pci_dev *pdev) 161290650Shselasky{ 162290650Shselasky int err; 163290650Shselasky 164290650Shselasky err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 165290650Shselasky if (err) { 166290650Shselasky device_printf((&pdev->dev)->bsddev, "WARN: ""Warning: couldn't set 64-bit PCI DMA mask\n"); 167290650Shselasky err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 168290650Shselasky if (err) { 169290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Can't set PCI DMA mask, aborting\n"); 170290650Shselasky return err; 171290650Shselasky } 172290650Shselasky } 173290650Shselasky 174290650Shselasky err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 175290650Shselasky if (err) { 176290650Shselasky device_printf((&pdev->dev)->bsddev, "WARN: ""Warning: couldn't set 64-bit consistent PCI DMA mask\n"); 177290650Shselasky err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 178290650Shselasky if (err) { 179290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Can't set consistent PCI DMA mask, aborting\n"); 180290650Shselasky return err; 181290650Shselasky } 182290650Shselasky } 183290650Shselasky 184290650Shselasky dma_set_max_seg_size(&pdev->dev, 2u * 1024 * 1024 * 1024); 185290650Shselasky return err; 186290650Shselasky} 187290650Shselasky 188331580Shselaskystatic int mlx5_pci_enable_device(struct mlx5_core_dev *dev) 189331580Shselasky{ 190331580Shselasky struct pci_dev *pdev = dev->pdev; 191331580Shselasky int err = 0; 192331580Shselasky 193331580Shselasky mutex_lock(&dev->pci_status_mutex); 194331580Shselasky if (dev->pci_status == MLX5_PCI_STATUS_DISABLED) { 195331580Shselasky err = pci_enable_device(pdev); 196331580Shselasky if (!err) 197331580Shselasky dev->pci_status = MLX5_PCI_STATUS_ENABLED; 198331580Shselasky } 199331580Shselasky mutex_unlock(&dev->pci_status_mutex); 200331580Shselasky 201331580Shselasky return err; 202331580Shselasky} 203331580Shselasky 204331580Shselaskystatic void mlx5_pci_disable_device(struct mlx5_core_dev *dev) 205331580Shselasky{ 206331580Shselasky struct pci_dev *pdev = dev->pdev; 207331580Shselasky 208331580Shselasky mutex_lock(&dev->pci_status_mutex); 209331580Shselasky if (dev->pci_status == MLX5_PCI_STATUS_ENABLED) { 210331580Shselasky pci_disable_device(pdev); 211331580Shselasky dev->pci_status = MLX5_PCI_STATUS_DISABLED; 212331580Shselasky } 213331580Shselasky mutex_unlock(&dev->pci_status_mutex); 214331580Shselasky} 215331580Shselasky 216290650Shselaskystatic int request_bar(struct pci_dev *pdev) 217290650Shselasky{ 218290650Shselasky int err = 0; 219290650Shselasky 220290650Shselasky if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { 221290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Missing registers BAR, aborting\n"); 222290650Shselasky return -ENODEV; 223290650Shselasky } 224290650Shselasky 225290650Shselasky err = pci_request_regions(pdev, DRIVER_NAME); 226290650Shselasky if (err) 227290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Couldn't get PCI resources, aborting\n"); 228290650Shselasky 229290650Shselasky return err; 230290650Shselasky} 231290650Shselasky 232290650Shselaskystatic void release_bar(struct pci_dev *pdev) 233290650Shselasky{ 234290650Shselasky pci_release_regions(pdev); 235290650Shselasky} 236290650Shselasky 237290650Shselaskystatic int mlx5_enable_msix(struct mlx5_core_dev *dev) 238290650Shselasky{ 239290650Shselasky struct mlx5_priv *priv = &dev->priv; 240290650Shselasky struct mlx5_eq_table *table = &priv->eq_table; 241290650Shselasky int num_eqs = 1 << MLX5_CAP_GEN(dev, log_max_eq); 242290650Shselasky int nvec; 243290650Shselasky int i; 244290650Shselasky 245290650Shselasky nvec = MLX5_CAP_GEN(dev, num_ports) * num_online_cpus() + 246290650Shselasky MLX5_EQ_VEC_COMP_BASE; 247290650Shselasky nvec = min_t(int, nvec, num_eqs); 248290650Shselasky if (nvec <= MLX5_EQ_VEC_COMP_BASE) 249290650Shselasky return -ENOMEM; 250290650Shselasky 251290650Shselasky priv->msix_arr = kzalloc(nvec * sizeof(*priv->msix_arr), GFP_KERNEL); 252290650Shselasky 253290650Shselasky priv->irq_info = kzalloc(nvec * sizeof(*priv->irq_info), GFP_KERNEL); 254290650Shselasky 255290650Shselasky for (i = 0; i < nvec; i++) 256290650Shselasky priv->msix_arr[i].entry = i; 257290650Shselasky 258290650Shselasky nvec = pci_enable_msix_range(dev->pdev, priv->msix_arr, 259290650Shselasky MLX5_EQ_VEC_COMP_BASE + 1, nvec); 260290650Shselasky if (nvec < 0) 261290650Shselasky return nvec; 262290650Shselasky 263290650Shselasky table->num_comp_vectors = nvec - MLX5_EQ_VEC_COMP_BASE; 264290650Shselasky 265290650Shselasky return 0; 266290650Shselasky 267290650Shselasky} 268290650Shselasky 269290650Shselaskystatic void mlx5_disable_msix(struct mlx5_core_dev *dev) 270290650Shselasky{ 271290650Shselasky struct mlx5_priv *priv = &dev->priv; 272290650Shselasky 273290650Shselasky pci_disable_msix(dev->pdev); 274290650Shselasky kfree(priv->irq_info); 275290650Shselasky kfree(priv->msix_arr); 276290650Shselasky} 277290650Shselasky 278290650Shselaskystruct mlx5_reg_host_endianess { 279290650Shselasky u8 he; 280290650Shselasky u8 rsvd[15]; 281290650Shselasky}; 282290650Shselasky 283290650Shselasky 284290650Shselasky#define CAP_MASK(pos, size) ((u64)((1 << (size)) - 1) << (pos)) 285290650Shselasky 286290650Shselaskyenum { 287290650Shselasky MLX5_CAP_BITS_RW_MASK = CAP_MASK(MLX5_CAP_OFF_CMDIF_CSUM, 2) | 288306233Shselasky MLX5_DEV_CAP_FLAG_DCT | 289306233Shselasky MLX5_DEV_CAP_FLAG_DRAIN_SIGERR, 290290650Shselasky}; 291290650Shselasky 292290650Shselaskystatic u16 to_fw_pkey_sz(u32 size) 293290650Shselasky{ 294290650Shselasky switch (size) { 295290650Shselasky case 128: 296290650Shselasky return 0; 297290650Shselasky case 256: 298290650Shselasky return 1; 299290650Shselasky case 512: 300290650Shselasky return 2; 301290650Shselasky case 1024: 302290650Shselasky return 3; 303290650Shselasky case 2048: 304290650Shselasky return 4; 305290650Shselasky case 4096: 306290650Shselasky return 5; 307290650Shselasky default: 308290650Shselasky printf("mlx5_core: WARN: ""invalid pkey table size %d\n", size); 309290650Shselasky return 0; 310290650Shselasky } 311290650Shselasky} 312290650Shselasky 313331807Shselaskystatic int mlx5_core_get_caps_mode(struct mlx5_core_dev *dev, 314331807Shselasky enum mlx5_cap_type cap_type, 315331807Shselasky enum mlx5_cap_mode cap_mode) 316290650Shselasky{ 317290650Shselasky u8 in[MLX5_ST_SZ_BYTES(query_hca_cap_in)]; 318290650Shselasky int out_sz = MLX5_ST_SZ_BYTES(query_hca_cap_out); 319290650Shselasky void *out, *hca_caps; 320290650Shselasky u16 opmod = (cap_type << 1) | (cap_mode & 0x01); 321290650Shselasky int err; 322290650Shselasky 323290650Shselasky memset(in, 0, sizeof(in)); 324290650Shselasky out = kzalloc(out_sz, GFP_KERNEL); 325290650Shselasky 326290650Shselasky MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP); 327290650Shselasky MLX5_SET(query_hca_cap_in, in, op_mod, opmod); 328290650Shselasky err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz); 329290650Shselasky if (err) { 330290650Shselasky mlx5_core_warn(dev, 331290650Shselasky "QUERY_HCA_CAP : type(%x) opmode(%x) Failed(%d)\n", 332290650Shselasky cap_type, cap_mode, err); 333290650Shselasky goto query_ex; 334290650Shselasky } 335290650Shselasky 336290650Shselasky hca_caps = MLX5_ADDR_OF(query_hca_cap_out, out, capability); 337290650Shselasky 338290650Shselasky switch (cap_mode) { 339290650Shselasky case HCA_CAP_OPMOD_GET_MAX: 340290650Shselasky memcpy(dev->hca_caps_max[cap_type], hca_caps, 341290650Shselasky MLX5_UN_SZ_BYTES(hca_cap_union)); 342290650Shselasky break; 343290650Shselasky case HCA_CAP_OPMOD_GET_CUR: 344290650Shselasky memcpy(dev->hca_caps_cur[cap_type], hca_caps, 345290650Shselasky MLX5_UN_SZ_BYTES(hca_cap_union)); 346290650Shselasky break; 347290650Shselasky default: 348290650Shselasky mlx5_core_warn(dev, 349290650Shselasky "Tried to query dev cap type(%x) with wrong opmode(%x)\n", 350290650Shselasky cap_type, cap_mode); 351290650Shselasky err = -EINVAL; 352290650Shselasky break; 353290650Shselasky } 354290650Shselaskyquery_ex: 355290650Shselasky kfree(out); 356290650Shselasky return err; 357290650Shselasky} 358290650Shselasky 359331807Shselaskyint mlx5_core_get_caps(struct mlx5_core_dev *dev, enum mlx5_cap_type cap_type) 360331807Shselasky{ 361331807Shselasky int ret; 362331807Shselasky 363331807Shselasky ret = mlx5_core_get_caps_mode(dev, cap_type, HCA_CAP_OPMOD_GET_CUR); 364331807Shselasky if (ret) 365331807Shselasky return ret; 366331807Shselasky 367331807Shselasky return mlx5_core_get_caps_mode(dev, cap_type, HCA_CAP_OPMOD_GET_MAX); 368331807Shselasky} 369331807Shselasky 370290650Shselaskystatic int set_caps(struct mlx5_core_dev *dev, void *in, int in_sz) 371290650Shselasky{ 372331807Shselasky u32 out[MLX5_ST_SZ_DW(set_hca_cap_out)] = {0}; 373290650Shselasky 374290650Shselasky MLX5_SET(set_hca_cap_in, in, opcode, MLX5_CMD_OP_SET_HCA_CAP); 375290650Shselasky 376331807Shselasky return mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out)); 377290650Shselasky} 378290650Shselasky 379290650Shselaskystatic int handle_hca_cap(struct mlx5_core_dev *dev) 380290650Shselasky{ 381290650Shselasky void *set_ctx = NULL; 382290650Shselasky struct mlx5_profile *prof = dev->profile; 383290650Shselasky int err = -ENOMEM; 384290650Shselasky int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in); 385290650Shselasky void *set_hca_cap; 386290650Shselasky 387290650Shselasky set_ctx = kzalloc(set_sz, GFP_KERNEL); 388290650Shselasky 389331807Shselasky err = mlx5_core_get_caps(dev, MLX5_CAP_GENERAL); 390290650Shselasky if (err) 391290650Shselasky goto query_ex; 392290650Shselasky 393290650Shselasky set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, 394290650Shselasky capability); 395290650Shselasky memcpy(set_hca_cap, dev->hca_caps_cur[MLX5_CAP_GENERAL], 396290650Shselasky MLX5_ST_SZ_BYTES(cmd_hca_cap)); 397290650Shselasky 398290650Shselasky mlx5_core_dbg(dev, "Current Pkey table size %d Setting new size %d\n", 399290650Shselasky mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size)), 400290650Shselasky 128); 401290650Shselasky /* we limit the size of the pkey table to 128 entries for now */ 402290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, pkey_table_size, 403290650Shselasky to_fw_pkey_sz(128)); 404290650Shselasky 405290650Shselasky if (prof->mask & MLX5_PROF_MASK_QP_SIZE) 406290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, log_max_qp, 407290650Shselasky prof->log_max_qp); 408290650Shselasky 409290650Shselasky /* disable cmdif checksum */ 410290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, cmdif_checksum, 0); 411290650Shselasky 412306233Shselasky /* enable drain sigerr */ 413306233Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, drain_sigerr, 1); 414306233Shselasky 415290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, log_uar_page_sz, PAGE_SHIFT - 12); 416290650Shselasky 417290650Shselasky err = set_caps(dev, set_ctx, set_sz); 418290650Shselasky 419290650Shselaskyquery_ex: 420290650Shselasky kfree(set_ctx); 421290650Shselasky return err; 422290650Shselasky} 423290650Shselasky 424329209Shselaskystatic int handle_hca_cap_atomic(struct mlx5_core_dev *dev) 425329209Shselasky{ 426329209Shselasky void *set_ctx; 427329209Shselasky void *set_hca_cap; 428329209Shselasky int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in); 429329209Shselasky int req_endianness; 430329209Shselasky int err; 431329209Shselasky 432329209Shselasky if (MLX5_CAP_GEN(dev, atomic)) { 433331807Shselasky err = mlx5_core_get_caps(dev, MLX5_CAP_ATOMIC); 434329209Shselasky if (err) 435329209Shselasky return err; 436329209Shselasky } else { 437329209Shselasky return 0; 438329209Shselasky } 439329209Shselasky 440329209Shselasky req_endianness = 441329209Shselasky MLX5_CAP_ATOMIC(dev, 442329209Shselasky supported_atomic_req_8B_endianess_mode_1); 443329209Shselasky 444329209Shselasky if (req_endianness != MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS) 445329209Shselasky return 0; 446329209Shselasky 447329209Shselasky set_ctx = kzalloc(set_sz, GFP_KERNEL); 448329209Shselasky if (!set_ctx) 449329209Shselasky return -ENOMEM; 450329209Shselasky 451329209Shselasky MLX5_SET(set_hca_cap_in, set_ctx, op_mod, 452329209Shselasky MLX5_SET_HCA_CAP_OP_MOD_ATOMIC << 1); 453329209Shselasky set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, capability); 454329209Shselasky 455329209Shselasky /* Set requestor to host endianness */ 456329209Shselasky MLX5_SET(atomic_caps, set_hca_cap, atomic_req_8B_endianess_mode, 457329209Shselasky MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS); 458329209Shselasky 459329209Shselasky err = set_caps(dev, set_ctx, set_sz); 460329209Shselasky 461329209Shselasky kfree(set_ctx); 462329209Shselasky return err; 463329209Shselasky} 464329209Shselasky 465290650Shselaskystatic int set_hca_ctrl(struct mlx5_core_dev *dev) 466290650Shselasky{ 467290650Shselasky struct mlx5_reg_host_endianess he_in; 468290650Shselasky struct mlx5_reg_host_endianess he_out; 469290650Shselasky int err; 470290650Shselasky 471306233Shselasky if (MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_ETH && 472306233Shselasky !MLX5_CAP_GEN(dev, roce)) 473306233Shselasky return 0; 474306233Shselasky 475290650Shselasky memset(&he_in, 0, sizeof(he_in)); 476290650Shselasky he_in.he = MLX5_SET_HOST_ENDIANNESS; 477290650Shselasky err = mlx5_core_access_reg(dev, &he_in, sizeof(he_in), 478290650Shselasky &he_out, sizeof(he_out), 479290650Shselasky MLX5_REG_HOST_ENDIANNESS, 0, 1); 480290650Shselasky return err; 481290650Shselasky} 482290650Shselasky 483290650Shselaskystatic int mlx5_core_enable_hca(struct mlx5_core_dev *dev) 484290650Shselasky{ 485331807Shselasky u32 out[MLX5_ST_SZ_DW(enable_hca_out)] = {0}; 486331807Shselasky u32 in[MLX5_ST_SZ_DW(enable_hca_in)] = {0}; 487290650Shselasky 488290650Shselasky MLX5_SET(enable_hca_in, in, opcode, MLX5_CMD_OP_ENABLE_HCA); 489331807Shselasky return mlx5_cmd_exec(dev, &in, sizeof(in), &out, sizeof(out)); 490290650Shselasky} 491290650Shselasky 492290650Shselaskystatic int mlx5_core_disable_hca(struct mlx5_core_dev *dev) 493290650Shselasky{ 494331807Shselasky u32 out[MLX5_ST_SZ_DW(disable_hca_out)] = {0}; 495331807Shselasky u32 in[MLX5_ST_SZ_DW(disable_hca_in)] = {0}; 496290650Shselasky 497290650Shselasky MLX5_SET(disable_hca_in, in, opcode, MLX5_CMD_OP_DISABLE_HCA); 498331807Shselasky return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); 499290650Shselasky} 500290650Shselasky 501290650Shselaskystatic int mlx5_core_set_issi(struct mlx5_core_dev *dev) 502290650Shselasky{ 503331807Shselasky u32 query_in[MLX5_ST_SZ_DW(query_issi_in)] = {0}; 504331807Shselasky u32 query_out[MLX5_ST_SZ_DW(query_issi_out)] = {0}; 505331807Shselasky u32 sup_issi; 506290650Shselasky int err; 507290650Shselasky 508290650Shselasky MLX5_SET(query_issi_in, query_in, opcode, MLX5_CMD_OP_QUERY_ISSI); 509290650Shselasky 510331807Shselasky err = mlx5_cmd_exec(dev, query_in, sizeof(query_in), query_out, sizeof(query_out)); 511290650Shselasky if (err) { 512331807Shselasky u32 syndrome; 513331807Shselasky u8 status; 514331807Shselasky 515331807Shselasky mlx5_cmd_mbox_status(query_out, &status, &syndrome); 516331807Shselasky if (status == MLX5_CMD_STAT_BAD_OP_ERR) { 517290650Shselasky pr_debug("Only ISSI 0 is supported\n"); 518290650Shselasky return 0; 519290650Shselasky } 520290650Shselasky 521290650Shselasky printf("mlx5_core: ERR: ""failed to query ISSI\n"); 522290650Shselasky return err; 523290650Shselasky } 524290650Shselasky 525290650Shselasky sup_issi = MLX5_GET(query_issi_out, query_out, supported_issi_dw0); 526290650Shselasky 527290650Shselasky if (sup_issi & (1 << 1)) { 528331807Shselasky u32 set_in[MLX5_ST_SZ_DW(set_issi_in)] = {0}; 529331807Shselasky u32 set_out[MLX5_ST_SZ_DW(set_issi_out)] = {0}; 530290650Shselasky 531290650Shselasky MLX5_SET(set_issi_in, set_in, opcode, MLX5_CMD_OP_SET_ISSI); 532290650Shselasky MLX5_SET(set_issi_in, set_in, current_issi, 1); 533290650Shselasky 534331807Shselasky err = mlx5_cmd_exec(dev, set_in, sizeof(set_in), set_out, sizeof(set_out)); 535290650Shselasky if (err) { 536331807Shselasky printf("mlx5_core: ERR: ""failed to set ISSI=1 err(%d)\n", err); 537290650Shselasky return err; 538290650Shselasky } 539290650Shselasky 540290650Shselasky dev->issi = 1; 541290650Shselasky 542290650Shselasky return 0; 543290650Shselasky } else if (sup_issi & (1 << 0)) { 544290650Shselasky return 0; 545290650Shselasky } 546290650Shselasky 547290650Shselasky return -ENOTSUPP; 548290650Shselasky} 549290650Shselasky 550290650Shselasky 551290650Shselaskyint mlx5_vector2eqn(struct mlx5_core_dev *dev, int vector, int *eqn, int *irqn) 552290650Shselasky{ 553290650Shselasky struct mlx5_eq_table *table = &dev->priv.eq_table; 554290650Shselasky struct mlx5_eq *eq; 555290650Shselasky int err = -ENOENT; 556290650Shselasky 557290650Shselasky spin_lock(&table->lock); 558290650Shselasky list_for_each_entry(eq, &table->comp_eqs_list, list) { 559290650Shselasky if (eq->index == vector) { 560290650Shselasky *eqn = eq->eqn; 561290650Shselasky *irqn = eq->irqn; 562290650Shselasky err = 0; 563290650Shselasky break; 564290650Shselasky } 565290650Shselasky } 566290650Shselasky spin_unlock(&table->lock); 567290650Shselasky 568290650Shselasky return err; 569290650Shselasky} 570290650ShselaskyEXPORT_SYMBOL(mlx5_vector2eqn); 571290650Shselasky 572290650Shselaskyint mlx5_rename_eq(struct mlx5_core_dev *dev, int eq_ix, char *name) 573290650Shselasky{ 574290650Shselasky struct mlx5_priv *priv = &dev->priv; 575290650Shselasky struct mlx5_eq_table *table = &priv->eq_table; 576290650Shselasky struct mlx5_eq *eq; 577290650Shselasky int err = -ENOENT; 578290650Shselasky 579290650Shselasky spin_lock(&table->lock); 580290650Shselasky list_for_each_entry(eq, &table->comp_eqs_list, list) { 581290650Shselasky if (eq->index == eq_ix) { 582290650Shselasky int irq_ix = eq_ix + MLX5_EQ_VEC_COMP_BASE; 583290650Shselasky 584290650Shselasky snprintf(priv->irq_info[irq_ix].name, MLX5_MAX_IRQ_NAME, 585290650Shselasky "%s-%d", name, eq_ix); 586290650Shselasky 587290650Shselasky err = 0; 588290650Shselasky break; 589290650Shselasky } 590290650Shselasky } 591290650Shselasky spin_unlock(&table->lock); 592290650Shselasky 593290650Shselasky return err; 594290650Shselasky} 595290650Shselasky 596290650Shselaskystatic void free_comp_eqs(struct mlx5_core_dev *dev) 597290650Shselasky{ 598290650Shselasky struct mlx5_eq_table *table = &dev->priv.eq_table; 599290650Shselasky struct mlx5_eq *eq, *n; 600290650Shselasky 601290650Shselasky spin_lock(&table->lock); 602290650Shselasky list_for_each_entry_safe(eq, n, &table->comp_eqs_list, list) { 603290650Shselasky list_del(&eq->list); 604290650Shselasky spin_unlock(&table->lock); 605290650Shselasky if (mlx5_destroy_unmap_eq(dev, eq)) 606290650Shselasky mlx5_core_warn(dev, "failed to destroy EQ 0x%x\n", 607290650Shselasky eq->eqn); 608290650Shselasky kfree(eq); 609290650Shselasky spin_lock(&table->lock); 610290650Shselasky } 611290650Shselasky spin_unlock(&table->lock); 612290650Shselasky} 613290650Shselasky 614290650Shselaskystatic int alloc_comp_eqs(struct mlx5_core_dev *dev) 615290650Shselasky{ 616290650Shselasky struct mlx5_eq_table *table = &dev->priv.eq_table; 617290650Shselasky char name[MLX5_MAX_IRQ_NAME]; 618290650Shselasky struct mlx5_eq *eq; 619290650Shselasky int ncomp_vec; 620290650Shselasky int nent; 621290650Shselasky int err; 622290650Shselasky int i; 623290650Shselasky 624290650Shselasky INIT_LIST_HEAD(&table->comp_eqs_list); 625290650Shselasky ncomp_vec = table->num_comp_vectors; 626290650Shselasky nent = MLX5_COMP_EQ_SIZE; 627290650Shselasky for (i = 0; i < ncomp_vec; i++) { 628290650Shselasky eq = kzalloc(sizeof(*eq), GFP_KERNEL); 629290650Shselasky 630290650Shselasky snprintf(name, MLX5_MAX_IRQ_NAME, "mlx5_comp%d", i); 631290650Shselasky err = mlx5_create_map_eq(dev, eq, 632290650Shselasky i + MLX5_EQ_VEC_COMP_BASE, nent, 0, 633290650Shselasky name, &dev->priv.uuari.uars[0]); 634290650Shselasky if (err) { 635290650Shselasky kfree(eq); 636290650Shselasky goto clean; 637290650Shselasky } 638290650Shselasky mlx5_core_dbg(dev, "allocated completion EQN %d\n", eq->eqn); 639290650Shselasky eq->index = i; 640290650Shselasky spin_lock(&table->lock); 641290650Shselasky list_add_tail(&eq->list, &table->comp_eqs_list); 642290650Shselasky spin_unlock(&table->lock); 643290650Shselasky } 644290650Shselasky 645290650Shselasky return 0; 646290650Shselasky 647290650Shselaskyclean: 648290650Shselasky free_comp_eqs(dev); 649290650Shselasky return err; 650290650Shselasky} 651290650Shselasky 652290650Shselaskystatic int map_bf_area(struct mlx5_core_dev *dev) 653290650Shselasky{ 654290650Shselasky resource_size_t bf_start = pci_resource_start(dev->pdev, 0); 655290650Shselasky resource_size_t bf_len = pci_resource_len(dev->pdev, 0); 656290650Shselasky 657290650Shselasky dev->priv.bf_mapping = io_mapping_create_wc(bf_start, bf_len); 658290650Shselasky 659290650Shselasky return dev->priv.bf_mapping ? 0 : -ENOMEM; 660290650Shselasky} 661290650Shselasky 662290650Shselaskystatic void unmap_bf_area(struct mlx5_core_dev *dev) 663290650Shselasky{ 664290650Shselasky if (dev->priv.bf_mapping) 665290650Shselasky io_mapping_free(dev->priv.bf_mapping); 666290650Shselasky} 667290650Shselasky 668290650Shselaskystatic inline int fw_initializing(struct mlx5_core_dev *dev) 669290650Shselasky{ 670290650Shselasky return ioread32be(&dev->iseg->initializing) >> 31; 671290650Shselasky} 672290650Shselasky 673290650Shselaskystatic int wait_fw_init(struct mlx5_core_dev *dev, u32 max_wait_mili) 674290650Shselasky{ 675290650Shselasky u64 end = jiffies + msecs_to_jiffies(max_wait_mili); 676290650Shselasky int err = 0; 677290650Shselasky 678290650Shselasky while (fw_initializing(dev)) { 679290650Shselasky if (time_after(jiffies, end)) { 680290650Shselasky err = -EBUSY; 681290650Shselasky break; 682290650Shselasky } 683290650Shselasky msleep(FW_INIT_WAIT_MS); 684290650Shselasky } 685290650Shselasky 686290650Shselasky return err; 687290650Shselasky} 688290650Shselasky 689331580Shselaskystatic void mlx5_add_device(struct mlx5_interface *intf, struct mlx5_priv *priv) 690290650Shselasky{ 691331580Shselasky struct mlx5_device_context *dev_ctx; 692331580Shselasky struct mlx5_core_dev *dev = container_of(priv, struct mlx5_core_dev, priv); 693331580Shselasky 694331580Shselasky dev_ctx = kzalloc(sizeof(*dev_ctx), GFP_KERNEL); 695331580Shselasky if (!dev_ctx) 696331580Shselasky return; 697331580Shselasky 698331580Shselasky dev_ctx->intf = intf; 699331580Shselasky CURVNET_SET_QUIET(vnet0); 700331580Shselasky dev_ctx->context = intf->add(dev); 701331580Shselasky CURVNET_RESTORE(); 702331580Shselasky 703331580Shselasky if (dev_ctx->context) { 704331580Shselasky spin_lock_irq(&priv->ctx_lock); 705331580Shselasky list_add_tail(&dev_ctx->list, &priv->ctx_list); 706331580Shselasky spin_unlock_irq(&priv->ctx_lock); 707331580Shselasky } else { 708331580Shselasky kfree(dev_ctx); 709331580Shselasky } 710331580Shselasky} 711331580Shselasky 712331580Shselaskystatic void mlx5_remove_device(struct mlx5_interface *intf, struct mlx5_priv *priv) 713331580Shselasky{ 714331580Shselasky struct mlx5_device_context *dev_ctx; 715331580Shselasky struct mlx5_core_dev *dev = container_of(priv, struct mlx5_core_dev, priv); 716331580Shselasky 717331580Shselasky list_for_each_entry(dev_ctx, &priv->ctx_list, list) 718331580Shselasky if (dev_ctx->intf == intf) { 719331580Shselasky spin_lock_irq(&priv->ctx_lock); 720331580Shselasky list_del(&dev_ctx->list); 721331580Shselasky spin_unlock_irq(&priv->ctx_lock); 722331580Shselasky 723331580Shselasky intf->remove(dev, dev_ctx->context); 724331580Shselasky kfree(dev_ctx); 725331580Shselasky return; 726331580Shselasky } 727331580Shselasky} 728331580Shselasky 729331580Shselaskystatic int mlx5_register_device(struct mlx5_core_dev *dev) 730331580Shselasky{ 731290650Shselasky struct mlx5_priv *priv = &dev->priv; 732331580Shselasky struct mlx5_interface *intf; 733290650Shselasky 734331580Shselasky mutex_lock(&intf_mutex); 735331580Shselasky list_add_tail(&priv->dev_list, &dev_list); 736331580Shselasky list_for_each_entry(intf, &intf_list, list) 737331580Shselasky mlx5_add_device(intf, priv); 738331580Shselasky mutex_unlock(&intf_mutex); 739331580Shselasky 740331580Shselasky return 0; 741331580Shselasky} 742331580Shselasky 743331580Shselaskystatic void mlx5_unregister_device(struct mlx5_core_dev *dev) 744331580Shselasky{ 745331580Shselasky struct mlx5_priv *priv = &dev->priv; 746331580Shselasky struct mlx5_interface *intf; 747331580Shselasky 748331580Shselasky mutex_lock(&intf_mutex); 749331580Shselasky list_for_each_entry(intf, &intf_list, list) 750331580Shselasky mlx5_remove_device(intf, priv); 751331580Shselasky list_del(&priv->dev_list); 752331580Shselasky mutex_unlock(&intf_mutex); 753331580Shselasky} 754331580Shselasky 755331580Shselaskyint mlx5_register_interface(struct mlx5_interface *intf) 756331580Shselasky{ 757331580Shselasky struct mlx5_priv *priv; 758331580Shselasky 759331580Shselasky if (!intf->add || !intf->remove) 760331580Shselasky return -EINVAL; 761331580Shselasky 762331580Shselasky mutex_lock(&intf_mutex); 763331580Shselasky list_add_tail(&intf->list, &intf_list); 764331580Shselasky list_for_each_entry(priv, &dev_list, dev_list) 765331580Shselasky mlx5_add_device(intf, priv); 766331580Shselasky mutex_unlock(&intf_mutex); 767331580Shselasky 768331580Shselasky return 0; 769331580Shselasky} 770331580ShselaskyEXPORT_SYMBOL(mlx5_register_interface); 771331580Shselasky 772331580Shselaskyvoid mlx5_unregister_interface(struct mlx5_interface *intf) 773331580Shselasky{ 774331580Shselasky struct mlx5_priv *priv; 775331580Shselasky 776331580Shselasky mutex_lock(&intf_mutex); 777331580Shselasky list_for_each_entry(priv, &dev_list, dev_list) 778331580Shselasky mlx5_remove_device(intf, priv); 779331580Shselasky list_del(&intf->list); 780331580Shselasky mutex_unlock(&intf_mutex); 781331580Shselasky} 782331580ShselaskyEXPORT_SYMBOL(mlx5_unregister_interface); 783331580Shselasky 784331580Shselaskyvoid *mlx5_get_protocol_dev(struct mlx5_core_dev *mdev, int protocol) 785331580Shselasky{ 786331580Shselasky struct mlx5_priv *priv = &mdev->priv; 787331580Shselasky struct mlx5_device_context *dev_ctx; 788331580Shselasky unsigned long flags; 789331580Shselasky void *result = NULL; 790331580Shselasky 791331580Shselasky spin_lock_irqsave(&priv->ctx_lock, flags); 792331580Shselasky 793331580Shselasky list_for_each_entry(dev_ctx, &mdev->priv.ctx_list, list) 794331580Shselasky if ((dev_ctx->intf->protocol == protocol) && 795331580Shselasky dev_ctx->intf->get_dev) { 796331580Shselasky result = dev_ctx->intf->get_dev(dev_ctx->context); 797331580Shselasky break; 798331580Shselasky } 799331580Shselasky 800331580Shselasky spin_unlock_irqrestore(&priv->ctx_lock, flags); 801331580Shselasky 802331580Shselasky return result; 803331580Shselasky} 804331580ShselaskyEXPORT_SYMBOL(mlx5_get_protocol_dev); 805331580Shselasky 806331580Shselaskystatic int mlx5_pci_init(struct mlx5_core_dev *dev, struct mlx5_priv *priv) 807331580Shselasky{ 808331580Shselasky struct pci_dev *pdev = dev->pdev; 809331580Shselasky int err = 0; 810331580Shselasky 811290650Shselasky pci_set_drvdata(dev->pdev, dev); 812290650Shselasky strncpy(priv->name, dev_name(&pdev->dev), MLX5_MAX_NAME_LEN); 813290650Shselasky priv->name[MLX5_MAX_NAME_LEN - 1] = 0; 814290650Shselasky 815290650Shselasky mutex_init(&priv->pgdir_mutex); 816290650Shselasky INIT_LIST_HEAD(&priv->pgdir_list); 817290650Shselasky spin_lock_init(&priv->mkey_lock); 818290650Shselasky 819290650Shselasky priv->numa_node = NUMA_NO_NODE; 820290650Shselasky 821331580Shselasky err = mlx5_pci_enable_device(dev); 822290650Shselasky if (err) { 823290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Cannot enable PCI device, aborting\n"); 824290650Shselasky goto err_dbg; 825290650Shselasky } 826290650Shselasky 827290650Shselasky err = request_bar(pdev); 828290650Shselasky if (err) { 829290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""error requesting BARs, aborting\n"); 830290650Shselasky goto err_disable; 831290650Shselasky } 832290650Shselasky 833290650Shselasky pci_set_master(pdev); 834290650Shselasky 835290650Shselasky err = set_dma_caps(pdev); 836290650Shselasky if (err) { 837290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed setting DMA capabilities mask, aborting\n"); 838290650Shselasky goto err_clr_master; 839290650Shselasky } 840290650Shselasky 841329212Shselasky dev->iseg_base = pci_resource_start(dev->pdev, 0); 842329212Shselasky dev->iseg = ioremap(dev->iseg_base, sizeof(*dev->iseg)); 843290650Shselasky if (!dev->iseg) { 844290650Shselasky err = -ENOMEM; 845290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed mapping initialization segment, aborting\n"); 846290650Shselasky goto err_clr_master; 847290650Shselasky } 848331580Shselasky 849331585Shselasky if (mlx5_vsc_find_cap(dev)) 850331585Shselasky dev_err(&pdev->dev, "Unable to find vendor specific capabilities\n"); 851331585Shselasky 852331580Shselasky return 0; 853331580Shselasky 854331580Shselaskyerr_clr_master: 855331580Shselasky pci_clear_master(dev->pdev); 856331580Shselasky release_bar(dev->pdev); 857331580Shselaskyerr_disable: 858331580Shselasky mlx5_pci_disable_device(dev); 859331580Shselaskyerr_dbg: 860331580Shselasky return err; 861331580Shselasky} 862331580Shselasky 863331580Shselaskystatic void mlx5_pci_close(struct mlx5_core_dev *dev, struct mlx5_priv *priv) 864331580Shselasky{ 865331580Shselasky iounmap(dev->iseg); 866331580Shselasky pci_clear_master(dev->pdev); 867331580Shselasky release_bar(dev->pdev); 868331580Shselasky mlx5_pci_disable_device(dev); 869331580Shselasky} 870331580Shselasky 871331810Shselaskystatic int mlx5_init_once(struct mlx5_core_dev *dev, struct mlx5_priv *priv) 872331580Shselasky{ 873331580Shselasky struct pci_dev *pdev = dev->pdev; 874331580Shselasky int err; 875331580Shselasky 876331815Shselasky mlx5_vsec_init(dev); 877331815Shselasky 878331810Shselasky err = mlx5_query_hca_caps(dev); 879331810Shselasky if (err) { 880331810Shselasky dev_err(&pdev->dev, "query hca failed\n"); 881331810Shselasky goto out; 882331810Shselasky } 883331810Shselasky 884331810Shselasky err = mlx5_query_board_id(dev); 885331810Shselasky if (err) { 886331810Shselasky dev_err(&pdev->dev, "query board id failed\n"); 887331810Shselasky goto out; 888331810Shselasky } 889331810Shselasky 890331810Shselasky err = mlx5_eq_init(dev); 891331810Shselasky if (err) { 892331810Shselasky dev_err(&pdev->dev, "failed to initialize eq\n"); 893331810Shselasky goto out; 894331810Shselasky } 895331810Shselasky 896331810Shselasky MLX5_INIT_DOORBELL_LOCK(&priv->cq_uar_lock); 897331810Shselasky 898331810Shselasky err = mlx5_init_cq_table(dev); 899331810Shselasky if (err) { 900331810Shselasky dev_err(&pdev->dev, "failed to initialize cq table\n"); 901331810Shselasky goto err_eq_cleanup; 902331810Shselasky } 903331810Shselasky 904331810Shselasky mlx5_init_qp_table(dev); 905331810Shselasky mlx5_init_srq_table(dev); 906331810Shselasky mlx5_init_mr_table(dev); 907331810Shselasky 908331810Shselasky return 0; 909331810Shselasky 910331810Shselaskyerr_eq_cleanup: 911331810Shselasky mlx5_eq_cleanup(dev); 912331810Shselasky 913331810Shselaskyout: 914331810Shselasky return err; 915331810Shselasky} 916331810Shselasky 917331810Shselaskystatic void mlx5_cleanup_once(struct mlx5_core_dev *dev) 918331810Shselasky{ 919331810Shselasky mlx5_cleanup_mr_table(dev); 920331810Shselasky mlx5_cleanup_srq_table(dev); 921331810Shselasky mlx5_cleanup_qp_table(dev); 922331810Shselasky mlx5_cleanup_cq_table(dev); 923331810Shselasky mlx5_eq_cleanup(dev); 924331810Shselasky} 925331810Shselasky 926331810Shselaskystatic int mlx5_load_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv, 927331810Shselasky bool boot) 928331810Shselasky{ 929331810Shselasky struct pci_dev *pdev = dev->pdev; 930331810Shselasky int err; 931331810Shselasky 932331580Shselasky mutex_lock(&dev->intf_state_mutex); 933331580Shselasky if (test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) { 934331580Shselasky dev_warn(&dev->pdev->dev, "%s: interface is up, NOP\n", 935331580Shselasky __func__); 936331580Shselasky goto out; 937331580Shselasky } 938331580Shselasky 939290650Shselasky device_printf((&pdev->dev)->bsddev, "INFO: ""firmware version: %d.%d.%d\n", fw_rev_maj(dev), fw_rev_min(dev), fw_rev_sub(dev)); 940290650Shselasky 941306233Shselasky /* 942306233Shselasky * On load removing any previous indication of internal error, 943306233Shselasky * device is up 944306233Shselasky */ 945306233Shselasky dev->state = MLX5_DEVICE_STATE_UP; 946306233Shselasky 947290650Shselasky err = mlx5_cmd_init(dev); 948290650Shselasky if (err) { 949290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed initializing command interface, aborting\n"); 950331580Shselasky goto out_err; 951290650Shselasky } 952290650Shselasky 953290650Shselasky err = wait_fw_init(dev, FW_INIT_TIMEOUT_MILI); 954290650Shselasky if (err) { 955290650Shselasky device_printf((&dev->pdev->dev)->bsddev, "ERR: ""Firmware over %d MS in initializing state, aborting\n", FW_INIT_TIMEOUT_MILI); 956290650Shselasky goto err_cmd_cleanup; 957290650Shselasky } 958290650Shselasky 959290650Shselasky err = mlx5_core_enable_hca(dev); 960290650Shselasky if (err) { 961290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""enable hca failed\n"); 962331810Shselasky goto err_cmd_cleanup; 963290650Shselasky } 964290650Shselasky 965290650Shselasky err = mlx5_core_set_issi(dev); 966290650Shselasky if (err) { 967290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""failed to set issi\n"); 968290650Shselasky goto err_disable_hca; 969290650Shselasky } 970290650Shselasky 971290650Shselasky err = mlx5_pagealloc_start(dev); 972290650Shselasky if (err) { 973290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""mlx5_pagealloc_start failed\n"); 974290650Shselasky goto err_disable_hca; 975290650Shselasky } 976290650Shselasky 977290650Shselasky err = mlx5_satisfy_startup_pages(dev, 1); 978290650Shselasky if (err) { 979290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""failed to allocate boot pages\n"); 980290650Shselasky goto err_pagealloc_stop; 981290650Shselasky } 982290650Shselasky 983329209Shselasky err = set_hca_ctrl(dev); 984329209Shselasky if (err) { 985329209Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""set_hca_ctrl failed\n"); 986329209Shselasky goto reclaim_boot_pages; 987329209Shselasky } 988329209Shselasky 989306233Shselasky err = handle_hca_cap(dev); 990290650Shselasky if (err) { 991306233Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""handle_hca_cap failed\n"); 992290650Shselasky goto reclaim_boot_pages; 993290650Shselasky } 994290650Shselasky 995329209Shselasky err = handle_hca_cap_atomic(dev); 996290650Shselasky if (err) { 997329209Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""handle_hca_cap_atomic failed\n"); 998290650Shselasky goto reclaim_boot_pages; 999290650Shselasky } 1000290650Shselasky 1001290650Shselasky err = mlx5_satisfy_startup_pages(dev, 0); 1002290650Shselasky if (err) { 1003290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""failed to allocate init pages\n"); 1004290650Shselasky goto reclaim_boot_pages; 1005290650Shselasky } 1006290650Shselasky 1007290650Shselasky err = mlx5_cmd_init_hca(dev); 1008290650Shselasky if (err) { 1009290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""init hca failed\n"); 1010290650Shselasky goto reclaim_boot_pages; 1011290650Shselasky } 1012290650Shselasky 1013290650Shselasky mlx5_start_health_poll(dev); 1014290650Shselasky 1015331810Shselasky if (boot && mlx5_init_once(dev, priv)) { 1016331810Shselasky dev_err(&pdev->dev, "sw objs init failed\n"); 1017290650Shselasky goto err_stop_poll; 1018290650Shselasky } 1019290650Shselasky 1020290650Shselasky err = mlx5_enable_msix(dev); 1021290650Shselasky if (err) { 1022290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""enable msix failed\n"); 1023331810Shselasky goto err_cleanup_once; 1024290650Shselasky } 1025290650Shselasky 1026290650Shselasky err = mlx5_alloc_uuars(dev, &priv->uuari); 1027290650Shselasky if (err) { 1028290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed allocating uar, aborting\n"); 1029331810Shselasky goto err_disable_msix; 1030290650Shselasky } 1031290650Shselasky 1032290650Shselasky err = mlx5_start_eqs(dev); 1033290650Shselasky if (err) { 1034290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed to start pages and async EQs\n"); 1035290650Shselasky goto err_free_uar; 1036290650Shselasky } 1037290650Shselasky 1038290650Shselasky err = alloc_comp_eqs(dev); 1039290650Shselasky if (err) { 1040290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed to alloc completion EQs\n"); 1041290650Shselasky goto err_stop_eqs; 1042290650Shselasky } 1043290650Shselasky 1044290650Shselasky if (map_bf_area(dev)) 1045290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed to map blue flame area\n"); 1046290650Shselasky 1047329200Shselasky err = mlx5_init_fs(dev); 1048329200Shselasky if (err) { 1049329200Shselasky mlx5_core_err(dev, "flow steering init %d\n", err); 1050331810Shselasky goto err_free_comp_eqs; 1051329200Shselasky } 1052329200Shselasky 1053331580Shselasky err = mlx5_register_device(dev); 1054331580Shselasky if (err) { 1055331580Shselasky dev_err(&pdev->dev, "mlx5_register_device failed %d\n", err); 1056331810Shselasky goto err_fs; 1057331580Shselasky } 1058331580Shselasky 1059331591Shselasky mlx5_fwdump_prep(dev); 1060331591Shselasky 1061331580Shselasky clear_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state); 1062331580Shselasky set_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state); 1063331580Shselasky 1064331580Shselaskyout: 1065331580Shselasky mutex_unlock(&dev->intf_state_mutex); 1066290650Shselasky return 0; 1067290650Shselasky 1068331810Shselaskyerr_fs: 1069331580Shselasky mlx5_cleanup_fs(dev); 1070331810Shselasky 1071331810Shselaskyerr_free_comp_eqs: 1072331810Shselasky free_comp_eqs(dev); 1073329200Shselasky unmap_bf_area(dev); 1074329200Shselasky 1075290650Shselaskyerr_stop_eqs: 1076290650Shselasky mlx5_stop_eqs(dev); 1077290650Shselasky 1078290650Shselaskyerr_free_uar: 1079290650Shselasky mlx5_free_uuars(dev, &priv->uuari); 1080290650Shselasky 1081331810Shselaskyerr_disable_msix: 1082290650Shselasky mlx5_disable_msix(dev); 1083290650Shselasky 1084331810Shselaskyerr_cleanup_once: 1085331810Shselasky if (boot) 1086331810Shselasky mlx5_cleanup_once(dev); 1087331810Shselasky 1088290650Shselaskyerr_stop_poll: 1089290650Shselasky mlx5_stop_health_poll(dev); 1090290650Shselasky if (mlx5_cmd_teardown_hca(dev)) { 1091290650Shselasky device_printf((&dev->pdev->dev)->bsddev, "ERR: ""tear_down_hca failed, skip cleanup\n"); 1092331580Shselasky goto out_err; 1093290650Shselasky } 1094290650Shselasky 1095290650Shselaskyreclaim_boot_pages: 1096290650Shselasky mlx5_reclaim_startup_pages(dev); 1097290650Shselasky 1098290650Shselaskyerr_pagealloc_stop: 1099290650Shselasky mlx5_pagealloc_stop(dev); 1100290650Shselasky 1101290650Shselaskyerr_disable_hca: 1102290650Shselasky mlx5_core_disable_hca(dev); 1103290650Shselasky 1104290650Shselaskyerr_cmd_cleanup: 1105290650Shselasky mlx5_cmd_cleanup(dev); 1106290650Shselasky 1107331580Shselaskyout_err: 1108331580Shselasky dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR; 1109331580Shselasky mutex_unlock(&dev->intf_state_mutex); 1110290650Shselasky 1111290650Shselasky return err; 1112290650Shselasky} 1113290650Shselasky 1114331810Shselaskystatic int mlx5_unload_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv, 1115331810Shselasky bool cleanup) 1116290650Shselasky{ 1117331580Shselasky int err = 0; 1118290650Shselasky 1119331811Shselasky if (cleanup) 1120331811Shselasky mlx5_drain_health_recovery(dev); 1121331811Shselasky 1122331580Shselasky mutex_lock(&dev->intf_state_mutex); 1123331580Shselasky if (test_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state)) { 1124331580Shselasky dev_warn(&dev->pdev->dev, "%s: interface is down, NOP\n", __func__); 1125331810Shselasky if (cleanup) 1126331810Shselasky mlx5_cleanup_once(dev); 1127331580Shselasky goto out; 1128331580Shselasky } 1129331580Shselasky 1130331586Shselasky mlx5_fwdump_clean(dev); 1131331580Shselasky mlx5_unregister_device(dev); 1132331580Shselasky 1133329200Shselasky mlx5_cleanup_fs(dev); 1134290650Shselasky unmap_bf_area(dev); 1135322144Shselasky mlx5_wait_for_reclaim_vfs_pages(dev); 1136290650Shselasky free_comp_eqs(dev); 1137290650Shselasky mlx5_stop_eqs(dev); 1138290650Shselasky mlx5_free_uuars(dev, &priv->uuari); 1139290650Shselasky mlx5_disable_msix(dev); 1140331810Shselasky if (cleanup) 1141331810Shselasky mlx5_cleanup_once(dev); 1142290650Shselasky mlx5_stop_health_poll(dev); 1143331580Shselasky err = mlx5_cmd_teardown_hca(dev); 1144331580Shselasky if (err) { 1145290650Shselasky device_printf((&dev->pdev->dev)->bsddev, "ERR: ""tear_down_hca failed, skip cleanup\n"); 1146331580Shselasky goto out; 1147290650Shselasky } 1148290650Shselasky mlx5_pagealloc_stop(dev); 1149290650Shselasky mlx5_reclaim_startup_pages(dev); 1150290650Shselasky mlx5_core_disable_hca(dev); 1151290650Shselasky mlx5_cmd_cleanup(dev); 1152290650Shselasky 1153331580Shselaskyout: 1154331580Shselasky clear_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state); 1155331580Shselasky set_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state); 1156331580Shselasky mutex_unlock(&dev->intf_state_mutex); 1157331580Shselasky return err; 1158290650Shselasky} 1159290650Shselasky 1160331580Shselaskyvoid mlx5_core_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event, 1161331580Shselasky unsigned long param) 1162290650Shselasky{ 1163290650Shselasky struct mlx5_priv *priv = &dev->priv; 1164290650Shselasky struct mlx5_device_context *dev_ctx; 1165290650Shselasky unsigned long flags; 1166290650Shselasky 1167290650Shselasky spin_lock_irqsave(&priv->ctx_lock, flags); 1168290650Shselasky 1169290650Shselasky list_for_each_entry(dev_ctx, &priv->ctx_list, list) 1170290650Shselasky if (dev_ctx->intf->event) 1171290650Shselasky dev_ctx->intf->event(dev, dev_ctx->context, event, param); 1172290650Shselasky 1173290650Shselasky spin_unlock_irqrestore(&priv->ctx_lock, flags); 1174290650Shselasky} 1175290650Shselasky 1176290650Shselaskystruct mlx5_core_event_handler { 1177290650Shselasky void (*event)(struct mlx5_core_dev *dev, 1178290650Shselasky enum mlx5_dev_event event, 1179290650Shselasky void *data); 1180290650Shselasky}; 1181290650Shselasky 1182290650Shselasky 1183290650Shselaskystatic int init_one(struct pci_dev *pdev, 1184290650Shselasky const struct pci_device_id *id) 1185290650Shselasky{ 1186290650Shselasky struct mlx5_core_dev *dev; 1187290650Shselasky struct mlx5_priv *priv; 1188290650Shselasky int err; 1189290650Shselasky 1190290650Shselasky dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1191290650Shselasky priv = &dev->priv; 1192306233Shselasky if (id) 1193306233Shselasky priv->pci_dev_data = id->driver_data; 1194290650Shselasky 1195290650Shselasky if (prof_sel < 0 || prof_sel >= ARRAY_SIZE(profiles)) { 1196290650Shselasky printf("mlx5_core: WARN: ""selected profile out of range, selecting default (%d)\n", MLX5_DEFAULT_PROF); 1197290650Shselasky prof_sel = MLX5_DEFAULT_PROF; 1198290650Shselasky } 1199290650Shselasky dev->profile = &profiles[prof_sel]; 1200331580Shselasky dev->pdev = pdev; 1201290650Shselasky dev->event = mlx5_core_event; 1202290650Shselasky 1203290650Shselasky INIT_LIST_HEAD(&priv->ctx_list); 1204290650Shselasky spin_lock_init(&priv->ctx_lock); 1205331580Shselasky mutex_init(&dev->pci_status_mutex); 1206331580Shselasky mutex_init(&dev->intf_state_mutex); 1207331580Shselasky err = mlx5_pci_init(dev, priv); 1208290650Shselasky if (err) { 1209331580Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""mlx5_pci_init failed %d\n", err); 1210331580Shselasky goto clean_dev; 1211290650Shselasky } 1212290650Shselasky 1213331580Shselasky err = mlx5_health_init(dev); 1214331580Shselasky if (err) { 1215331580Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""mlx5_health_init failed %d\n", err); 1216331580Shselasky goto close_pci; 1217331580Shselasky } 1218331580Shselasky 1219331810Shselasky mlx5_pagealloc_init(dev); 1220331810Shselasky 1221331810Shselasky err = mlx5_load_one(dev, priv, true); 1222290650Shselasky if (err) { 1223290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""mlx5_register_device failed %d\n", err); 1224331580Shselasky goto clean_health; 1225290650Shselasky } 1226290650Shselasky 1227331816Shselasky pci_save_state(pdev->dev.bsddev); 1228290650Shselasky return 0; 1229290650Shselasky 1230331580Shselaskyclean_health: 1231331810Shselasky mlx5_pagealloc_cleanup(dev); 1232331580Shselasky mlx5_health_cleanup(dev); 1233331580Shselaskyclose_pci: 1234331580Shselasky mlx5_pci_close(dev, priv); 1235331580Shselaskyclean_dev: 1236290650Shselasky kfree(dev); 1237290650Shselasky return err; 1238290650Shselasky} 1239290650Shselasky 1240290650Shselaskystatic void remove_one(struct pci_dev *pdev) 1241290650Shselasky{ 1242290650Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1243331580Shselasky struct mlx5_priv *priv = &dev->priv; 1244290650Shselasky 1245331810Shselasky if (mlx5_unload_one(dev, priv, true)) { 1246331580Shselasky dev_err(&dev->pdev->dev, "mlx5_unload_one failed\n"); 1247331580Shselasky mlx5_health_cleanup(dev); 1248331580Shselasky return; 1249331580Shselasky } 1250331580Shselasky 1251331810Shselasky mlx5_pagealloc_cleanup(dev); 1252331580Shselasky mlx5_health_cleanup(dev); 1253331580Shselasky mlx5_pci_close(dev, priv); 1254331580Shselasky pci_set_drvdata(pdev, NULL); 1255290650Shselasky kfree(dev); 1256290650Shselasky} 1257290650Shselasky 1258331580Shselaskystatic pci_ers_result_t mlx5_pci_err_detected(struct pci_dev *pdev, 1259331580Shselasky pci_channel_state_t state) 1260331580Shselasky{ 1261331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1262331580Shselasky struct mlx5_priv *priv = &dev->priv; 1263331580Shselasky 1264331580Shselasky dev_info(&pdev->dev, "%s was called\n", __func__); 1265331810Shselasky mlx5_enter_error_state(dev, false); 1266331810Shselasky mlx5_unload_one(dev, priv, false); 1267331582Shselasky if (state) { 1268331582Shselasky mlx5_drain_health_wq(dev); 1269331582Shselasky mlx5_pci_disable_device(dev); 1270331582Shselasky } 1271331582Shselasky 1272331580Shselasky return state == pci_channel_io_perm_failure ? 1273331580Shselasky PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_NEED_RESET; 1274331580Shselasky} 1275331580Shselasky 1276331580Shselaskystatic pci_ers_result_t mlx5_pci_slot_reset(struct pci_dev *pdev) 1277331580Shselasky{ 1278331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1279331580Shselasky int err = 0; 1280331580Shselasky 1281331580Shselasky dev_info(&pdev->dev, "%s was called\n", __func__); 1282331580Shselasky 1283331580Shselasky err = mlx5_pci_enable_device(dev); 1284331580Shselasky if (err) { 1285331580Shselasky dev_err(&pdev->dev, "%s: mlx5_pci_enable_device failed with error code: %d\n" 1286331580Shselasky , __func__, err); 1287331580Shselasky return PCI_ERS_RESULT_DISCONNECT; 1288331580Shselasky } 1289331580Shselasky pci_set_master(pdev); 1290331580Shselasky pci_set_powerstate(pdev->dev.bsddev, PCI_POWERSTATE_D0); 1291331580Shselasky pci_restore_state(pdev->dev.bsddev); 1292331816Shselasky pci_save_state(pdev->dev.bsddev); 1293331580Shselasky 1294331580Shselasky return err ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED; 1295331580Shselasky} 1296331580Shselasky 1297331580Shselasky/* wait for the device to show vital signs. For now we check 1298331580Shselasky * that we can read the device ID and that the health buffer 1299331580Shselasky * shows a non zero value which is different than 0xffffffff 1300331580Shselasky */ 1301331580Shselaskystatic void wait_vital(struct pci_dev *pdev) 1302331580Shselasky{ 1303331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1304331580Shselasky struct mlx5_core_health *health = &dev->priv.health; 1305331580Shselasky const int niter = 100; 1306331580Shselasky u32 count; 1307331580Shselasky u16 did; 1308331580Shselasky int i; 1309331580Shselasky 1310331580Shselasky /* Wait for firmware to be ready after reset */ 1311331580Shselasky msleep(1000); 1312331580Shselasky for (i = 0; i < niter; i++) { 1313331580Shselasky if (pci_read_config_word(pdev, 2, &did)) { 1314331580Shselasky dev_warn(&pdev->dev, "failed reading config word\n"); 1315331580Shselasky break; 1316331580Shselasky } 1317331580Shselasky if (did == pdev->device) { 1318331580Shselasky dev_info(&pdev->dev, "device ID correctly read after %d iterations\n", i); 1319331580Shselasky break; 1320331580Shselasky } 1321331580Shselasky msleep(50); 1322331580Shselasky } 1323331580Shselasky if (i == niter) 1324331580Shselasky dev_warn(&pdev->dev, "%s-%d: could not read device ID\n", __func__, __LINE__); 1325331580Shselasky 1326331580Shselasky for (i = 0; i < niter; i++) { 1327331580Shselasky count = ioread32be(health->health_counter); 1328331580Shselasky if (count && count != 0xffffffff) { 1329331580Shselasky dev_info(&pdev->dev, "Counter value 0x%x after %d iterations\n", count, i); 1330331580Shselasky break; 1331331580Shselasky } 1332331580Shselasky msleep(50); 1333331580Shselasky } 1334331580Shselasky 1335331580Shselasky if (i == niter) 1336331580Shselasky dev_warn(&pdev->dev, "%s-%d: could not read device ID\n", __func__, __LINE__); 1337331580Shselasky} 1338331580Shselasky 1339331580Shselaskystatic void mlx5_pci_resume(struct pci_dev *pdev) 1340331580Shselasky{ 1341331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1342331580Shselasky struct mlx5_priv *priv = &dev->priv; 1343331580Shselasky int err; 1344331580Shselasky 1345331580Shselasky dev_info(&pdev->dev, "%s was called\n", __func__); 1346331580Shselasky 1347331580Shselasky wait_vital(pdev); 1348331580Shselasky 1349331810Shselasky err = mlx5_load_one(dev, priv, false); 1350331580Shselasky if (err) 1351331580Shselasky dev_err(&pdev->dev, "%s: mlx5_load_one failed with error code: %d\n" 1352331580Shselasky , __func__, err); 1353331580Shselasky else 1354331580Shselasky dev_info(&pdev->dev, "%s: device recovered\n", __func__); 1355331580Shselasky} 1356331580Shselasky 1357331580Shselaskystatic const struct pci_error_handlers mlx5_err_handler = { 1358331580Shselasky .error_detected = mlx5_pci_err_detected, 1359331580Shselasky .slot_reset = mlx5_pci_slot_reset, 1360331580Shselasky .resume = mlx5_pci_resume 1361331580Shselasky}; 1362331580Shselasky 1363331810Shselaskystatic int mlx5_try_fast_unload(struct mlx5_core_dev *dev) 1364331810Shselasky{ 1365331810Shselasky int err; 1366331810Shselasky 1367331810Shselasky if (!MLX5_CAP_GEN(dev, force_teardown)) { 1368331810Shselasky mlx5_core_dbg(dev, "force teardown is not supported in the firmware\n"); 1369331810Shselasky return -EOPNOTSUPP; 1370331810Shselasky } 1371331810Shselasky 1372331810Shselasky if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 1373331810Shselasky mlx5_core_dbg(dev, "Device in internal error state, giving up\n"); 1374331810Shselasky return -EAGAIN; 1375331810Shselasky } 1376331810Shselasky 1377331810Shselasky err = mlx5_cmd_force_teardown_hca(dev); 1378331810Shselasky if (err) { 1379331810Shselasky mlx5_core_dbg(dev, "Firmware couldn't do fast unload error: %d\n", err); 1380331810Shselasky return err; 1381331810Shselasky } 1382331810Shselasky 1383331810Shselasky mlx5_enter_error_state(dev, true); 1384331810Shselasky 1385331810Shselasky return 0; 1386331810Shselasky} 1387331810Shselasky 1388329211Shselaskystatic void shutdown_one(struct pci_dev *pdev) 1389329211Shselasky{ 1390331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1391331580Shselasky struct mlx5_priv *priv = &dev->priv; 1392331810Shselasky int err; 1393331580Shselasky 1394331580Shselasky set_bit(MLX5_INTERFACE_STATE_SHUTDOWN, &dev->intf_state); 1395331810Shselasky err = mlx5_try_fast_unload(dev); 1396331810Shselasky if (err) 1397331810Shselasky mlx5_unload_one(dev, priv, false); 1398331580Shselasky mlx5_pci_disable_device(dev); 1399329211Shselasky} 1400329211Shselasky 1401290650Shselaskystatic const struct pci_device_id mlx5_core_pci_table[] = { 1402290650Shselasky { PCI_VDEVICE(MELLANOX, 4113) }, /* Connect-IB */ 1403290650Shselasky { PCI_VDEVICE(MELLANOX, 4114) }, /* Connect-IB VF */ 1404290650Shselasky { PCI_VDEVICE(MELLANOX, 4115) }, /* ConnectX-4 */ 1405290650Shselasky { PCI_VDEVICE(MELLANOX, 4116) }, /* ConnectX-4 VF */ 1406290650Shselasky { PCI_VDEVICE(MELLANOX, 4117) }, /* ConnectX-4LX */ 1407290650Shselasky { PCI_VDEVICE(MELLANOX, 4118) }, /* ConnectX-4LX VF */ 1408306233Shselasky { PCI_VDEVICE(MELLANOX, 4119) }, /* ConnectX-5 */ 1409306233Shselasky { PCI_VDEVICE(MELLANOX, 4120) }, /* ConnectX-5 VF */ 1410290650Shselasky { PCI_VDEVICE(MELLANOX, 4121) }, 1411290650Shselasky { PCI_VDEVICE(MELLANOX, 4122) }, 1412290650Shselasky { PCI_VDEVICE(MELLANOX, 4123) }, 1413290650Shselasky { PCI_VDEVICE(MELLANOX, 4124) }, 1414290650Shselasky { PCI_VDEVICE(MELLANOX, 4125) }, 1415290650Shselasky { PCI_VDEVICE(MELLANOX, 4126) }, 1416290650Shselasky { PCI_VDEVICE(MELLANOX, 4127) }, 1417290650Shselasky { PCI_VDEVICE(MELLANOX, 4128) }, 1418290650Shselasky { PCI_VDEVICE(MELLANOX, 4129) }, 1419290650Shselasky { PCI_VDEVICE(MELLANOX, 4130) }, 1420290650Shselasky { PCI_VDEVICE(MELLANOX, 4131) }, 1421290650Shselasky { PCI_VDEVICE(MELLANOX, 4132) }, 1422290650Shselasky { PCI_VDEVICE(MELLANOX, 4133) }, 1423290650Shselasky { PCI_VDEVICE(MELLANOX, 4134) }, 1424290650Shselasky { PCI_VDEVICE(MELLANOX, 4135) }, 1425290650Shselasky { PCI_VDEVICE(MELLANOX, 4136) }, 1426290650Shselasky { PCI_VDEVICE(MELLANOX, 4137) }, 1427290650Shselasky { PCI_VDEVICE(MELLANOX, 4138) }, 1428290650Shselasky { PCI_VDEVICE(MELLANOX, 4139) }, 1429290650Shselasky { PCI_VDEVICE(MELLANOX, 4140) }, 1430290650Shselasky { PCI_VDEVICE(MELLANOX, 4141) }, 1431290650Shselasky { PCI_VDEVICE(MELLANOX, 4142) }, 1432290650Shselasky { PCI_VDEVICE(MELLANOX, 4143) }, 1433290650Shselasky { PCI_VDEVICE(MELLANOX, 4144) }, 1434290650Shselasky { 0, } 1435290650Shselasky}; 1436290650Shselasky 1437290650ShselaskyMODULE_DEVICE_TABLE(pci, mlx5_core_pci_table); 1438290650Shselasky 1439331809Shselaskyvoid mlx5_disable_device(struct mlx5_core_dev *dev) 1440331809Shselasky{ 1441331809Shselasky mlx5_pci_err_detected(dev->pdev, 0); 1442331809Shselasky} 1443331809Shselasky 1444331809Shselaskyvoid mlx5_recover_device(struct mlx5_core_dev *dev) 1445331809Shselasky{ 1446331809Shselasky mlx5_pci_disable_device(dev); 1447331809Shselasky if (mlx5_pci_slot_reset(dev->pdev) == PCI_ERS_RESULT_RECOVERED) 1448331809Shselasky mlx5_pci_resume(dev->pdev); 1449331809Shselasky} 1450331809Shselasky 1451331586Shselaskystruct pci_driver mlx5_core_driver = { 1452290650Shselasky .name = DRIVER_NAME, 1453290650Shselasky .id_table = mlx5_core_pci_table, 1454329211Shselasky .shutdown = shutdown_one, 1455290650Shselasky .probe = init_one, 1456331580Shselasky .remove = remove_one, 1457331580Shselasky .err_handler = &mlx5_err_handler 1458290650Shselasky}; 1459290650Shselasky 1460290650Shselaskystatic int __init init(void) 1461290650Shselasky{ 1462290650Shselasky int err; 1463290650Shselasky 1464290650Shselasky err = pci_register_driver(&mlx5_core_driver); 1465290650Shselasky if (err) 1466331580Shselasky goto err_debug; 1467290650Shselasky 1468331586Shselasky err = mlx5_fwdump_init(); 1469331586Shselasky if (err) 1470331586Shselasky goto err_fwdump; 1471331586Shselasky 1472331586Shselasky return 0; 1473331586Shselasky 1474331586Shselaskyerr_fwdump: 1475331586Shselasky pci_unregister_driver(&mlx5_core_driver); 1476290650Shselasky 1477290650Shselaskyerr_debug: 1478290650Shselasky return err; 1479290650Shselasky} 1480290650Shselasky 1481290650Shselaskystatic void __exit cleanup(void) 1482290650Shselasky{ 1483331586Shselasky mlx5_fwdump_fini(); 1484290650Shselasky pci_unregister_driver(&mlx5_core_driver); 1485290650Shselasky} 1486290650Shselasky 1487290650Shselaskymodule_init(init); 1488290650Shselaskymodule_exit(cleanup); 1489