mlx5_main.c revision 331582
1290650Shselasky/*- 2329200Shselasky * Copyright (c) 2013-2017, Mellanox Technologies, Ltd. All rights reserved. 3290650Shselasky * 4290650Shselasky * Redistribution and use in source and binary forms, with or without 5290650Shselasky * modification, are permitted provided that the following conditions 6290650Shselasky * are met: 7290650Shselasky * 1. Redistributions of source code must retain the above copyright 8290650Shselasky * notice, this list of conditions and the following disclaimer. 9290650Shselasky * 2. Redistributions in binary form must reproduce the above copyright 10290650Shselasky * notice, this list of conditions and the following disclaimer in the 11290650Shselasky * documentation and/or other materials provided with the distribution. 12290650Shselasky * 13290650Shselasky * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND 14290650Shselasky * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15290650Shselasky * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16290650Shselasky * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17290650Shselasky * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18290650Shselasky * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19290650Shselasky * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20290650Shselasky * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21290650Shselasky * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22290650Shselasky * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23290650Shselasky * SUCH DAMAGE. 24290650Shselasky * 25290650Shselasky * $FreeBSD: stable/11/sys/dev/mlx5/mlx5_core/mlx5_main.c 331582 2018-03-26 20:36:32Z hselasky $ 26290650Shselasky */ 27290650Shselasky 28300676Shselasky#define LINUXKPI_PARAM_PREFIX mlx5_ 29300676Shselasky 30290650Shselasky#include <linux/kmod.h> 31290650Shselasky#include <linux/module.h> 32290650Shselasky#include <linux/errno.h> 33290650Shselasky#include <linux/pci.h> 34290650Shselasky#include <linux/dma-mapping.h> 35290650Shselasky#include <linux/slab.h> 36290650Shselasky#include <linux/io-mapping.h> 37290650Shselasky#include <linux/interrupt.h> 38290650Shselasky#include <dev/mlx5/driver.h> 39290650Shselasky#include <dev/mlx5/cq.h> 40290650Shselasky#include <dev/mlx5/qp.h> 41290650Shselasky#include <dev/mlx5/srq.h> 42290650Shselasky#include <linux/delay.h> 43290650Shselasky#include <dev/mlx5/mlx5_ifc.h> 44290650Shselasky#include "mlx5_core.h" 45329200Shselasky#include "fs_core.h" 46290650Shselasky 47290650ShselaskyMODULE_AUTHOR("Eli Cohen <eli@mellanox.com>"); 48290650ShselaskyMODULE_DESCRIPTION("Mellanox Connect-IB, ConnectX-4 core driver"); 49290650ShselaskyMODULE_LICENSE("Dual BSD/GPL"); 50290650Shselasky#if (__FreeBSD_version >= 1100000) 51290650ShselaskyMODULE_DEPEND(mlx5, linuxkpi, 1, 1, 1); 52290650Shselasky#endif 53290650ShselaskyMODULE_VERSION(mlx5, 1); 54290650Shselasky 55290650Shselaskyint mlx5_core_debug_mask; 56290650Shselaskymodule_param_named(debug_mask, mlx5_core_debug_mask, int, 0644); 57290650ShselaskyMODULE_PARM_DESC(debug_mask, "debug mask: 1 = dump cmd data, 2 = dump cmd exec time, 3 = both. Default=0"); 58290650Shselasky 59290650Shselasky#define MLX5_DEFAULT_PROF 2 60290650Shselaskystatic int prof_sel = MLX5_DEFAULT_PROF; 61290650Shselaskymodule_param_named(prof_sel, prof_sel, int, 0444); 62290650ShselaskyMODULE_PARM_DESC(prof_sel, "profile selector. Valid range 0 - 2"); 63290650Shselasky 64290650Shselasky#define NUMA_NO_NODE -1 65290650Shselasky 66290650Shselaskystatic LIST_HEAD(intf_list); 67290650Shselaskystatic LIST_HEAD(dev_list); 68290650Shselaskystatic DEFINE_MUTEX(intf_mutex); 69290650Shselasky 70290650Shselaskystruct mlx5_device_context { 71290650Shselasky struct list_head list; 72290650Shselasky struct mlx5_interface *intf; 73290650Shselasky void *context; 74290650Shselasky}; 75290650Shselasky 76329209Shselaskyenum { 77329209Shselasky MLX5_ATOMIC_REQ_MODE_BE = 0x0, 78329209Shselasky MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS = 0x1, 79329209Shselasky}; 80329209Shselasky 81290650Shselaskystatic struct mlx5_profile profiles[] = { 82290650Shselasky [0] = { 83290650Shselasky .mask = 0, 84290650Shselasky }, 85290650Shselasky [1] = { 86290650Shselasky .mask = MLX5_PROF_MASK_QP_SIZE, 87290650Shselasky .log_max_qp = 12, 88290650Shselasky }, 89290650Shselasky [2] = { 90290650Shselasky .mask = MLX5_PROF_MASK_QP_SIZE | 91290650Shselasky MLX5_PROF_MASK_MR_CACHE, 92290650Shselasky .log_max_qp = 17, 93290650Shselasky .mr_cache[0] = { 94290650Shselasky .size = 500, 95290650Shselasky .limit = 250 96290650Shselasky }, 97290650Shselasky .mr_cache[1] = { 98290650Shselasky .size = 500, 99290650Shselasky .limit = 250 100290650Shselasky }, 101290650Shselasky .mr_cache[2] = { 102290650Shselasky .size = 500, 103290650Shselasky .limit = 250 104290650Shselasky }, 105290650Shselasky .mr_cache[3] = { 106290650Shselasky .size = 500, 107290650Shselasky .limit = 250 108290650Shselasky }, 109290650Shselasky .mr_cache[4] = { 110290650Shselasky .size = 500, 111290650Shselasky .limit = 250 112290650Shselasky }, 113290650Shselasky .mr_cache[5] = { 114290650Shselasky .size = 500, 115290650Shselasky .limit = 250 116290650Shselasky }, 117290650Shselasky .mr_cache[6] = { 118290650Shselasky .size = 500, 119290650Shselasky .limit = 250 120290650Shselasky }, 121290650Shselasky .mr_cache[7] = { 122290650Shselasky .size = 500, 123290650Shselasky .limit = 250 124290650Shselasky }, 125290650Shselasky .mr_cache[8] = { 126290650Shselasky .size = 500, 127290650Shselasky .limit = 250 128290650Shselasky }, 129290650Shselasky .mr_cache[9] = { 130290650Shselasky .size = 500, 131290650Shselasky .limit = 250 132290650Shselasky }, 133290650Shselasky .mr_cache[10] = { 134290650Shselasky .size = 500, 135290650Shselasky .limit = 250 136290650Shselasky }, 137290650Shselasky .mr_cache[11] = { 138290650Shselasky .size = 500, 139290650Shselasky .limit = 250 140290650Shselasky }, 141290650Shselasky .mr_cache[12] = { 142290650Shselasky .size = 64, 143290650Shselasky .limit = 32 144290650Shselasky }, 145290650Shselasky .mr_cache[13] = { 146290650Shselasky .size = 32, 147290650Shselasky .limit = 16 148290650Shselasky }, 149290650Shselasky .mr_cache[14] = { 150290650Shselasky .size = 16, 151290650Shselasky .limit = 8 152290650Shselasky }, 153290650Shselasky }, 154290650Shselasky [3] = { 155290650Shselasky .mask = MLX5_PROF_MASK_QP_SIZE, 156290650Shselasky .log_max_qp = 17, 157290650Shselasky }, 158290650Shselasky}; 159290650Shselasky 160290650Shselaskystatic int set_dma_caps(struct pci_dev *pdev) 161290650Shselasky{ 162290650Shselasky int err; 163290650Shselasky 164290650Shselasky err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 165290650Shselasky if (err) { 166290650Shselasky device_printf((&pdev->dev)->bsddev, "WARN: ""Warning: couldn't set 64-bit PCI DMA mask\n"); 167290650Shselasky err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 168290650Shselasky if (err) { 169290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Can't set PCI DMA mask, aborting\n"); 170290650Shselasky return err; 171290650Shselasky } 172290650Shselasky } 173290650Shselasky 174290650Shselasky err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 175290650Shselasky if (err) { 176290650Shselasky device_printf((&pdev->dev)->bsddev, "WARN: ""Warning: couldn't set 64-bit consistent PCI DMA mask\n"); 177290650Shselasky err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 178290650Shselasky if (err) { 179290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Can't set consistent PCI DMA mask, aborting\n"); 180290650Shselasky return err; 181290650Shselasky } 182290650Shselasky } 183290650Shselasky 184290650Shselasky dma_set_max_seg_size(&pdev->dev, 2u * 1024 * 1024 * 1024); 185290650Shselasky return err; 186290650Shselasky} 187290650Shselasky 188331580Shselaskystatic int mlx5_pci_enable_device(struct mlx5_core_dev *dev) 189331580Shselasky{ 190331580Shselasky struct pci_dev *pdev = dev->pdev; 191331580Shselasky int err = 0; 192331580Shselasky 193331580Shselasky mutex_lock(&dev->pci_status_mutex); 194331580Shselasky if (dev->pci_status == MLX5_PCI_STATUS_DISABLED) { 195331580Shselasky err = pci_enable_device(pdev); 196331580Shselasky if (!err) 197331580Shselasky dev->pci_status = MLX5_PCI_STATUS_ENABLED; 198331580Shselasky } 199331580Shselasky mutex_unlock(&dev->pci_status_mutex); 200331580Shselasky 201331580Shselasky return err; 202331580Shselasky} 203331580Shselasky 204331580Shselaskystatic void mlx5_pci_disable_device(struct mlx5_core_dev *dev) 205331580Shselasky{ 206331580Shselasky struct pci_dev *pdev = dev->pdev; 207331580Shselasky 208331580Shselasky mutex_lock(&dev->pci_status_mutex); 209331580Shselasky if (dev->pci_status == MLX5_PCI_STATUS_ENABLED) { 210331580Shselasky pci_disable_device(pdev); 211331580Shselasky dev->pci_status = MLX5_PCI_STATUS_DISABLED; 212331580Shselasky } 213331580Shselasky mutex_unlock(&dev->pci_status_mutex); 214331580Shselasky} 215331580Shselasky 216290650Shselaskystatic int request_bar(struct pci_dev *pdev) 217290650Shselasky{ 218290650Shselasky int err = 0; 219290650Shselasky 220290650Shselasky if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { 221290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Missing registers BAR, aborting\n"); 222290650Shselasky return -ENODEV; 223290650Shselasky } 224290650Shselasky 225290650Shselasky err = pci_request_regions(pdev, DRIVER_NAME); 226290650Shselasky if (err) 227290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Couldn't get PCI resources, aborting\n"); 228290650Shselasky 229290650Shselasky return err; 230290650Shselasky} 231290650Shselasky 232290650Shselaskystatic void release_bar(struct pci_dev *pdev) 233290650Shselasky{ 234290650Shselasky pci_release_regions(pdev); 235290650Shselasky} 236290650Shselasky 237290650Shselaskystatic int mlx5_enable_msix(struct mlx5_core_dev *dev) 238290650Shselasky{ 239290650Shselasky struct mlx5_priv *priv = &dev->priv; 240290650Shselasky struct mlx5_eq_table *table = &priv->eq_table; 241290650Shselasky int num_eqs = 1 << MLX5_CAP_GEN(dev, log_max_eq); 242290650Shselasky int nvec; 243290650Shselasky int i; 244290650Shselasky 245290650Shselasky nvec = MLX5_CAP_GEN(dev, num_ports) * num_online_cpus() + 246290650Shselasky MLX5_EQ_VEC_COMP_BASE; 247290650Shselasky nvec = min_t(int, nvec, num_eqs); 248290650Shselasky if (nvec <= MLX5_EQ_VEC_COMP_BASE) 249290650Shselasky return -ENOMEM; 250290650Shselasky 251290650Shselasky priv->msix_arr = kzalloc(nvec * sizeof(*priv->msix_arr), GFP_KERNEL); 252290650Shselasky 253290650Shselasky priv->irq_info = kzalloc(nvec * sizeof(*priv->irq_info), GFP_KERNEL); 254290650Shselasky 255290650Shselasky for (i = 0; i < nvec; i++) 256290650Shselasky priv->msix_arr[i].entry = i; 257290650Shselasky 258290650Shselasky nvec = pci_enable_msix_range(dev->pdev, priv->msix_arr, 259290650Shselasky MLX5_EQ_VEC_COMP_BASE + 1, nvec); 260290650Shselasky if (nvec < 0) 261290650Shselasky return nvec; 262290650Shselasky 263290650Shselasky table->num_comp_vectors = nvec - MLX5_EQ_VEC_COMP_BASE; 264290650Shselasky 265290650Shselasky return 0; 266290650Shselasky 267290650Shselasky} 268290650Shselasky 269290650Shselaskystatic void mlx5_disable_msix(struct mlx5_core_dev *dev) 270290650Shselasky{ 271290650Shselasky struct mlx5_priv *priv = &dev->priv; 272290650Shselasky 273290650Shselasky pci_disable_msix(dev->pdev); 274290650Shselasky kfree(priv->irq_info); 275290650Shselasky kfree(priv->msix_arr); 276290650Shselasky} 277290650Shselasky 278290650Shselaskystruct mlx5_reg_host_endianess { 279290650Shselasky u8 he; 280290650Shselasky u8 rsvd[15]; 281290650Shselasky}; 282290650Shselasky 283290650Shselasky 284290650Shselasky#define CAP_MASK(pos, size) ((u64)((1 << (size)) - 1) << (pos)) 285290650Shselasky 286290650Shselaskyenum { 287290650Shselasky MLX5_CAP_BITS_RW_MASK = CAP_MASK(MLX5_CAP_OFF_CMDIF_CSUM, 2) | 288306233Shselasky MLX5_DEV_CAP_FLAG_DCT | 289306233Shselasky MLX5_DEV_CAP_FLAG_DRAIN_SIGERR, 290290650Shselasky}; 291290650Shselasky 292290650Shselaskystatic u16 to_fw_pkey_sz(u32 size) 293290650Shselasky{ 294290650Shselasky switch (size) { 295290650Shselasky case 128: 296290650Shselasky return 0; 297290650Shselasky case 256: 298290650Shselasky return 1; 299290650Shselasky case 512: 300290650Shselasky return 2; 301290650Shselasky case 1024: 302290650Shselasky return 3; 303290650Shselasky case 2048: 304290650Shselasky return 4; 305290650Shselasky case 4096: 306290650Shselasky return 5; 307290650Shselasky default: 308290650Shselasky printf("mlx5_core: WARN: ""invalid pkey table size %d\n", size); 309290650Shselasky return 0; 310290650Shselasky } 311290650Shselasky} 312290650Shselasky 313290650Shselaskyint mlx5_core_get_caps(struct mlx5_core_dev *dev, enum mlx5_cap_type cap_type, 314290650Shselasky enum mlx5_cap_mode cap_mode) 315290650Shselasky{ 316290650Shselasky u8 in[MLX5_ST_SZ_BYTES(query_hca_cap_in)]; 317290650Shselasky int out_sz = MLX5_ST_SZ_BYTES(query_hca_cap_out); 318290650Shselasky void *out, *hca_caps; 319290650Shselasky u16 opmod = (cap_type << 1) | (cap_mode & 0x01); 320290650Shselasky int err; 321290650Shselasky 322290650Shselasky memset(in, 0, sizeof(in)); 323290650Shselasky out = kzalloc(out_sz, GFP_KERNEL); 324290650Shselasky 325290650Shselasky MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP); 326290650Shselasky MLX5_SET(query_hca_cap_in, in, op_mod, opmod); 327290650Shselasky err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz); 328290650Shselasky if (err) 329290650Shselasky goto query_ex; 330290650Shselasky 331290650Shselasky err = mlx5_cmd_status_to_err_v2(out); 332290650Shselasky if (err) { 333290650Shselasky mlx5_core_warn(dev, 334290650Shselasky "QUERY_HCA_CAP : type(%x) opmode(%x) Failed(%d)\n", 335290650Shselasky cap_type, cap_mode, err); 336290650Shselasky goto query_ex; 337290650Shselasky } 338290650Shselasky 339290650Shselasky hca_caps = MLX5_ADDR_OF(query_hca_cap_out, out, capability); 340290650Shselasky 341290650Shselasky switch (cap_mode) { 342290650Shselasky case HCA_CAP_OPMOD_GET_MAX: 343290650Shselasky memcpy(dev->hca_caps_max[cap_type], hca_caps, 344290650Shselasky MLX5_UN_SZ_BYTES(hca_cap_union)); 345290650Shselasky break; 346290650Shselasky case HCA_CAP_OPMOD_GET_CUR: 347290650Shselasky memcpy(dev->hca_caps_cur[cap_type], hca_caps, 348290650Shselasky MLX5_UN_SZ_BYTES(hca_cap_union)); 349290650Shselasky break; 350290650Shselasky default: 351290650Shselasky mlx5_core_warn(dev, 352290650Shselasky "Tried to query dev cap type(%x) with wrong opmode(%x)\n", 353290650Shselasky cap_type, cap_mode); 354290650Shselasky err = -EINVAL; 355290650Shselasky break; 356290650Shselasky } 357290650Shselaskyquery_ex: 358290650Shselasky kfree(out); 359290650Shselasky return err; 360290650Shselasky} 361290650Shselasky 362290650Shselaskystatic int set_caps(struct mlx5_core_dev *dev, void *in, int in_sz) 363290650Shselasky{ 364290650Shselasky u32 out[MLX5_ST_SZ_DW(set_hca_cap_out)]; 365290650Shselasky int err; 366290650Shselasky 367290650Shselasky memset(out, 0, sizeof(out)); 368290650Shselasky 369290650Shselasky MLX5_SET(set_hca_cap_in, in, opcode, MLX5_CMD_OP_SET_HCA_CAP); 370290650Shselasky err = mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out)); 371290650Shselasky if (err) 372290650Shselasky return err; 373290650Shselasky 374290650Shselasky err = mlx5_cmd_status_to_err_v2(out); 375290650Shselasky 376290650Shselasky return err; 377290650Shselasky} 378290650Shselasky 379290650Shselaskystatic int handle_hca_cap(struct mlx5_core_dev *dev) 380290650Shselasky{ 381290650Shselasky void *set_ctx = NULL; 382290650Shselasky struct mlx5_profile *prof = dev->profile; 383290650Shselasky int err = -ENOMEM; 384290650Shselasky int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in); 385290650Shselasky void *set_hca_cap; 386290650Shselasky 387290650Shselasky set_ctx = kzalloc(set_sz, GFP_KERNEL); 388290650Shselasky 389290650Shselasky err = mlx5_core_get_caps(dev, MLX5_CAP_GENERAL, HCA_CAP_OPMOD_GET_MAX); 390290650Shselasky if (err) 391290650Shselasky goto query_ex; 392290650Shselasky 393290650Shselasky err = mlx5_core_get_caps(dev, MLX5_CAP_GENERAL, HCA_CAP_OPMOD_GET_CUR); 394290650Shselasky if (err) 395290650Shselasky goto query_ex; 396290650Shselasky 397290650Shselasky set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, 398290650Shselasky capability); 399290650Shselasky memcpy(set_hca_cap, dev->hca_caps_cur[MLX5_CAP_GENERAL], 400290650Shselasky MLX5_ST_SZ_BYTES(cmd_hca_cap)); 401290650Shselasky 402290650Shselasky mlx5_core_dbg(dev, "Current Pkey table size %d Setting new size %d\n", 403290650Shselasky mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size)), 404290650Shselasky 128); 405290650Shselasky /* we limit the size of the pkey table to 128 entries for now */ 406290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, pkey_table_size, 407290650Shselasky to_fw_pkey_sz(128)); 408290650Shselasky 409290650Shselasky if (prof->mask & MLX5_PROF_MASK_QP_SIZE) 410290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, log_max_qp, 411290650Shselasky prof->log_max_qp); 412290650Shselasky 413290650Shselasky /* disable cmdif checksum */ 414290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, cmdif_checksum, 0); 415290650Shselasky 416306233Shselasky /* enable drain sigerr */ 417306233Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, drain_sigerr, 1); 418306233Shselasky 419290650Shselasky MLX5_SET(cmd_hca_cap, set_hca_cap, log_uar_page_sz, PAGE_SHIFT - 12); 420290650Shselasky 421290650Shselasky err = set_caps(dev, set_ctx, set_sz); 422290650Shselasky 423290650Shselaskyquery_ex: 424290650Shselasky kfree(set_ctx); 425290650Shselasky return err; 426290650Shselasky} 427290650Shselasky 428329209Shselaskystatic int handle_hca_cap_atomic(struct mlx5_core_dev *dev) 429329209Shselasky{ 430329209Shselasky void *set_ctx; 431329209Shselasky void *set_hca_cap; 432329209Shselasky int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in); 433329209Shselasky int req_endianness; 434329209Shselasky int err; 435329209Shselasky 436329209Shselasky if (MLX5_CAP_GEN(dev, atomic)) { 437329209Shselasky err = mlx5_core_get_caps(dev, MLX5_CAP_ATOMIC, 438329209Shselasky HCA_CAP_OPMOD_GET_MAX); 439329209Shselasky if (err) 440329209Shselasky return err; 441329209Shselasky 442329209Shselasky err = mlx5_core_get_caps(dev, MLX5_CAP_ATOMIC, 443329209Shselasky HCA_CAP_OPMOD_GET_CUR); 444329209Shselasky if (err) 445329209Shselasky return err; 446329209Shselasky } else { 447329209Shselasky return 0; 448329209Shselasky } 449329209Shselasky 450329209Shselasky req_endianness = 451329209Shselasky MLX5_CAP_ATOMIC(dev, 452329209Shselasky supported_atomic_req_8B_endianess_mode_1); 453329209Shselasky 454329209Shselasky if (req_endianness != MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS) 455329209Shselasky return 0; 456329209Shselasky 457329209Shselasky set_ctx = kzalloc(set_sz, GFP_KERNEL); 458329209Shselasky if (!set_ctx) 459329209Shselasky return -ENOMEM; 460329209Shselasky 461329209Shselasky MLX5_SET(set_hca_cap_in, set_ctx, op_mod, 462329209Shselasky MLX5_SET_HCA_CAP_OP_MOD_ATOMIC << 1); 463329209Shselasky set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, capability); 464329209Shselasky 465329209Shselasky /* Set requestor to host endianness */ 466329209Shselasky MLX5_SET(atomic_caps, set_hca_cap, atomic_req_8B_endianess_mode, 467329209Shselasky MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS); 468329209Shselasky 469329209Shselasky err = set_caps(dev, set_ctx, set_sz); 470329209Shselasky 471329209Shselasky kfree(set_ctx); 472329209Shselasky return err; 473329209Shselasky} 474329209Shselasky 475290650Shselaskystatic int set_hca_ctrl(struct mlx5_core_dev *dev) 476290650Shselasky{ 477290650Shselasky struct mlx5_reg_host_endianess he_in; 478290650Shselasky struct mlx5_reg_host_endianess he_out; 479290650Shselasky int err; 480290650Shselasky 481306233Shselasky if (MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_ETH && 482306233Shselasky !MLX5_CAP_GEN(dev, roce)) 483306233Shselasky return 0; 484306233Shselasky 485290650Shselasky memset(&he_in, 0, sizeof(he_in)); 486290650Shselasky he_in.he = MLX5_SET_HOST_ENDIANNESS; 487290650Shselasky err = mlx5_core_access_reg(dev, &he_in, sizeof(he_in), 488290650Shselasky &he_out, sizeof(he_out), 489290650Shselasky MLX5_REG_HOST_ENDIANNESS, 0, 1); 490290650Shselasky return err; 491290650Shselasky} 492290650Shselasky 493290650Shselaskystatic int mlx5_core_enable_hca(struct mlx5_core_dev *dev) 494290650Shselasky{ 495290650Shselasky u32 in[MLX5_ST_SZ_DW(enable_hca_in)]; 496290650Shselasky u32 out[MLX5_ST_SZ_DW(enable_hca_out)]; 497290650Shselasky 498290650Shselasky memset(in, 0, sizeof(in)); 499290650Shselasky MLX5_SET(enable_hca_in, in, opcode, MLX5_CMD_OP_ENABLE_HCA); 500290650Shselasky memset(out, 0, sizeof(out)); 501290650Shselasky return mlx5_cmd_exec_check_status(dev, in, sizeof(in), 502290650Shselasky out, sizeof(out)); 503290650Shselasky} 504290650Shselasky 505290650Shselaskystatic int mlx5_core_disable_hca(struct mlx5_core_dev *dev) 506290650Shselasky{ 507290650Shselasky u32 in[MLX5_ST_SZ_DW(disable_hca_in)]; 508290650Shselasky u32 out[MLX5_ST_SZ_DW(disable_hca_out)]; 509290650Shselasky 510290650Shselasky memset(in, 0, sizeof(in)); 511290650Shselasky 512290650Shselasky MLX5_SET(disable_hca_in, in, opcode, MLX5_CMD_OP_DISABLE_HCA); 513290650Shselasky memset(out, 0, sizeof(out)); 514290650Shselasky return mlx5_cmd_exec_check_status(dev, in, sizeof(in), 515290650Shselasky out, sizeof(out)); 516290650Shselasky} 517290650Shselasky 518290650Shselaskystatic int mlx5_core_set_issi(struct mlx5_core_dev *dev) 519290650Shselasky{ 520290650Shselasky u32 query_in[MLX5_ST_SZ_DW(query_issi_in)]; 521290650Shselasky u32 query_out[MLX5_ST_SZ_DW(query_issi_out)]; 522290650Shselasky u32 set_in[MLX5_ST_SZ_DW(set_issi_in)]; 523290650Shselasky u32 set_out[MLX5_ST_SZ_DW(set_issi_out)]; 524290650Shselasky int err; 525290650Shselasky u32 sup_issi; 526290650Shselasky 527290650Shselasky memset(query_in, 0, sizeof(query_in)); 528290650Shselasky memset(query_out, 0, sizeof(query_out)); 529290650Shselasky 530290650Shselasky MLX5_SET(query_issi_in, query_in, opcode, MLX5_CMD_OP_QUERY_ISSI); 531290650Shselasky 532290650Shselasky err = mlx5_cmd_exec_check_status(dev, query_in, sizeof(query_in), 533290650Shselasky query_out, sizeof(query_out)); 534290650Shselasky if (err) { 535290650Shselasky if (((struct mlx5_outbox_hdr *)query_out)->status == 536290650Shselasky MLX5_CMD_STAT_BAD_OP_ERR) { 537290650Shselasky pr_debug("Only ISSI 0 is supported\n"); 538290650Shselasky return 0; 539290650Shselasky } 540290650Shselasky 541290650Shselasky printf("mlx5_core: ERR: ""failed to query ISSI\n"); 542290650Shselasky return err; 543290650Shselasky } 544290650Shselasky 545290650Shselasky sup_issi = MLX5_GET(query_issi_out, query_out, supported_issi_dw0); 546290650Shselasky 547290650Shselasky if (sup_issi & (1 << 1)) { 548290650Shselasky memset(set_in, 0, sizeof(set_in)); 549290650Shselasky memset(set_out, 0, sizeof(set_out)); 550290650Shselasky 551290650Shselasky MLX5_SET(set_issi_in, set_in, opcode, MLX5_CMD_OP_SET_ISSI); 552290650Shselasky MLX5_SET(set_issi_in, set_in, current_issi, 1); 553290650Shselasky 554290650Shselasky err = mlx5_cmd_exec_check_status(dev, set_in, sizeof(set_in), 555290650Shselasky set_out, sizeof(set_out)); 556290650Shselasky if (err) { 557290650Shselasky printf("mlx5_core: ERR: ""failed to set ISSI=1\n"); 558290650Shselasky return err; 559290650Shselasky } 560290650Shselasky 561290650Shselasky dev->issi = 1; 562290650Shselasky 563290650Shselasky return 0; 564290650Shselasky } else if (sup_issi & (1 << 0)) { 565290650Shselasky return 0; 566290650Shselasky } 567290650Shselasky 568290650Shselasky return -ENOTSUPP; 569290650Shselasky} 570290650Shselasky 571290650Shselasky 572290650Shselaskyint mlx5_vector2eqn(struct mlx5_core_dev *dev, int vector, int *eqn, int *irqn) 573290650Shselasky{ 574290650Shselasky struct mlx5_eq_table *table = &dev->priv.eq_table; 575290650Shselasky struct mlx5_eq *eq; 576290650Shselasky int err = -ENOENT; 577290650Shselasky 578290650Shselasky spin_lock(&table->lock); 579290650Shselasky list_for_each_entry(eq, &table->comp_eqs_list, list) { 580290650Shselasky if (eq->index == vector) { 581290650Shselasky *eqn = eq->eqn; 582290650Shselasky *irqn = eq->irqn; 583290650Shselasky err = 0; 584290650Shselasky break; 585290650Shselasky } 586290650Shselasky } 587290650Shselasky spin_unlock(&table->lock); 588290650Shselasky 589290650Shselasky return err; 590290650Shselasky} 591290650ShselaskyEXPORT_SYMBOL(mlx5_vector2eqn); 592290650Shselasky 593290650Shselaskyint mlx5_rename_eq(struct mlx5_core_dev *dev, int eq_ix, char *name) 594290650Shselasky{ 595290650Shselasky struct mlx5_priv *priv = &dev->priv; 596290650Shselasky struct mlx5_eq_table *table = &priv->eq_table; 597290650Shselasky struct mlx5_eq *eq; 598290650Shselasky int err = -ENOENT; 599290650Shselasky 600290650Shselasky spin_lock(&table->lock); 601290650Shselasky list_for_each_entry(eq, &table->comp_eqs_list, list) { 602290650Shselasky if (eq->index == eq_ix) { 603290650Shselasky int irq_ix = eq_ix + MLX5_EQ_VEC_COMP_BASE; 604290650Shselasky 605290650Shselasky snprintf(priv->irq_info[irq_ix].name, MLX5_MAX_IRQ_NAME, 606290650Shselasky "%s-%d", name, eq_ix); 607290650Shselasky 608290650Shselasky err = 0; 609290650Shselasky break; 610290650Shselasky } 611290650Shselasky } 612290650Shselasky spin_unlock(&table->lock); 613290650Shselasky 614290650Shselasky return err; 615290650Shselasky} 616290650Shselasky 617290650Shselaskystatic void free_comp_eqs(struct mlx5_core_dev *dev) 618290650Shselasky{ 619290650Shselasky struct mlx5_eq_table *table = &dev->priv.eq_table; 620290650Shselasky struct mlx5_eq *eq, *n; 621290650Shselasky 622290650Shselasky spin_lock(&table->lock); 623290650Shselasky list_for_each_entry_safe(eq, n, &table->comp_eqs_list, list) { 624290650Shselasky list_del(&eq->list); 625290650Shselasky spin_unlock(&table->lock); 626290650Shselasky if (mlx5_destroy_unmap_eq(dev, eq)) 627290650Shselasky mlx5_core_warn(dev, "failed to destroy EQ 0x%x\n", 628290650Shselasky eq->eqn); 629290650Shselasky kfree(eq); 630290650Shselasky spin_lock(&table->lock); 631290650Shselasky } 632290650Shselasky spin_unlock(&table->lock); 633290650Shselasky} 634290650Shselasky 635290650Shselaskystatic int alloc_comp_eqs(struct mlx5_core_dev *dev) 636290650Shselasky{ 637290650Shselasky struct mlx5_eq_table *table = &dev->priv.eq_table; 638290650Shselasky char name[MLX5_MAX_IRQ_NAME]; 639290650Shselasky struct mlx5_eq *eq; 640290650Shselasky int ncomp_vec; 641290650Shselasky int nent; 642290650Shselasky int err; 643290650Shselasky int i; 644290650Shselasky 645290650Shselasky INIT_LIST_HEAD(&table->comp_eqs_list); 646290650Shselasky ncomp_vec = table->num_comp_vectors; 647290650Shselasky nent = MLX5_COMP_EQ_SIZE; 648290650Shselasky for (i = 0; i < ncomp_vec; i++) { 649290650Shselasky eq = kzalloc(sizeof(*eq), GFP_KERNEL); 650290650Shselasky 651290650Shselasky snprintf(name, MLX5_MAX_IRQ_NAME, "mlx5_comp%d", i); 652290650Shselasky err = mlx5_create_map_eq(dev, eq, 653290650Shselasky i + MLX5_EQ_VEC_COMP_BASE, nent, 0, 654290650Shselasky name, &dev->priv.uuari.uars[0]); 655290650Shselasky if (err) { 656290650Shselasky kfree(eq); 657290650Shselasky goto clean; 658290650Shselasky } 659290650Shselasky mlx5_core_dbg(dev, "allocated completion EQN %d\n", eq->eqn); 660290650Shselasky eq->index = i; 661290650Shselasky spin_lock(&table->lock); 662290650Shselasky list_add_tail(&eq->list, &table->comp_eqs_list); 663290650Shselasky spin_unlock(&table->lock); 664290650Shselasky } 665290650Shselasky 666290650Shselasky return 0; 667290650Shselasky 668290650Shselaskyclean: 669290650Shselasky free_comp_eqs(dev); 670290650Shselasky return err; 671290650Shselasky} 672290650Shselasky 673290650Shselaskystatic int map_bf_area(struct mlx5_core_dev *dev) 674290650Shselasky{ 675290650Shselasky resource_size_t bf_start = pci_resource_start(dev->pdev, 0); 676290650Shselasky resource_size_t bf_len = pci_resource_len(dev->pdev, 0); 677290650Shselasky 678290650Shselasky dev->priv.bf_mapping = io_mapping_create_wc(bf_start, bf_len); 679290650Shselasky 680290650Shselasky return dev->priv.bf_mapping ? 0 : -ENOMEM; 681290650Shselasky} 682290650Shselasky 683290650Shselaskystatic void unmap_bf_area(struct mlx5_core_dev *dev) 684290650Shselasky{ 685290650Shselasky if (dev->priv.bf_mapping) 686290650Shselasky io_mapping_free(dev->priv.bf_mapping); 687290650Shselasky} 688290650Shselasky 689290650Shselaskystatic inline int fw_initializing(struct mlx5_core_dev *dev) 690290650Shselasky{ 691290650Shselasky return ioread32be(&dev->iseg->initializing) >> 31; 692290650Shselasky} 693290650Shselasky 694290650Shselaskystatic int wait_fw_init(struct mlx5_core_dev *dev, u32 max_wait_mili) 695290650Shselasky{ 696290650Shselasky u64 end = jiffies + msecs_to_jiffies(max_wait_mili); 697290650Shselasky int err = 0; 698290650Shselasky 699290650Shselasky while (fw_initializing(dev)) { 700290650Shselasky if (time_after(jiffies, end)) { 701290650Shselasky err = -EBUSY; 702290650Shselasky break; 703290650Shselasky } 704290650Shselasky msleep(FW_INIT_WAIT_MS); 705290650Shselasky } 706290650Shselasky 707290650Shselasky return err; 708290650Shselasky} 709290650Shselasky 710331580Shselaskystatic void mlx5_add_device(struct mlx5_interface *intf, struct mlx5_priv *priv) 711290650Shselasky{ 712331580Shselasky struct mlx5_device_context *dev_ctx; 713331580Shselasky struct mlx5_core_dev *dev = container_of(priv, struct mlx5_core_dev, priv); 714331580Shselasky 715331580Shselasky dev_ctx = kzalloc(sizeof(*dev_ctx), GFP_KERNEL); 716331580Shselasky if (!dev_ctx) 717331580Shselasky return; 718331580Shselasky 719331580Shselasky dev_ctx->intf = intf; 720331580Shselasky CURVNET_SET_QUIET(vnet0); 721331580Shselasky dev_ctx->context = intf->add(dev); 722331580Shselasky CURVNET_RESTORE(); 723331580Shselasky 724331580Shselasky if (dev_ctx->context) { 725331580Shselasky spin_lock_irq(&priv->ctx_lock); 726331580Shselasky list_add_tail(&dev_ctx->list, &priv->ctx_list); 727331580Shselasky spin_unlock_irq(&priv->ctx_lock); 728331580Shselasky } else { 729331580Shselasky kfree(dev_ctx); 730331580Shselasky } 731331580Shselasky} 732331580Shselasky 733331580Shselaskystatic void mlx5_remove_device(struct mlx5_interface *intf, struct mlx5_priv *priv) 734331580Shselasky{ 735331580Shselasky struct mlx5_device_context *dev_ctx; 736331580Shselasky struct mlx5_core_dev *dev = container_of(priv, struct mlx5_core_dev, priv); 737331580Shselasky 738331580Shselasky list_for_each_entry(dev_ctx, &priv->ctx_list, list) 739331580Shselasky if (dev_ctx->intf == intf) { 740331580Shselasky spin_lock_irq(&priv->ctx_lock); 741331580Shselasky list_del(&dev_ctx->list); 742331580Shselasky spin_unlock_irq(&priv->ctx_lock); 743331580Shselasky 744331580Shselasky intf->remove(dev, dev_ctx->context); 745331580Shselasky kfree(dev_ctx); 746331580Shselasky return; 747331580Shselasky } 748331580Shselasky} 749331580Shselasky 750331580Shselaskystatic int mlx5_register_device(struct mlx5_core_dev *dev) 751331580Shselasky{ 752290650Shselasky struct mlx5_priv *priv = &dev->priv; 753331580Shselasky struct mlx5_interface *intf; 754290650Shselasky 755331580Shselasky mutex_lock(&intf_mutex); 756331580Shselasky list_add_tail(&priv->dev_list, &dev_list); 757331580Shselasky list_for_each_entry(intf, &intf_list, list) 758331580Shselasky mlx5_add_device(intf, priv); 759331580Shselasky mutex_unlock(&intf_mutex); 760331580Shselasky 761331580Shselasky return 0; 762331580Shselasky} 763331580Shselasky 764331580Shselaskystatic void mlx5_unregister_device(struct mlx5_core_dev *dev) 765331580Shselasky{ 766331580Shselasky struct mlx5_priv *priv = &dev->priv; 767331580Shselasky struct mlx5_interface *intf; 768331580Shselasky 769331580Shselasky mutex_lock(&intf_mutex); 770331580Shselasky list_for_each_entry(intf, &intf_list, list) 771331580Shselasky mlx5_remove_device(intf, priv); 772331580Shselasky list_del(&priv->dev_list); 773331580Shselasky mutex_unlock(&intf_mutex); 774331580Shselasky} 775331580Shselasky 776331580Shselaskyint mlx5_register_interface(struct mlx5_interface *intf) 777331580Shselasky{ 778331580Shselasky struct mlx5_priv *priv; 779331580Shselasky 780331580Shselasky if (!intf->add || !intf->remove) 781331580Shselasky return -EINVAL; 782331580Shselasky 783331580Shselasky mutex_lock(&intf_mutex); 784331580Shselasky list_add_tail(&intf->list, &intf_list); 785331580Shselasky list_for_each_entry(priv, &dev_list, dev_list) 786331580Shselasky mlx5_add_device(intf, priv); 787331580Shselasky mutex_unlock(&intf_mutex); 788331580Shselasky 789331580Shselasky return 0; 790331580Shselasky} 791331580ShselaskyEXPORT_SYMBOL(mlx5_register_interface); 792331580Shselasky 793331580Shselaskyvoid mlx5_unregister_interface(struct mlx5_interface *intf) 794331580Shselasky{ 795331580Shselasky struct mlx5_priv *priv; 796331580Shselasky 797331580Shselasky mutex_lock(&intf_mutex); 798331580Shselasky list_for_each_entry(priv, &dev_list, dev_list) 799331580Shselasky mlx5_remove_device(intf, priv); 800331580Shselasky list_del(&intf->list); 801331580Shselasky mutex_unlock(&intf_mutex); 802331580Shselasky} 803331580ShselaskyEXPORT_SYMBOL(mlx5_unregister_interface); 804331580Shselasky 805331580Shselaskyvoid *mlx5_get_protocol_dev(struct mlx5_core_dev *mdev, int protocol) 806331580Shselasky{ 807331580Shselasky struct mlx5_priv *priv = &mdev->priv; 808331580Shselasky struct mlx5_device_context *dev_ctx; 809331580Shselasky unsigned long flags; 810331580Shselasky void *result = NULL; 811331580Shselasky 812331580Shselasky spin_lock_irqsave(&priv->ctx_lock, flags); 813331580Shselasky 814331580Shselasky list_for_each_entry(dev_ctx, &mdev->priv.ctx_list, list) 815331580Shselasky if ((dev_ctx->intf->protocol == protocol) && 816331580Shselasky dev_ctx->intf->get_dev) { 817331580Shselasky result = dev_ctx->intf->get_dev(dev_ctx->context); 818331580Shselasky break; 819331580Shselasky } 820331580Shselasky 821331580Shselasky spin_unlock_irqrestore(&priv->ctx_lock, flags); 822331580Shselasky 823331580Shselasky return result; 824331580Shselasky} 825331580ShselaskyEXPORT_SYMBOL(mlx5_get_protocol_dev); 826331580Shselasky 827331580Shselaskystatic int mlx5_pci_init(struct mlx5_core_dev *dev, struct mlx5_priv *priv) 828331580Shselasky{ 829331580Shselasky struct pci_dev *pdev = dev->pdev; 830331580Shselasky int err = 0; 831331580Shselasky 832290650Shselasky pci_set_drvdata(dev->pdev, dev); 833290650Shselasky strncpy(priv->name, dev_name(&pdev->dev), MLX5_MAX_NAME_LEN); 834290650Shselasky priv->name[MLX5_MAX_NAME_LEN - 1] = 0; 835290650Shselasky 836290650Shselasky mutex_init(&priv->pgdir_mutex); 837290650Shselasky INIT_LIST_HEAD(&priv->pgdir_list); 838290650Shselasky spin_lock_init(&priv->mkey_lock); 839290650Shselasky 840290650Shselasky priv->numa_node = NUMA_NO_NODE; 841290650Shselasky 842331580Shselasky err = mlx5_pci_enable_device(dev); 843290650Shselasky if (err) { 844290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Cannot enable PCI device, aborting\n"); 845290650Shselasky goto err_dbg; 846290650Shselasky } 847290650Shselasky 848290650Shselasky err = request_bar(pdev); 849290650Shselasky if (err) { 850290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""error requesting BARs, aborting\n"); 851290650Shselasky goto err_disable; 852290650Shselasky } 853290650Shselasky 854290650Shselasky pci_set_master(pdev); 855290650Shselasky 856290650Shselasky err = set_dma_caps(pdev); 857290650Shselasky if (err) { 858290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed setting DMA capabilities mask, aborting\n"); 859290650Shselasky goto err_clr_master; 860290650Shselasky } 861290650Shselasky 862329212Shselasky dev->iseg_base = pci_resource_start(dev->pdev, 0); 863329212Shselasky dev->iseg = ioremap(dev->iseg_base, sizeof(*dev->iseg)); 864290650Shselasky if (!dev->iseg) { 865290650Shselasky err = -ENOMEM; 866290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed mapping initialization segment, aborting\n"); 867290650Shselasky goto err_clr_master; 868290650Shselasky } 869331580Shselasky 870331580Shselasky return 0; 871331580Shselasky 872331580Shselaskyerr_clr_master: 873331580Shselasky pci_clear_master(dev->pdev); 874331580Shselasky release_bar(dev->pdev); 875331580Shselaskyerr_disable: 876331580Shselasky mlx5_pci_disable_device(dev); 877331580Shselaskyerr_dbg: 878331580Shselasky return err; 879331580Shselasky} 880331580Shselasky 881331580Shselaskystatic void mlx5_pci_close(struct mlx5_core_dev *dev, struct mlx5_priv *priv) 882331580Shselasky{ 883331580Shselasky iounmap(dev->iseg); 884331580Shselasky pci_clear_master(dev->pdev); 885331580Shselasky release_bar(dev->pdev); 886331580Shselasky mlx5_pci_disable_device(dev); 887331580Shselasky} 888331580Shselasky 889331580Shselaskystatic int mlx5_load_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv) 890331580Shselasky{ 891331580Shselasky struct pci_dev *pdev = dev->pdev; 892331580Shselasky int err; 893331580Shselasky 894331580Shselasky mutex_lock(&dev->intf_state_mutex); 895331580Shselasky if (test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) { 896331580Shselasky dev_warn(&dev->pdev->dev, "%s: interface is up, NOP\n", 897331580Shselasky __func__); 898331580Shselasky goto out; 899331580Shselasky } 900331580Shselasky 901290650Shselasky device_printf((&pdev->dev)->bsddev, "INFO: ""firmware version: %d.%d.%d\n", fw_rev_maj(dev), fw_rev_min(dev), fw_rev_sub(dev)); 902290650Shselasky 903306233Shselasky /* 904306233Shselasky * On load removing any previous indication of internal error, 905306233Shselasky * device is up 906306233Shselasky */ 907306233Shselasky dev->state = MLX5_DEVICE_STATE_UP; 908306233Shselasky 909290650Shselasky err = mlx5_cmd_init(dev); 910290650Shselasky if (err) { 911290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed initializing command interface, aborting\n"); 912331580Shselasky goto out_err; 913290650Shselasky } 914290650Shselasky 915290650Shselasky err = wait_fw_init(dev, FW_INIT_TIMEOUT_MILI); 916290650Shselasky if (err) { 917290650Shselasky device_printf((&dev->pdev->dev)->bsddev, "ERR: ""Firmware over %d MS in initializing state, aborting\n", FW_INIT_TIMEOUT_MILI); 918290650Shselasky goto err_cmd_cleanup; 919290650Shselasky } 920290650Shselasky 921290650Shselasky mlx5_pagealloc_init(dev); 922290650Shselasky 923290650Shselasky err = mlx5_core_enable_hca(dev); 924290650Shselasky if (err) { 925290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""enable hca failed\n"); 926290650Shselasky goto err_pagealloc_cleanup; 927290650Shselasky } 928290650Shselasky 929290650Shselasky err = mlx5_core_set_issi(dev); 930290650Shselasky if (err) { 931290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""failed to set issi\n"); 932290650Shselasky goto err_disable_hca; 933290650Shselasky } 934290650Shselasky 935290650Shselasky err = mlx5_pagealloc_start(dev); 936290650Shselasky if (err) { 937290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""mlx5_pagealloc_start failed\n"); 938290650Shselasky goto err_disable_hca; 939290650Shselasky } 940290650Shselasky 941290650Shselasky err = mlx5_satisfy_startup_pages(dev, 1); 942290650Shselasky if (err) { 943290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""failed to allocate boot pages\n"); 944290650Shselasky goto err_pagealloc_stop; 945290650Shselasky } 946290650Shselasky 947329209Shselasky err = set_hca_ctrl(dev); 948329209Shselasky if (err) { 949329209Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""set_hca_ctrl failed\n"); 950329209Shselasky goto reclaim_boot_pages; 951329209Shselasky } 952329209Shselasky 953306233Shselasky err = handle_hca_cap(dev); 954290650Shselasky if (err) { 955306233Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""handle_hca_cap failed\n"); 956290650Shselasky goto reclaim_boot_pages; 957290650Shselasky } 958290650Shselasky 959329209Shselasky err = handle_hca_cap_atomic(dev); 960290650Shselasky if (err) { 961329209Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""handle_hca_cap_atomic failed\n"); 962290650Shselasky goto reclaim_boot_pages; 963290650Shselasky } 964290650Shselasky 965290650Shselasky err = mlx5_satisfy_startup_pages(dev, 0); 966290650Shselasky if (err) { 967290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""failed to allocate init pages\n"); 968290650Shselasky goto reclaim_boot_pages; 969290650Shselasky } 970290650Shselasky 971290650Shselasky err = mlx5_cmd_init_hca(dev); 972290650Shselasky if (err) { 973290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""init hca failed\n"); 974290650Shselasky goto reclaim_boot_pages; 975290650Shselasky } 976290650Shselasky 977290650Shselasky mlx5_start_health_poll(dev); 978290650Shselasky 979290650Shselasky err = mlx5_query_hca_caps(dev); 980290650Shselasky if (err) { 981290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""query hca failed\n"); 982290650Shselasky goto err_stop_poll; 983290650Shselasky } 984290650Shselasky 985290650Shselasky err = mlx5_query_board_id(dev); 986290650Shselasky if (err) { 987290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""query board id failed\n"); 988290650Shselasky goto err_stop_poll; 989290650Shselasky } 990290650Shselasky 991290650Shselasky err = mlx5_enable_msix(dev); 992290650Shselasky if (err) { 993290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""enable msix failed\n"); 994290650Shselasky goto err_stop_poll; 995290650Shselasky } 996290650Shselasky 997290650Shselasky err = mlx5_eq_init(dev); 998290650Shselasky if (err) { 999290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""failed to initialize eq\n"); 1000290650Shselasky goto disable_msix; 1001290650Shselasky } 1002290650Shselasky 1003290650Shselasky err = mlx5_alloc_uuars(dev, &priv->uuari); 1004290650Shselasky if (err) { 1005290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed allocating uar, aborting\n"); 1006290650Shselasky goto err_eq_cleanup; 1007290650Shselasky } 1008290650Shselasky 1009290650Shselasky err = mlx5_start_eqs(dev); 1010290650Shselasky if (err) { 1011290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed to start pages and async EQs\n"); 1012290650Shselasky goto err_free_uar; 1013290650Shselasky } 1014290650Shselasky 1015290650Shselasky err = alloc_comp_eqs(dev); 1016290650Shselasky if (err) { 1017290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed to alloc completion EQs\n"); 1018290650Shselasky goto err_stop_eqs; 1019290650Shselasky } 1020290650Shselasky 1021290650Shselasky if (map_bf_area(dev)) 1022290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""Failed to map blue flame area\n"); 1023290650Shselasky 1024290650Shselasky MLX5_INIT_DOORBELL_LOCK(&priv->cq_uar_lock); 1025290650Shselasky 1026290650Shselasky mlx5_init_cq_table(dev); 1027290650Shselasky mlx5_init_qp_table(dev); 1028290650Shselasky mlx5_init_srq_table(dev); 1029290650Shselasky mlx5_init_mr_table(dev); 1030290650Shselasky 1031329200Shselasky err = mlx5_init_fs(dev); 1032329200Shselasky if (err) { 1033329200Shselasky mlx5_core_err(dev, "flow steering init %d\n", err); 1034329200Shselasky goto err_init_tables; 1035329200Shselasky } 1036329200Shselasky 1037331580Shselasky err = mlx5_register_device(dev); 1038331580Shselasky if (err) { 1039331580Shselasky dev_err(&pdev->dev, "mlx5_register_device failed %d\n", err); 1040331580Shselasky goto err_reg_dev; 1041331580Shselasky } 1042331580Shselasky 1043331580Shselasky clear_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state); 1044331580Shselasky set_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state); 1045331580Shselasky 1046331580Shselaskyout: 1047331580Shselasky mutex_unlock(&dev->intf_state_mutex); 1048290650Shselasky return 0; 1049290650Shselasky 1050331580Shselaskyerr_reg_dev: 1051331580Shselasky mlx5_cleanup_fs(dev); 1052329200Shselaskyerr_init_tables: 1053329200Shselasky mlx5_cleanup_mr_table(dev); 1054329200Shselasky mlx5_cleanup_srq_table(dev); 1055329200Shselasky mlx5_cleanup_qp_table(dev); 1056329200Shselasky mlx5_cleanup_cq_table(dev); 1057329200Shselasky unmap_bf_area(dev); 1058329200Shselasky 1059290650Shselaskyerr_stop_eqs: 1060290650Shselasky mlx5_stop_eqs(dev); 1061290650Shselasky 1062290650Shselaskyerr_free_uar: 1063290650Shselasky mlx5_free_uuars(dev, &priv->uuari); 1064290650Shselasky 1065290650Shselaskyerr_eq_cleanup: 1066290650Shselasky mlx5_eq_cleanup(dev); 1067290650Shselasky 1068290650Shselaskydisable_msix: 1069290650Shselasky mlx5_disable_msix(dev); 1070290650Shselasky 1071290650Shselaskyerr_stop_poll: 1072290650Shselasky mlx5_stop_health_poll(dev); 1073290650Shselasky if (mlx5_cmd_teardown_hca(dev)) { 1074290650Shselasky device_printf((&dev->pdev->dev)->bsddev, "ERR: ""tear_down_hca failed, skip cleanup\n"); 1075331580Shselasky goto out_err; 1076290650Shselasky } 1077290650Shselasky 1078290650Shselaskyreclaim_boot_pages: 1079290650Shselasky mlx5_reclaim_startup_pages(dev); 1080290650Shselasky 1081290650Shselaskyerr_pagealloc_stop: 1082290650Shselasky mlx5_pagealloc_stop(dev); 1083290650Shselasky 1084290650Shselaskyerr_disable_hca: 1085290650Shselasky mlx5_core_disable_hca(dev); 1086290650Shselasky 1087290650Shselaskyerr_pagealloc_cleanup: 1088290650Shselasky mlx5_pagealloc_cleanup(dev); 1089331580Shselasky 1090290650Shselaskyerr_cmd_cleanup: 1091290650Shselasky mlx5_cmd_cleanup(dev); 1092290650Shselasky 1093331580Shselaskyout_err: 1094331580Shselasky dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR; 1095331580Shselasky mutex_unlock(&dev->intf_state_mutex); 1096290650Shselasky 1097290650Shselasky return err; 1098290650Shselasky} 1099290650Shselasky 1100331580Shselaskystatic int mlx5_unload_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv) 1101290650Shselasky{ 1102331580Shselasky int err = 0; 1103290650Shselasky 1104331580Shselasky mutex_lock(&dev->intf_state_mutex); 1105331580Shselasky if (test_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state)) { 1106331580Shselasky dev_warn(&dev->pdev->dev, "%s: interface is down, NOP\n", __func__); 1107331580Shselasky goto out; 1108331580Shselasky } 1109331580Shselasky 1110331580Shselasky mlx5_unregister_device(dev); 1111331580Shselasky 1112329200Shselasky mlx5_cleanup_fs(dev); 1113290650Shselasky mlx5_cleanup_mr_table(dev); 1114290650Shselasky mlx5_cleanup_srq_table(dev); 1115290650Shselasky mlx5_cleanup_qp_table(dev); 1116290650Shselasky mlx5_cleanup_cq_table(dev); 1117290650Shselasky unmap_bf_area(dev); 1118322144Shselasky mlx5_wait_for_reclaim_vfs_pages(dev); 1119290650Shselasky free_comp_eqs(dev); 1120290650Shselasky mlx5_stop_eqs(dev); 1121290650Shselasky mlx5_free_uuars(dev, &priv->uuari); 1122290650Shselasky mlx5_eq_cleanup(dev); 1123290650Shselasky mlx5_disable_msix(dev); 1124290650Shselasky mlx5_stop_health_poll(dev); 1125331580Shselasky err = mlx5_cmd_teardown_hca(dev); 1126331580Shselasky if (err) { 1127290650Shselasky device_printf((&dev->pdev->dev)->bsddev, "ERR: ""tear_down_hca failed, skip cleanup\n"); 1128331580Shselasky goto out; 1129290650Shselasky } 1130290650Shselasky mlx5_pagealloc_stop(dev); 1131290650Shselasky mlx5_reclaim_startup_pages(dev); 1132290650Shselasky mlx5_core_disable_hca(dev); 1133290650Shselasky mlx5_pagealloc_cleanup(dev); 1134290650Shselasky mlx5_cmd_cleanup(dev); 1135290650Shselasky 1136331580Shselaskyout: 1137331580Shselasky clear_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state); 1138331580Shselasky set_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state); 1139331580Shselasky mutex_unlock(&dev->intf_state_mutex); 1140331580Shselasky return err; 1141290650Shselasky} 1142290650Shselasky 1143331580Shselaskyvoid mlx5_core_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event, 1144331580Shselasky unsigned long param) 1145290650Shselasky{ 1146290650Shselasky struct mlx5_priv *priv = &dev->priv; 1147290650Shselasky struct mlx5_device_context *dev_ctx; 1148290650Shselasky unsigned long flags; 1149290650Shselasky 1150290650Shselasky spin_lock_irqsave(&priv->ctx_lock, flags); 1151290650Shselasky 1152290650Shselasky list_for_each_entry(dev_ctx, &priv->ctx_list, list) 1153290650Shselasky if (dev_ctx->intf->event) 1154290650Shselasky dev_ctx->intf->event(dev, dev_ctx->context, event, param); 1155290650Shselasky 1156290650Shselasky spin_unlock_irqrestore(&priv->ctx_lock, flags); 1157290650Shselasky} 1158290650Shselasky 1159290650Shselaskystruct mlx5_core_event_handler { 1160290650Shselasky void (*event)(struct mlx5_core_dev *dev, 1161290650Shselasky enum mlx5_dev_event event, 1162290650Shselasky void *data); 1163290650Shselasky}; 1164290650Shselasky 1165290650Shselasky 1166290650Shselaskystatic int init_one(struct pci_dev *pdev, 1167290650Shselasky const struct pci_device_id *id) 1168290650Shselasky{ 1169290650Shselasky struct mlx5_core_dev *dev; 1170290650Shselasky struct mlx5_priv *priv; 1171290650Shselasky int err; 1172290650Shselasky 1173290650Shselasky dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1174290650Shselasky priv = &dev->priv; 1175306233Shselasky if (id) 1176306233Shselasky priv->pci_dev_data = id->driver_data; 1177290650Shselasky 1178290650Shselasky if (prof_sel < 0 || prof_sel >= ARRAY_SIZE(profiles)) { 1179290650Shselasky printf("mlx5_core: WARN: ""selected profile out of range, selecting default (%d)\n", MLX5_DEFAULT_PROF); 1180290650Shselasky prof_sel = MLX5_DEFAULT_PROF; 1181290650Shselasky } 1182290650Shselasky dev->profile = &profiles[prof_sel]; 1183331580Shselasky dev->pdev = pdev; 1184290650Shselasky dev->event = mlx5_core_event; 1185290650Shselasky 1186290650Shselasky INIT_LIST_HEAD(&priv->ctx_list); 1187290650Shselasky spin_lock_init(&priv->ctx_lock); 1188331580Shselasky mutex_init(&dev->pci_status_mutex); 1189331580Shselasky mutex_init(&dev->intf_state_mutex); 1190331580Shselasky err = mlx5_pci_init(dev, priv); 1191290650Shselasky if (err) { 1192331580Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""mlx5_pci_init failed %d\n", err); 1193331580Shselasky goto clean_dev; 1194290650Shselasky } 1195290650Shselasky 1196331580Shselasky err = mlx5_health_init(dev); 1197331580Shselasky if (err) { 1198331580Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""mlx5_health_init failed %d\n", err); 1199331580Shselasky goto close_pci; 1200331580Shselasky } 1201331580Shselasky 1202331580Shselasky err = mlx5_load_one(dev, priv); 1203290650Shselasky if (err) { 1204290650Shselasky device_printf((&pdev->dev)->bsddev, "ERR: ""mlx5_register_device failed %d\n", err); 1205331580Shselasky goto clean_health; 1206290650Shselasky } 1207290650Shselasky 1208290650Shselasky 1209290650Shselasky return 0; 1210290650Shselasky 1211331580Shselaskyclean_health: 1212331580Shselasky mlx5_health_cleanup(dev); 1213331580Shselaskyclose_pci: 1214331580Shselasky mlx5_pci_close(dev, priv); 1215331580Shselaskyclean_dev: 1216290650Shselasky kfree(dev); 1217290650Shselasky return err; 1218290650Shselasky} 1219290650Shselasky 1220290650Shselaskystatic void remove_one(struct pci_dev *pdev) 1221290650Shselasky{ 1222290650Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1223331580Shselasky struct mlx5_priv *priv = &dev->priv; 1224290650Shselasky 1225331580Shselasky if (mlx5_unload_one(dev, priv)) { 1226331580Shselasky dev_err(&dev->pdev->dev, "mlx5_unload_one failed\n"); 1227331580Shselasky mlx5_health_cleanup(dev); 1228331580Shselasky return; 1229331580Shselasky } 1230331580Shselasky 1231331580Shselasky mlx5_health_cleanup(dev); 1232331580Shselasky mlx5_pci_close(dev, priv); 1233331580Shselasky pci_set_drvdata(pdev, NULL); 1234290650Shselasky kfree(dev); 1235290650Shselasky} 1236290650Shselasky 1237331580Shselaskystatic pci_ers_result_t mlx5_pci_err_detected(struct pci_dev *pdev, 1238331580Shselasky pci_channel_state_t state) 1239331580Shselasky{ 1240331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1241331580Shselasky struct mlx5_priv *priv = &dev->priv; 1242331580Shselasky 1243331580Shselasky dev_info(&pdev->dev, "%s was called\n", __func__); 1244331580Shselasky mlx5_enter_error_state(dev); 1245331580Shselasky mlx5_unload_one(dev, priv); 1246331582Shselasky if (state) { 1247331582Shselasky pci_save_state(pdev->dev.bsddev); 1248331582Shselasky mlx5_drain_health_wq(dev); 1249331582Shselasky mlx5_pci_disable_device(dev); 1250331582Shselasky } 1251331582Shselasky 1252331580Shselasky return state == pci_channel_io_perm_failure ? 1253331580Shselasky PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_NEED_RESET; 1254331580Shselasky} 1255331580Shselasky 1256331580Shselaskystatic pci_ers_result_t mlx5_pci_slot_reset(struct pci_dev *pdev) 1257331580Shselasky{ 1258331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1259331580Shselasky int err = 0; 1260331580Shselasky 1261331580Shselasky dev_info(&pdev->dev, "%s was called\n", __func__); 1262331580Shselasky 1263331580Shselasky err = mlx5_pci_enable_device(dev); 1264331580Shselasky if (err) { 1265331580Shselasky dev_err(&pdev->dev, "%s: mlx5_pci_enable_device failed with error code: %d\n" 1266331580Shselasky , __func__, err); 1267331580Shselasky return PCI_ERS_RESULT_DISCONNECT; 1268331580Shselasky } 1269331580Shselasky pci_set_master(pdev); 1270331580Shselasky pci_set_powerstate(pdev->dev.bsddev, PCI_POWERSTATE_D0); 1271331580Shselasky pci_restore_state(pdev->dev.bsddev); 1272331580Shselasky 1273331580Shselasky return err ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED; 1274331580Shselasky} 1275331580Shselasky 1276331580Shselaskyvoid mlx5_disable_device(struct mlx5_core_dev *dev) 1277331580Shselasky{ 1278331580Shselasky mlx5_pci_err_detected(dev->pdev, 0); 1279331580Shselasky} 1280331580Shselasky 1281331580Shselasky/* wait for the device to show vital signs. For now we check 1282331580Shselasky * that we can read the device ID and that the health buffer 1283331580Shselasky * shows a non zero value which is different than 0xffffffff 1284331580Shselasky */ 1285331580Shselaskystatic void wait_vital(struct pci_dev *pdev) 1286331580Shselasky{ 1287331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1288331580Shselasky struct mlx5_core_health *health = &dev->priv.health; 1289331580Shselasky const int niter = 100; 1290331580Shselasky u32 count; 1291331580Shselasky u16 did; 1292331580Shselasky int i; 1293331580Shselasky 1294331580Shselasky /* Wait for firmware to be ready after reset */ 1295331580Shselasky msleep(1000); 1296331580Shselasky for (i = 0; i < niter; i++) { 1297331580Shselasky if (pci_read_config_word(pdev, 2, &did)) { 1298331580Shselasky dev_warn(&pdev->dev, "failed reading config word\n"); 1299331580Shselasky break; 1300331580Shselasky } 1301331580Shselasky if (did == pdev->device) { 1302331580Shselasky dev_info(&pdev->dev, "device ID correctly read after %d iterations\n", i); 1303331580Shselasky break; 1304331580Shselasky } 1305331580Shselasky msleep(50); 1306331580Shselasky } 1307331580Shselasky if (i == niter) 1308331580Shselasky dev_warn(&pdev->dev, "%s-%d: could not read device ID\n", __func__, __LINE__); 1309331580Shselasky 1310331580Shselasky for (i = 0; i < niter; i++) { 1311331580Shselasky count = ioread32be(health->health_counter); 1312331580Shselasky if (count && count != 0xffffffff) { 1313331580Shselasky dev_info(&pdev->dev, "Counter value 0x%x after %d iterations\n", count, i); 1314331580Shselasky break; 1315331580Shselasky } 1316331580Shselasky msleep(50); 1317331580Shselasky } 1318331580Shselasky 1319331580Shselasky if (i == niter) 1320331580Shselasky dev_warn(&pdev->dev, "%s-%d: could not read device ID\n", __func__, __LINE__); 1321331580Shselasky} 1322331580Shselasky 1323331580Shselaskystatic void mlx5_pci_resume(struct pci_dev *pdev) 1324331580Shselasky{ 1325331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1326331580Shselasky struct mlx5_priv *priv = &dev->priv; 1327331580Shselasky int err; 1328331580Shselasky 1329331580Shselasky dev_info(&pdev->dev, "%s was called\n", __func__); 1330331580Shselasky 1331331580Shselasky pci_save_state(pdev->dev.bsddev); 1332331580Shselasky wait_vital(pdev); 1333331580Shselasky 1334331580Shselasky err = mlx5_load_one(dev, priv); 1335331580Shselasky if (err) 1336331580Shselasky dev_err(&pdev->dev, "%s: mlx5_load_one failed with error code: %d\n" 1337331580Shselasky , __func__, err); 1338331580Shselasky else 1339331580Shselasky dev_info(&pdev->dev, "%s: device recovered\n", __func__); 1340331580Shselasky} 1341331580Shselasky 1342331580Shselaskystatic const struct pci_error_handlers mlx5_err_handler = { 1343331580Shselasky .error_detected = mlx5_pci_err_detected, 1344331580Shselasky .slot_reset = mlx5_pci_slot_reset, 1345331580Shselasky .resume = mlx5_pci_resume 1346331580Shselasky}; 1347331580Shselasky 1348329211Shselaskystatic void shutdown_one(struct pci_dev *pdev) 1349329211Shselasky{ 1350331580Shselasky struct mlx5_core_dev *dev = pci_get_drvdata(pdev); 1351331580Shselasky struct mlx5_priv *priv = &dev->priv; 1352331580Shselasky 1353331580Shselasky set_bit(MLX5_INTERFACE_STATE_SHUTDOWN, &dev->intf_state); 1354331580Shselasky mlx5_unload_one(dev, priv); 1355331580Shselasky mlx5_pci_disable_device(dev); 1356329211Shselasky} 1357329211Shselasky 1358290650Shselaskystatic const struct pci_device_id mlx5_core_pci_table[] = { 1359290650Shselasky { PCI_VDEVICE(MELLANOX, 4113) }, /* Connect-IB */ 1360290650Shselasky { PCI_VDEVICE(MELLANOX, 4114) }, /* Connect-IB VF */ 1361290650Shselasky { PCI_VDEVICE(MELLANOX, 4115) }, /* ConnectX-4 */ 1362290650Shselasky { PCI_VDEVICE(MELLANOX, 4116) }, /* ConnectX-4 VF */ 1363290650Shselasky { PCI_VDEVICE(MELLANOX, 4117) }, /* ConnectX-4LX */ 1364290650Shselasky { PCI_VDEVICE(MELLANOX, 4118) }, /* ConnectX-4LX VF */ 1365306233Shselasky { PCI_VDEVICE(MELLANOX, 4119) }, /* ConnectX-5 */ 1366306233Shselasky { PCI_VDEVICE(MELLANOX, 4120) }, /* ConnectX-5 VF */ 1367290650Shselasky { PCI_VDEVICE(MELLANOX, 4121) }, 1368290650Shselasky { PCI_VDEVICE(MELLANOX, 4122) }, 1369290650Shselasky { PCI_VDEVICE(MELLANOX, 4123) }, 1370290650Shselasky { PCI_VDEVICE(MELLANOX, 4124) }, 1371290650Shselasky { PCI_VDEVICE(MELLANOX, 4125) }, 1372290650Shselasky { PCI_VDEVICE(MELLANOX, 4126) }, 1373290650Shselasky { PCI_VDEVICE(MELLANOX, 4127) }, 1374290650Shselasky { PCI_VDEVICE(MELLANOX, 4128) }, 1375290650Shselasky { PCI_VDEVICE(MELLANOX, 4129) }, 1376290650Shselasky { PCI_VDEVICE(MELLANOX, 4130) }, 1377290650Shselasky { PCI_VDEVICE(MELLANOX, 4131) }, 1378290650Shselasky { PCI_VDEVICE(MELLANOX, 4132) }, 1379290650Shselasky { PCI_VDEVICE(MELLANOX, 4133) }, 1380290650Shselasky { PCI_VDEVICE(MELLANOX, 4134) }, 1381290650Shselasky { PCI_VDEVICE(MELLANOX, 4135) }, 1382290650Shselasky { PCI_VDEVICE(MELLANOX, 4136) }, 1383290650Shselasky { PCI_VDEVICE(MELLANOX, 4137) }, 1384290650Shselasky { PCI_VDEVICE(MELLANOX, 4138) }, 1385290650Shselasky { PCI_VDEVICE(MELLANOX, 4139) }, 1386290650Shselasky { PCI_VDEVICE(MELLANOX, 4140) }, 1387290650Shselasky { PCI_VDEVICE(MELLANOX, 4141) }, 1388290650Shselasky { PCI_VDEVICE(MELLANOX, 4142) }, 1389290650Shselasky { PCI_VDEVICE(MELLANOX, 4143) }, 1390290650Shselasky { PCI_VDEVICE(MELLANOX, 4144) }, 1391290650Shselasky { 0, } 1392290650Shselasky}; 1393290650Shselasky 1394290650ShselaskyMODULE_DEVICE_TABLE(pci, mlx5_core_pci_table); 1395290650Shselasky 1396290650Shselaskystatic struct pci_driver mlx5_core_driver = { 1397290650Shselasky .name = DRIVER_NAME, 1398290650Shselasky .id_table = mlx5_core_pci_table, 1399329211Shselasky .shutdown = shutdown_one, 1400290650Shselasky .probe = init_one, 1401331580Shselasky .remove = remove_one, 1402331580Shselasky .err_handler = &mlx5_err_handler 1403290650Shselasky}; 1404290650Shselasky 1405290650Shselaskystatic int __init init(void) 1406290650Shselasky{ 1407290650Shselasky int err; 1408290650Shselasky 1409290650Shselasky err = pci_register_driver(&mlx5_core_driver); 1410290650Shselasky if (err) 1411331580Shselasky goto err_debug; 1412290650Shselasky 1413290650Shselasky 1414290650Shselasky return 0; 1415290650Shselasky 1416290650Shselaskyerr_debug: 1417290650Shselasky return err; 1418290650Shselasky} 1419290650Shselasky 1420290650Shselaskystatic void __exit cleanup(void) 1421290650Shselasky{ 1422290650Shselasky pci_unregister_driver(&mlx5_core_driver); 1423290650Shselasky} 1424290650Shselasky 1425290650Shselaskymodule_init(init); 1426290650Shselaskymodule_exit(cleanup); 1427