mlx5_fw.c revision 347823
1/*- 2 * Copyright (c) 2013-2017, Mellanox Technologies, Ltd. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 * 25 * $FreeBSD: stable/11/sys/dev/mlx5/mlx5_core/mlx5_fw.c 347823 2019-05-16 17:31:31Z hselasky $ 26 */ 27 28#include <dev/mlx5/driver.h> 29#include <linux/module.h> 30#include "mlx5_core.h" 31 32static int mlx5_cmd_query_adapter(struct mlx5_core_dev *dev, u32 *out, 33 int outlen) 34{ 35 u32 in[MLX5_ST_SZ_DW(query_adapter_in)]; 36 int err; 37 38 memset(in, 0, sizeof(in)); 39 40 MLX5_SET(query_adapter_in, in, opcode, MLX5_CMD_OP_QUERY_ADAPTER); 41 42 err = mlx5_cmd_exec(dev, in, sizeof(in), out, outlen); 43 return err; 44} 45 46int mlx5_query_board_id(struct mlx5_core_dev *dev) 47{ 48 u32 *out; 49 int outlen = MLX5_ST_SZ_BYTES(query_adapter_out); 50 int err; 51 52 out = kzalloc(outlen, GFP_KERNEL); 53 54 err = mlx5_cmd_query_adapter(dev, out, outlen); 55 if (err) 56 goto out_out; 57 58 memcpy(dev->board_id, 59 MLX5_ADDR_OF(query_adapter_out, out, 60 query_adapter_struct.vsd_contd_psid), 61 MLX5_FLD_SZ_BYTES(query_adapter_out, 62 query_adapter_struct.vsd_contd_psid)); 63 64out_out: 65 kfree(out); 66 67 return err; 68} 69 70int mlx5_core_query_vendor_id(struct mlx5_core_dev *mdev, u32 *vendor_id) 71{ 72 u32 *out; 73 int outlen = MLX5_ST_SZ_BYTES(query_adapter_out); 74 int err; 75 76 out = kzalloc(outlen, GFP_KERNEL); 77 78 err = mlx5_cmd_query_adapter(mdev, out, outlen); 79 if (err) 80 goto out_out; 81 82 *vendor_id = MLX5_GET(query_adapter_out, out, 83 query_adapter_struct.ieee_vendor_id); 84 85out_out: 86 kfree(out); 87 88 return err; 89} 90EXPORT_SYMBOL(mlx5_core_query_vendor_id); 91 92static int mlx5_core_query_special_contexts(struct mlx5_core_dev *dev) 93{ 94 u32 in[MLX5_ST_SZ_DW(query_special_contexts_in)]; 95 u32 out[MLX5_ST_SZ_DW(query_special_contexts_out)]; 96 int err; 97 98 memset(in, 0, sizeof(in)); 99 memset(out, 0, sizeof(out)); 100 101 MLX5_SET(query_special_contexts_in, in, opcode, 102 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS); 103 err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); 104 if (err) 105 return err; 106 107 dev->special_contexts.resd_lkey = MLX5_GET(query_special_contexts_out, 108 out, resd_lkey); 109 110 return err; 111} 112 113static int mlx5_get_qcam_reg(struct mlx5_core_dev *dev) 114{ 115 return mlx5_query_qcam_reg(dev, dev->caps.qcam, 116 MLX5_QCAM_FEATURE_ENHANCED_FEATURES, 117 MLX5_QCAM_REGS_FIRST_128); 118} 119 120static int mlx5_get_pcam_reg(struct mlx5_core_dev *dev) 121{ 122 return mlx5_query_pcam_reg(dev, dev->caps.pcam, 123 MLX5_PCAM_FEATURE_ENHANCED_FEATURES, 124 MLX5_PCAM_REGS_5000_TO_507F); 125} 126 127static int mlx5_get_mcam_reg(struct mlx5_core_dev *dev) 128{ 129 return mlx5_query_mcam_reg(dev, dev->caps.mcam, 130 MLX5_MCAM_FEATURE_ENHANCED_FEATURES, 131 MLX5_MCAM_REGS_FIRST_128); 132} 133 134int mlx5_query_hca_caps(struct mlx5_core_dev *dev) 135{ 136 int err; 137 138 err = mlx5_core_get_caps(dev, MLX5_CAP_GENERAL); 139 if (err) 140 return err; 141 142 if (MLX5_CAP_GEN(dev, eth_net_offloads)) { 143 err = mlx5_core_get_caps(dev, MLX5_CAP_ETHERNET_OFFLOADS); 144 if (err) 145 return err; 146 } 147 148 if (MLX5_CAP_GEN(dev, pg)) { 149 err = mlx5_core_get_caps(dev, MLX5_CAP_ODP); 150 if (err) 151 return err; 152 } 153 154 if (MLX5_CAP_GEN(dev, atomic)) { 155 err = mlx5_core_get_caps(dev, MLX5_CAP_ATOMIC); 156 if (err) 157 return err; 158 } 159 160 if (MLX5_CAP_GEN(dev, roce)) { 161 err = mlx5_core_get_caps(dev, MLX5_CAP_ROCE); 162 if (err) 163 return err; 164 } 165 166 if ((MLX5_CAP_GEN(dev, port_type) == 167 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET && 168 MLX5_CAP_GEN(dev, nic_flow_table)) || 169 (MLX5_CAP_GEN(dev, port_type) == MLX5_CMD_HCA_CAP_PORT_TYPE_IB && 170 MLX5_CAP_GEN(dev, ipoib_enhanced_offloads))) { 171 err = mlx5_core_get_caps(dev, MLX5_CAP_FLOW_TABLE); 172 if (err) 173 return err; 174 } 175 176 if (MLX5_CAP_GEN(dev, eswitch_flow_table)) { 177 err = mlx5_core_get_caps(dev, MLX5_CAP_ESWITCH_FLOW_TABLE); 178 if (err) 179 return err; 180 } 181 182 if (MLX5_CAP_GEN(dev, vport_group_manager)) { 183 err = mlx5_core_get_caps(dev, MLX5_CAP_ESWITCH); 184 if (err) 185 return err; 186 } 187 188 if (MLX5_CAP_GEN(dev, snapshot)) { 189 err = mlx5_core_get_caps(dev, MLX5_CAP_SNAPSHOT); 190 if (err) 191 return err; 192 } 193 194 if (MLX5_CAP_GEN(dev, ipoib_enhanced_offloads)) { 195 err = mlx5_core_get_caps(dev, MLX5_CAP_EOIB_OFFLOADS); 196 if (err) 197 return err; 198 } 199 200 if (MLX5_CAP_GEN(dev, debug)) { 201 err = mlx5_core_get_caps(dev, MLX5_CAP_DEBUG); 202 if (err) 203 return err; 204 } 205 206 if (MLX5_CAP_GEN(dev, qos)) { 207 err = mlx5_core_get_caps(dev, MLX5_CAP_QOS); 208 if (err) 209 return err; 210 } 211 212 if (MLX5_CAP_GEN(dev, qcam_reg)) { 213 err = mlx5_get_qcam_reg(dev); 214 if (err) 215 return err; 216 } 217 218 if (MLX5_CAP_GEN(dev, mcam_reg)) { 219 err = mlx5_get_mcam_reg(dev); 220 if (err) 221 return err; 222 } 223 224 err = mlx5_core_query_special_contexts(dev); 225 if (err) 226 return err; 227 228 return 0; 229} 230 231int mlx5_cmd_init_hca(struct mlx5_core_dev *dev) 232{ 233 u32 in[MLX5_ST_SZ_DW(init_hca_in)]; 234 u32 out[MLX5_ST_SZ_DW(init_hca_out)]; 235 236 memset(in, 0, sizeof(in)); 237 238 MLX5_SET(init_hca_in, in, opcode, MLX5_CMD_OP_INIT_HCA); 239 240 memset(out, 0, sizeof(out)); 241 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); 242} 243 244int mlx5_cmd_teardown_hca(struct mlx5_core_dev *dev) 245{ 246 u32 in[MLX5_ST_SZ_DW(teardown_hca_in)] = {0}; 247 u32 out[MLX5_ST_SZ_DW(teardown_hca_out)] = {0}; 248 249 MLX5_SET(teardown_hca_in, in, opcode, MLX5_CMD_OP_TEARDOWN_HCA); 250 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); 251} 252 253int mlx5_cmd_force_teardown_hca(struct mlx5_core_dev *dev) 254{ 255 u32 out[MLX5_ST_SZ_DW(teardown_hca_out)] = {0}; 256 u32 in[MLX5_ST_SZ_DW(teardown_hca_in)] = {0}; 257 int force_state; 258 int ret; 259 260 if (!MLX5_CAP_GEN(dev, force_teardown)) { 261 mlx5_core_dbg(dev, "force teardown is not supported in the firmware\n"); 262 return -EOPNOTSUPP; 263 } 264 265 MLX5_SET(teardown_hca_in, in, opcode, MLX5_CMD_OP_TEARDOWN_HCA); 266 MLX5_SET(teardown_hca_in, in, profile, MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE); 267 268 ret = mlx5_cmd_exec_polling(dev, in, sizeof(in), out, sizeof(out)); 269 if (ret) 270 return ret; 271 272 force_state = MLX5_GET(teardown_hca_out, out, state); 273 if (force_state == MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL) { 274 mlx5_core_err(dev, "teardown with force mode failed\n"); 275 return -EIO; 276 } 277 278 return 0; 279} 280 281#define MLX5_FAST_TEARDOWN_WAIT_MS 3000 282int mlx5_cmd_fast_teardown_hca(struct mlx5_core_dev *dev) 283{ 284 int end, delay_ms = MLX5_FAST_TEARDOWN_WAIT_MS; 285 u32 out[MLX5_ST_SZ_DW(teardown_hca_out)] = {}; 286 u32 in[MLX5_ST_SZ_DW(teardown_hca_in)] = {}; 287 int state; 288 int ret; 289 290 if (!MLX5_CAP_GEN(dev, fast_teardown)) { 291 mlx5_core_dbg(dev, "fast teardown is not supported in the firmware\n"); 292 return -EOPNOTSUPP; 293 } 294 295 MLX5_SET(teardown_hca_in, in, opcode, MLX5_CMD_OP_TEARDOWN_HCA); 296 MLX5_SET(teardown_hca_in, in, profile, 297 MLX5_TEARDOWN_HCA_IN_PROFILE_PREPARE_FAST_TEARDOWN); 298 299 ret = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); 300 if (ret) 301 return ret; 302 303 state = MLX5_GET(teardown_hca_out, out, state); 304 if (state == MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL) { 305 mlx5_core_warn(dev, "teardown with fast mode failed\n"); 306 return -EIO; 307 } 308 309 mlx5_set_nic_state(dev, MLX5_NIC_IFC_DISABLED); 310 311 /* Loop until device state turns to disable */ 312 end = jiffies + msecs_to_jiffies(delay_ms); 313 do { 314 if (mlx5_get_nic_state(dev) == MLX5_NIC_IFC_DISABLED) 315 break; 316 317 pause("W", 1); 318 } while (!time_after(jiffies, end)); 319 320 if (mlx5_get_nic_state(dev) != MLX5_NIC_IFC_DISABLED) { 321 dev_err(&dev->pdev->dev, "NIC IFC still %d after %ums.\n", 322 mlx5_get_nic_state(dev), delay_ms); 323 return -EIO; 324 } 325 return 0; 326} 327 328int mlx5_core_set_dc_cnak_trace(struct mlx5_core_dev *dev, int enable, 329 u64 addr) 330{ 331 u32 in[MLX5_ST_SZ_DW(set_dc_cnak_trace_in)] = {0}; 332 u32 out[MLX5_ST_SZ_DW(set_dc_cnak_trace_out)] = {0}; 333 __be64 be_addr; 334 void *pas; 335 336 MLX5_SET(set_dc_cnak_trace_in, in, opcode, MLX5_CMD_OP_SET_DC_CNAK_TRACE); 337 MLX5_SET(set_dc_cnak_trace_in, in, enable, enable); 338 pas = MLX5_ADDR_OF(set_dc_cnak_trace_in, in, pas); 339 be_addr = cpu_to_be64(addr); 340 memcpy(MLX5_ADDR_OF(cmd_pas, pas, pa_h), &be_addr, sizeof(be_addr)); 341 342 return mlx5_cmd_exec(dev, &in, sizeof(in), &out, sizeof(out)); 343} 344