1290650Shselasky/*-
2337115Shselasky * Copyright (c) 2013-2017, Mellanox Technologies, Ltd.  All rights reserved.
3290650Shselasky *
4290650Shselasky * Redistribution and use in source and binary forms, with or without
5290650Shselasky * modification, are permitted provided that the following conditions
6290650Shselasky * are met:
7290650Shselasky * 1. Redistributions of source code must retain the above copyright
8290650Shselasky *    notice, this list of conditions and the following disclaimer.
9290650Shselasky * 2. Redistributions in binary form must reproduce the above copyright
10290650Shselasky *    notice, this list of conditions and the following disclaimer in the
11290650Shselasky *    documentation and/or other materials provided with the distribution.
12290650Shselasky *
13290650Shselasky * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
14290650Shselasky * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15290650Shselasky * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16290650Shselasky * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17290650Shselasky * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18290650Shselasky * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19290650Shselasky * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20290650Shselasky * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21290650Shselasky * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22290650Shselasky * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23290650Shselasky * SUCH DAMAGE.
24290650Shselasky *
25290650Shselasky * $FreeBSD: stable/11/sys/dev/mlx5/cq.h 368222 2020-12-01 12:52:15Z hselasky $
26290650Shselasky */
27290650Shselasky
28290650Shselasky#ifndef MLX5_CORE_CQ_H
29290650Shselasky#define MLX5_CORE_CQ_H
30290650Shselasky
31290650Shselasky#include <rdma/ib_verbs.h>
32290650Shselasky#include <dev/mlx5/driver.h>
33290650Shselasky#include <dev/mlx5/mlx5_ifc.h>
34290650Shselasky
35290650Shselasky
36290650Shselaskystruct mlx5_core_cq {
37290650Shselasky	u32			cqn;
38290650Shselasky	int			cqe_sz;
39290650Shselasky	__be32		       *set_ci_db;
40290650Shselasky	__be32		       *arm_db;
41290650Shselasky	atomic_t		refcount;
42290650Shselasky	struct completion	free;
43290650Shselasky	unsigned		vector;
44290650Shselasky	int			irqn;
45290650Shselasky	void (*comp)		(struct mlx5_core_cq *);
46290650Shselasky	void (*event)		(struct mlx5_core_cq *, int);
47290650Shselasky	struct mlx5_uar	       *uar;
48290650Shselasky	u32			cons_index;
49290650Shselasky	unsigned		arm_sn;
50290650Shselasky	struct mlx5_rsc_debug	*dbg;
51290650Shselasky	int			pid;
52306233Shselasky	int			reset_notify_added;
53306233Shselasky	struct list_head	reset_notify;
54290650Shselasky};
55290650Shselasky
56290650Shselasky
57290650Shselaskyenum {
58290650Shselasky	MLX5_CQE_SYNDROME_LOCAL_LENGTH_ERR		= 0x01,
59290650Shselasky	MLX5_CQE_SYNDROME_LOCAL_QP_OP_ERR		= 0x02,
60290650Shselasky	MLX5_CQE_SYNDROME_LOCAL_PROT_ERR		= 0x04,
61290650Shselasky	MLX5_CQE_SYNDROME_WR_FLUSH_ERR			= 0x05,
62290650Shselasky	MLX5_CQE_SYNDROME_MW_BIND_ERR			= 0x06,
63290650Shselasky	MLX5_CQE_SYNDROME_BAD_RESP_ERR			= 0x10,
64290650Shselasky	MLX5_CQE_SYNDROME_LOCAL_ACCESS_ERR		= 0x11,
65290650Shselasky	MLX5_CQE_SYNDROME_REMOTE_INVAL_REQ_ERR		= 0x12,
66290650Shselasky	MLX5_CQE_SYNDROME_REMOTE_ACCESS_ERR		= 0x13,
67290650Shselasky	MLX5_CQE_SYNDROME_REMOTE_OP_ERR			= 0x14,
68290650Shselasky	MLX5_CQE_SYNDROME_TRANSPORT_RETRY_EXC_ERR	= 0x15,
69290650Shselasky	MLX5_CQE_SYNDROME_RNR_RETRY_EXC_ERR		= 0x16,
70290650Shselasky	MLX5_CQE_SYNDROME_REMOTE_ABORTED_ERR		= 0x22,
71290650Shselasky};
72290650Shselasky
73290650Shselaskyenum {
74290650Shselasky	MLX5_CQE_OWNER_MASK	= 1,
75290650Shselasky	MLX5_CQE_REQ		= 0,
76290650Shselasky	MLX5_CQE_RESP_WR_IMM	= 1,
77290650Shselasky	MLX5_CQE_RESP_SEND	= 2,
78290650Shselasky	MLX5_CQE_RESP_SEND_IMM	= 3,
79290650Shselasky	MLX5_CQE_RESP_SEND_INV	= 4,
80290650Shselasky	MLX5_CQE_RESIZE_CQ	= 5,
81290650Shselasky	MLX5_CQE_SIG_ERR	= 12,
82290650Shselasky	MLX5_CQE_REQ_ERR	= 13,
83290650Shselasky	MLX5_CQE_RESP_ERR	= 14,
84290650Shselasky	MLX5_CQE_INVALID	= 15,
85290650Shselasky};
86290650Shselasky
87290650Shselaskyenum {
88290650Shselasky	MLX5_CQ_MODIFY_PERIOD	= 1 << 0,
89290650Shselasky	MLX5_CQ_MODIFY_COUNT	= 1 << 1,
90290650Shselasky	MLX5_CQ_MODIFY_OVERRUN	= 1 << 2,
91321995Shselasky	MLX5_CQ_MODIFY_PERIOD_MODE = 1 << 4,
92290650Shselasky};
93290650Shselasky
94290650Shselaskyenum {
95290650Shselasky	MLX5_CQ_OPMOD_RESIZE		= 1,
96290650Shselasky	MLX5_MODIFY_CQ_MASK_LOG_SIZE	= 1 << 0,
97290650Shselasky	MLX5_MODIFY_CQ_MASK_PG_OFFSET	= 1 << 1,
98290650Shselasky	MLX5_MODIFY_CQ_MASK_PG_SIZE	= 1 << 2,
99290650Shselasky};
100290650Shselasky
101290650Shselaskystruct mlx5_cq_modify_params {
102290650Shselasky	int	type;
103290650Shselasky	union {
104290650Shselasky		struct {
105290650Shselasky			u32	page_offset;
106290650Shselasky			u8	log_cq_size;
107290650Shselasky		} resize;
108290650Shselasky
109290650Shselasky		struct {
110290650Shselasky		} moder;
111290650Shselasky
112290650Shselasky		struct {
113290650Shselasky		} mapping;
114290650Shselasky	} params;
115290650Shselasky};
116290650Shselasky
117290650Shselaskystatic inline int cqe_sz_to_mlx_sz(u8 size)
118290650Shselasky{
119290650Shselasky	return size == 64 ? CQE_SIZE_64 : CQE_SIZE_128;
120290650Shselasky}
121290650Shselasky
122290650Shselaskystatic inline void mlx5_cq_set_ci(struct mlx5_core_cq *cq)
123290650Shselasky{
124290650Shselasky	*cq->set_ci_db = cpu_to_be32(cq->cons_index & 0xffffff);
125290650Shselasky}
126290650Shselasky
127290650Shselaskyenum {
128290650Shselasky	MLX5_CQ_DB_REQ_NOT_SOL		= 1 << 24,
129290650Shselasky	MLX5_CQ_DB_REQ_NOT		= 0 << 24
130290650Shselasky};
131290650Shselasky
132290650Shselaskystatic inline void mlx5_cq_arm(struct mlx5_core_cq *cq, u32 cmd,
133290650Shselasky			       void __iomem *uar_page,
134290650Shselasky			       spinlock_t *doorbell_lock,
135290650Shselasky			       u32 cons_index)
136290650Shselasky{
137290650Shselasky	__be32 doorbell[2];
138290650Shselasky	u32 sn;
139290650Shselasky	u32 ci;
140290650Shselasky
141290650Shselasky	sn = cq->arm_sn & 3;
142290650Shselasky	ci = cons_index & 0xffffff;
143290650Shselasky
144290650Shselasky	*cq->arm_db = cpu_to_be32(sn << 28 | cmd | ci);
145290650Shselasky
146290650Shselasky	/* Make sure that the doorbell record in host memory is
147290650Shselasky	 * written before ringing the doorbell via PCI MMIO.
148290650Shselasky	 */
149290650Shselasky	wmb();
150290650Shselasky
151290650Shselasky	doorbell[0] = cpu_to_be32(sn << 28 | cmd | ci);
152290650Shselasky	doorbell[1] = cpu_to_be32(cq->cqn);
153290650Shselasky
154290650Shselasky	mlx5_write64(doorbell, uar_page + MLX5_CQ_DOORBELL, doorbell_lock);
155290650Shselasky}
156290650Shselasky
157290650Shselaskyint mlx5_init_cq_table(struct mlx5_core_dev *dev);
158290650Shselaskyvoid mlx5_cleanup_cq_table(struct mlx5_core_dev *dev);
159290650Shselaskyint mlx5_core_create_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
160368222Shselasky			u32 *in, int inlen, u32 *out, int outlen);
161290650Shselaskyint mlx5_core_destroy_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq);
162290650Shselaskyint mlx5_core_query_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
163331807Shselasky		       u32 *out, int outlen);
164290650Shselaskyint mlx5_core_modify_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
165331807Shselasky			u32 *in, int inlen);
166290650Shselaskyint mlx5_core_modify_cq_moderation(struct mlx5_core_dev *dev,
167290650Shselasky				   struct mlx5_core_cq *cq, u16 cq_period,
168290650Shselasky				   u16 cq_max_count);
169321995Shselaskyint mlx5_core_modify_cq_moderation_mode(struct mlx5_core_dev *dev,
170321995Shselasky					struct mlx5_core_cq *cq,
171321995Shselasky					u16 cq_period,
172321995Shselasky					u16 cq_max_count,
173321995Shselasky					u8 cq_mode);
174290650Shselaskyint mlx5_debug_cq_add(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq);
175290650Shselaskyvoid mlx5_debug_cq_remove(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq);
176290650Shselasky
177290650Shselasky#endif /* MLX5_CORE_CQ_H */
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