smcphy.c revision 213364 
1/*-
2 * Copyright (c) 2006 Benno Rice.  All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 *    notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 *    notice, this list of conditions and the following disclaimer in the
11 *    documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 */
24
25#include <sys/cdefs.h>
26__FBSDID("$FreeBSD: head/sys/dev/mii/smcphy.c 213364 2010-10-02 18:53:12Z marius $");
27
28/*
29 * Driver for the internal PHY on the SMSC LAN91C111.
30 */
31
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/kernel.h>
35#include <sys/socket.h>
36#include <sys/errno.h>
37#include <sys/module.h>
38#include <sys/bus.h>
39#include <sys/malloc.h>
40
41#include <machine/bus.h>
42
43#include <net/if.h>
44#include <net/if_media.h>
45
46#include <dev/mii/mii.h>
47#include <dev/mii/miivar.h>
48#include "miidevs.h"
49
50#include "miibus_if.h"
51
52static int	smcphy_probe(device_t);
53static int	smcphy_attach(device_t);
54
55static int	smcphy_service(struct mii_softc *, struct mii_data *, int);
56static int	smcphy_reset(struct mii_softc *);
57static void	smcphy_auto(struct mii_softc *);
58
59static device_method_t smcphy_methods[] = {
60	/* device interface */
61	DEVMETHOD(device_probe,		smcphy_probe),
62	DEVMETHOD(device_attach,	smcphy_attach),
63	DEVMETHOD(device_detach,	mii_phy_detach),
64	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
65
66	{ 0, 0 }
67};
68
69static devclass_t smcphy_devclass;
70
71static driver_t smcphy_driver = {
72	"smcphy",
73	smcphy_methods,
74	sizeof(struct mii_softc)
75};
76
77DRIVER_MODULE(smcphy, miibus, smcphy_driver, smcphy_devclass, 0, 0);
78
79static int
80smcphy_probe(device_t dev)
81{
82	struct	mii_attach_args *ma;
83
84	ma = device_get_ivars(dev);
85
86	if (MII_OUI(ma->mii_id1, ma->mii_id2) != MII_OUI_SMSC ||
87	    MII_MODEL(ma->mii_id2) != MII_MODEL_SMSC_LAN83C183)
88		return (ENXIO);
89
90	device_set_desc(dev, MII_STR_SMSC_LAN83C183);
91
92	return (0);
93}
94
95static int
96smcphy_attach(device_t dev)
97{
98	struct	mii_softc *sc;
99	struct	mii_attach_args *ma;
100	struct	mii_data *mii;
101
102	sc = device_get_softc(dev);
103	ma = device_get_ivars(dev);
104	sc->mii_dev = device_get_parent(dev);
105	mii = ma->mii_data;
106	LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
107
108	sc->mii_inst = mii->mii_instance++;
109	sc->mii_phy = ma->mii_phyno;
110	sc->mii_service = smcphy_service;
111	sc->mii_pdata = mii;
112
113	sc->mii_flags |= MIIF_NOISOLATE;
114
115	if (smcphy_reset(sc) != 0) {
116		device_printf(dev, "reset failed\n");
117	}
118
119	/* Mask interrupts, we poll instead. */
120	PHY_WRITE(sc, 0x1e, 0xffc0);
121
122	sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
123	device_printf(dev, " ");
124	mii_add_media(sc);
125	printf("\n");
126
127	MIIBUS_MEDIAINIT(sc->mii_dev);
128	mii_phy_setmedia(sc);
129
130	return (0);
131}
132
133static int
134smcphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
135{
136        struct	ifmedia_entry *ife;
137        int	reg;
138
139	ife = mii->mii_media.ifm_cur;
140
141        switch (cmd) {
142        case MII_POLLSTAT:
143                break;
144
145        case MII_MEDIACHG:
146                /*
147                 * If the interface is not up, don't do anything.
148                 */
149                if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
150                        break;
151
152		switch (IFM_SUBTYPE(ife->ifm_media)) {
153		case IFM_AUTO:
154			smcphy_auto(sc);
155			break;
156
157		default:
158                	mii_phy_setmedia(sc);
159			break;
160		}
161
162                break;
163
164        case MII_TICK:
165		if ((mii->mii_ifp->if_flags & IFF_UP) == 0) {
166			return (0);
167		}
168
169		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
170			break;
171		}
172
173		/* I have no idea why BMCR_ISO gets set. */
174		reg = PHY_READ(sc, MII_BMCR);
175		if (reg & BMCR_ISO) {
176			PHY_WRITE(sc, MII_BMCR, reg & ~BMCR_ISO);
177		}
178
179		reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
180		if (reg & BMSR_LINK) {
181			sc->mii_ticks = 0;
182			break;
183		}
184
185		if (++sc->mii_ticks <= MII_ANEGTICKS) {
186			break;
187		}
188
189		sc->mii_ticks = 0;
190		if (smcphy_reset(sc) != 0) {
191			device_printf(sc->mii_dev, "reset failed\n");
192		}
193		smcphy_auto(sc);
194                break;
195        }
196
197        /* Update the media status. */
198        ukphy_status(sc);
199
200        /* Callback if something changed. */
201        mii_phy_update(sc, cmd);
202        return (0);
203}
204
205static int
206smcphy_reset(struct mii_softc *sc)
207{
208	u_int	bmcr;
209	int	timeout;
210
211	PHY_WRITE(sc, MII_BMCR, BMCR_RESET);
212
213	for (timeout = 2; timeout > 0; timeout--) {
214		DELAY(50000);
215		bmcr = PHY_READ(sc, MII_BMCR);
216		if ((bmcr & BMCR_RESET) == 0)
217			break;
218	}
219
220	if (bmcr & BMCR_RESET) {
221		return (EIO);
222	}
223
224	PHY_WRITE(sc, MII_BMCR, 0x3000);
225	return (0);
226}
227
228static void
229smcphy_auto(struct mii_softc *sc)
230{
231	uint16_t	anar;
232
233	anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) |
234	    ANAR_CSMA;
235	if (sc->mii_flags & MIIF_DOPAUSE)
236		anar |= ANAR_FC;
237	PHY_WRITE(sc, MII_ANAR, anar);
238	/* Apparently this helps. */
239	anar = PHY_READ(sc, MII_ANAR);
240	PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
241}
242