nsgphy.c revision 95673
1/* 2 * Copyright (c) 2001 Wind River Systems 3 * Copyright (c) 2001 4 * Bill Paul <wpaul@bsdi.com>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Bill Paul. 17 * 4. Neither the name of the author nor the names of any co-contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 * $FreeBSD: head/sys/dev/mii/nsgphy.c 95673 2002-04-28 20:34:20Z phk $ 34 */ 35 36/* 37 * Driver for the National Semiconductor DP83891 and DP83861 38 * 10/100/1000 PHYs. 39 * Datasheet available at: http://www.national.com/ds/DP/DP83861.pdf 40 * 41 * The DP83891 is the older NatSemi gigE PHY which isn't being sold 42 * anymore. The DP83861 is its replacement, which is an 'enhanced' 43 * firmware driven component. The major difference between the 44 * two is that the 83891 can't generate interrupts, while the 45 * 83861 can. (I think it wasn't originally designed to do this, but 46 * it can now thanks to firmware updates.) The 83861 also allows 47 * access to its internal RAM via indirect register access. 48 */ 49 50#include <sys/param.h> 51#include <sys/systm.h> 52#include <sys/kernel.h> 53#include <sys/malloc.h> 54#include <sys/socket.h> 55#include <sys/bus.h> 56 57#include <machine/clock.h> 58 59#include <net/if.h> 60#include <net/if_media.h> 61 62#include <dev/mii/mii.h> 63#include <dev/mii/miivar.h> 64#include <dev/mii/miidevs.h> 65 66#include <dev/mii/nsgphyreg.h> 67 68#include "miibus_if.h" 69 70#if !defined(lint) 71static const char rcsid[] = 72 "$FreeBSD: head/sys/dev/mii/nsgphy.c 95673 2002-04-28 20:34:20Z phk $"; 73#endif 74 75static int nsgphy_probe (device_t); 76static int nsgphy_attach (device_t); 77static int nsgphy_detach (device_t); 78 79static device_method_t nsgphy_methods[] = { 80 /* device interface */ 81 DEVMETHOD(device_probe, nsgphy_probe), 82 DEVMETHOD(device_attach, nsgphy_attach), 83 DEVMETHOD(device_detach, nsgphy_detach), 84 DEVMETHOD(device_shutdown, bus_generic_shutdown), 85 { 0, 0 } 86}; 87 88static devclass_t nsgphy_devclass; 89 90static driver_t nsgphy_driver = { 91 "nsgphy", 92 nsgphy_methods, 93 sizeof(struct mii_softc) 94}; 95 96DRIVER_MODULE(nsgphy, miibus, nsgphy_driver, nsgphy_devclass, 0, 0); 97 98static int nsgphy_service(struct mii_softc *, struct mii_data *,int); 99static void nsgphy_status(struct mii_softc *); 100static int nsgphy_mii_phy_auto(struct mii_softc *, int); 101extern void mii_phy_auto_timeout(void *); 102 103static int 104nsgphy_probe(device_t dev) 105{ 106 struct mii_attach_args *ma; 107 108 ma = device_get_ivars(dev); 109 110 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_NATSEMI) { 111 if (MII_MODEL(ma->mii_id2) == MII_MODEL_NATSEMI_DP83891) { 112 device_set_desc(dev, MII_STR_NATSEMI_DP83891); 113 return(0); 114 } 115 if (MII_MODEL(ma->mii_id2) == MII_MODEL_NATSEMI_DP83861) { 116 device_set_desc(dev, MII_STR_NATSEMI_DP83861); 117 return(0); 118 } 119 } 120 121 return(ENXIO); 122} 123 124static int 125nsgphy_attach(device_t dev) 126{ 127 struct mii_softc *sc; 128 struct mii_attach_args *ma; 129 struct mii_data *mii; 130 const char *sep = ""; 131 132 sc = device_get_softc(dev); 133 ma = device_get_ivars(dev); 134 sc->mii_dev = device_get_parent(dev); 135 mii = device_get_softc(sc->mii_dev); 136 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 137 138 sc->mii_inst = mii->mii_instance; 139 sc->mii_phy = ma->mii_phyno; 140 sc->mii_service = nsgphy_service; 141 sc->mii_pdata = mii; 142 143 sc->mii_flags |= MIIF_NOISOLATE; 144 mii->mii_instance++; 145 146#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 147#define PRINT(s) printf("%s%s", sep, s); sep = ", " 148 149 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 150 BMCR_ISO); 151#if 0 152 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst), 153 BMCR_LOOP|BMCR_S100); 154#endif 155 156 mii_phy_reset(sc); 157 158 device_printf(dev, " "); 159 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX, sc->mii_inst), 160 BMCR_S1000|BMCR_FDX); 161 PRINT("1000baseTX-FDX"); 162 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0, sc->mii_inst), 163 BMCR_S1000); 164 PRINT("1000baseTX"); 165 sc->mii_capabilities = 166 (PHY_READ(sc, MII_BMSR) | 167 (BMSR_10TFDX|BMSR_10THDX)) & ma->mii_capmask; 168 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst), 169 BMCR_S100|BMCR_FDX); 170 PRINT("100baseTX-FDX"); 171 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst), BMCR_S100); 172 PRINT("100baseTX"); 173 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst), 174 BMCR_S10|BMCR_FDX); 175 PRINT("10baseT-FDX"); 176 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst), BMCR_S10); 177 PRINT("10baseT"); 178 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0); 179 PRINT("auto"); 180 printf("\n"); 181#undef ADD 182#undef PRINT 183 184 MIIBUS_MEDIAINIT(sc->mii_dev); 185 return(0); 186} 187 188static int 189nsgphy_detach(device_t dev) 190{ 191 struct mii_softc *sc; 192 struct mii_data *mii; 193 194 sc = device_get_softc(dev); 195 mii = device_get_softc(device_get_parent(dev)); 196 if (sc->mii_flags & MIIF_DOINGAUTO) 197 untimeout(mii_phy_auto_timeout, sc, sc->mii_auto_ch); 198 sc->mii_dev = NULL; 199 LIST_REMOVE(sc, mii_list); 200 201 return(0); 202} 203 204static int 205nsgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 206{ 207 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 208 int reg; 209 210 switch (cmd) { 211 case MII_POLLSTAT: 212 /* 213 * If we're not polling our PHY instance, just return. 214 */ 215 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 216 return (0); 217 break; 218 219 case MII_MEDIACHG: 220 /* 221 * If the media indicates a different PHY instance, 222 * isolate ourselves. 223 */ 224 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 225 reg = PHY_READ(sc, MII_BMCR); 226 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 227 return (0); 228 } 229 230 /* 231 * If the interface is not up, don't do anything. 232 */ 233 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 234 break; 235 236 237 switch (IFM_SUBTYPE(ife->ifm_media)) { 238 case IFM_AUTO: 239#ifdef foo 240 /* 241 * If we're already in auto mode, just return. 242 */ 243 if (PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) 244 return (0); 245#endif 246 (void) nsgphy_mii_phy_auto(sc, 0); 247 break; 248 case IFM_1000_T: 249 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) { 250 PHY_WRITE(sc, MII_BMCR, 251 BMCR_FDX|BMCR_SPEED1); 252 } else { 253 PHY_WRITE(sc, MII_BMCR, 254 BMCR_SPEED1); 255 } 256 PHY_WRITE(sc, MII_ANAR, ANAR_CSMA); 257 258 /* 259 * When setting the link manually, one side must 260 * be the master and the other the slave. However 261 * ifmedia doesn't give us a good way to specify 262 * this, so we fake it by using one of the LINK 263 * flags. If LINK0 is set, we program the PHY to 264 * be a master, otherwise it's a slave. 265 */ 266 if ((mii->mii_ifp->if_flags & IFF_LINK0)) { 267 PHY_WRITE(sc, MII_100T2CR, 268 GTCR_MAN_MS|GTCR_ADV_MS); 269 } else { 270 PHY_WRITE(sc, MII_100T2CR, GTCR_MAN_MS); 271 } 272 break; 273 case IFM_100_T4: 274 /* 275 * XXX Not supported as a manual setting right now. 276 */ 277 return (EINVAL); 278 case IFM_NONE: 279 PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN); 280 break; 281 default: 282 /* 283 * BMCR data is stored in the ifmedia entry. 284 */ 285 PHY_WRITE(sc, MII_ANAR, mii_anar(ife->ifm_media)); 286 PHY_WRITE(sc, MII_BMCR, ife->ifm_data); 287 break; 288 } 289 break; 290 291 case MII_TICK: 292 /* 293 * If we're not currently selected, just return. 294 */ 295 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 296 return (0); 297 298 /* 299 * Is the interface even up? 300 */ 301 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 302 return (0); 303 304 /* 305 * Only used for autonegotiation. 306 */ 307 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 308 break; 309 310 /* 311 * Check to see if we have link. 312 */ 313 reg = PHY_READ(sc, NSGPHY_MII_PHYSUP); 314 if (reg & NSGPHY_PHYSUP_LNKSTS) 315 break; 316 317 /* 318 * Only retry autonegotiation every 5 seconds. 319 * Actually, for gigE PHYs, we should wait longer, since 320 * 5 seconds is the mimimum time the documentation 321 * says to wait for a 1000mbps link to be established. 322 */ 323 if (++sc->mii_ticks != 10) 324 return (0); 325 326 sc->mii_ticks = 0; 327 328 mii_phy_reset(sc); 329 if (nsgphy_mii_phy_auto(sc, 0) == EJUSTRETURN) 330 return(0); 331 break; 332 } 333 334 /* Update the media status. */ 335 nsgphy_status(sc); 336 337 /* Callback if something changed. */ 338 mii_phy_update(sc, cmd); 339 return (0); 340} 341 342static void 343nsgphy_status(struct mii_softc *sc) 344{ 345 struct mii_data *mii = sc->mii_pdata; 346 int bmsr, bmcr, physup, anlpar, gstat; 347 348 mii->mii_media_status = IFM_AVALID; 349 mii->mii_media_active = IFM_ETHER; 350 351 bmsr = PHY_READ(sc, MII_BMSR); 352 353 physup = PHY_READ(sc, NSGPHY_MII_PHYSUP); 354 355 if (physup & NSGPHY_PHYSUP_LNKSTS) 356 mii->mii_media_status |= IFM_ACTIVE; 357 358 bmcr = PHY_READ(sc, MII_BMCR); 359 360 if (bmcr & BMCR_LOOP) 361 mii->mii_media_active |= IFM_LOOP; 362 363 if (bmcr & BMCR_AUTOEN) { 364 /* 365 * The media status bits are only valid if autonegotiation 366 * has completed (or it's disabled). 367 */ 368 if ((bmsr & BMSR_ACOMP) == 0) { 369 /* Erg, still trying, I guess... */ 370 mii->mii_media_active |= IFM_NONE; 371 return; 372 } 373 anlpar = PHY_READ(sc, MII_ANLPAR); 374 gstat = PHY_READ(sc, MII_100T2SR); 375 if (gstat & GTSR_LP_1000TFDX) 376 mii->mii_media_active |= IFM_1000_T|IFM_FDX; 377 else if (gstat & GTSR_LP_1000THDX) 378 mii->mii_media_active |= IFM_1000_T|IFM_HDX; 379 else if (anlpar & ANLPAR_T4) 380 mii->mii_media_active |= IFM_100_T4; 381 else if (anlpar & ANLPAR_TX_FD) 382 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 383 else if (anlpar & ANLPAR_TX) 384 mii->mii_media_active |= IFM_100_TX; 385 else if (anlpar & ANLPAR_10_FD) 386 mii->mii_media_active |= IFM_10_T|IFM_FDX; 387 else if (anlpar & ANLPAR_10) 388 mii->mii_media_active |= IFM_10_T|IFM_HDX; 389 else 390 mii->mii_media_active |= IFM_NONE; 391 return; 392 } 393 394 switch(bmcr & (BMCR_SPEED1|BMCR_SPEED0)) { 395 case BMCR_S1000: 396 mii->mii_media_active |= IFM_1000_T; 397 break; 398 case BMCR_S100: 399 mii->mii_media_active |= IFM_100_TX; 400 break; 401 case BMCR_S10: 402 mii->mii_media_active |= IFM_10_T; 403 break; 404 default: 405 break; 406 } 407 408 if (bmcr & BMCR_FDX) 409 mii->mii_media_active |= IFM_FDX; 410 else 411 mii->mii_media_active |= IFM_HDX; 412 413 return; 414} 415 416 417static int 418nsgphy_mii_phy_auto(struct mii_softc *mii, int waitfor) 419{ 420 int bmsr, ktcr = 0, i; 421 422 if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) { 423 mii_phy_reset(mii); 424 PHY_WRITE(mii, MII_BMCR, 0); 425 DELAY(1000); 426 ktcr = PHY_READ(mii, MII_100T2CR); 427 PHY_WRITE(mii, MII_100T2CR, ktcr | 428 (GTCR_ADV_1000TFDX|GTCR_ADV_1000THDX)); 429 ktcr = PHY_READ(mii, MII_100T2CR); 430 DELAY(1000); 431 PHY_WRITE(mii, MII_ANAR, 432 BMSR_MEDIA_TO_ANAR(mii->mii_capabilities) | ANAR_CSMA); 433 DELAY(1000); 434 PHY_WRITE(mii, MII_BMCR, 435 BMCR_AUTOEN | BMCR_STARTNEG); 436 } 437 438 if (waitfor) { 439 /* Wait 500ms for it to complete. */ 440 for (i = 0; i < 500; i++) { 441 if ((bmsr = PHY_READ(mii, MII_BMSR)) & BMSR_ACOMP) 442 return (0); 443 DELAY(1000); 444#if 0 445 if ((bmsr & BMSR_ACOMP) == 0) 446 printf("%s: autonegotiation failed to complete\n", 447 mii->mii_dev.dv_xname); 448#endif 449 } 450 451 /* 452 * Don't need to worry about clearing MIIF_DOINGAUTO. 453 * If that's set, a timeout is pending, and it will 454 * clear the flag. 455 */ 456 return (EIO); 457 } 458 459 /* 460 * Just let it finish asynchronously. This is for the benefit of 461 * the tick handler driving autonegotiation. Don't want 500ms 462 * delays all the time while the system is running! 463 */ 464 if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) { 465 mii->mii_flags |= MIIF_DOINGAUTO; 466 mii->mii_auto_ch = timeout(mii_phy_auto_timeout, mii, hz >> 1); 467 } 468 return (EJUSTRETURN); 469} 470