lio_iq.h revision 325618
155714Skris/* 255714Skris * BSD LICENSE 355714Skris * 455714Skris * Copyright(c) 2017 Cavium, Inc.. All rights reserved. 555714Skris * All rights reserved. 655714Skris * 755714Skris * Redistribution and use in source and binary forms, with or without 8280304Sjkim * modification, are permitted provided that the following conditions 955714Skris * are met: 1055714Skris * 1155714Skris * * Redistributions of source code must retain the above copyright 1255714Skris * notice, this list of conditions and the following disclaimer. 1355714Skris * * Redistributions in binary form must reproduce the above copyright 1455714Skris * notice, this list of conditions and the following disclaimer in 15280304Sjkim * the documentation and/or other materials provided with the 1655714Skris * distribution. 1755714Skris * * Neither the name of Cavium, Inc. nor the names of its 1855714Skris * contributors may be used to endorse or promote products derived 1955714Skris * from this software without specific prior written permission. 2055714Skris * 2155714Skris * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22280304Sjkim * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2355714Skris * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2455714Skris * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2555714Skris * OWNER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2655714Skris * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2755714Skris * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2855714Skris * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2955714Skris * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3055714Skris * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3155714Skris * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3255714Skris */ 3355714Skris/*$FreeBSD: stable/11/sys/dev/liquidio/base/lio_iq.h 325618 2017-11-09 19:52:56Z sbruno $*/ 3455714Skris 3555714Skris/* \file lio_iq.h 3655714Skris * \brief Host Driver: Implementation of Octeon input queues. "Input" is 37280304Sjkim * with respect to the Octeon device on the NIC. From this driver's 3855714Skris * point of view they are egress queues. 3955714Skris */ 40280304Sjkim 4155714Skris#ifndef __LIO_IQ_H__ 4255714Skris#define __LIO_IQ_H__ 4355714Skris 4455714Skris#define LIO_IQ_SEND_OK 0 4555714Skris#define LIO_IQ_SEND_STOP 1 4655714Skris#define LIO_IQ_SEND_FAILED -1 4755714Skris 4855714Skris/*------------------------- INSTRUCTION QUEUE --------------------------*/ 4955714Skris 5055714Skris#define LIO_REQTYPE_NONE 0 5155714Skris#define LIO_REQTYPE_NORESP_NET 1 52280304Sjkim#define LIO_REQTYPE_NORESP_NET_SG 2 5355714Skris#define LIO_REQTYPE_RESP_NET 3 5455714Skris#define LIO_REQTYPE_SOFT_COMMAND 4 5555714Skris 5655714Skris/* 5755714Skris * This structure is used by NIC driver to store information required 5855714Skris * to free the mbuf when the packet has been fetched by Octeon. 5955714Skris * Bytes offset below assume worst-case of a 64-bit system. 6055714Skris */ 61160814Ssimonstruct lio_mbuf_free_info { 62238405Sjkim /* Pointer to mbuf. */ 63238405Sjkim struct mbuf *mb; 64280304Sjkim 65160814Ssimon /* Pointer to gather list. */ 66280304Sjkim struct lio_gather *g; 67280304Sjkim 68280304Sjkim bus_dmamap_t map; 69280304Sjkim}; 70280304Sjkim 71280304Sjkimstruct lio_request_list { 7255714Skris uint32_t reqtype; 73109998Smarkm void *buf; 74280304Sjkim bus_dmamap_t map; 75280304Sjkim struct lio_mbuf_free_info finfo; 76280304Sjkim}; 77109998Smarkm 78280304Sjkim/* Input Queue statistics. Each input queue has four stats fields. */ 79280304Sjkimstruct lio_iq_stats { 80280304Sjkim uint64_t instr_posted; /**< Instructions posted to this queue. */ 81280304Sjkim uint64_t instr_processed; /**< Instructions processed in this queue. */ 82109998Smarkm uint64_t instr_dropped; /**< Instructions that could not be processed */ 83280304Sjkim uint64_t bytes_sent; /**< Bytes sent through this queue. */ 84280304Sjkim uint64_t sgentry_sent; /**< Gather entries sent through this queue. */ 85280304Sjkim uint64_t tx_done; /**< Num of packets sent to network. */ 86280304Sjkim uint64_t tx_iq_busy; /**< Numof times this iq was found to be full. */ 87109998Smarkm uint64_t tx_dropped; /**< Numof pkts dropped dueto xmitpath errors. */ 88280304Sjkim uint64_t tx_tot_bytes; /**< Total count of bytes sento to network. */ 89280304Sjkim uint64_t tx_gso; /* count of tso */ 90280304Sjkim uint64_t tx_vxlan; /* tunnel */ 91280304Sjkim uint64_t tx_dmamap_fail; 92280304Sjkim uint64_t tx_restart; 93280304Sjkim uint64_t mbuf_defrag_failed; 94280304Sjkim}; 95280304Sjkim 96280304Sjkim/* 97280304Sjkim * The instruction (input) queue. 98280304Sjkim * The input queue is used to post raw (instruction) mode data or packet 99280304Sjkim * data to Octeon device from the host. Each input queue for 100280304Sjkim * a Octeon device has one such structure to represent it. 101280304Sjkim */ 10255714Skrisstruct lio_instr_queue { 103109998Smarkm struct octeon_device *oct_dev; 104280304Sjkim 105280304Sjkim /* A lock to protect access to the input ring. */ 106280304Sjkim struct mtx lock; 107280304Sjkim 108160814Ssimon /* A lock to protect while enqueue to the input ring. */ 109280304Sjkim struct mtx enq_lock; 110160814Ssimon 111280304Sjkim /* A lock to protect while posting on the ring. */ 112280304Sjkim struct mtx post_lock; 113280304Sjkim 114280304Sjkim uint32_t pkt_in_done; 115160814Ssimon 116280304Sjkim /* A lock to protect access to the input ring. */ 117280304Sjkim struct mtx iq_flush_running_lock; 118280304Sjkim 119280304Sjkim /* Flag that indicates if the queue uses 64 byte commands. */ 120160814Ssimon uint32_t iqcmd_64B:1; 121160814Ssimon 122160814Ssimon /* Queue info. */ 123160814Ssimon union octeon_txpciq txpciq; 124160814Ssimon 125280304Sjkim uint32_t rsvd:17; 126280304Sjkim 127280304Sjkim uint32_t status:8; 128280304Sjkim 129160814Ssimon /* Maximum no. of instructions in this queue. */ 130280304Sjkim uint32_t max_count; 131280304Sjkim 132280304Sjkim /* Index in input ring where the driver should write the next packet */ 133280304Sjkim uint32_t host_write_index; 134160814Ssimon 135280304Sjkim /* 136280304Sjkim * Index in input ring where Octeon is expected to read the next 137280304Sjkim * packet. 138280304Sjkim */ 139280304Sjkim uint32_t octeon_read_index; 140280304Sjkim 141280304Sjkim /* 142280304Sjkim * This index aids in finding the window in the queue where Octeon 143280304Sjkim * has read the commands. 144280304Sjkim */ 145280304Sjkim uint32_t flush_index; 146280304Sjkim 147280304Sjkim /* This field keeps track of the instructions pending in this queue. */ 148280304Sjkim volatile int instr_pending; 149280304Sjkim 150160814Ssimon uint32_t reset_instr_cnt; 151280304Sjkim 152280304Sjkim /* Pointer to the Virtual Base addr of the input ring. */ 153280304Sjkim uint8_t *base_addr; 154160814Ssimon bus_dma_tag_t txtag; 155280304Sjkim 156280304Sjkim struct lio_request_list *request_list; 157280304Sjkim 158280304Sjkim struct buf_ring *br; 159280304Sjkim 160280304Sjkim /* Octeon doorbell register for the ring. */ 161280304Sjkim uint32_t doorbell_reg; 162280304Sjkim 163280304Sjkim /* Octeon instruction count register for this ring. */ 164280304Sjkim uint32_t inst_cnt_reg; 165280304Sjkim 166280304Sjkim /* Number of instructions pending to be posted to Octeon. */ 167280304Sjkim uint32_t fill_cnt; 168280304Sjkim 169160814Ssimon /* The last time that the doorbell was rung. */ 170160814Ssimon uint64_t last_db_time; 171280304Sjkim 172280304Sjkim /* 173280304Sjkim * The doorbell timeout. If the doorbell was not rung for this time 174280304Sjkim * and fill_cnt is non-zero, ring the doorbell again. 175160814Ssimon */ 176280304Sjkim uint32_t db_timeout; 177160814Ssimon 178280304Sjkim /* Statistics for this input queue. */ 179280304Sjkim struct lio_iq_stats stats; 180280304Sjkim 181280304Sjkim /* DMA mapped base address of the input descriptor ring. */ 182160814Ssimon uint64_t base_addr_dma; 183280304Sjkim 184280304Sjkim /* Application context */ 185280304Sjkim void *app_ctx; 186280304Sjkim 187160814Ssimon /* network stack queue index */ 188280304Sjkim int q_index; 189280304Sjkim 190280304Sjkim /* os ifidx associated with this queue */ 191280304Sjkim int ifidx; 192160814Ssimon 193280304Sjkim}; 194280304Sjkim 195280304Sjkim/*---------------------- INSTRUCTION FORMAT ----------------------------*/ 196280304Sjkim 197160814Ssimonstruct lio_instr3_64B { 198280304Sjkim /* Pointer where the input data is available. */ 199280304Sjkim uint64_t dptr; 200280304Sjkim 201280304Sjkim /* Instruction Header. */ 202280304Sjkim uint64_t ih3; 203280304Sjkim 204280304Sjkim /* Instruction Header. */ 205280304Sjkim uint64_t pki_ih3; 206280304Sjkim 207280304Sjkim /* Input Request Header. */ 208280304Sjkim uint64_t irh; 209280304Sjkim 210280304Sjkim /* opcode/subcode specific parameters */ 211280304Sjkim uint64_t ossp[2]; 212280304Sjkim 213160814Ssimon /* Return Data Parameters */ 214280304Sjkim uint64_t rdp; 215280304Sjkim 216280304Sjkim /* 217160814Ssimon * Pointer where the response for a RAW mode packet will be written 218280304Sjkim * by Octeon. 219280304Sjkim */ 220280304Sjkim uint64_t rptr; 221280304Sjkim 222280304Sjkim}; 223280304Sjkim 224280304Sjkimunion lio_instr_64B { 225280304Sjkim struct lio_instr3_64B cmd3; 226280304Sjkim}; 227280304Sjkim 228280304Sjkim/* The size of each buffer in soft command buffer pool */ 229280304Sjkim#define LIO_SOFT_COMMAND_BUFFER_SIZE 2048 230280304Sjkim 231280304Sjkimstruct lio_soft_command { 232160814Ssimon /* Soft command buffer info. */ 233160814Ssimon struct lio_stailq_node node; 234280304Sjkim uint64_t dma_addr; 235280304Sjkim uint32_t size; 236280304Sjkim 237280304Sjkim /* Command and return status */ 238194206Ssimon union lio_instr_64B cmd; 239194206Ssimon 240#define COMPLETION_WORD_INIT 0xffffffffffffffffULL 241 uint64_t *status_word; 242 243 /* Data buffer info */ 244 void *virtdptr; 245 uint64_t dmadptr; 246 uint32_t datasize; 247 248 /* Return buffer info */ 249 void *virtrptr; 250 uint64_t dmarptr; 251 uint32_t rdatasize; 252 253 /* Context buffer info */ 254 void *ctxptr; 255 uint32_t ctxsize; 256 257 /* Time out and callback */ 258 int wait_time; 259 int timeout; 260 uint32_t iq_no; 261 void (*callback) (struct octeon_device *, uint32_t, 262 void *); 263 void *callback_arg; 264}; 265 266/* Maximum number of buffers to allocate into soft command buffer pool */ 267#define LIO_MAX_SOFT_COMMAND_BUFFERS 256 268 269/* Head of a soft command buffer pool. */ 270struct lio_sc_buffer_pool { 271 /* List structure to add delete pending entries to */ 272 struct lio_stailq_head head; 273 274 /* A lock for this response list */ 275 struct mtx lock; 276 277 volatile uint32_t alloc_buf_count; 278}; 279 280#define LIO_INCR_INSTRQUEUE_PKT_COUNT(octeon_dev_ptr, iq_no, field, count) \ 281 (((octeon_dev_ptr)->instr_queue[iq_no]->stats.field) += count) 282 283int lio_setup_sc_buffer_pool(struct octeon_device *oct); 284int lio_free_sc_buffer_pool(struct octeon_device *oct); 285struct lio_soft_command *lio_alloc_soft_command(struct octeon_device *oct, 286 uint32_t datasize, 287 uint32_t rdatasize, 288 uint32_t ctxsize); 289void lio_free_soft_command(struct octeon_device *oct, 290 struct lio_soft_command *sc); 291 292/* 293 * lio_init_instr_queue() 294 * @param octeon_dev - pointer to the octeon device structure. 295 * @param txpciq - queue to be initialized (0 <= q_no <= 3). 296 * 297 * Called at driver init time for each input queue. iq_conf has the 298 * configuration parameters for the queue. 299 * 300 * @return Success: 0 Failure: 1 301 */ 302int lio_init_instr_queue(struct octeon_device *octeon_dev, 303 union octeon_txpciq txpciq, uint32_t num_descs); 304 305/* 306 * lio_delete_instr_queue() 307 * @param octeon_dev - pointer to the octeon device structure. 308 * @param iq_no - queue to be deleted 309 * 310 * Called at driver unload time for each input queue. Deletes all 311 * allocated resources for the input queue. 312 * 313 * @return Success: 0 Failure: 1 314 */ 315int lio_delete_instr_queue(struct octeon_device *octeon_dev, 316 uint32_t iq_no); 317 318int lio_wait_for_instr_fetch(struct octeon_device *oct); 319 320int lio_process_iq_request_list(struct octeon_device *oct, 321 struct lio_instr_queue *iq, 322 uint32_t budget); 323 324int lio_send_command(struct octeon_device *oct, uint32_t iq_no, 325 uint32_t force_db, void *cmd, void *buf, 326 uint32_t datasize, uint32_t reqtype); 327 328void lio_prepare_soft_command(struct octeon_device *oct, 329 struct lio_soft_command *sc, 330 uint8_t opcode, uint8_t subcode, 331 uint32_t irh_ossp, uint64_t ossp0, 332 uint64_t ossp1); 333 334int lio_send_soft_command(struct octeon_device *oct, 335 struct lio_soft_command *sc); 336 337int lio_setup_iq(struct octeon_device *oct, int ifidx, 338 int q_index, union octeon_txpciq iq_no, 339 uint32_t num_descs); 340int lio_flush_iq(struct octeon_device *oct, struct lio_instr_queue *iq, 341 uint32_t budget); 342#endif /* __LIO_IQ_H__ */ 343