1/* 2 * BSD LICENSE 3 * 4 * Copyright(c) 2017 Cavium, Inc.. All rights reserved. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of Cavium, Inc. nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33/*$FreeBSD: stable/11/sys/dev/liquidio/base/lio_config.h 325618 2017-11-09 19:52:56Z sbruno $*/ 34 35/* \file lio_config.h 36 * \brief Host Driver: Configuration data structures for the host driver. 37 */ 38 39#ifndef __LIO_CONFIG_H__ 40#define __LIO_CONFIG_H__ 41 42/*--------------------------CONFIG VALUES------------------------*/ 43 44/* 45 * The following macros affect the way the driver data structures 46 * are generated for Octeon devices. 47 * They can be modified. 48 */ 49 50/* 51 * Maximum octeon devices defined as LIO_MAX_IF to support 52 * multiple(<= LIO_MAX_IF) Miniports 53 */ 54#define LIO_MAX_IF 128 55#define LIO_MAX_DEVICES LIO_MAX_IF 56#define LIO_MAX_MULTICAST_ADDR 32 57 58/* CN23xx IQ configuration macros */ 59#define LIO_CN23XX_PF_MAX_RINGS 64 60 61#define LIO_BR_SIZE 4096 62 63#define LIO_CN23XX_PF_MAX_INPUT_QUEUES LIO_CN23XX_PF_MAX_RINGS 64#define LIO_CN23XX_MAX_IQ_DESCRIPTORS 2048 65#define LIO_CN23XX_DEFAULT_IQ_DESCRIPTORS 512 66#define LIO_CN23XX_MIN_IQ_DESCRIPTORS 128 67#define LIO_CN23XX_DB_MIN 1 68#define LIO_CN23XX_DB_TIMEOUT 1 69 70#define LIO_CN23XX_PF_MAX_OUTPUT_QUEUES LIO_CN23XX_PF_MAX_RINGS 71#define LIO_CN23XX_MAX_OQ_DESCRIPTORS 2048 72#define LIO_CN23XX_DEFAULT_OQ_DESCRIPTORS 512 73#define LIO_CN23XX_MIN_OQ_DESCRIPTORS 128 74#define LIO_CN23XX_OQ_BUF_SIZE MCLBYTES 75#define LIO_CN23XX_OQ_PKTS_PER_INTR 128 76#define LIO_CN23XX_OQ_REFIL_THRESHOLD 16 77 78#define LIO_CN23XX_OQ_INTR_PKT 64 79#define LIO_CN23XX_OQ_INTR_TIME 100 80#define LIO_CN23XX_DEFAULT_NUM_PORTS 1 81 82#define LIO_CN23XX_CFG_IO_QUEUES LIO_CN23XX_PF_MAX_RINGS 83 84#define LIO_CN23XX_DEF_IQ_INTR_THRESHOLD 32 85#define LIO_CN23XX_PKI_MAX_FRAME_SIZE 65535 86#define LIO_CN23XX_RAW_FRONT_SIZE 48 87/* 88 * this is the max jabber value.Any packets greater than this size sent over 89 * DPI will be truncated. 90 */ 91#define LIO_CN23XX_MAX_INPUT_JABBER (LIO_CN23XX_PKI_MAX_FRAME_SIZE - \ 92 LIO_CN23XX_RAW_FRONT_SIZE) 93 94/* common OCTEON configuration macros */ 95#define LIO_64BYTE_INSTR 64 96 97#define LIO_MAX_TXQS_PER_INTF 8 98#define LIO_MAX_RXQS_PER_INTF 8 99#define LIO_DEF_TXQS_PER_INTF 4 100#define LIO_DEF_RXQS_PER_INTF 4 101 102/* Macros to get octeon config params */ 103#define LIO_GET_IQ_CFG(cfg) ((cfg)->iq) 104#define LIO_GET_IQ_MAX_Q_CFG(cfg) ((cfg)->iq.max_iqs) 105#define LIO_GET_IQ_INSTR_TYPE_CFG(cfg) ((cfg)->iq.instr_type) 106 107#define LIO_GET_IQ_INTR_PKT_CFG(cfg) ((cfg)->iq.iq_intr_pkt) 108 109#define LIO_GET_OQ_MAX_Q_CFG(cfg) ((cfg)->oq.max_oqs) 110#define LIO_GET_OQ_PKTS_PER_INTR_CFG(cfg) ((cfg)->oq.pkts_per_intr) 111#define LIO_GET_OQ_REFILL_THRESHOLD_CFG(cfg) ((cfg)->oq.refill_threshold) 112#define LIO_GET_OQ_INTR_PKT_CFG(cfg) ((cfg)->oq.oq_intr_pkt) 113#define LIO_GET_OQ_INTR_TIME_CFG(cfg) ((cfg)->oq.oq_intr_time) 114 115#define LIO_GET_NUM_NIC_PORTS_CFG(cfg) ((cfg)->num_nic_ports) 116#define LIO_GET_NUM_DEF_TX_DESCS_CFG(cfg) ((cfg)->num_def_tx_descs) 117#define LIO_GET_NUM_DEF_RX_DESCS_CFG(cfg) ((cfg)->num_def_rx_descs) 118#define LIO_GET_DEF_RX_BUF_SIZE_CFG(cfg) ((cfg)->def_rx_buf_size) 119 120#define LIO_GET_NUM_RX_DESCS_NIC_IF_CFG(cfg, idx) \ 121 ((cfg)->nic_if_cfg[idx].num_rx_descs) 122#define LIO_GET_NUM_TX_DESCS_NIC_IF_CFG(cfg, idx) \ 123 ((cfg)->nic_if_cfg[idx].num_tx_descs) 124#define LIO_GET_NUM_RX_BUF_SIZE_NIC_IF_CFG(cfg, idx) \ 125 ((cfg)->nic_if_cfg[idx].rx_buf_size) 126 127#define LIO_GET_IS_SLI_BP_ON_CFG(cfg) ((cfg)->misc.enable_sli_oq_bp) 128 129/* Max IOQs per OCTEON Link */ 130#define LIO_MAX_IOQS_PER_NICIF 64 131 132#define LIO_SET_NUM_RX_DESCS_NIC_IF(cfg, idx, value) \ 133 ((cfg)->nic_if_cfg[idx].num_rx_descs = value) 134#define LIO_SET_NUM_TX_DESCS_NIC_IF(cfg, idx, value) \ 135 ((cfg)->nic_if_cfg[idx].num_tx_descs = value) 136 137/* TX/RX process pkt budget */ 138#define LIO_DEFAULT_TX_PKTS_PROCESS_BUDGET 64 139#define LIO_DEFAULT_RX_PKTS_PROCESS_BUDGET 64 140 141enum lio_card_type { 142 LIO_23XX /* 23xx */ 143}; 144 145#define LIO_23XX_NAME "23xx" 146 147/* 148 * Structure to define the configuration attributes for each Input queue. 149 * Applicable to all Octeon processors 150 */ 151struct lio_iq_config { 152#if BYTE_ORDER == BIG_ENDIAN 153 uint64_t reserved:16; 154 155 /* Tx interrupt packets. Applicable to 23xx only */ 156 uint64_t iq_intr_pkt:16; 157 158 /* Minimum ticks to wait before checking for pending instructions. */ 159 uint64_t db_timeout:16; 160 161 /* 162 * Minimum number of commands pending to be posted to Octeon 163 * before driver hits the Input queue doorbell. 164 */ 165 uint64_t db_min:8; 166 167 /* Command size - 32 or 64 bytes */ 168 uint64_t instr_type:32; 169 170 /* 171 * Pending list size (usually set to the sum of the size of all Input 172 * queues) 173 */ 174 uint64_t pending_list_size:32; 175 176 /* Max number of IQs available */ 177 uint64_t max_iqs:8; 178 179#else /* BYTE_ORDER != BIG_ENDIAN */ 180 181 /* Max number of IQs available */ 182 uint64_t max_iqs:8; 183 184 /* 185 * Pending list size (usually set to the sum of the size of all Input 186 * queues) 187 */ 188 uint64_t pending_list_size:32; 189 190 /* Command size - 32 or 64 bytes */ 191 uint64_t instr_type:32; 192 193 /* 194 * Minimum number of commands pending to be posted to Octeon 195 * before driver hits the Input queue doorbell. 196 */ 197 uint64_t db_min:8; 198 199 /* Minimum ticks to wait before checking for pending instructions. */ 200 uint64_t db_timeout:16; 201 202 /* Tx interrupt packets. Applicable to 23xx only */ 203 uint64_t iq_intr_pkt:16; 204 205 uint64_t reserved:16; 206 207#endif /* BYTE_ORDER == BIG_ENDIAN */ 208}; 209 210/* 211 * Structure to define the configuration attributes for each Output queue. 212 * Applicable to all Octeon processors 213 */ 214struct lio_oq_config { 215#if BYTE_ORDER == BIG_ENDIAN 216 uint64_t reserved:16; 217 218 uint64_t pkts_per_intr:16; 219 220 /* 221 * Interrupt Coalescing (Time Interval). Octeon will interrupt the 222 * host if atleast one packet was sent in the time interval specified 223 * by this field. The driver uses time interval interrupt coalescing 224 * by default. The time is specified in microseconds. 225 */ 226 uint64_t oq_intr_time:16; 227 228 /* 229 * Interrupt Coalescing (Packet Count). Octeon will interrupt the host 230 * only if it sent as many packets as specified by this field. 231 * The driver 232 * usually does not use packet count interrupt coalescing. 233 */ 234 uint64_t oq_intr_pkt:16; 235 236 /* 237 * The number of buffers that were consumed during packet processing by 238 * the driver on this Output queue before the driver attempts to 239 * replenish 240 * the descriptor ring with new buffers. 241 */ 242 uint64_t refill_threshold:16; 243 244 /* Max number of OQs available */ 245 uint64_t max_oqs:8; 246 247#else /* BYTE_ORDER != BIG_ENDIAN */ 248 249 /* Max number of OQs available */ 250 uint64_t max_oqs:8; 251 252 /* 253 * The number of buffers that were consumed during packet processing by 254 * the driver on this Output queue before the driver attempts to 255 * replenish 256 * the descriptor ring with new buffers. 257 */ 258 uint64_t refill_threshold:16; 259 260 /* 261 * Interrupt Coalescing (Packet Count). Octeon will interrupt the host 262 * only if it sent as many packets as specified by this field. 263 * The driver 264 * usually does not use packet count interrupt coalescing. 265 */ 266 uint64_t oq_intr_pkt:16; 267 268 /* 269 * Interrupt Coalescing (Time Interval). Octeon will interrupt the 270 * host if atleast one packet was sent in the time interval specified 271 * by this field. The driver uses time interval interrupt coalescing 272 * by default. The time is specified in microseconds. 273 */ 274 uint64_t oq_intr_time:16; 275 276 uint64_t pkts_per_intr:16; 277 278 uint64_t reserved:16; 279#endif /* BYTE_ORDER == BIG_ENDIAN */ 280 281}; 282 283/* 284 * This structure conatins the NIC link configuration attributes, 285 * common for all the OCTEON Modles. 286 */ 287struct lio_nic_if_config { 288#if BYTE_ORDER == BIG_ENDIAN 289 uint64_t reserved:56; 290 291 uint64_t base_queue:16; 292 293 uint64_t gmx_port_id:8; 294 295 /* 296 * mbuf size, We need not change buf size even for Jumbo frames. 297 * Octeon can send jumbo frames in 4 consecutive descriptors, 298 */ 299 uint64_t rx_buf_size:16; 300 301 /* Num of desc for tx rings */ 302 uint64_t num_tx_descs:16; 303 304 /* Num of desc for rx rings */ 305 uint64_t num_rx_descs:16; 306 307 /* Actual configured value. Range could be: 1...max_rxqs */ 308 uint64_t num_rxqs:16; 309 310 /* Max Rxqs: Half for each of the two ports :max_oq/2 */ 311 uint64_t max_rxqs:16; 312 313 /* Actual configured value. Range could be: 1...max_txqs */ 314 uint64_t num_txqs:16; 315 316 /* Max Txqs: Half for each of the two ports :max_iq/2 */ 317 uint64_t max_txqs:16; 318 319#else /* BYTE_ORDER != BIG_ENDIAN */ 320 321 /* Max Txqs: Half for each of the two ports :max_iq/2 */ 322 uint64_t max_txqs:16; 323 324 /* Actual configured value. Range could be: 1...max_txqs */ 325 uint64_t num_txqs:16; 326 327 /* Max Rxqs: Half for each of the two ports :max_oq/2 */ 328 uint64_t max_rxqs:16; 329 330 /* Actual configured value. Range could be: 1...max_rxqs */ 331 uint64_t num_rxqs:16; 332 333 /* Num of desc for rx rings */ 334 uint64_t num_rx_descs:16; 335 336 /* Num of desc for tx rings */ 337 uint64_t num_tx_descs:16; 338 339 /* 340 * mbuf size, We need not change buf size even for Jumbo frames. 341 * Octeon can send jumbo frames in 4 consecutive descriptors, 342 */ 343 uint64_t rx_buf_size:16; 344 345 uint64_t gmx_port_id:8; 346 347 uint64_t base_queue:16; 348 349 uint64_t reserved:56; 350#endif /* BYTE_ORDER == BIG_ENDIAN */ 351 352}; 353 354/* 355 * Structure to define the configuration attributes for meta data. 356 * Applicable to all Octeon processors. 357 */ 358 359struct lio_misc_config { 360#if BYTE_ORDER == BIG_ENDIAN 361 /* Host link status polling period */ 362 uint64_t host_link_query_interval:32; 363 /* Oct link status polling period */ 364 uint64_t oct_link_query_interval:32; 365 366 uint64_t enable_sli_oq_bp:1; 367 /* Control IQ Group */ 368 uint64_t ctrlq_grp:4; 369 370#else /* BYTE_ORDER != BIG_ENDIAN */ 371 372 /* Control IQ Group */ 373 uint64_t ctrlq_grp:4; 374 /* BP for SLI OQ */ 375 uint64_t enable_sli_oq_bp:1; 376 /* Host link status polling period */ 377 uint64_t oct_link_query_interval:32; 378 /* Oct link status polling period */ 379 uint64_t host_link_query_interval:32; 380 381#endif /* BYTE_ORDER == BIG_ENDIAN */ 382}; 383 384/* Structure to define the configuration for all OCTEON processors. */ 385struct lio_config { 386 uint16_t card_type; 387 char *card_name; 388 389 /* Input Queue attributes. */ 390 struct lio_iq_config iq; 391 392 /* Output Queue attributes. */ 393 struct lio_oq_config oq; 394 395 /* NIC Port Configuration */ 396 struct lio_nic_if_config nic_if_cfg[LIO_MAX_IF]; 397 398 /* Miscellaneous attributes */ 399 struct lio_misc_config misc; 400 401 int num_nic_ports; 402 403 int num_def_tx_descs; 404 405 /* Num of desc for rx rings */ 406 int num_def_rx_descs; 407 408 int def_rx_buf_size; 409 410}; 411 412/* The following config values are fixed and should not be modified. */ 413/* Maximum address space to be mapped for Octeon's BAR1 index-based access. */ 414#define LIO_MAX_BAR1_MAP_INDEX 2 415 416/* 417 * Response lists - 1 ordered, 1 unordered-blocking, 1 unordered-nonblocking 418 * NoResponse Lists are now maintained with each IQ. (Dec' 2007). 419 */ 420#define LIO_MAX_RESPONSE_LISTS 4 421 422/* 423 * Opcode hash bits. The opcode is hashed on the lower 6-bits to lookup the 424 * dispatch table. 425 */ 426#define LIO_OPCODE_MASK_BITS 6 427 428/* Mask for the 6-bit lookup hash */ 429#define LIO_OPCODE_MASK 0x3f 430 431/* Size of the dispatch table. The 6-bit hash can index into 2^6 entries */ 432#define LIO_DISPATCH_LIST_SIZE BIT(LIO_OPCODE_MASK_BITS) 433 434#define LIO_MAX_INSTR_QUEUES(oct) LIO_CN23XX_PF_MAX_INPUT_QUEUES 435#define LIO_MAX_OUTPUT_QUEUES(oct) LIO_CN23XX_PF_MAX_OUTPUT_QUEUES 436 437#define LIO_MAX_POSSIBLE_INSTR_QUEUES LIO_CN23XX_PF_MAX_INPUT_QUEUES 438#define LIO_MAX_POSSIBLE_OUTPUT_QUEUES LIO_CN23XX_PF_MAX_OUTPUT_QUEUES 439#endif /* __LIO_CONFIG_H__ */ 440