1303816Ssbruno/****************************************************************************** 2303816Ssbruno 3349163Serj Copyright (c) 2013-2019, Intel Corporation 4303816Ssbruno All rights reserved. 5349163Serj 6303816Ssbruno Redistribution and use in source and binary forms, with or without 7303816Ssbruno modification, are permitted provided that the following conditions are met: 8303816Ssbruno 9303816Ssbruno 1. Redistributions of source code must retain the above copyright notice, 10303816Ssbruno this list of conditions and the following disclaimer. 11303816Ssbruno 12303816Ssbruno 2. Redistributions in binary form must reproduce the above copyright 13303816Ssbruno notice, this list of conditions and the following disclaimer in the 14303816Ssbruno documentation and/or other materials provided with the distribution. 15303816Ssbruno 16303816Ssbruno 3. Neither the name of the Intel Corporation nor the names of its 17303816Ssbruno contributors may be used to endorse or promote products derived from 18303816Ssbruno this software without specific prior written permission. 19303816Ssbruno 20303816Ssbruno THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21303816Ssbruno AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22303816Ssbruno IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23303816Ssbruno ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24303816Ssbruno LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25303816Ssbruno CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26303816Ssbruno SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27303816Ssbruno INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28303816Ssbruno CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29303816Ssbruno ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30303816Ssbruno POSSIBILITY OF SUCH DAMAGE. 31303816Ssbruno 32303816Ssbruno******************************************************************************/ 33303816Ssbruno/*$FreeBSD: stable/11/sys/dev/ixl/ixl_pf_qmgr.h 349163 2019-06-18 00:08:02Z erj $*/ 34303816Ssbruno 35303816Ssbruno 36303816Ssbruno#include "ixl_pf.h" 37303816Ssbruno 38303816Ssbruno#ifndef _IXL_PF_QMGR_H_ 39303816Ssbruno#define _IXL_PF_QMGR_H_ 40303816Ssbruno 41303816Ssbruno/* 42303816Ssbruno * Primarily manages the queues that need to be allocated to VSIs. 43303816Ssbruno * 44303816Ssbruno * Cardinality: There should only be one of these in a PF. 45303816Ssbruno * Lifetime: Created and initialized in attach(); destroyed in detach(). 46303816Ssbruno */ 47303816Ssbruno 48303816Ssbruno#define IXL_MAX_SCATTERED_QUEUES 16 49303816Ssbruno#define IXL_MAX_CONTIGUOUS_QUEUES_XL710 64 50303816Ssbruno#define IXL_MAX_CONTIGUOUS_QUEUES_X722 128 51303816Ssbruno 52303816Ssbruno/* Structures */ 53303816Ssbruno 54303816Ssbruno/* Manager */ 55303816Ssbrunostruct ixl_pf_qmgr_qinfo { 56303816Ssbruno bool allocated; 57303816Ssbruno bool tx_enabled; 58303816Ssbruno bool rx_enabled; 59303816Ssbruno bool tx_configured; 60303816Ssbruno bool rx_configured; 61303816Ssbruno}; 62303816Ssbruno 63303816Ssbrunostruct ixl_pf_qmgr { 64303816Ssbruno u16 num_queues; 65303816Ssbruno struct ixl_pf_qmgr_qinfo *qinfo; 66303816Ssbruno}; 67303816Ssbruno 68303816Ssbruno/* Tag */ 69303816Ssbrunoenum ixl_pf_qmgr_qalloc_type { 70303816Ssbruno IXL_PF_QALLOC_CONTIGUOUS, 71303816Ssbruno IXL_PF_QALLOC_SCATTERED 72303816Ssbruno}; 73303816Ssbruno 74303816Ssbrunostruct ixl_pf_qtag { 75303816Ssbruno struct ixl_pf_qmgr *qmgr; 76303816Ssbruno enum ixl_pf_qmgr_qalloc_type type; 77303816Ssbruno u16 qidx[IXL_MAX_SCATTERED_QUEUES]; 78303816Ssbruno u16 num_allocated; 79303816Ssbruno u16 num_active; 80303816Ssbruno}; 81303816Ssbruno 82303816Ssbruno/* Public manager functions */ 83303816Ssbrunoint ixl_pf_qmgr_init(struct ixl_pf_qmgr *qmgr, u16 num_queues); 84303816Ssbrunovoid ixl_pf_qmgr_destroy(struct ixl_pf_qmgr *qmgr); 85303816Ssbruno 86303816Ssbrunoint ixl_pf_qmgr_get_num_queues(struct ixl_pf_qmgr *qmgr); 87303816Ssbrunoint ixl_pf_qmgr_get_first_free(struct ixl_pf_qmgr *qmgr, u16 start); 88303816Ssbrunoint ixl_pf_qmgr_get_num_free(struct ixl_pf_qmgr *qmgr); 89303816Ssbruno 90303816Ssbruno/* Allocate queues for a VF VSI */ 91303816Ssbrunoint ixl_pf_qmgr_alloc_scattered(struct ixl_pf_qmgr *qmgr, u16 num, struct ixl_pf_qtag *qtag); 92303816Ssbruno/* Allocate queues for the LAN VSIs, or X722 VF VSIs */ 93303816Ssbrunoint ixl_pf_qmgr_alloc_contiguous(struct ixl_pf_qmgr *qmgr, u16 num, struct ixl_pf_qtag *qtag); 94303816Ssbruno/* Release a queue allocation */ 95303816Ssbrunoint ixl_pf_qmgr_release(struct ixl_pf_qmgr *qmgr, struct ixl_pf_qtag *qtag); 96303816Ssbruno 97303816Ssbruno/* Help manage queues used in VFs */ 98303816Ssbruno/* Typically hardware refers to RX as 0 and TX as 1, so continue that convention here */ 99303816Ssbrunovoid ixl_pf_qmgr_mark_queue_enabled(struct ixl_pf_qtag *qtag, u16 vsi_qidx, bool tx); 100303816Ssbrunovoid ixl_pf_qmgr_mark_queue_disabled(struct ixl_pf_qtag *qtag, u16 vsi_qidx, bool tx); 101303816Ssbrunovoid ixl_pf_qmgr_mark_queue_configured(struct ixl_pf_qtag *qtag, u16 vsi_qidx, bool tx); 102303816Ssbrunobool ixl_pf_qmgr_is_queue_enabled(struct ixl_pf_qtag *qtag, u16 vsi_qidx, bool tx); 103303816Ssbrunobool ixl_pf_qmgr_is_queue_configured(struct ixl_pf_qtag *qtag, u16 vsi_qidx, bool tx); 104303816Ssbruno 105303816Ssbruno/* Public tag functions */ 106303816Ssbrunou16 ixl_pf_qidx_from_vsi_qidx(struct ixl_pf_qtag *qtag, u16 index); 107303816Ssbruno 108303816Ssbruno#endif /* _IXL_PF_QMGR_H_ */ 109303816Ssbruno 110