i40e_adminq.h revision 269198
11590Srgrimes/****************************************************************************** 21590Srgrimes 31590Srgrimes Copyright (c) 2013-2014, Intel Corporation 41590Srgrimes All rights reserved. 51590Srgrimes 61590Srgrimes Redistribution and use in source and binary forms, with or without 71590Srgrimes modification, are permitted provided that the following conditions are met: 81590Srgrimes 91590Srgrimes 1. Redistributions of source code must retain the above copyright notice, 101590Srgrimes this list of conditions and the following disclaimer. 111590Srgrimes 121590Srgrimes 2. Redistributions in binary form must reproduce the above copyright 131590Srgrimes notice, this list of conditions and the following disclaimer in the 141590Srgrimes documentation and/or other materials provided with the distribution. 151590Srgrimes 161590Srgrimes 3. Neither the name of the Intel Corporation nor the names of its 171590Srgrimes contributors may be used to endorse or promote products derived from 181590Srgrimes this software without specific prior written permission. 191590Srgrimes 201590Srgrimes THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 211590Srgrimes AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 221590Srgrimes IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 231590Srgrimes ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 241590Srgrimes LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 251590Srgrimes CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 261590Srgrimes SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 271590Srgrimes INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 281590Srgrimes CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 291590Srgrimes ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 301590Srgrimes POSSIBILITY OF SUCH DAMAGE. 311590Srgrimes 321590Srgrimes******************************************************************************/ 331590Srgrimes/*$FreeBSD: head/sys/dev/i40e/i40e_adminq.h 269198 2014-07-28 21:57:09Z jfv $*/ 341590Srgrimes 351590Srgrimes#ifndef _I40E_ADMINQ_H_ 361590Srgrimes#define _I40E_ADMINQ_H_ 371590Srgrimes 3818730Ssteve#include "i40e_osdep.h" 3950477Speter#include "i40e_adminq_cmd.h" 401590Srgrimes 411590Srgrimes#define I40E_ADMINQ_DESC(R, i) \ 421590Srgrimes (&(((struct i40e_aq_desc *)((R).desc_buf.va))[i])) 431590Srgrimes 441590Srgrimes#define I40E_ADMINQ_DESC_ALIGNMENT 4096 451590Srgrimes 461590Srgrimesstruct i40e_adminq_ring { 471590Srgrimes struct i40e_virt_mem dma_head; /* space for dma structures */ 481590Srgrimes struct i40e_dma_mem desc_buf; /* descriptor ring memory */ 491590Srgrimes struct i40e_virt_mem cmd_buf; /* command buffer memory */ 501590Srgrimes 511590Srgrimes union { 521590Srgrimes struct i40e_dma_mem *asq_bi; 531590Srgrimes struct i40e_dma_mem *arq_bi; 5449938Shoek } r; 551590Srgrimes 561590Srgrimes u16 count; /* Number of descriptors */ 571590Srgrimes u16 rx_buf_len; /* Admin Receive Queue buffer length */ 581590Srgrimes 591590Srgrimes /* used for interrupt processing */ 601590Srgrimes u16 next_to_use; 611590Srgrimes u16 next_to_clean; 621590Srgrimes 631590Srgrimes /* used for queue tracking */ 641590Srgrimes u32 head; 651590Srgrimes u32 tail; 661590Srgrimes u32 len; 671590Srgrimes u32 bah; 681590Srgrimes u32 bal; 691590Srgrimes}; 701590Srgrimes 711590Srgrimes/* ASQ transaction details */ 721590Srgrimesstruct i40e_asq_cmd_details { 731590Srgrimes void *callback; /* cast from type I40E_ADMINQ_CALLBACK */ 741590Srgrimes u64 cookie; 751590Srgrimes u16 flags_ena; 761590Srgrimes u16 flags_dis; 771590Srgrimes bool async; 781590Srgrimes bool postpone; 791590Srgrimes}; 801590Srgrimes 811590Srgrimes#define I40E_ADMINQ_DETAILS(R, i) \ 821590Srgrimes (&(((struct i40e_asq_cmd_details *)((R).cmd_buf.va))[i])) 831590Srgrimes 841590Srgrimes/* ARQ event information */ 851590Srgrimesstruct i40e_arq_event_info { 861590Srgrimes struct i40e_aq_desc desc; 871590Srgrimes u16 msg_size; 888874Srgrimes u8 *msg_buf; 891590Srgrimes}; 901590Srgrimes 911590Srgrimes/* Admin Queue information */ 921590Srgrimesstruct i40e_adminq_info { 931590Srgrimes struct i40e_adminq_ring arq; /* receive queue */ 9418730Ssteve struct i40e_adminq_ring asq; /* send queue */ 951590Srgrimes u32 asq_cmd_timeout; /* send queue cmd write back timeout*/ 961590Srgrimes u16 num_arq_entries; /* receive queue depth */ 971590Srgrimes u16 num_asq_entries; /* send queue depth */ 981590Srgrimes u16 arq_buf_size; /* receive queue buffer size */ 9949938Shoek u16 asq_buf_size; /* send queue buffer size */ 1001590Srgrimes u16 fw_maj_ver; /* firmware major version */ 1011590Srgrimes u16 fw_min_ver; /* firmware minor version */ 1021590Srgrimes u16 api_maj_ver; /* api major version */ 1031590Srgrimes u16 api_min_ver; /* api minor version */ 1041590Srgrimes bool nvm_busy; 1051590Srgrimes bool nvm_release_on_done; 1061590Srgrimes 1071590Srgrimes struct i40e_spinlock asq_spinlock; /* Send queue spinlock */ 1081590Srgrimes struct i40e_spinlock arq_spinlock; /* Receive queue spinlock */ 1091590Srgrimes 1101590Srgrimes /* last status values on send and receive queues */ 1111590Srgrimes enum i40e_admin_queue_err asq_last_status; 1121590Srgrimes enum i40e_admin_queue_err arq_last_status; 1131590Srgrimes}; 1141590Srgrimes 1151590Srgrimes/* general information */ 1161590Srgrimes#define I40E_AQ_LARGE_BUF 512 1171590Srgrimes#define I40E_ASQ_CMD_TIMEOUT 100000 /* usecs */ 1181590Srgrimes 1191590Srgrimesvoid i40e_fill_default_direct_cmd_desc(struct i40e_aq_desc *desc, 1201590Srgrimes u16 opcode); 1211590Srgrimes 1221590Srgrimes#endif /* _I40E_ADMINQ_H_ */ 1231590Srgrimes