ixgbe_api.c revision 194875
1/****************************************************************************** 2 3 Copyright (c) 2001-2009, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ 33/*$FreeBSD: head/sys/dev/ixgbe/ixgbe_api.c 194875 2009-06-24 18:27:07Z jfv $*/ 34 35#include "ixgbe_api.h" 36#include "ixgbe_common.h" 37 38extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw); 39extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw); 40 41/** 42 * ixgbe_init_shared_code - Initialize the shared code 43 * @hw: pointer to hardware structure 44 * 45 * This will assign function pointers and assign the MAC type and PHY code. 46 * Does not touch the hardware. This function must be called prior to any 47 * other function in the shared code. The ixgbe_hw structure should be 48 * memset to 0 prior to calling this function. The following fields in 49 * hw structure should be filled in prior to calling this function: 50 * hw_addr, back, device_id, vendor_id, subsystem_device_id, 51 * subsystem_vendor_id, and revision_id 52 **/ 53s32 ixgbe_init_shared_code(struct ixgbe_hw *hw) 54{ 55 s32 status; 56 57 /* 58 * Set the mac type 59 */ 60 ixgbe_set_mac_type(hw); 61 62 switch (hw->mac.type) { 63 case ixgbe_mac_82598EB: 64 status = ixgbe_init_ops_82598(hw); 65 break; 66 case ixgbe_mac_82599EB: 67 status = ixgbe_init_ops_82599(hw); 68 break; 69 default: 70 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 71 break; 72 } 73 74 return status; 75} 76 77/** 78 * ixgbe_set_mac_type - Sets MAC type 79 * @hw: pointer to the HW structure 80 * 81 * This function sets the mac type of the adapter based on the 82 * vendor ID and device ID stored in the hw structure. 83 **/ 84s32 ixgbe_set_mac_type(struct ixgbe_hw *hw) 85{ 86 s32 ret_val = IXGBE_SUCCESS; 87 88 DEBUGFUNC("ixgbe_set_mac_type\n"); 89 90 if (hw->vendor_id == IXGBE_INTEL_VENDOR_ID) { 91 switch (hw->device_id) { 92 case IXGBE_DEV_ID_82598: 93 case IXGBE_DEV_ID_82598_BX: 94 case IXGBE_DEV_ID_82598AF_SINGLE_PORT: 95 case IXGBE_DEV_ID_82598AF_DUAL_PORT: 96 case IXGBE_DEV_ID_82598AT: 97 case IXGBE_DEV_ID_82598EB_CX4: 98 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT: 99 case IXGBE_DEV_ID_82598_DA_DUAL_PORT: 100 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM: 101 case IXGBE_DEV_ID_82598EB_XF_LR: 102 case IXGBE_DEV_ID_82598EB_SFP_LOM: 103 hw->mac.type = ixgbe_mac_82598EB; 104 break; 105 case IXGBE_DEV_ID_82599_KX4: 106 case IXGBE_DEV_ID_82599_XAUI_LOM: 107 case IXGBE_DEV_ID_82599_SFP: 108 case IXGBE_DEV_ID_82599_CX4: 109 hw->mac.type = ixgbe_mac_82599EB; 110 break; 111 default: 112 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 113 break; 114 } 115 } else { 116 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 117 } 118 119 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n", 120 hw->mac.type, ret_val); 121 return ret_val; 122} 123 124/** 125 * ixgbe_init_hw - Initialize the hardware 126 * @hw: pointer to hardware structure 127 * 128 * Initialize the hardware by resetting and then starting the hardware 129 **/ 130s32 ixgbe_init_hw(struct ixgbe_hw *hw) 131{ 132 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw), 133 IXGBE_NOT_IMPLEMENTED); 134} 135 136/** 137 * ixgbe_reset_hw - Performs a hardware reset 138 * @hw: pointer to hardware structure 139 * 140 * Resets the hardware by resetting the transmit and receive units, masks and 141 * clears all interrupts, performs a PHY reset, and performs a MAC reset 142 **/ 143s32 ixgbe_reset_hw(struct ixgbe_hw *hw) 144{ 145 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw), 146 IXGBE_NOT_IMPLEMENTED); 147} 148 149/** 150 * ixgbe_start_hw - Prepares hardware for Rx/Tx 151 * @hw: pointer to hardware structure 152 * 153 * Starts the hardware by filling the bus info structure and media type, 154 * clears all on chip counters, initializes receive address registers, 155 * multicast table, VLAN filter table, calls routine to setup link and 156 * flow control settings, and leaves transmit and receive units disabled 157 * and uninitialized. 158 **/ 159s32 ixgbe_start_hw(struct ixgbe_hw *hw) 160{ 161 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw), 162 IXGBE_NOT_IMPLEMENTED); 163} 164 165/** 166 * ixgbe_clear_hw_cntrs - Clear hardware counters 167 * @hw: pointer to hardware structure 168 * 169 * Clears all hardware statistics counters by reading them from the hardware 170 * Statistics counters are clear on read. 171 **/ 172s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw) 173{ 174 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw), 175 IXGBE_NOT_IMPLEMENTED); 176} 177 178/** 179 * ixgbe_get_media_type - Get media type 180 * @hw: pointer to hardware structure 181 * 182 * Returns the media type (fiber, copper, backplane) 183 **/ 184enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw) 185{ 186 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw), 187 ixgbe_media_type_unknown); 188} 189 190/** 191 * ixgbe_get_mac_addr - Get MAC address 192 * @hw: pointer to hardware structure 193 * @mac_addr: Adapter MAC address 194 * 195 * Reads the adapter's MAC address from the first Receive Address Register 196 * (RAR0) A reset of the adapter must have been performed prior to calling 197 * this function in order for the MAC address to have been loaded from the 198 * EEPROM into RAR0 199 **/ 200s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr) 201{ 202 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr, 203 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED); 204} 205 206/** 207 * ixgbe_get_san_mac_addr - Get SAN MAC address 208 * @hw: pointer to hardware structure 209 * @san_mac_addr: SAN MAC address 210 * 211 * Reads the SAN MAC address from the EEPROM, if it's available. This is 212 * per-port, so set_lan_id() must be called before reading the addresses. 213 **/ 214s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) 215{ 216 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr, 217 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); 218} 219 220/** 221 * ixgbe_set_san_mac_addr - Write a SAN MAC address 222 * @hw: pointer to hardware structure 223 * @san_mac_addr: SAN MAC address 224 * 225 * Writes A SAN MAC address to the EEPROM. 226 **/ 227s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) 228{ 229 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr, 230 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); 231} 232 233/** 234 * ixgbe_get_device_caps - Get additional device capabilities 235 * @hw: pointer to hardware structure 236 * @device_caps: the EEPROM word for device capabilities 237 * 238 * Reads the extra device capabilities from the EEPROM 239 **/ 240s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps) 241{ 242 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps, 243 (hw, device_caps), IXGBE_NOT_IMPLEMENTED); 244} 245 246/** 247 * ixgbe_get_bus_info - Set PCI bus info 248 * @hw: pointer to hardware structure 249 * 250 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure 251 **/ 252s32 ixgbe_get_bus_info(struct ixgbe_hw *hw) 253{ 254 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw), 255 IXGBE_NOT_IMPLEMENTED); 256} 257 258/** 259 * ixgbe_get_num_of_tx_queues - Get Tx queues 260 * @hw: pointer to hardware structure 261 * 262 * Returns the number of transmit queues for the given adapter. 263 **/ 264u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw) 265{ 266 return hw->mac.max_tx_queues; 267} 268 269/** 270 * ixgbe_get_num_of_rx_queues - Get Rx queues 271 * @hw: pointer to hardware structure 272 * 273 * Returns the number of receive queues for the given adapter. 274 **/ 275u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw) 276{ 277 return hw->mac.max_rx_queues; 278} 279 280/** 281 * ixgbe_stop_adapter - Disable Rx/Tx units 282 * @hw: pointer to hardware structure 283 * 284 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 285 * disables transmit and receive units. The adapter_stopped flag is used by 286 * the shared code and drivers to determine if the adapter is in a stopped 287 * state and should not touch the hardware. 288 **/ 289s32 ixgbe_stop_adapter(struct ixgbe_hw *hw) 290{ 291 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw), 292 IXGBE_NOT_IMPLEMENTED); 293} 294 295/** 296 * ixgbe_read_pba_num - Reads part number from EEPROM 297 * @hw: pointer to hardware structure 298 * @pba_num: stores the part number from the EEPROM 299 * 300 * Reads the part number from the EEPROM. 301 **/ 302s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num) 303{ 304 return ixgbe_read_pba_num_generic(hw, pba_num); 305} 306 307/** 308 * ixgbe_identify_phy - Get PHY type 309 * @hw: pointer to hardware structure 310 * 311 * Determines the physical layer module found on the current adapter. 312 **/ 313s32 ixgbe_identify_phy(struct ixgbe_hw *hw) 314{ 315 s32 status = IXGBE_SUCCESS; 316 317 if (hw->phy.type == ixgbe_phy_unknown) { 318 status = ixgbe_call_func(hw, 319 hw->phy.ops.identify, 320 (hw), 321 IXGBE_NOT_IMPLEMENTED); 322 } 323 324 return status; 325} 326 327/** 328 * ixgbe_reset_phy - Perform a PHY reset 329 * @hw: pointer to hardware structure 330 **/ 331s32 ixgbe_reset_phy(struct ixgbe_hw *hw) 332{ 333 s32 status = IXGBE_SUCCESS; 334 335 if (hw->phy.type == ixgbe_phy_unknown) { 336 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS) 337 status = IXGBE_ERR_PHY; 338 } 339 340 if (status == IXGBE_SUCCESS) { 341 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw), 342 IXGBE_NOT_IMPLEMENTED); 343 } 344 return status; 345} 346 347/** 348 * ixgbe_get_phy_firmware_version - 349 * @hw: pointer to hardware structure 350 * @firmware_version: pointer to firmware version 351 **/ 352s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version) 353{ 354 s32 status = IXGBE_SUCCESS; 355 356 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version, 357 (hw, firmware_version), 358 IXGBE_NOT_IMPLEMENTED); 359 return status; 360} 361 362/** 363 * ixgbe_read_phy_reg - Read PHY register 364 * @hw: pointer to hardware structure 365 * @reg_addr: 32 bit address of PHY register to read 366 * @phy_data: Pointer to read data from PHY register 367 * 368 * Reads a value from a specified PHY register 369 **/ 370s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 371 u16 *phy_data) 372{ 373 if (hw->phy.id == 0) 374 ixgbe_identify_phy(hw); 375 376 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr, 377 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 378} 379 380/** 381 * ixgbe_write_phy_reg - Write PHY register 382 * @hw: pointer to hardware structure 383 * @reg_addr: 32 bit PHY register to write 384 * @phy_data: Data to write to the PHY register 385 * 386 * Writes a value to specified PHY register 387 **/ 388s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 389 u16 phy_data) 390{ 391 if (hw->phy.id == 0) 392 ixgbe_identify_phy(hw); 393 394 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr, 395 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 396} 397 398/** 399 * ixgbe_setup_phy_link - Restart PHY autoneg 400 * @hw: pointer to hardware structure 401 * 402 * Restart autonegotiation and PHY and waits for completion. 403 **/ 404s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw) 405{ 406 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw), 407 IXGBE_NOT_IMPLEMENTED); 408} 409 410/** 411 * ixgbe_check_phy_link - Determine link and speed status 412 * @hw: pointer to hardware structure 413 * 414 * Reads a PHY register to determine if link is up and the current speed for 415 * the PHY. 416 **/ 417s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 418 bool *link_up) 419{ 420 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed, 421 link_up), IXGBE_NOT_IMPLEMENTED); 422} 423 424/** 425 * ixgbe_setup_phy_link_speed - Set auto advertise 426 * @hw: pointer to hardware structure 427 * @speed: new link speed 428 * @autoneg: TRUE if autonegotiation enabled 429 * 430 * Sets the auto advertised capabilities 431 **/ 432s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 433 bool autoneg, 434 bool autoneg_wait_to_complete) 435{ 436 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed, 437 autoneg, autoneg_wait_to_complete), 438 IXGBE_NOT_IMPLEMENTED); 439} 440 441/** 442 * ixgbe_setup_link - Configure link settings 443 * @hw: pointer to hardware structure 444 * 445 * Configures link settings based on values in the ixgbe_hw struct. 446 * Restarts the link. Performs autonegotiation if needed. 447 **/ 448s32 ixgbe_setup_link(struct ixgbe_hw *hw) 449{ 450 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw), 451 IXGBE_NOT_IMPLEMENTED); 452} 453 454/** 455 * ixgbe_check_link - Get link and speed status 456 * @hw: pointer to hardware structure 457 * 458 * Reads the links register to determine if link is up and the current speed 459 **/ 460s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 461 bool *link_up, bool link_up_wait_to_complete) 462{ 463 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed, 464 link_up, link_up_wait_to_complete), 465 IXGBE_NOT_IMPLEMENTED); 466} 467 468/** 469 * ixgbe_setup_link_speed - Set link speed 470 * @hw: pointer to hardware structure 471 * @speed: new link speed 472 * @autoneg: TRUE if autonegotiation enabled 473 * 474 * Set the link speed and restarts the link. 475 **/ 476s32 ixgbe_setup_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 477 bool autoneg, 478 bool autoneg_wait_to_complete) 479{ 480 return ixgbe_call_func(hw, hw->mac.ops.setup_link_speed, (hw, speed, 481 autoneg, autoneg_wait_to_complete), 482 IXGBE_NOT_IMPLEMENTED); 483} 484 485/** 486 * ixgbe_get_link_capabilities - Returns link capabilities 487 * @hw: pointer to hardware structure 488 * 489 * Determines the link capabilities of the current configuration. 490 **/ 491s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 492 bool *autoneg) 493{ 494 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw, 495 speed, autoneg), IXGBE_NOT_IMPLEMENTED); 496} 497 498/** 499 * ixgbe_led_on - Turn on LEDs 500 * @hw: pointer to hardware structure 501 * @index: led number to turn on 502 * 503 * Turns on the software controllable LEDs. 504 **/ 505s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index) 506{ 507 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index), 508 IXGBE_NOT_IMPLEMENTED); 509} 510 511/** 512 * ixgbe_led_off - Turn off LEDs 513 * @hw: pointer to hardware structure 514 * @index: led number to turn off 515 * 516 * Turns off the software controllable LEDs. 517 **/ 518s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index) 519{ 520 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index), 521 IXGBE_NOT_IMPLEMENTED); 522} 523 524/** 525 * ixgbe_blink_led_start - Blink LEDs 526 * @hw: pointer to hardware structure 527 * @index: led number to blink 528 * 529 * Blink LED based on index. 530 **/ 531s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index) 532{ 533 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index), 534 IXGBE_NOT_IMPLEMENTED); 535} 536 537/** 538 * ixgbe_blink_led_stop - Stop blinking LEDs 539 * @hw: pointer to hardware structure 540 * 541 * Stop blinking LED based on index. 542 **/ 543s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index) 544{ 545 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index), 546 IXGBE_NOT_IMPLEMENTED); 547} 548 549/** 550 * ixgbe_init_eeprom_params - Initialize EEPROM parameters 551 * @hw: pointer to hardware structure 552 * 553 * Initializes the EEPROM parameters ixgbe_eeprom_info within the 554 * ixgbe_hw struct in order to set up EEPROM access. 555 **/ 556s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw) 557{ 558 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw), 559 IXGBE_NOT_IMPLEMENTED); 560} 561 562 563/** 564 * ixgbe_write_eeprom - Write word to EEPROM 565 * @hw: pointer to hardware structure 566 * @offset: offset within the EEPROM to be written to 567 * @data: 16 bit word to be written to the EEPROM 568 * 569 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not 570 * called after this function, the EEPROM will most likely contain an 571 * invalid checksum. 572 **/ 573s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data) 574{ 575 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data), 576 IXGBE_NOT_IMPLEMENTED); 577} 578 579/** 580 * ixgbe_read_eeprom - Read word from EEPROM 581 * @hw: pointer to hardware structure 582 * @offset: offset within the EEPROM to be read 583 * @data: read 16 bit value from EEPROM 584 * 585 * Reads 16 bit value from EEPROM 586 **/ 587s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data) 588{ 589 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data), 590 IXGBE_NOT_IMPLEMENTED); 591} 592 593/** 594 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum 595 * @hw: pointer to hardware structure 596 * @checksum_val: calculated checksum 597 * 598 * Performs checksum calculation and validates the EEPROM checksum 599 **/ 600s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val) 601{ 602 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum, 603 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED); 604} 605 606/** 607 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum 608 * @hw: pointer to hardware structure 609 **/ 610s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw) 611{ 612 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw), 613 IXGBE_NOT_IMPLEMENTED); 614} 615 616/** 617 * ixgbe_insert_mac_addr - Find a RAR for this mac address 618 * @hw: pointer to hardware structure 619 * @addr: Address to put into receive address register 620 * @vmdq: VMDq pool to assign 621 * 622 * Puts an ethernet address into a receive address register, or 623 * finds the rar that it is aleady in; adds to the pool list 624 **/ 625s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq) 626{ 627 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr, 628 (hw, addr, vmdq), 629 IXGBE_NOT_IMPLEMENTED); 630} 631 632/** 633 * ixgbe_set_rar - Set Rx address register 634 * @hw: pointer to hardware structure 635 * @index: Receive address register to write 636 * @addr: Address to put into receive address register 637 * @vmdq: VMDq "set" 638 * @enable_addr: set flag that address is active 639 * 640 * Puts an ethernet address into a receive address register. 641 **/ 642s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 643 u32 enable_addr) 644{ 645 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq, 646 enable_addr), IXGBE_NOT_IMPLEMENTED); 647} 648 649/** 650 * ixgbe_clear_rar - Clear Rx address register 651 * @hw: pointer to hardware structure 652 * @index: Receive address register to write 653 * 654 * Puts an ethernet address into a receive address register. 655 **/ 656s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index) 657{ 658 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index), 659 IXGBE_NOT_IMPLEMENTED); 660} 661 662/** 663 * ixgbe_set_vmdq - Associate a VMDq index with a receive address 664 * @hw: pointer to hardware structure 665 * @rar: receive address register index to associate with VMDq index 666 * @vmdq: VMDq set or pool index 667 **/ 668s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 669{ 670 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq), 671 IXGBE_NOT_IMPLEMENTED); 672} 673 674/** 675 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address 676 * @hw: pointer to hardware structure 677 * @rar: receive address register index to disassociate with VMDq index 678 * @vmdq: VMDq set or pool index 679 **/ 680s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 681{ 682 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq), 683 IXGBE_NOT_IMPLEMENTED); 684} 685 686/** 687 * ixgbe_init_rx_addrs - Initializes receive address filters. 688 * @hw: pointer to hardware structure 689 * 690 * Places the MAC address in receive address register 0 and clears the rest 691 * of the receive address registers. Clears the multicast table. Assumes 692 * the receiver is in reset when the routine is called. 693 **/ 694s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw) 695{ 696 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw), 697 IXGBE_NOT_IMPLEMENTED); 698} 699 700/** 701 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries. 702 * @hw: pointer to hardware structure 703 **/ 704u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw) 705{ 706 return hw->mac.num_rar_entries; 707} 708 709/** 710 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses 711 * @hw: pointer to hardware structure 712 * @addr_list: the list of new multicast addresses 713 * @addr_count: number of addresses 714 * @func: iterator function to walk the multicast address list 715 * 716 * The given list replaces any existing list. Clears the secondary addrs from 717 * receive address registers. Uses unused receive address registers for the 718 * first secondary addresses, and falls back to promiscuous mode as needed. 719 **/ 720s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list, 721 u32 addr_count, ixgbe_mc_addr_itr func) 722{ 723 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw, 724 addr_list, addr_count, func), 725 IXGBE_NOT_IMPLEMENTED); 726} 727 728/** 729 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses 730 * @hw: pointer to hardware structure 731 * @mc_addr_list: the list of new multicast addresses 732 * @mc_addr_count: number of addresses 733 * @func: iterator function to walk the multicast address list 734 * 735 * The given list replaces any existing list. Clears the MC addrs from receive 736 * address registers and the multicast table. Uses unused receive address 737 * registers for the first multicast addresses, and hashes the rest into the 738 * multicast table. 739 **/ 740s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, 741 u32 mc_addr_count, ixgbe_mc_addr_itr func) 742{ 743 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw, 744 mc_addr_list, mc_addr_count, func), 745 IXGBE_NOT_IMPLEMENTED); 746} 747 748/** 749 * ixgbe_enable_mc - Enable multicast address in RAR 750 * @hw: pointer to hardware structure 751 * 752 * Enables multicast address in RAR and the use of the multicast hash table. 753 **/ 754s32 ixgbe_enable_mc(struct ixgbe_hw *hw) 755{ 756 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw), 757 IXGBE_NOT_IMPLEMENTED); 758} 759 760/** 761 * ixgbe_disable_mc - Disable multicast address in RAR 762 * @hw: pointer to hardware structure 763 * 764 * Disables multicast address in RAR and the use of the multicast hash table. 765 **/ 766s32 ixgbe_disable_mc(struct ixgbe_hw *hw) 767{ 768 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw), 769 IXGBE_NOT_IMPLEMENTED); 770} 771 772/** 773 * ixgbe_clear_vfta - Clear VLAN filter table 774 * @hw: pointer to hardware structure 775 * 776 * Clears the VLAN filer table, and the VMDq index associated with the filter 777 **/ 778s32 ixgbe_clear_vfta(struct ixgbe_hw *hw) 779{ 780 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw), 781 IXGBE_NOT_IMPLEMENTED); 782} 783 784/** 785 * ixgbe_set_vfta - Set VLAN filter table 786 * @hw: pointer to hardware structure 787 * @vlan: VLAN id to write to VLAN filter 788 * @vind: VMDq output index that maps queue to VLAN id in VFTA 789 * @vlan_on: boolean flag to turn on/off VLAN in VFTA 790 * 791 * Turn on/off specified VLAN in the VLAN filter table. 792 **/ 793s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on) 794{ 795 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind, 796 vlan_on), IXGBE_NOT_IMPLEMENTED); 797} 798 799/** 800 * ixgbe_fc_enable - Enable flow control 801 * @hw: pointer to hardware structure 802 * @packetbuf_num: packet buffer number (0-7) 803 * 804 * Configures the flow control settings based on SW configuration. 805 **/ 806s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num) 807{ 808 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw, packetbuf_num), 809 IXGBE_NOT_IMPLEMENTED); 810} 811 812/** 813 * ixgbe_read_analog_reg8 - Reads 8 bit analog register 814 * @hw: pointer to hardware structure 815 * @reg: analog register to read 816 * @val: read value 817 * 818 * Performs write operation to analog register specified. 819 **/ 820s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val) 821{ 822 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg, 823 val), IXGBE_NOT_IMPLEMENTED); 824} 825 826/** 827 * ixgbe_write_analog_reg8 - Writes 8 bit analog register 828 * @hw: pointer to hardware structure 829 * @reg: analog register to write 830 * @val: value to write 831 * 832 * Performs write operation to Atlas analog register specified. 833 **/ 834s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val) 835{ 836 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg, 837 val), IXGBE_NOT_IMPLEMENTED); 838} 839 840/** 841 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays. 842 * @hw: pointer to hardware structure 843 * 844 * Initializes the Unicast Table Arrays to zero on device load. This 845 * is part of the Rx init addr execution path. 846 **/ 847s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw) 848{ 849 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw), 850 IXGBE_NOT_IMPLEMENTED); 851} 852 853/** 854 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address 855 * @hw: pointer to hardware structure 856 * @byte_offset: byte offset to read 857 * @data: value read 858 * 859 * Performs byte read operation to SFP module's EEPROM over I2C interface. 860 **/ 861s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 862 u8 *data) 863{ 864 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset, 865 dev_addr, data), IXGBE_NOT_IMPLEMENTED); 866} 867 868/** 869 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C 870 * @hw: pointer to hardware structure 871 * @byte_offset: byte offset to write 872 * @data: value to write 873 * 874 * Performs byte write operation to SFP module's EEPROM over I2C interface 875 * at a specified device address. 876 **/ 877s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 878 u8 data) 879{ 880 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset, 881 dev_addr, data), IXGBE_NOT_IMPLEMENTED); 882} 883 884/** 885 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface 886 * @hw: pointer to hardware structure 887 * @byte_offset: EEPROM byte offset to write 888 * @eeprom_data: value to write 889 * 890 * Performs byte write operation to SFP module's EEPROM over I2C interface. 891 **/ 892s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, 893 u8 byte_offset, u8 eeprom_data) 894{ 895 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom, 896 (hw, byte_offset, eeprom_data), 897 IXGBE_NOT_IMPLEMENTED); 898} 899 900/** 901 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface 902 * @hw: pointer to hardware structure 903 * @byte_offset: EEPROM byte offset to read 904 * @eeprom_data: value read 905 * 906 * Performs byte read operation to SFP module's EEPROM over I2C interface. 907 **/ 908s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data) 909{ 910 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom, 911 (hw, byte_offset, eeprom_data), 912 IXGBE_NOT_IMPLEMENTED); 913} 914 915/** 916 * ixgbe_get_supported_physical_layer - Returns physical layer type 917 * @hw: pointer to hardware structure 918 * 919 * Determines physical layer capabilities of the current configuration. 920 **/ 921u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw) 922{ 923 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer, 924 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN); 925} 926 927/** 928 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependant on device specifics 929 * @hw: pointer to hardware structure 930 * @regval: bitfield to write to the Rx DMA register 931 * 932 * Enables the Rx DMA unit of the device. 933 **/ 934s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval) 935{ 936 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma, 937 (hw, regval), IXGBE_NOT_IMPLEMENTED); 938} 939 940/** 941 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore 942 * @hw: pointer to hardware structure 943 * @mask: Mask to specify which semaphore to acquire 944 * 945 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified 946 * function (CSR, PHY0, PHY1, EEPROM, Flash) 947 **/ 948s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask) 949{ 950 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync, 951 (hw, mask), IXGBE_NOT_IMPLEMENTED); 952} 953 954/** 955 * ixgbe_release_swfw_semaphore - Release SWFW semaphore 956 * @hw: pointer to hardware structure 957 * @mask: Mask to specify which semaphore to release 958 * 959 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified 960 * function (CSR, PHY0, PHY1, EEPROM, Flash) 961 **/ 962void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask) 963{ 964 if (hw->mac.ops.release_swfw_sync) 965 hw->mac.ops.release_swfw_sync(hw, mask); 966} 967 968