ispvar.h revision 98281
140939Sdes/* $FreeBSD: head/sys/dev/isp/ispvar.h 98281 2002-06-16 04:52:53Z mjacob $ */ 2226537Sdes/* 3253680Sdes * Soft Definitions for for Qlogic ISP SCSI adapters. 440939Sdes * 540939Sdes * Copyright (c) 1997, 1998, 1999, 2000 by Matthew Jacob 640939Sdes * All rights reserved. 740939Sdes * 840939Sdes * Redistribution and use in source and binary forms, with or without 940939Sdes * modification, are permitted provided that the following conditions 1040939Sdes * are met: 1140939Sdes * 1. Redistributions of source code must retain the above copyright 1240939Sdes * notice immediately at the beginning of the file, without modification, 1340939Sdes * this list of conditions, and the following disclaimer. 1440939Sdes * 2. The name of the author may not be used to endorse or promote products 1540939Sdes * derived from this software without specific prior written permission. 1640939Sdes * 1740939Sdes * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1840939Sdes * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1940939Sdes * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2040939Sdes * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 2140939Sdes * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2240939Sdes * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2340939Sdes * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2440939Sdes * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2540939Sdes * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2640939Sdes * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2740939Sdes * SUCH DAMAGE. 2840939Sdes * 2940939Sdes */ 3084203Sdillon 3184203Sdillon#ifndef _ISPVAR_H 3284203Sdillon#define _ISPVAR_H 3341862Sdes 3440939Sdes#if defined(__NetBSD__) || defined(__OpenBSD__) 3555557Sdes#include <dev/ic/ispmbox.h> 3662981Sdes#ifdef ISP_TARGET_MODE 37174752Sdes#include <dev/ic/isp_target.h> 3840939Sdes#include <dev/ic/isp_tpublic.h> 3940939Sdes#endif 40174752Sdes#endif 4140939Sdes#ifdef __FreeBSD__ 42210568Sdes#include <dev/isp/ispmbox.h> 4340939Sdes#ifdef ISP_TARGET_MODE 44109695Sdes#include <dev/isp/isp_target.h> 4560924Sdes#include <dev/isp/isp_tpublic.h> 4641862Sdes#endif 4741862Sdes#endif 4840939Sdes#ifdef __linux__ 4940939Sdes#include "ispmbox.h" 5040939Sdes#ifdef ISP_TARGET_MODE 51253680Sdes#include "isp_target.h" 52253680Sdes#include "isp_tpublic.h" 53253680Sdes#endif 54253680Sdes#endif 5540939Sdes 5640939Sdes#define ISP_CORE_VERSION_MAJOR 2 5740939Sdes#define ISP_CORE_VERSION_MINOR 7 5840975Sdes 5940939Sdes/* 6040939Sdes * Vector for bus specific code to provide specific services. 6140939Sdes */ 6240939Sdesstruct ispsoftc; 6340939Sdesstruct ispmdvec { 64174588Sdes int (*dv_rd_isr) 65121423Sume (struct ispsoftc *, u_int16_t *, u_int16_t *, u_int16_t *); 6690267Sdes u_int16_t (*dv_rd_reg) (struct ispsoftc *, int); 67121423Sume void (*dv_wr_reg) (struct ispsoftc *, int, u_int16_t); 6890267Sdes int (*dv_mbxdma) (struct ispsoftc *); 6990267Sdes int (*dv_dmaset) (struct ispsoftc *, 7090267Sdes XS_T *, ispreq_t *, u_int16_t *, u_int16_t); 7190267Sdes void (*dv_dmaclr) 7240939Sdes (struct ispsoftc *, XS_T *, u_int16_t); 7340939Sdes void (*dv_reset0) (struct ispsoftc *); 7462981Sdes void (*dv_reset1) (struct ispsoftc *); 7575891Sarchie void (*dv_dregs) (struct ispsoftc *, const char *); 7640939Sdes u_int16_t *dv_ispfw; /* ptr to f/w */ 7762981Sdes u_int16_t dv_conf1; 7840939Sdes u_int16_t dv_clock; /* clock frequency */ 7940939Sdes}; 8040939Sdes 8140939Sdes/* 8240939Sdes * Overall parameters 8360924Sdes */ 84174588Sdes#define MAX_TARGETS 16 8540939Sdes#define MAX_FC_TARG 256 8690267Sdes#define ISP_MAX_TARGETS(isp) (IS_FC(isp)? MAX_FC_TARG : MAX_TARGETS) 8790267Sdes#define ISP_MAX_LUNS(isp) (isp)->isp_maxluns 8890267Sdes 8940939Sdes/* 9040939Sdes * 'Types' 9140939Sdes */ 9240939Sdes#ifndef ISP_DMA_ADDR_T 9340939Sdes#define ISP_DMA_ADDR_T u_int32_t 9440939Sdes#endif 95174588Sdes 9640939Sdes/* 97174588Sdes * Macros to access ISP registers through bus specific layers- 9890267Sdes * mostly wrappers to vector through the mdvec structure. 9990267Sdes */ 10040939Sdes#define ISP_READ_ISR(isp, isrp, semap, mbox0p) \ 10140939Sdes (*(isp)->isp_mdvec->dv_rd_isr)(isp, isrp, semap, mbox0p) 10240939Sdes 10340939Sdes#define ISP_READ(isp, reg) \ 10440939Sdes (*(isp)->isp_mdvec->dv_rd_reg)((isp), (reg)) 10540939Sdes 106174588Sdes#define ISP_WRITE(isp, reg, val) \ 10740939Sdes (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), (val)) 10890267Sdes 10990267Sdes#define ISP_MBOXDMASETUP(isp) \ 11090267Sdes (*(isp)->isp_mdvec->dv_mbxdma)((isp)) 11190267Sdes 11290267Sdes#define ISP_DMASETUP(isp, xs, req, iptrp, optr) \ 11390267Sdes (*(isp)->isp_mdvec->dv_dmaset)((isp), (xs), (req), (iptrp), (optr)) 11490267Sdes 11590267Sdes#define ISP_DMAFREE(isp, xs, hndl) \ 11690267Sdes if ((isp)->isp_mdvec->dv_dmaclr) \ 11790267Sdes (*(isp)->isp_mdvec->dv_dmaclr)((isp), (xs), (hndl)) 11890267Sdes 11990267Sdes#define ISP_RESET0(isp) \ 12090267Sdes if ((isp)->isp_mdvec->dv_reset0) (*(isp)->isp_mdvec->dv_reset0)((isp)) 12190267Sdes#define ISP_RESET1(isp) \ 12290267Sdes if ((isp)->isp_mdvec->dv_reset1) (*(isp)->isp_mdvec->dv_reset1)((isp)) 12390267Sdes#define ISP_DUMPREGS(isp, m) \ 12490267Sdes if ((isp)->isp_mdvec->dv_dregs) (*(isp)->isp_mdvec->dv_dregs)((isp),(m)) 12590267Sdes 12690267Sdes#define ISP_SETBITS(isp, reg, val) \ 12790267Sdes (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) | (val)) 12890267Sdes 12990267Sdes#define ISP_CLRBITS(isp, reg, val) \ 13090267Sdes (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) & ~(val)) 13190267Sdes 13290267Sdes/* 13390267Sdes * The MEMORYBARRIER macro is defined per platform (to provide synchronization 13490267Sdes * on Request and Response Queues, Scratch DMA areas, and Registers) 13590267Sdes * 13690267Sdes * Defined Memory Barrier Synchronization Types 13790267Sdes */ 13890267Sdes#define SYNC_REQUEST 0 /* request queue synchronization */ 13990267Sdes#define SYNC_RESULT 1 /* result queue synchronization */ 14090267Sdes#define SYNC_SFORDEV 2 /* scratch, sync for ISP */ 14190267Sdes#define SYNC_SFORCPU 3 /* scratch, sync for CPU */ 14290267Sdes#define SYNC_REG 4 /* for registers */ 14390267Sdes 14490267Sdes/* 14590267Sdes * Request/Response Queue defines and macros. 14690267Sdes * The maximum is defined per platform (and can be based on board type). 14790267Sdes */ 14890267Sdes/* This is the size of a queue entry (request and response) */ 14990267Sdes#define QENTRY_LEN 64 15090267Sdes/* Both request and result queue length must be a power of two */ 15190267Sdes#define RQUEST_QUEUE_LEN(x) MAXISPREQUEST(x) 15290267Sdes#ifdef ISP_TARGET_MODE 15390267Sdes#define RESULT_QUEUE_LEN(x) MAXISPREQUEST(x) 15490267Sdes#else 15590267Sdes#define RESULT_QUEUE_LEN(x) \ 15690267Sdes (((MAXISPREQUEST(x) >> 2) < 64)? 64 : MAXISPREQUEST(x) >> 2) 15790267Sdes#endif 15890267Sdes#define ISP_QUEUE_ENTRY(q, idx) ((q) + ((idx) * QENTRY_LEN)) 15940939Sdes#define ISP_QUEUE_SIZE(n) ((n) * QENTRY_LEN) 16040939Sdes#define ISP_NXT_QENTRY(idx, qlen) (((idx) + 1) & ((qlen)-1)) 16140939Sdes#define ISP_QFREE(in, out, qlen) \ 16241862Sdes ((in == out)? (qlen - 1) : ((in > out)? \ 16341862Sdes ((qlen - 1) - (in - out)) : (out - in - 1))) 16441862Sdes#define ISP_QAVAIL(isp) \ 16560924Sdes ISP_QFREE(isp->isp_reqidx, isp->isp_reqodx, RQUEST_QUEUE_LEN(isp)) 166174588Sdes 16741862Sdes#define ISP_ADD_REQUEST(isp, nxti) \ 16890267Sdes MEMORYBARRIER(isp, SYNC_REQUEST, isp->isp_reqidx, QENTRY_LEN); \ 16990267Sdes WRITE_REQUEST_QUEUE_IN_POINTER(isp, nxti); \ 17090267Sdes isp->isp_reqidx = nxti 17190267Sdes 17290267Sdes/* 17390267Sdes * SCSI Specific Host Adapter Parameters- per bus, per target 17441862Sdes */ 17541862Sdes 17641862Sdestypedef struct { 17740939Sdes u_int isp_gotdparms : 1, 17840939Sdes isp_req_ack_active_neg : 1, 17940939Sdes isp_data_line_active_neg: 1, 18068551Sdes isp_cmd_dma_burst_enable: 1, 18168551Sdes isp_data_dma_burst_enabl: 1, 18268551Sdes isp_fifo_threshold : 3, 183174588Sdes isp_ultramode : 1, 18468551Sdes isp_diffmode : 1, 18590267Sdes isp_lvdmode : 1, 18668551Sdes isp_fast_mttr : 1, /* fast sram */ 18790267Sdes isp_initiator_id : 4, 18890267Sdes isp_async_data_setup : 4; 18990267Sdes u_int16_t isp_selection_timeout; 19090267Sdes u_int16_t isp_max_queue_depth; 19190267Sdes u_int8_t isp_tag_aging; 19290267Sdes u_int8_t isp_bus_reset_delay; 19390267Sdes u_int8_t isp_retry_count; 19468551Sdes u_int8_t isp_retry_delay; 19568551Sdes struct { 19668551Sdes u_int32_t 19768551Sdes exc_throttle : 8, 19868551Sdes : 1, 19968551Sdes dev_enable : 1, /* ignored */ 200174588Sdes dev_update : 1, 20168551Sdes dev_refresh : 1, 20290267Sdes actv_offset : 4, 20390267Sdes goal_offset : 4, 20490267Sdes nvrm_offset : 4; 20590267Sdes u_int8_t actv_period; /* current sync period */ 20690267Sdes u_int8_t goal_period; /* goal sync period */ 20768551Sdes u_int8_t nvrm_period; /* nvram sync period */ 20868551Sdes u_int16_t actv_flags; /* current device flags */ 20998117Sdes u_int16_t goal_flags; /* goal device flags */ 21068551Sdes u_int16_t nvrm_flags; /* nvram device flags */ 21197866Sdes } isp_devparam[MAX_TARGETS]; 21297866Sdes} sdparam; 21397866Sdes 214174588Sdes/* 21597866Sdes * Device Flags 21697866Sdes */ 217236193Sjilles#define DPARM_DISC 0x8000 21897866Sdes#define DPARM_PARITY 0x4000 21997866Sdes#define DPARM_WIDE 0x2000 220109967Sdes#define DPARM_SYNC 0x1000 22197866Sdes#define DPARM_TQING 0x0800 222221830Sdes#define DPARM_ARQ 0x0400 223236193Sjilles#define DPARM_QFRZ 0x0200 22497866Sdes#define DPARM_RENEG 0x0100 22598117Sdes#define DPARM_NARROW 0x0080 22697866Sdes#define DPARM_ASYNC 0x0040 22797866Sdes#define DPARM_PPR 0x0020 22897866Sdes#define DPARM_DEFAULT (0xFF00 & ~DPARM_QFRZ) 22997866Sdes#define DPARM_SAFE_DFLT (DPARM_DEFAULT & ~(DPARM_WIDE|DPARM_SYNC|DPARM_TQING)) 23097866Sdes 23198117Sdes 23298117Sdes/* technically, not really correct, as they need to be rated based upon clock */ 23398117Sdes#define ISP_80M_SYNCPARMS 0x0c09 234174588Sdes#define ISP_40M_SYNCPARMS 0x0c0a 23598117Sdes#define ISP_20M_SYNCPARMS 0x0c0c 23698117Sdes#define ISP_20M_SYNCPARMS_1040 0x080c 23798117Sdes#define ISP_10M_SYNCPARMS 0x0c19 23898117Sdes#define ISP_08M_SYNCPARMS 0x0c25 23998117Sdes#define ISP_05M_SYNCPARMS 0x0c32 24098117Sdes#define ISP_04M_SYNCPARMS 0x0c41 24198117Sdes 24298117Sdes/* 243111816Sdes * Fibre Channel Specifics 244111816Sdes */ 245111816Sdes#define FL_PORT_ID 0x7e /* FL_Port Special ID */ 246174588Sdes#define FC_PORT_ID 0x7f /* Fabric Controller Special ID */ 247111816Sdes#define FC_SNS_ID 0x80 /* SNS Server Special ID */ 248111816Sdes 249111816Sdes/* #define ISP_USE_GA_NXT 1 */ /* Use GA_NXT with switches */ 250111816Sdes#ifndef GA_NXT_MAX 251111816Sdes#define GA_NXT_MAX 256 252111816Sdes#endif 253111816Sdes 254111816Sdestypedef struct { 255111816Sdes u_int32_t isp_fwoptions : 16, 256111816Sdes isp_gbspeed : 2, 257111816Sdes isp_iid_set : 1, 258111816Sdes loop_seen_once : 1, 259111816Sdes isp_loopstate : 4, /* Current Loop State */ 260111816Sdes isp_fwstate : 3, /* ISP F/W state */ 261111816Sdes isp_gotdparms : 1, 262111816Sdes isp_topo : 3, 263111816Sdes isp_onfabric : 1; 264111816Sdes u_int8_t isp_iid; /* 'initiator' id */ 26540939Sdes u_int8_t isp_loopid; /* hard loop id */ 26640939Sdes u_int8_t isp_alpa; /* ALPA */ 26797856Sdes u_int32_t isp_portid; 268174588Sdes volatile u_int16_t isp_lipseq; /* LIP sequence # */ 26940939Sdes u_int16_t isp_fwattr; /* firmware attributes */ 27097856Sdes u_int8_t isp_execthrottle; 27190267Sdes u_int8_t isp_retry_delay; 272111816Sdes u_int8_t isp_retry_count; 27390267Sdes u_int8_t isp_reserved; 27490267Sdes u_int16_t isp_maxalloc; 27540939Sdes u_int16_t isp_maxfrmlen; 27690267Sdes u_int64_t isp_nodewwn; 27741862Sdes u_int64_t isp_portwwn; 27890267Sdes /* 279174588Sdes * Port Data Base. This is indexed by 'target', which is invariate. 28040939Sdes * However, elements within can move around due to loop changes, 28190267Sdes * so the actual loop ID passed to the F/W is in this structure. 28290267Sdes * The first time the loop is seen up, loopid will match the index 28390267Sdes * (except for fabric nodes which are above mapped above FC_SNS_ID 28490267Sdes * and are completely virtual), but subsequent LIPs can cause things 28590267Sdes * to move around. 28690267Sdes */ 28790267Sdes struct lportdb { 288174588Sdes u_int32_t 28997856Sdes port_type : 8, 29090267Sdes loopid : 8, 291111816Sdes fc4_type : 4, 29290267Sdes last_fabric_dev : 1, 29390267Sdes : 2, 294174588Sdes relogin : 1, 29590267Sdes force_logout : 1, 29690267Sdes was_fabric_dev : 1, 297111816Sdes fabric_dev : 1, 29890267Sdes loggedin : 1, 29962981Sdes roles : 2, 30090267Sdes valid : 1; 301111816Sdes u_int32_t portid; 302174588Sdes u_int64_t node_wwn; 303174588Sdes u_int64_t port_wwn; 304111816Sdes } portdb[MAX_FC_TARG], tport[FC_PORT_ID]; 305111816Sdes 306111816Sdes /* 307210568Sdes * Scratch DMA mapped in area to fetch Port Database stuff, etc. 308210568Sdes */ 30990267Sdes caddr_t isp_scratch; 31090267Sdes ISP_DMA_ADDR_T isp_scdma; 31190267Sdes#ifdef ISP_FW_CRASH_DUMP 31290267Sdes u_int16_t *isp_dump_data; 31390267Sdes#endif 314174588Sdes} fcparam; 31597856Sdes 31690267Sdes#define FW_CONFIG_WAIT 0 31740939Sdes#define FW_WAIT_AL_PA 1 318174588Sdes#define FW_WAIT_LOGIN 2 319174588Sdes#define FW_READY 3 32097856Sdes#define FW_LOSS_OF_SYNC 4 321103459Sfenner#define FW_ERROR 5 32297856Sdes#define FW_REINIT 6 32340939Sdes#define FW_NON_PART 7 32441989Sdes 325253680Sdes#define LOOP_NIL 0 326253680Sdes#define LOOP_LIP_RCVD 1 327253680Sdes#define LOOP_PDB_RCVD 2 328253680Sdes#define LOOP_SCANNING_FABRIC 3 329253680Sdes#define LOOP_FSCAN_DONE 4 330253680Sdes#define LOOP_SCANNING_LOOP 5 331253680Sdes#define LOOP_LSCAN_DONE 6 332253680Sdes#define LOOP_SYNCING_PDB 7 333253680Sdes#define LOOP_READY 8 334253680Sdes 335253680Sdes#define TOPO_NL_PORT 0 336253680Sdes#define TOPO_FL_PORT 1 337253680Sdes#define TOPO_N_PORT 2 33841989Sdes#define TOPO_F_PORT 3 33955557Sdes#define TOPO_PTP_STUB 4 340253680Sdes 341253680Sdes/* 342253680Sdes * Soft Structure per host adapter 343253680Sdes */ 344253680Sdestypedef struct ispsoftc { 345253680Sdes /* 346253680Sdes * Platform (OS) specific data 347253680Sdes */ 348253680Sdes struct isposinfo isp_osinfo; 349253680Sdes 350253680Sdes /* 351253680Sdes * Pointer to bus specific functions and data 352253680Sdes */ 353253680Sdes struct ispmdvec * isp_mdvec; 354253680Sdes 355253680Sdes /* 356253680Sdes * (Mostly) nonvolatile state. Board specific parameters 357253680Sdes * may contain some volatile state (e.g., current loop state). 358253680Sdes */ 359253680Sdes 360253680Sdes void * isp_param; /* type specific */ 361253680Sdes u_int16_t isp_fwrev[3]; /* Loaded F/W revision */ 362253680Sdes u_int16_t isp_romfw_rev[3]; /* PROM F/W revision */ 363253680Sdes u_int16_t isp_maxcmds; /* max possible I/O cmds */ 364253680Sdes u_int8_t isp_type; /* HBA Chip Type */ 365253680Sdes u_int8_t isp_revision; /* HBA Chip H/W Revision */ 366253680Sdes u_int32_t isp_maxluns; /* maximum luns supported */ 367253680Sdes 368253680Sdes u_int32_t isp_clock : 8, /* input clock */ 369253680Sdes : 4, 370253680Sdes isp_port : 1, /* 23XX only */ 371253680Sdes isp_failed : 1, /* board failed */ 372253680Sdes isp_open : 1, /* opened (ioctl) */ 373253680Sdes isp_touched : 1, /* board ever seen? */ 374253680Sdes isp_bustype : 1, /* SBus or PCI */ 375253680Sdes isp_loaded_fw : 1, /* loaded firmware */ 376253680Sdes isp_role : 2, /* roles supported */ 377253680Sdes isp_dblev : 12; /* debug log mask */ 378253680Sdes 379253680Sdes u_int32_t isp_confopts; /* config options */ 380253680Sdes 381253680Sdes u_int16_t isp_rqstinrp; /* register for REQINP */ 382253680Sdes u_int16_t isp_rqstoutrp; /* register for REQOUTP */ 383253680Sdes u_int16_t isp_respinrp; /* register for RESINP */ 384253680Sdes u_int16_t isp_respoutrp; /* register for RESOUTP */ 385253680Sdes 386253680Sdes /* 387253680Sdes * Instrumentation 388253680Sdes */ 389253680Sdes u_int64_t isp_intcnt; /* total int count */ 390253680Sdes u_int64_t isp_intbogus; /* spurious int count */ 391253680Sdes u_int64_t isp_intmboxc; /* mbox completions */ 392253680Sdes u_int64_t isp_intoasync; /* other async */ 393253680Sdes u_int64_t isp_rsltccmplt; /* CMDs on result q */ 394253680Sdes u_int64_t isp_fphccmplt; /* CMDs via fastpost */ 395253680Sdes u_int16_t isp_rscchiwater; 396253680Sdes u_int16_t isp_fpcchiwater; 397253680Sdes 398253680Sdes /* 399253680Sdes * Volatile state 400253680Sdes */ 401253680Sdes 402253680Sdes volatile u_int32_t 403253680Sdes isp_obits : 8, /* mailbox command output */ 404253680Sdes isp_mboxbsy : 1, /* mailbox command active */ 405253680Sdes isp_state : 3, 406253680Sdes isp_sendmarker : 2, /* send a marker entry */ 407253680Sdes isp_update : 2, /* update parameters */ 408253680Sdes isp_nactive : 16; /* how many commands active */ 409253680Sdes volatile u_int16_t isp_reqodx; /* index of last ISP pickup */ 410253680Sdes volatile u_int16_t isp_reqidx; /* index of next request */ 411253680Sdes volatile u_int16_t isp_residx; /* index of next result */ 412253680Sdes volatile u_int16_t isp_resodx; /* index of next result */ 413253680Sdes volatile u_int16_t isp_rspbsy; 414253680Sdes volatile u_int16_t isp_lasthdls; /* last handle seed */ 415253680Sdes volatile u_int16_t isp_mboxtmp[MAX_MAILBOX]; 416253680Sdes volatile u_int16_t isp_lastmbxcmd; /* last mbox command sent */ 417253680Sdes volatile u_int16_t isp_mbxwrk0; 418253680Sdes volatile u_int16_t isp_mbxwrk1; 419253680Sdes volatile u_int16_t isp_mbxwrk2; 420253680Sdes void * isp_mbxworkp; 421253680Sdes 422253680Sdes /* 423253680Sdes * Active commands are stored here, indexed by handle functions. 424253680Sdes */ 425253680Sdes XS_T **isp_xflist; 426253680Sdes 427253680Sdes /* 428253680Sdes * request/result queue pointers and dma handles for them. 429253680Sdes */ 430253680Sdes caddr_t isp_rquest; 431253680Sdes caddr_t isp_result; 432253680Sdes ISP_DMA_ADDR_T isp_rquest_dma; 433253680Sdes ISP_DMA_ADDR_T isp_result_dma; 434253680Sdes} ispsoftc_t; 435253680Sdes 436253680Sdes#define SDPARAM(isp) ((sdparam *) (isp)->isp_param) 437253680Sdes#define FCPARAM(isp) ((fcparam *) (isp)->isp_param) 438253680Sdes 439253680Sdes/* 440253680Sdes * ISP Driver Run States 441253680Sdes */ 442253680Sdes#define ISP_NILSTATE 0 443253680Sdes#define ISP_RESETSTATE 1 444253680Sdes#define ISP_INITSTATE 2 445253680Sdes#define ISP_RUNSTATE 3 446253680Sdes 447253680Sdes/* 448253680Sdes * ISP Configuration Options 449253680Sdes */ 450253680Sdes#define ISP_CFG_NORELOAD 0x80 /* don't download f/w */ 451253680Sdes#define ISP_CFG_NONVRAM 0x40 /* ignore NVRAM */ 452253680Sdes#define ISP_CFG_TWOGB 0x20 /* force 2GB connection (23XX only) */ 453253680Sdes#define ISP_CFG_ONEGB 0x10 /* force 1GB connection (23XX only) */ 454253680Sdes#define ISP_CFG_FULL_DUPLEX 0x01 /* Full Duplex (Fibre Channel only) */ 455253680Sdes#define ISP_CFG_PORT_PREF 0x0C /* Mask for Port Prefs (2200 only) */ 456253680Sdes#define ISP_CFG_LPORT 0x00 /* prefer {N/F}L-Port connection */ 457253680Sdes#define ISP_CFG_NPORT 0x04 /* prefer {N/F}-Port connection */ 458253680Sdes#define ISP_CFG_NPORT_ONLY 0x08 /* insist on {N/F}-Port connection */ 459253680Sdes#define ISP_CFG_LPORT_ONLY 0x0C /* insist on {N/F}L-Port connection */ 460253680Sdes#define ISP_CFG_OWNWWPN 0x100 /* override NVRAM wwpn */ 461253680Sdes#define ISP_CFG_OWNWWNN 0x200 /* override NVRAM wwnn */ 462253680Sdes#define ISP_CFG_OWNFSZ 0x400 /* override NVRAM frame size */ 463253680Sdes#define ISP_CFG_OWNLOOPID 0x800 /* override NVRAM loopid */ 464253680Sdes#define ISP_CFG_OWNEXCTHROTTLE 0x1000 /* override NVRAM execution throttle */ 465253680Sdes 466253680Sdes/* 467253680Sdes * Prior to calling isp_reset for the first time, the outer layer 468253680Sdes * should set isp_role to one of NONE, INITIATOR, TARGET, BOTH. 469253680Sdes * 470253680Sdes * If you set ISP_ROLE_NONE, the cards will be reset, new firmware loaded, 471253680Sdes * NVRAM read, and defaults set, but any further initialization (e.g. 472253680Sdes * INITIALIZE CONTROL BLOCK commands for 2X00 cards) won't be done. 473253680Sdes * 474253680Sdes * If INITIATOR MODE isn't set, attempts to run commands will be stopped 475253680Sdes * at isp_start and completed with the moral equivalent of SELECTION TIMEOUT. 476253680Sdes * 477253680Sdes * If TARGET MODE is set, it doesn't mean that the rest of target mode support 478253680Sdes * needs to be enabled, or will even work. What happens with the 2X00 cards 479253680Sdes * here is that if you have enabled it with TARGET MODE as part of the ICB 480253680Sdes * options, but you haven't given the f/w any ram resources for ATIOs or 481253680Sdes * Immediate Notifies, the f/w just handles what it can and you never see 482253680Sdes * anything. Basically, it sends a single byte of data (the first byte, 483253680Sdes * which you can set as part of the INITIALIZE CONTROL BLOCK command) for 484253680Sdes * INQUIRY, and sends back QUEUE FULL status for any other command. 485253680Sdes * 486253680Sdes */ 487253680Sdes#define ISP_ROLE_NONE 0x0 488253680Sdes#define ISP_ROLE_INITIATOR 0x1 489253680Sdes#define ISP_ROLE_TARGET 0x2 490253680Sdes#define ISP_ROLE_BOTH (ISP_ROLE_TARGET|ISP_ROLE_INITIATOR) 491253680Sdes#define ISP_ROLE_EITHER ISP_ROLE_BOTH 492253680Sdes#ifndef ISP_DEFAULT_ROLES 493253680Sdes#define ISP_DEFAULT_ROLES ISP_ROLE_INITIATOR 494253680Sdes#endif 495253680Sdes 496253680Sdes 497253680Sdes/* 498253680Sdes * Firmware related defines 499253680Sdes */ 500253680Sdes#define ISP_CODE_ORG 0x1000 /* default f/w code start */ 501253680Sdes#define ISP_CODE_ORG_2300 0x0800 /* ..except for 2300s */ 502253680Sdes#define ISP_FW_REV(maj, min, mic) ((maj << 24) | (min << 16) | mic) 503253680Sdes#define ISP_FW_MAJOR(code) ((code >> 24) & 0xff) 504253680Sdes#define ISP_FW_MINOR(code) ((code >> 16) & 0xff) 505253680Sdes#define ISP_FW_MICRO(code) ((code >> 8) & 0xff) 506253680Sdes#define ISP_FW_REVX(xp) ((xp[0]<<24) | (xp[1] << 16) | xp[2]) 507253680Sdes#define ISP_FW_MAJORX(xp) (xp[0]) 508253680Sdes#define ISP_FW_MINORX(xp) (xp[1]) 509253680Sdes#define ISP_FW_MICROX(xp) (xp[2]) 510253680Sdes 511253680Sdes/* 512253680Sdes * Bus (implementation) types 513253680Sdes */ 514253680Sdes#define ISP_BT_PCI 0 /* PCI Implementations */ 515253680Sdes#define ISP_BT_SBUS 1 /* SBus Implementations */ 516253680Sdes 517253680Sdes/* 518253680Sdes * If we have not otherwise defined SBus support away make sure 519253680Sdes * it is defined here such that the code is included as default 520253680Sdes */ 521253680Sdes#ifndef ISP_SBUS_SUPPORTED 522253680Sdes#define ISP_SBUS_SUPPORTED 1 523253680Sdes#endif 524253680Sdes 525253680Sdes/* 526253680Sdes * Chip Types 527253680Sdes */ 528253680Sdes#define ISP_HA_SCSI 0xf 529253680Sdes#define ISP_HA_SCSI_UNKNOWN 0x1 530253680Sdes#define ISP_HA_SCSI_1020 0x2 531253680Sdes#define ISP_HA_SCSI_1020A 0x3 532253680Sdes#define ISP_HA_SCSI_1040 0x4 533253680Sdes#define ISP_HA_SCSI_1040A 0x5 534253680Sdes#define ISP_HA_SCSI_1040B 0x6 535253680Sdes#define ISP_HA_SCSI_1040C 0x7 536253680Sdes#define ISP_HA_SCSI_1240 0x8 537253680Sdes#define ISP_HA_SCSI_1080 0x9 538253680Sdes#define ISP_HA_SCSI_1280 0xa 539253680Sdes#define ISP_HA_SCSI_12160 0xb 540253680Sdes#define ISP_HA_FC 0xf0 541253680Sdes#define ISP_HA_FC_2100 0x10 542253680Sdes#define ISP_HA_FC_2200 0x20 543253680Sdes#define ISP_HA_FC_2300 0x30 544253680Sdes#define ISP_HA_FC_2312 0x40 545253680Sdes 546253680Sdes#define IS_SCSI(isp) (isp->isp_type & ISP_HA_SCSI) 547253680Sdes#define IS_1240(isp) (isp->isp_type == ISP_HA_SCSI_1240) 548253680Sdes#define IS_1080(isp) (isp->isp_type == ISP_HA_SCSI_1080) 549253680Sdes#define IS_1280(isp) (isp->isp_type == ISP_HA_SCSI_1280) 550253680Sdes#define IS_12160(isp) (isp->isp_type == ISP_HA_SCSI_12160) 551253680Sdes 552253680Sdes#define IS_12X0(isp) (IS_1240(isp) || IS_1280(isp)) 553253680Sdes#define IS_DUALBUS(isp) (IS_12X0(isp) || IS_12160(isp)) 554253680Sdes#define IS_ULTRA2(isp) (IS_1080(isp) || IS_1280(isp) || IS_12160(isp)) 555253680Sdes#define IS_ULTRA3(isp) (IS_12160(isp)) 556253680Sdes 557253680Sdes#define IS_FC(isp) ((isp)->isp_type & ISP_HA_FC) 558253680Sdes#define IS_2100(isp) ((isp)->isp_type == ISP_HA_FC_2100) 559253680Sdes#define IS_2200(isp) ((isp)->isp_type == ISP_HA_FC_2200) 560253680Sdes#define IS_23XX(isp) ((isp)->isp_type >= ISP_HA_FC_2300) 561253680Sdes#define IS_2300(isp) ((isp)->isp_type == ISP_HA_FC_2300) 562253680Sdes#define IS_2312(isp) ((isp)->isp_type == ISP_HA_FC_2312) 563253680Sdes 564253680Sdes/* 565253680Sdes * DMA cookie macros 566253680Sdes */ 567253680Sdes#define DMA_WD3(x) 0 568253680Sdes#define DMA_WD2(x) 0 569253680Sdes#define DMA_WD1(x) (((x) >> 16) & 0xffff) 570253680Sdes#define DMA_WD0(x) (((x) & 0xffff)) 571253680Sdes 572253680Sdes/* 573253680Sdes * Core System Function Prototypes 574253680Sdes */ 575253680Sdes 576253680Sdes/* 577253680Sdes * Reset Hardware. Totally. Assumes that you'll follow this with 578253680Sdes * a call to isp_init. 579253680Sdes */ 580253680Sdesvoid isp_reset(struct ispsoftc *); 581253680Sdes 582253680Sdes/* 583253680Sdes * Initialize Hardware to known state 584253680Sdes */ 585253680Sdesvoid isp_init(struct ispsoftc *); 586253680Sdes 587253680Sdes/* 588253680Sdes * Reset the ISP and call completion for any orphaned commands. 589253680Sdes */ 590253680Sdesvoid isp_reinit(struct ispsoftc *); 591253680Sdes 592253680Sdes#ifdef ISP_FW_CRASH_DUMP 593253680Sdes/* 594253680Sdes * Dump firmware entry point. 595253680Sdes */ 596253680Sdesvoid isp_fw_dump(struct ispsoftc *isp); 597253680Sdes#endif 598253680Sdes 599253680Sdes/* 600253680Sdes * Internal Interrupt Service Routine 601253680Sdes * 602253680Sdes * The outer layers do the spade work to get the appropriate status register, 603253680Sdes * semaphore register and first mailbox register (if appropriate). This also 604253680Sdes * means that most spurious/bogus interrupts not for us can be filtered first. 605253680Sdes */ 606253680Sdesvoid isp_intr(struct ispsoftc *, u_int16_t, u_int16_t, u_int16_t); 607253680Sdes 608253680Sdes 609253680Sdes/* 610253680Sdes * Command Entry Point- Platform Dependent layers call into this 611253680Sdes */ 612253680Sdesint isp_start(XS_T *); 613253680Sdes/* these values are what isp_start returns */ 614253680Sdes#define CMD_COMPLETE 101 /* command completed */ 615253680Sdes#define CMD_EAGAIN 102 /* busy- maybe retry later */ 616253680Sdes#define CMD_QUEUED 103 /* command has been queued for execution */ 617253680Sdes#define CMD_RQLATER 104 /* requeue this command later */ 618253680Sdes 619253680Sdes/* 620253680Sdes * Command Completion Point- Core layers call out from this with completed cmds 621253680Sdes */ 622253680Sdesvoid isp_done(XS_T *); 623253680Sdes 624253680Sdes/* 625253680Sdes * Platform Dependent to External to Internal Control Function 626253680Sdes * 627253680Sdes * Assumes locks are held on entry. You should note that with many of 628253680Sdes * these commands and locks may be released while this is occurring. 629253680Sdes * 630253680Sdes * A few notes about some of these functions: 631253680Sdes * 632253680Sdes * ISPCTL_FCLINK_TEST tests to make sure we have good fibre channel link. 633253680Sdes * The argument is a pointer to an integer which is the time, in microseconds, 634253680Sdes * we should wait to see whether we have good link. This test, if successful, 635253680Sdes * lets us know our connection topology and our Loop ID/AL_PA and so on. 636253680Sdes * You can't get anywhere without this. 637253680Sdes * 638253680Sdes * ISPCTL_SCAN_FABRIC queries the name server (if we're on a fabric) for 639253680Sdes * all entities using the FC Generic Services subcommand GET ALL NEXT. 640253680Sdes * For each found entity, an ISPASYNC_FABRICDEV event is generated (see 641253680Sdes * below). 642253680Sdes * 643253680Sdes * ISPCTL_SCAN_LOOP does a local loop scan. This is only done if the connection 644253680Sdes * topology is NL or FL port (private or public loop). Since the Qlogic f/w 645253680Sdes * 'automatically' manages local loop connections, this function essentially 646253680Sdes * notes the arrival, departure, and possible shuffling around of local loop 647253680Sdes * entities. Thus for each arrival and departure this generates an isp_async 648253680Sdes * event of ISPASYNC_PROMENADE (see below). 649253680Sdes * 650253680Sdes * ISPCTL_PDB_SYNC is somewhat misnamed. It actually is the final step, in 651253680Sdes * order, of ISPCTL_FCLINK_TEST, ISPCTL_SCAN_FABRIC, and ISPCTL_SCAN_LOOP. 652253680Sdes * The main purpose of ISPCTL_PDB_SYNC is to complete management of logging 653253680Sdes * and logging out of fabric devices (if one is on a fabric) and then marking 654253680Sdes * the 'loop state' as being ready to now be used for sending commands to 655253680Sdes * devices. Originally fabric name server and local loop scanning were 656253680Sdes * part of this function. It's now been separated to allow for finer control. 657253680Sdes */ 658253680Sdestypedef enum { 659253680Sdes ISPCTL_RESET_BUS, /* Reset Bus */ 660253680Sdes ISPCTL_RESET_DEV, /* Reset Device */ 661253680Sdes ISPCTL_ABORT_CMD, /* Abort Command */ 662253680Sdes ISPCTL_UPDATE_PARAMS, /* Update Operating Parameters (SCSI) */ 663253680Sdes ISPCTL_FCLINK_TEST, /* Test FC Link Status */ 664253680Sdes ISPCTL_SCAN_FABRIC, /* (Re)scan Fabric Name Server */ 665253680Sdes ISPCTL_SCAN_LOOP, /* (Re)scan Local Loop */ 666253680Sdes ISPCTL_PDB_SYNC, /* Synchronize Port Database */ 667253680Sdes ISPCTL_SEND_LIP, /* Send a LIP */ 668253680Sdes ISPCTL_GET_POSMAP, /* Get FC-AL position map */ 669253680Sdes ISPCTL_RUN_MBOXCMD, /* run a mailbox command */ 670253680Sdes ISPCTL_TOGGLE_TMODE /* toggle target mode */ 671253680Sdes} ispctl_t; 672253680Sdesint isp_control(struct ispsoftc *, ispctl_t, void *); 673253680Sdes 674253680Sdes 675253680Sdes/* 676253680Sdes * Platform Dependent to Internal to External Control Function 677253680Sdes * (each platform must provide such a function) 678253680Sdes * 679253680Sdes * Assumes locks are held. 680253680Sdes * 681253680Sdes * A few notes about some of these functions: 682253680Sdes * 683253680Sdes * ISPASYNC_CHANGE_NOTIFY notifies the outer layer that a change has 684253680Sdes * occurred that invalidates the list of fabric devices known and/or 685253680Sdes * the list of known loop devices. The argument passed is a pointer 686253680Sdes * whose values are defined below (local loop change, name server 687253680Sdes * change, other). 'Other' may simply be a LIP, or a change in 688253680Sdes * connection topology. 689253680Sdes * 690253680Sdes * ISPASYNC_FABRIC_DEV announces the next element in a list of 691253680Sdes * fabric device names we're getting out of the name server. The 692253680Sdes * argument points to a GET ALL NEXT response structure. The list 693253680Sdes * is known to terminate with an entry that refers to ourselves. 694253680Sdes * One of the main purposes of this function is to allow outer 695253680Sdes * layers, which are OS dependent, to set policy as to which fabric 696253680Sdes * devices might actually be logged into (and made visible) later 697253680Sdes * at ISPCTL_PDB_SYNC time. Since there's a finite number of fabric 698253680Sdes * devices that we can log into (256 less 3 'reserved' for F-port 699253680Sdes * topologies), and fabrics can grow up to 8 million or so entries 700253680Sdes * (24 bits of Port Address, less a wad of reserved spaces), clearly 701253680Sdes * we had better let the OS determine login policy. 702253680Sdes * 703253680Sdes * ISPASYNC_PROMENADE has an argument that is a pointer to an integer which 704253680Sdes * is an index into the portdb in the softc ('target'). Whether that entrie's 705253680Sdes * valid tag is set or not says whether something has arrived or departed. 706253680Sdes * The name refers to a favorite pastime of many city dwellers- watching 707253680Sdes * people come and go, talking of Michaelangelo, and so on.. 708253680Sdes * 709253680Sdes * ISPASYNC_UNHANDLED_RESPONSE gives outer layers a chance to parse a 710253680Sdes * response queue entry not otherwise handled. The outer layer should 711253680Sdes * return non-zero if it handled it. The 'arg' points to an unmassaged 712253680Sdes * response queue entry. 713253680Sdes */ 714253680Sdes 715253680Sdestypedef enum { 716253680Sdes ISPASYNC_NEW_TGT_PARAMS, /* New Target Parameters Negotiated */ 717253680Sdes ISPASYNC_BUS_RESET, /* Bus Was Reset */ 718253680Sdes ISPASYNC_LOOP_DOWN, /* FC Loop Down */ 719253680Sdes ISPASYNC_LOOP_UP, /* FC Loop Up */ 720253680Sdes ISPASYNC_LIP, /* LIP Received */ 721253680Sdes ISPASYNC_LOOP_RESET, /* Loop Reset Received */ 722253680Sdes ISPASYNC_CHANGE_NOTIFY, /* FC Change Notification */ 723253680Sdes ISPASYNC_FABRIC_DEV, /* FC Fabric Device Arrival */ 724253680Sdes ISPASYNC_PROMENADE, /* FC Objects coming && going */ 725253680Sdes ISPASYNC_TARGET_MESSAGE, /* target message */ 726253680Sdes ISPASYNC_TARGET_EVENT, /* target asynchronous event */ 727253680Sdes ISPASYNC_TARGET_ACTION, /* other target command action */ 728253680Sdes ISPASYNC_CONF_CHANGE, /* Platform Configuration Change */ 729253680Sdes ISPASYNC_UNHANDLED_RESPONSE, /* Unhandled Response Entry */ 730253680Sdes ISPASYNC_FW_CRASH, /* Firmware has crashed */ 731253680Sdes ISPASYNC_FW_RESTARTED /* Firmware has been restarted */ 732253680Sdes} ispasync_t; 733253680Sdesint isp_async(struct ispsoftc *, ispasync_t, void *); 734253680Sdes 735253680Sdes#define ISPASYNC_CHANGE_PDB ((void *) 0) 736253680Sdes#define ISPASYNC_CHANGE_SNS ((void *) 1) 737253680Sdes#define ISPASYNC_CHANGE_OTHER ((void *) 2) 738253680Sdes 739253680Sdes/* 740253680Sdes * Platform Dependent Error and Debug Printout 741253680Sdes */ 742253680Sdes#ifdef __GNUC__ 743253680Sdesvoid isp_prt(struct ispsoftc *, int level, const char *, ...) 744253680Sdes __attribute__((__format__(__printf__,3,4))); 745253680Sdes#else 746253680Sdesvoid isp_prt(struct ispsoftc *, int level, const char *, ...); 747253680Sdes#endif 748253680Sdes 749253680Sdes#define ISP_LOGALL 0x0 /* log always */ 750253680Sdes#define ISP_LOGCONFIG 0x1 /* log configuration messages */ 751253680Sdes#define ISP_LOGINFO 0x2 /* log informational messages */ 752253680Sdes#define ISP_LOGWARN 0x4 /* log warning messages */ 753253680Sdes#define ISP_LOGERR 0x8 /* log error messages */ 754253680Sdes#define ISP_LOGDEBUG0 0x10 /* log simple debug messages */ 755253680Sdes#define ISP_LOGDEBUG1 0x20 /* log intermediate debug messages */ 756253680Sdes#define ISP_LOGDEBUG2 0x40 /* log most debug messages */ 757253680Sdes#define ISP_LOGDEBUG3 0x80 /* log high frequency debug messages */ 758253680Sdes#define ISP_LOGDEBUG4 0x100 /* log high frequency debug messages */ 759253680Sdes#define ISP_LOGTDEBUG0 0x200 /* log simple debug messages (target mode) */ 760253680Sdes#define ISP_LOGTDEBUG1 0x400 /* log intermediate debug messages (target) */ 761253680Sdes#define ISP_LOGTDEBUG2 0x800 /* log all debug messages (target) */ 762253680Sdes 763253680Sdes/* 764253680Sdes * Each Platform provides it's own isposinfo substructure of the ispsoftc 765253680Sdes * defined above. 766253680Sdes * 767253680Sdes * Each platform must also provide the following macros/defines: 768253680Sdes * 769253680Sdes * 770253680Sdes * INLINE - platform specific define for 'inline' functions 771253680Sdes * 772253680Sdes * ISP_DMA_ADDR_T - platform specific dma address coookie- basically 773253680Sdes * the largest integer that can hold the 32 or 774253680Sdes * 64 bit value appropriate for the QLogic's DMA 775253680Sdes * addressing. Defaults to u_int32_t. 776253680Sdes * 777253680Sdes * ISP2100_SCRLEN - length for the Fibre Channel scratch DMA area 778253680Sdes * 779253680Sdes * MEMZERO(dst, src) platform zeroing function 780253680Sdes * MEMCPY(dst, src, count) platform copying function 781253680Sdes * SNPRINTF(buf, bufsize, fmt, ...) snprintf 782253680Sdes * STRNCAT(dstbuf, size, srcbuf) strncat 783253680Sdes * USEC_DELAY(usecs) microsecond spindelay function 784253680Sdes * USEC_SLEEP(isp, usecs) microsecond sleep function 785253680Sdes * 786253680Sdes * NANOTIME_T nanosecond time type 787253680Sdes * 788253680Sdes * GET_NANOTIME(NANOTIME_T *) get current nanotime. 789253680Sdes * 790253680Sdes * GET_NANOSEC(NANOTIME_T *) get u_int64_t from NANOTIME_T 791253680Sdes * 792253680Sdes * NANOTIME_SUB(NANOTIME_T *, NANOTIME_T *) 793253680Sdes * subtract two NANOTIME_T values 794253680Sdes * 795253680Sdes * 796253680Sdes * MAXISPREQUEST(struct ispsoftc *) maximum request queue size 797253680Sdes * for this particular board type 79897868Sdes * 79997868Sdes * MEMORYBARRIER(struct ispsoftc *, barrier_type, offset, size) 80097868Sdes * 801253680Sdes * Function/Macro the provides memory synchronization on 80297868Sdes * various objects so that the ISP's and the system's view 803214256Semaste * of the same object is consistent. 804210568Sdes * 805253680Sdes * MBOX_ACQUIRE(struct ispsoftc *) acquire lock on mailbox regs 806253680Sdes * MBOX_WAIT_COMPLETE(struct ispsoftc *) wait for mailbox cmd to be done 80797868Sdes * MBOX_NOTIFY_COMPLETE(struct ispsoftc *) notification of mbox cmd donee 80897868Sdes * MBOX_RELEASE(struct ispsoftc *) release lock on mailbox regs 80997868Sdes * 81097868Sdes * FC_SCRATCH_ACQUIRE(struct ispsoftc *) acquire lock on FC scratch area 81197868Sdes * FC_SCRATCH_RELEASE(struct ispsoftc *) acquire lock on FC scratch area 81297868Sdes * 81397868Sdes * SCSI_GOOD SCSI 'Good' Status 81497868Sdes * SCSI_CHECK SCSI 'Check Condition' Status 81597868Sdes * SCSI_BUSY SCSI 'Busy' Status 81697868Sdes * SCSI_QFULL SCSI 'Queue Full' Status 81797868Sdes * 818108579Sdes * XS_T Platform SCSI transaction type (i.e., command for HBA) 81997868Sdes * XS_ISP(xs) gets an instance out of an XS_T 820253680Sdes * XS_CHANNEL(xs) gets the channel (bus # for DUALBUS cards) "" 821253680Sdes * XS_TGT(xs) gets the target "" 822253680Sdes * XS_LUN(xs) gets the lun "" 823253680Sdes * XS_CDBP(xs) gets a pointer to the scsi CDB "" 824253680Sdes * XS_CDBLEN(xs) gets the CDB's length "" 825253680Sdes * XS_XFRLEN(xs) gets the associated data transfer length "" 82697868Sdes * XS_TIME(xs) gets the time (in milliseconds) for this command 827253680Sdes * XS_RESID(xs) gets the current residual count 82897868Sdes * XS_STSP(xs) gets a pointer to the SCSI status byte "" 82997868Sdes * XS_SNSP(xs) gets a pointer to the associate sense data 83097868Sdes * XS_SNSLEN(xs) gets the length of sense data storage 83197868Sdes * XS_SNSKEY(xs) dereferences XS_SNSP to get the current stored Sense Key 832210568Sdes * XS_TAG_P(xs) predicate of whether this command should be tagged 833210568Sdes * XS_TAG_TYPE(xs) which type of tag to use 834210568Sdes * XS_SETERR(xs) set error state 835210568Sdes * 836210568Sdes * HBA_NOERROR command has no erros 837210568Sdes * HBA_BOTCH hba botched something 838210568Sdes * HBA_CMDTIMEOUT command timed out 83997868Sdes * HBA_SELTIMEOUT selection timed out (also port logouts for FC) 840253680Sdes * HBA_TGTBSY target returned a BUSY status 84197868Sdes * HBA_BUSRESET bus reset destroyed command 842253680Sdes * HBA_ABORTED command was aborted (by request) 843253680Sdes * HBA_DATAOVR a data overrun was detected 844253680Sdes * HBA_ARQFAIL Automatic Request Sense failed 845253680Sdes * 846253680Sdes * XS_ERR(xs) return current error state 847253680Sdes * XS_NOERR(xs) there is no error currently set 848253680Sdes * XS_INITERR(xs) initialize error state 849253680Sdes * 850253680Sdes * XS_SAVE_SENSE(xs, sp) save sense data 851253680Sdes * 852253680Sdes * XS_SET_STATE_STAT(isp, sp, xs) platform dependent interpreter of 853253680Sdes * response queue entry status bits 854253680Sdes * 855253680Sdes * 856253680Sdes * DEFAULT_IID(struct ispsoftc *) Default SCSI initiator ID 857253680Sdes * DEFAULT_LOOPID(struct ispsoftc *) Default FC Loop ID 85897868Sdes * DEFAULT_NODEWWN(struct ispsoftc *) Default Node WWN 859253680Sdes * DEFAULT_PORTWWN(struct ispsoftc *) Default Port WWN 86097868Sdes * DEFAULT_FRAMESIZE(struct ispsoftc *) Default Frame Size 86197868Sdes * DEFAULT_EXEC_THROTTLE(struct ispsoftc *) Default Execution Throttle 86297868Sdes * These establish reasonable defaults for each platform. 863253680Sdes * These must be available independent of card NVRAM and are 864253680Sdes * to be used should NVRAM not be readable. 86597868Sdes * 86697868Sdes * ISP_NODEWWN(struct ispsoftc *) FC Node WWN to use 867253680Sdes * ISP_PORTWWN(struct ispsoftc *) FC Port WWN to use 868253680Sdes * 86997868Sdes * These are to be used after NVRAM is read. The tags 87097868Sdes * in fcparam.isp_{node,port}wwn reflect the values 87197868Sdes * read from NVRAM (possibly corrected for card botches). 87297891Sdes * Each platform can take that information and override 87397891Sdes * it or ignore and return the Node and Port WWNs to be 87497891Sdes * used when sending the Qlogic f/w the Initialization Control 87597891Sdes * Block. 87697891Sdes * 87797891Sdes * (XXX these do endian specific transformations- in transition XXX) 87897868Sdes * 87997868Sdes * ISP_IOXPUT_8(struct ispsoftc *, u_int8_t srcval, u_int8_t *dstptr) 880210568Sdes * ISP_IOXPUT_16(struct ispsoftc *, u_int16_t srcval, u_int16_t *dstptr) 881210568Sdes * ISP_IOXPUT_32(struct ispsoftc *, u_int32_t srcval, u_int32_t *dstptr) 882210568Sdes * 88398117Sdes * ISP_IOXGET_8(struct ispsoftc *, u_int8_t *srcptr, u_int8_t dstrval) 884210568Sdes * ISP_IOXGET_16(struct ispsoftc *, u_int16_t *srcptr, u_int16_t dstrval) 885210568Sdes * ISP_IOXGET_32(struct ispsoftc *, u_int32_t *srcptr, u_int32_t dstrval) 886210568Sdes * 887210568Sdes * ISP_SWIZZLE_NVRAM_WORD(struct ispsoftc *, u_int16_t *) 888210568Sdes */ 889210568Sdes 890210568Sdes#endif /* _ISPVAR_H */ 891210568Sdes