ispvar.h revision 71079
1/* $FreeBSD: head/sys/dev/isp/ispvar.h 71079 2001-01-15 18:40:37Z mjacob $ */
2/*
3 * Soft Definitions for for Qlogic ISP SCSI adapters.
4 *
5 * Copyright (c) 1997, 1998, 1999, 2000 by Matthew Jacob
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice immediately at the beginning of the file, without modification,
13 *    this list of conditions, and the following disclaimer.
14 * 2. The name of the author may not be used to endorse or promote products
15 *    derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 */
30
31#ifndef	_ISPVAR_H
32#define	_ISPVAR_H
33
34#if defined(__NetBSD__) || defined(__OpenBSD__)
35#include <dev/ic/ispmbox.h>
36#ifdef	ISP_TARGET_MODE
37#include <dev/ic/isp_target.h>
38#include <dev/ic/isp_tpublic.h>
39#endif
40#endif
41#ifdef	__FreeBSD__
42#include <dev/isp/ispmbox.h>
43#ifdef	ISP_TARGET_MODE
44#include <dev/isp/isp_target.h>
45#include <dev/isp/isp_tpublic.h>
46#endif
47#endif
48#ifdef	__linux__
49#include "ispmbox.h"
50#ifdef	ISP_TARGET_MODE
51#include "isp_target.h"
52#include "isp_tpublic.h"
53#endif
54#endif
55
56#define	ISP_CORE_VERSION_MAJOR	2
57#define	ISP_CORE_VERSION_MINOR	0
58
59/*
60 * Vector for bus specific code to provide specific services.
61 */
62struct ispsoftc;
63struct ispmdvec {
64	u_int16_t	(*dv_rd_reg) __P((struct ispsoftc *, int));
65	void		(*dv_wr_reg) __P((struct ispsoftc *, int, u_int16_t));
66	int		(*dv_mbxdma) __P((struct ispsoftc *));
67	int		(*dv_dmaset) __P((struct ispsoftc *,
68		XS_T *, ispreq_t *, u_int16_t *, u_int16_t));
69	void		(*dv_dmaclr)
70		__P((struct ispsoftc *, XS_T *, u_int32_t));
71	void		(*dv_reset0) __P((struct ispsoftc *));
72	void		(*dv_reset1) __P((struct ispsoftc *));
73	void		(*dv_dregs) __P((struct ispsoftc *, const char *));
74	const u_int16_t	*dv_ispfw;	/* ptr to f/w */
75	u_int16_t	dv_conf1;
76	u_int16_t	dv_clock;	/* clock frequency */
77};
78
79/*
80 * Overall parameters
81 */
82#define	MAX_TARGETS	16
83#ifdef	ISP2100_FABRIC
84#define	MAX_FC_TARG	256
85#else
86#define	MAX_FC_TARG	126
87#endif
88
89#define	ISP_MAX_TARGETS(isp)	(IS_FC(isp)? MAX_FC_TARG : MAX_TARGETS)
90#define	ISP_MAX_LUNS(isp)	(isp)->isp_maxluns
91
92
93/*
94 * Macros to access ISP registers through bus specific layers-
95 * mostly wrappers to vector through the mdvec structure.
96 */
97
98#define	ISP_READ(isp, reg)	\
99	(*(isp)->isp_mdvec->dv_rd_reg)((isp), (reg))
100
101#define	ISP_WRITE(isp, reg, val)	\
102	(*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), (val))
103
104#define	ISP_MBOXDMASETUP(isp)	\
105	(*(isp)->isp_mdvec->dv_mbxdma)((isp))
106
107#define	ISP_DMASETUP(isp, xs, req, iptrp, optr)	\
108	(*(isp)->isp_mdvec->dv_dmaset)((isp), (xs), (req), (iptrp), (optr))
109
110#define	ISP_DMAFREE(isp, xs, hndl)	\
111	if ((isp)->isp_mdvec->dv_dmaclr) \
112	    (*(isp)->isp_mdvec->dv_dmaclr)((isp), (xs), (hndl))
113
114#define	ISP_RESET0(isp)	\
115	if ((isp)->isp_mdvec->dv_reset0) (*(isp)->isp_mdvec->dv_reset0)((isp))
116#define	ISP_RESET1(isp)	\
117	if ((isp)->isp_mdvec->dv_reset1) (*(isp)->isp_mdvec->dv_reset1)((isp))
118#define	ISP_DUMPREGS(isp, m)	\
119	if ((isp)->isp_mdvec->dv_dregs) (*(isp)->isp_mdvec->dv_dregs)((isp),(m))
120
121#define	ISP_SETBITS(isp, reg, val)	\
122 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) | (val))
123
124#define	ISP_CLRBITS(isp, reg, val)	\
125 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) & ~(val))
126
127/*
128 * The MEMORYBARRIER macro is defined per platform (to provide synchronization
129 * on Request and Response Queues, Scratch DMA areas, and Registers)
130 *
131 * Defined Memory Barrier Synchronization Types
132 */
133#define	SYNC_REQUEST	0	/* request queue synchronization */
134#define	SYNC_RESULT	1	/* result queue synchronization */
135#define	SYNC_SFORDEV	2	/* scratch, sync for ISP */
136#define	SYNC_SFORCPU	3	/* scratch, sync for CPU */
137#define	SYNC_REG	4	/* for registers */
138
139/*
140 * Request/Response Queue defines and macros.
141 * The maximum is defined per platform (and can be based on board type).
142 */
143/* This is the size of a queue entry (request and response) */
144#define	QENTRY_LEN			64
145/* Both request and result queue length must be a power of two */
146#define	RQUEST_QUEUE_LEN(x)		MAXISPREQUEST(x)
147#define	RESULT_QUEUE_LEN(x)		\
148	(((MAXISPREQUEST(x) >> 2) < 64)? 64 : MAXISPREQUEST(x) >> 2)
149#define	ISP_QUEUE_ENTRY(q, idx)		((q) + ((idx) * QENTRY_LEN))
150#define	ISP_QUEUE_SIZE(n)		((n) * QENTRY_LEN)
151#define	ISP_NXT_QENTRY(idx, qlen)	(((idx) + 1) & ((qlen)-1))
152#define	ISP_QFREE(in, out, qlen)	\
153	((in == out)? (qlen - 1) : ((in > out)? \
154	((qlen - 1) - (in - out)) : (out - in - 1)))
155#define	ISP_QAVAIL(isp)	\
156	ISP_QFREE(isp->isp_reqidx, isp->isp_reqodx, RQUEST_QUEUE_LEN(isp))
157
158#define	ISP_ADD_REQUEST(isp, iptr)	\
159	MEMORYBARRIER(isp, SYNC_REQUEST, iptr, QENTRY_LEN); \
160	ISP_WRITE(isp, INMAILBOX4, iptr); \
161	isp->isp_reqidx = iptr
162
163/*
164 * SCSI Specific Host Adapter Parameters- per bus, per target
165 */
166
167typedef struct {
168	u_int		isp_gotdparms		: 1,
169			isp_req_ack_active_neg	: 1,
170			isp_data_line_active_neg: 1,
171			isp_cmd_dma_burst_enable: 1,
172			isp_data_dma_burst_enabl: 1,
173			isp_fifo_threshold	: 3,
174			isp_ultramode		: 1,
175			isp_diffmode		: 1,
176			isp_lvdmode		: 1,
177			isp_fast_mttr		: 1,	/* fast sram */
178			isp_initiator_id	: 4,
179			isp_async_data_setup	: 4;
180	u_int16_t	isp_selection_timeout;
181	u_int16_t	isp_max_queue_depth;
182	u_int8_t	isp_tag_aging;
183	u_int8_t	isp_bus_reset_delay;
184	u_int8_t	isp_retry_count;
185	u_int8_t	isp_retry_delay;
186	struct {
187		u_int	dev_enable	:	1,	/* ignored */
188					:	1,
189			dev_update	:	1,
190			dev_refresh	:	1,
191			exc_throttle	:	8,
192			cur_offset	:	4,
193			sync_offset	:	4;
194		u_int8_t	cur_period;	/* current sync period */
195		u_int8_t	sync_period;	/* goal sync period */
196		u_int16_t	dev_flags;	/* goal device flags */
197		u_int16_t	cur_dflags;	/* current device flags */
198	} isp_devparam[MAX_TARGETS];
199} sdparam;
200
201/*
202 * Device Flags
203 */
204#define	DPARM_DISC	0x8000
205#define	DPARM_PARITY	0x4000
206#define	DPARM_WIDE	0x2000
207#define	DPARM_SYNC	0x1000
208#define	DPARM_TQING	0x0800
209#define	DPARM_ARQ	0x0400
210#define	DPARM_QFRZ	0x0200
211#define	DPARM_RENEG	0x0100
212#define	DPARM_NARROW	0x0080
213#define	DPARM_ASYNC	0x0040
214#define	DPARM_PPR	0x0020
215#define	DPARM_DEFAULT	(0xFF00 & ~DPARM_QFRZ)
216#define	DPARM_SAFE_DFLT	(DPARM_DEFAULT & ~(DPARM_WIDE|DPARM_SYNC|DPARM_TQING))
217
218
219/* technically, not really correct, as they need to be rated based upon clock */
220#define	ISP_80M_SYNCPARMS	0x0c09
221#define	ISP_40M_SYNCPARMS	0x0c0a
222#define	ISP_20M_SYNCPARMS	0x0c0c
223#define	ISP_20M_SYNCPARMS_1040	0x080c
224#define	ISP_10M_SYNCPARMS	0x0c19
225#define	ISP_08M_SYNCPARMS	0x0c25
226#define	ISP_05M_SYNCPARMS	0x0c32
227#define	ISP_04M_SYNCPARMS	0x0c41
228
229/*
230 * Fibre Channel Specifics
231 */
232#define	FL_PORT_ID		0x7e	/* FL_Port Special ID */
233#define	FC_PORT_ID		0x7f	/* Fabric Controller Special ID */
234#define	FC_SNS_ID		0x80	/* SNS Server Special ID */
235
236typedef struct {
237	u_int32_t		isp_fwoptions	: 16,
238						: 4,
239				loop_seen_once	: 1,
240				isp_loopstate	: 3,	/* Current Loop State */
241				isp_fwstate	: 3,	/* ISP F/W state */
242				isp_gotdparms	: 1,
243				isp_topo	: 3,
244				isp_onfabric	: 1;
245	u_int8_t		isp_loopid;	/* hard loop id */
246	u_int8_t		isp_alpa;	/* ALPA */
247	volatile u_int16_t	isp_lipseq;	/* LIP sequence # */
248	u_int32_t		isp_portid;
249	u_int8_t		isp_execthrottle;
250	u_int8_t		isp_retry_delay;
251	u_int8_t		isp_retry_count;
252	u_int8_t		isp_reserved;
253	u_int16_t		isp_maxalloc;
254	u_int16_t		isp_maxfrmlen;
255	u_int64_t		isp_nodewwn;
256	u_int64_t		isp_portwwn;
257	/*
258	 * Port Data Base. This is indexed by 'target', which is invariate.
259	 * However, elements within can move around due to loop changes,
260	 * so the actual loop ID passed to the F/W is in this structure.
261	 * The first time the loop is seen up, loopid will match the index
262	 * (except for fabric nodes which are above mapped above FC_SNS_ID
263	 * and are completely virtual), but subsequent LIPs can cause things
264	 * to move around.
265	 */
266	struct lportdb {
267		u_int
268					loopid		: 8,
269							: 2,
270					was_fabric_dev	: 1,
271					fabric_dev	: 1,
272					loggedin	: 1,
273					roles		: 2,
274					valid		: 1;
275		u_int32_t		portid;
276		u_int64_t		node_wwn;
277		u_int64_t		port_wwn;
278	} portdb[MAX_FC_TARG], tport[FL_PORT_ID];
279
280	/*
281	 * Scratch DMA mapped in area to fetch Port Database stuff, etc.
282	 */
283	caddr_t			isp_scratch;
284	u_int32_t		isp_scdma;
285} fcparam;
286
287#define	FW_CONFIG_WAIT		0
288#define	FW_WAIT_AL_PA		1
289#define	FW_WAIT_LOGIN		2
290#define	FW_READY		3
291#define	FW_LOSS_OF_SYNC		4
292#define	FW_ERROR		5
293#define	FW_REINIT		6
294#define	FW_NON_PART		7
295
296#define	LOOP_NIL		0
297#define	LOOP_LIP_RCVD		1
298#define	LOOP_PDB_RCVD		2
299#define	LOOP_READY		7
300
301#define	TOPO_NL_PORT		0
302#define	TOPO_FL_PORT		1
303#define	TOPO_N_PORT		2
304#define	TOPO_F_PORT		3
305#define	TOPO_PTP_STUB		4
306
307/*
308 * Soft Structure per host adapter
309 */
310typedef struct ispsoftc {
311	/*
312	 * Platform (OS) specific data
313	 */
314	struct isposinfo	isp_osinfo;
315
316	/*
317	 * Pointer to bus specific functions and data
318	 */
319	struct ispmdvec *	isp_mdvec;
320
321	/*
322	 * (Mostly) nonvolatile state. Board specific parameters
323	 * may contain some volatile state (e.g., current loop state).
324	 */
325
326	void * 			isp_param;	/* type specific */
327	u_int16_t		isp_fwrev[3];	/* Loaded F/W revision */
328	u_int16_t		isp_romfw_rev[3]; /* PROM F/W revision */
329	u_int16_t		isp_maxcmds;	/* max possible I/O cmds */
330	u_int8_t		isp_type;	/* HBA Chip Type */
331	u_int8_t		isp_revision;	/* HBA Chip H/W Revision */
332	u_int32_t		isp_maxluns;	/* maximum luns supported */
333
334	u_int32_t		isp_clock	: 8,	/* input clock */
335						: 6,
336				isp_role	: 2,
337						: 1,
338				isp_touched	: 1,	/* board ever seen? */
339				isp_bustype	: 1,	/* SBus or PCI */
340				isp_loaded_fw	: 1,	/* loaded firmware */
341				isp_dblev	: 12;	/* debug log mask */
342
343	u_int32_t		isp_confopts;		/* config options */
344
345	/*
346	 * Instrumentation
347	 */
348	u_int64_t		isp_intcnt;		/* total int count */
349	u_int64_t		isp_intbogus;		/* spurious int count */
350
351	/*
352	 * Volatile state
353	 */
354
355	volatile u_int32_t
356		isp_mboxbsy	:	8,	/* mailbox command active */
357				:	1,
358		isp_state	:	3,
359		isp_sendmarker	:	2,	/* send a marker entry */
360		isp_update	:	2,	/* update parameters */
361		isp_nactive	:	16;	/* how many commands active */
362	volatile u_int16_t	isp_reqodx;	/* index of last ISP pickup */
363	volatile u_int16_t	isp_reqidx;	/* index of next request */
364	volatile u_int16_t	isp_residx;	/* index of next result */
365	volatile u_int16_t	isp_lasthdls;	/* last handle seed */
366	volatile u_int16_t	isp_mboxtmp[MAX_MAILBOX];
367	volatile u_int16_t	isp_lastmbxcmd;	/* last mbox command sent */
368
369	/*
370	 * Active commands are stored here, indexed by handle functions.
371	 */
372	XS_T **isp_xflist;
373
374	/*
375	 * request/result queue pointers and dma handles for them.
376	 */
377	caddr_t			isp_rquest;
378	caddr_t			isp_result;
379	u_int32_t		isp_rquest_dma;
380	u_int32_t		isp_result_dma;
381} ispsoftc_t;
382
383#define	SDPARAM(isp)	((sdparam *) (isp)->isp_param)
384#define	FCPARAM(isp)	((fcparam *) (isp)->isp_param)
385
386/*
387 * ISP Driver Run States
388 */
389#define	ISP_NILSTATE	0
390#define	ISP_RESETSTATE	1
391#define	ISP_INITSTATE	2
392#define	ISP_RUNSTATE	3
393
394/*
395 * ISP Configuration Options
396 */
397#define	ISP_CFG_NORELOAD	0x80	/* don't download f/w */
398#define	ISP_CFG_NONVRAM		0x40	/* ignore NVRAM */
399#define	ISP_CFG_FULL_DUPLEX	0x01	/* Full Duplex (Fibre Channel only) */
400#define	ISP_CFG_OWNWWN		0x02	/* override NVRAM wwn */
401#define	ISP_CFG_PORT_PREF	0x0C	/* Mask for Port Prefs (2200 only) */
402#define	ISP_CFG_LPORT		0x00	/* prefer {N/F}L-Port connection */
403#define	ISP_CFG_NPORT		0x04	/* prefer {N/F}-Port connection */
404#define	ISP_CFG_NPORT_ONLY	0x08	/* insist on {N/F}-Port connection */
405#define	ISP_CFG_LPORT_ONLY	0x0C	/* insist on {N/F}L-Port connection */
406
407/*
408 * Prior to calling isp_reset for the first time, the outer layer
409 * should set isp_role to one of NONE, INITIATOR, TARGET, BOTH.
410 *
411 * If you set ISP_ROLE_NONE, the cards will be reset, new firmware loaded,
412 * NVRAM read, and defaults set, but any further initialization (e.g.
413 * INITIALIZE CONTROL BLOCK commands for 2X00 cards) won't be done.
414 *
415 * If INITIATOR MODE isn't set, attempts to run commands will be stopped
416 * at isp_start and completed with the moral equivalent of SELECTION TIMEOUT.
417 *
418 * If TARGET MODE is set, it doesn't mean that the rest of target mode support
419 * needs to be enabled, or will even work. What happens with the 2X00 cards
420 * here is that if you have enabled it with TARGET MODE as part of the ICB
421 * options, but you haven't given the f/w any ram resources for ATIOs or
422 * Immediate Notifies, the f/w just handles what it can and you never see
423 * anything. Basically, it sends a single byte of data (the first byte,
424 * which you can set as part of the INITIALIZE CONTROL BLOCK command) for
425 * INQUIRY, and sends back QUEUE FULL status for any other command.
426 *
427 */
428#define	ISP_ROLE_NONE		0x0
429#define	ISP_ROLE_INITIATOR	0x1
430#define	ISP_ROLE_TARGET		0x2
431#define	ISP_ROLE_BOTH		(ISP_ROLE_TARGET|ISP_ROLE_INITIATOR)
432#define	ISP_ROLE_EITHER		ISP_ROLE_BOTH
433#ifndef	ISP_DEFAULT_ROLES
434#define	ISP_DEFAULT_ROLES	ISP_ROLE_INITIATOR
435#endif
436
437
438/*
439 * Firmware related defines
440 */
441#define	ISP_CODE_ORG			0x1000	/* default f/w code start */
442#define	ISP_FW_REV(maj, min, mic)	((maj << 24) | (min << 16) | mic)
443#define	ISP_FW_REVX(xp)			((xp[0]<<24) | (xp[1] << 16) | xp[2])
444
445/*
446 * Bus (implementation) types
447 */
448#define	ISP_BT_PCI		0	/* PCI Implementations */
449#define	ISP_BT_SBUS		1	/* SBus Implementations */
450
451/*
452 * Chip Types
453 */
454#define	ISP_HA_SCSI		0xf
455#define	ISP_HA_SCSI_UNKNOWN	0x1
456#define	ISP_HA_SCSI_1020	0x2
457#define	ISP_HA_SCSI_1020A	0x3
458#define	ISP_HA_SCSI_1040	0x4
459#define	ISP_HA_SCSI_1040A	0x5
460#define	ISP_HA_SCSI_1040B	0x6
461#define	ISP_HA_SCSI_1040C	0x7
462#define	ISP_HA_SCSI_1240	0x8
463#define	ISP_HA_SCSI_1080	0x9
464#define	ISP_HA_SCSI_1280	0xa
465#define	ISP_HA_SCSI_12160	0xb
466#define	ISP_HA_FC		0xf0
467#define	ISP_HA_FC_2100		0x10
468#define	ISP_HA_FC_2200		0x20
469
470#define	IS_SCSI(isp)	(isp->isp_type & ISP_HA_SCSI)
471#define	IS_1240(isp)	(isp->isp_type == ISP_HA_SCSI_1240)
472#define	IS_1080(isp)	(isp->isp_type == ISP_HA_SCSI_1080)
473#define	IS_1280(isp)	(isp->isp_type == ISP_HA_SCSI_1280)
474#define	IS_12160(isp)	(isp->isp_type == ISP_HA_SCSI_12160)
475
476#define	IS_12X0(isp)	(IS_1240(isp) || IS_1280(isp))
477#define	IS_DUALBUS(isp)	(IS_12X0(isp) || IS_12160(isp))
478#define	IS_ULTRA2(isp)	(IS_1080(isp) || IS_1280(isp) || IS_12160(isp))
479#define	IS_ULTRA3(isp)	(IS_12160(isp))
480
481#define	IS_FC(isp)	(isp->isp_type & ISP_HA_FC)
482#define	IS_2100(isp)	(isp->isp_type == ISP_HA_FC_2100)
483#define	IS_2200(isp)	(isp->isp_type == ISP_HA_FC_2200)
484
485/*
486 * DMA cookie macros
487 */
488#define	DMA_MSW(x)	(((x) >> 16) & 0xffff)
489#define	DMA_LSW(x)	(((x) & 0xffff))
490
491/*
492 * Core System Function Prototypes
493 */
494
495/*
496 * Reset Hardware. Totally. Assumes that you'll follow this with
497 * a call to isp_init.
498 */
499void isp_reset __P((struct ispsoftc *));
500
501/*
502 * Initialize Hardware to known state
503 */
504void isp_init __P((struct ispsoftc *));
505
506/*
507 * Reset the ISP and call completion for any orphaned commands.
508 */
509void isp_reinit __P((struct ispsoftc *));
510
511/*
512 * Interrupt Service Routine
513 */
514int isp_intr __P((void *));
515
516/*
517 * Command Entry Point- Platform Dependent layers call into this
518 */
519int isp_start __P((XS_T *));
520/* these values are what isp_start returns */
521#define	CMD_COMPLETE	101	/* command completed */
522#define	CMD_EAGAIN	102	/* busy- maybe retry later */
523#define	CMD_QUEUED	103	/* command has been queued for execution */
524#define	CMD_RQLATER 	104	/* requeue this command later */
525
526/*
527 * Command Completion Point- Core layers call out from this with completed cmds
528 */
529void isp_done __P((XS_T *));
530
531/*
532 * Platform Dependent to External to Internal Control Function
533 *
534 * Assumes all locks are held and that no reentrancy issues need be dealt with.
535 *
536 */
537typedef enum {
538	ISPCTL_RESET_BUS,		/* Reset Bus */
539	ISPCTL_RESET_DEV,		/* Reset Device */
540	ISPCTL_ABORT_CMD,		/* Abort Command */
541	ISPCTL_UPDATE_PARAMS,		/* Update Operating Parameters */
542	ISPCTL_FCLINK_TEST,		/* Test FC Link Status */
543	ISPCTL_PDB_SYNC,		/* Synchronize Port Database */
544	ISPCTL_TOGGLE_TMODE		/* toggle target mode */
545} ispctl_t;
546int isp_control __P((struct ispsoftc *, ispctl_t, void *));
547
548
549/*
550 * Platform Dependent to Internal to External Control Function
551 * (each platform must provide such a function)
552 *
553 * Assumes all locks are held and that no reentrancy issues need be dealt with.
554 */
555
556typedef enum {
557	ISPASYNC_NEW_TGT_PARAMS,
558	ISPASYNC_BUS_RESET,		/* Bus Was Reset */
559	ISPASYNC_LOOP_DOWN,		/* FC Loop Down */
560	ISPASYNC_LOOP_UP,		/* FC Loop Up */
561	ISPASYNC_CHANGE_NOTIFY,		/* FC SNS or Port Database Changed */
562	ISPASYNC_FABRIC_DEV,		/* FC Fabric Device Arrived/Left */
563	ISPASYNC_LOGGED_INOUT,		/* FC Object Logged In/Out */
564	ISPASYNC_TARGET_MESSAGE,	/* target message */
565	ISPASYNC_TARGET_EVENT,		/* target asynchronous event */
566	ISPASYNC_TARGET_ACTION		/* other target command action */
567} ispasync_t;
568int isp_async __P((struct ispsoftc *, ispasync_t, void *));
569
570/*
571 * Platform Dependent Error and Debug Printout
572 */
573#ifdef	__GNUC__
574void isp_prt __P((struct ispsoftc *, int level, const char *, ...))
575	__attribute__((__format__(__printf__,3,4)));
576#else
577void isp_prt __P((struct ispsoftc *, int level, const char *, ...));
578#endif
579
580#define	ISP_LOGALL	0x0	/* log always */
581#define	ISP_LOGCONFIG	0x1	/* log configuration messages */
582#define	ISP_LOGINFO	0x2	/* log informational messages */
583#define	ISP_LOGWARN	0x4	/* log warning messages */
584#define	ISP_LOGERR	0x8	/* log error messages */
585#define	ISP_LOGDEBUG0	0x10	/* log simple debug messages */
586#define	ISP_LOGDEBUG1	0x20	/* log intermediate debug messages */
587#define	ISP_LOGDEBUG2	0x40	/* log most debug messages */
588#define	ISP_LOGDEBUG3	0x100	/* log high frequency debug messages */
589#define	ISP_LOGTDEBUG0	0x200	/* log simple debug messages (target mode) */
590#define	ISP_LOGTDEBUG1	0x400	/* log intermediate debug messages (target) */
591#define	ISP_LOGTDEBUG2	0x800	/* log all debug messages (target) */
592
593/*
594 * Each Platform provides it's own isposinfo substructure of the ispsoftc
595 * defined above.
596 *
597 * Each platform must also provide the following macros/defines:
598 *
599 *
600 *	INLINE		-	platform specific define for 'inline' functions
601 *
602 *	ISP2100_FABRIC	-	defines whether FABRIC support is enabled
603 *	ISP2100_SCRLEN	-	length for the Fibre Channel scratch DMA area
604 *
605 *	MEMZERO(dst, src)			platform zeroing function
606 *	MEMCPY(dst, src, count)			platform copying function
607 *	SNPRINTF(buf, bufsize, fmt, ...)	snprintf
608 *	STRNCAT(dstbuf, size, srcbuf)		strncat
609 *	USEC_DELAY(usecs)			microsecond spindelay function
610 *	USEC_SLEEP(isp, usecs)			microsecond sleep function
611 *
612 *	NANOTIME_T				nanosecond time type
613 *
614 *	GET_NANOTIME(NANOTIME_T *)		get current nanotime.
615 *
616 *	GET_NANOSEC(NANOTIME_T *)		get u_int64_t from NANOTIME_T
617 *
618 *	NANOTIME_SUB(NANOTIME_T *, NANOTIME_T *)
619 *						subtract two NANOTIME_T values
620 *
621 *
622 *	MAXISPREQUEST(struct ispsoftc *)	maximum request queue size
623 *						for this particular board type
624 *
625 *	MEMORYBARRIER(struct ispsoftc *, barrier_type, offset, size)
626 *
627 *		Function/Macro the provides memory synchronization on
628 *		various objects so that the ISP's and the system's view
629 *		of the same object is consistent.
630 *
631 *	MBOX_ACQUIRE(struct ispsoftc *)		acquire lock on mailbox regs
632 *	MBOX_WAIT_COMPLETE(struct ispsoftc *)	wait for mailbox cmd to be done
633 *	MBOX_NOTIFY_COMPLETE(struct ispsoftc *)	notification of mbox cmd donee
634 *	MBOX_RELEASE(struct ispsoftc *)		release lock on mailbox regs
635 *
636 *
637 *	SCSI_GOOD	SCSI 'Good' Status
638 *	SCSI_CHECK	SCSI 'Check Condition' Status
639 *	SCSI_BUSY	SCSI 'Busy' Status
640 *	SCSI_QFULL	SCSI 'Queue Full' Status
641 *
642 *	XS_T		Platform SCSI transaction type (i.e., command for HBA)
643 *	XS_ISP(xs)	gets an instance out of an XS_T
644 *	XS_CHANNEL(xs)	gets the channel (bus # for DUALBUS cards) ""
645 *	XS_TGT(xs)	gets the target ""
646 *	XS_LUN(xs)	gets the lun ""
647 *	XS_CDBP(xs)	gets a pointer to the scsi CDB ""
648 *	XS_CDBLEN(xs)	gets the CDB's length ""
649 *	XS_XFRLEN(xs)	gets the associated data transfer length ""
650 *	XS_TIME(xs)	gets the time (in milliseconds) for this command
651 *	XS_RESID(xs)	gets the current residual count
652 *	XS_STSP(xs)	gets a pointer to the SCSI status byte ""
653 *	XS_SNSP(xs)	gets a pointer to the associate sense data
654 *	XS_SNSLEN(xs)	gets the length of sense data storage
655 *	XS_SNSKEY(xs)	dereferences XS_SNSP to get the current stored Sense Key
656 *	XS_TAG_P(xs)	predicate of whether this command should be tagged
657 *	XS_TAG_TYPE(xs)	which type of tag to use
658 *	XS_SETERR(xs)	set error state
659 *
660 *		HBA_NOERROR	command has no erros
661 *		HBA_BOTCH	hba botched something
662 *		HBA_CMDTIMEOUT	command timed out
663 *		HBA_SELTIMEOUT	selection timed out (also port logouts for FC)
664 *		HBA_TGTBSY	target returned a BUSY status
665 *		HBA_BUSRESET	bus reset destroyed command
666 *		HBA_ABORTED	command was aborted (by request)
667 *		HBA_DATAOVR	a data overrun was detected
668 *		HBA_ARQFAIL	Automatic Request Sense failed
669 *
670 *	XS_ERR(xs)	return current error state
671 *	XS_NOERR(xs)	there is no error currently set
672 *	XS_INITERR(xs)	initialize error state
673 *
674 *	XS_SAVE_SENSE(xs, sp)		save sense data
675 *
676 *	XS_SET_STATE_STAT(isp, sp, xs)	platform dependent interpreter of
677 *					response queue entry status bits
678 *
679 *
680 *	DEFAULT_IID(struct ispsoftc *)		Default SCSI initiator ID
681 *	DEFAULT_LOOPID(struct ispsoftc *)	Default FC Loop ID
682 *	DEFAULT_NODEWWN(struct ispsoftc *)	Default Node WWN
683 *	DEFAULT_PORTWWN(struct ispsoftc *)	Default Port WWN
684 *		These establish reasonable defaults for each platform.
685 * 		These must be available independent of card NVRAM and are
686 *		to be used should NVRAM not be readable.
687 *
688 *	ISP_NODEWWN(struct ispsoftc *)	FC Node WWN to use
689 *	ISP_PORTWWN(struct ispsoftc *)	FC Port WWN to use
690 *
691 *		These are to be used after NVRAM is read. The tags
692 *		in fcparam.isp_{node,port}wwn reflect the values
693 *		read from NVRAM (possibly corrected for card botches).
694 *		Each platform can take that information and override
695 *		it or ignore and return the Node and Port WWNs to be
696 * 		used when sending the Qlogic f/w the Initialization Control
697 *		Block.
698 *
699 *	(XXX these do endian specific transformations- in transition XXX)
700 *	ISP_SWIZZLE_ICB
701 *	ISP_UNSWIZZLE_AND_COPY_PDBP
702 *	ISP_SWIZZLE_CONTINUATION
703 *	ISP_SWIZZLE_REQUEST
704 *	ISP_UNSWIZZLE_RESPONSE
705 *	ISP_SWIZZLE_SNS_REQ
706 *	ISP_UNSWIZZLE_SNS_RSP
707 *	ISP_SWIZZLE_NVRAM_WORD
708 *
709 *
710 */
711#endif	/* _ISPVAR_H */
712