ispmbox.h revision 82689
1/* $FreeBSD: head/sys/dev/isp/ispmbox.h 82689 2001-08-31 21:39:04Z mjacob $ */ 2/* 3 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 4 * 5 * Copyright (c) 1997, 1998, 1999, 2000 by Matthew Jacob 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 */ 30#ifndef _ISPMBOX_H 31#define _ISPMBOX_H 32 33/* 34 * Mailbox Command Opcodes 35 */ 36#define MBOX_NO_OP 0x0000 37#define MBOX_LOAD_RAM 0x0001 38#define MBOX_EXEC_FIRMWARE 0x0002 39#define MBOX_DUMP_RAM 0x0003 40#define MBOX_WRITE_RAM_WORD 0x0004 41#define MBOX_READ_RAM_WORD 0x0005 42#define MBOX_MAILBOX_REG_TEST 0x0006 43#define MBOX_VERIFY_CHECKSUM 0x0007 44#define MBOX_ABOUT_FIRMWARE 0x0008 45 /* 9 */ 46 /* a */ 47 /* b */ 48 /* c */ 49 /* d */ 50#define MBOX_CHECK_FIRMWARE 0x000e 51 /* f */ 52#define MBOX_INIT_REQ_QUEUE 0x0010 53#define MBOX_INIT_RES_QUEUE 0x0011 54#define MBOX_EXECUTE_IOCB 0x0012 55#define MBOX_WAKE_UP 0x0013 56#define MBOX_STOP_FIRMWARE 0x0014 57#define MBOX_ABORT 0x0015 58#define MBOX_ABORT_DEVICE 0x0016 59#define MBOX_ABORT_TARGET 0x0017 60#define MBOX_BUS_RESET 0x0018 61#define MBOX_STOP_QUEUE 0x0019 62#define MBOX_START_QUEUE 0x001a 63#define MBOX_SINGLE_STEP_QUEUE 0x001b 64#define MBOX_ABORT_QUEUE 0x001c 65#define MBOX_GET_DEV_QUEUE_STATUS 0x001d 66 /* 1e */ 67#define MBOX_GET_FIRMWARE_STATUS 0x001f 68#define MBOX_GET_INIT_SCSI_ID 0x0020 69#define MBOX_GET_SELECT_TIMEOUT 0x0021 70#define MBOX_GET_RETRY_COUNT 0x0022 71#define MBOX_GET_TAG_AGE_LIMIT 0x0023 72#define MBOX_GET_CLOCK_RATE 0x0024 73#define MBOX_GET_ACT_NEG_STATE 0x0025 74#define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 75#define MBOX_GET_SBUS_PARAMS 0x0027 76#define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 77#define MBOX_GET_TARGET_PARAMS 0x0028 78#define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 79#define MBOX_GET_RESET_DELAY_PARAMS 0x002a 80 /* 2b */ 81 /* 2c */ 82 /* 2d */ 83 /* 2e */ 84 /* 2f */ 85#define MBOX_SET_INIT_SCSI_ID 0x0030 86#define MBOX_SET_SELECT_TIMEOUT 0x0031 87#define MBOX_SET_RETRY_COUNT 0x0032 88#define MBOX_SET_TAG_AGE_LIMIT 0x0033 89#define MBOX_SET_CLOCK_RATE 0x0034 90#define MBOX_SET_ACT_NEG_STATE 0x0035 91#define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 92#define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 93#define MBOX_SET_PCI_PARAMETERS 0x0037 94#define MBOX_SET_TARGET_PARAMS 0x0038 95#define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 96#define MBOX_SET_RESET_DELAY_PARAMS 0x003a 97 /* 3b */ 98 /* 3c */ 99 /* 3d */ 100 /* 3e */ 101 /* 3f */ 102#define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 103#define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 104#define MBOX_EXEC_BIOS_IOCB 0x0042 105#define MBOX_SET_FW_FEATURES 0x004a 106#define MBOX_GET_FW_FEATURES 0x004b 107#define FW_FEATURE_LVD_NOTIFY 0x2 108#define FW_FEATURE_FAST_POST 0x1 109 110#define MBOX_ENABLE_TARGET_MODE 0x55 111#define ENABLE_TARGET_FLAG 0x8000 112#define ENABLE_TQING_FLAG 0x0004 113#define ENABLE_MANDATORY_DISC 0x0002 114#define MBOX_GET_TARGET_STATUS 0x56 115 116/* These are for the ISP2100 FC cards */ 117#define MBOX_GET_LOOP_ID 0x20 118#define MBOX_GET_FIRMWARE_OPTIONS 0x28 119#define MBOX_SET_FIRMWARE_OPTIONS 0x38 120#define MBOX_GET_RESOURCE_COUNT 0x42 121#define MBOX_ENHANCED_GET_PDB 0x47 122#define MBOX_EXEC_COMMAND_IOCB_A64 0x54 123#define MBOX_INIT_FIRMWARE 0x60 124#define MBOX_GET_INIT_CONTROL_BLOCK 0x61 125#define MBOX_INIT_LIP 0x62 126#define MBOX_GET_FC_AL_POSITION_MAP 0x63 127#define MBOX_GET_PORT_DB 0x64 128#define MBOX_CLEAR_ACA 0x65 129#define MBOX_TARGET_RESET 0x66 130#define MBOX_CLEAR_TASK_SET 0x67 131#define MBOX_ABORT_TASK_SET 0x68 132#define MBOX_GET_FW_STATE 0x69 133#define MBOX_GET_PORT_NAME 0x6a 134#define MBOX_GET_LINK_STATUS 0x6b 135#define MBOX_INIT_LIP_RESET 0x6c 136#define MBOX_SEND_SNS 0x6e 137#define MBOX_FABRIC_LOGIN 0x6f 138#define MBOX_SEND_CHANGE_REQUEST 0x70 139#define MBOX_FABRIC_LOGOUT 0x71 140#define MBOX_INIT_LIP_LOGIN 0x72 141 142#define ISP2100_SET_PCI_PARAM 0x00ff 143 144#define MBOX_BUSY 0x04 145 146typedef struct { 147 u_int16_t param[8]; 148} mbreg_t; 149 150/* 151 * Mailbox Command Complete Status Codes 152 */ 153#define MBOX_COMMAND_COMPLETE 0x4000 154#define MBOX_INVALID_COMMAND 0x4001 155#define MBOX_HOST_INTERFACE_ERROR 0x4002 156#define MBOX_TEST_FAILED 0x4003 157#define MBOX_COMMAND_ERROR 0x4005 158#define MBOX_COMMAND_PARAM_ERROR 0x4006 159#define MBOX_PORT_ID_USED 0x4007 160#define MBOX_LOOP_ID_USED 0x4008 161#define MBOX_ALL_IDS_USED 0x4009 162#define MBOX_NOT_LOGGED_IN 0x400A 163#define MBLOGALL 0x000f 164#define MBLOGNONE 0x0000 165#define MBLOGMASK(x) ((x) & 0xf) 166 167/* 168 * Asynchronous event status codes 169 */ 170#define ASYNC_BUS_RESET 0x8001 171#define ASYNC_SYSTEM_ERROR 0x8002 172#define ASYNC_RQS_XFER_ERR 0x8003 173#define ASYNC_RSP_XFER_ERR 0x8004 174#define ASYNC_QWAKEUP 0x8005 175#define ASYNC_TIMEOUT_RESET 0x8006 176#define ASYNC_DEVICE_RESET 0x8007 177#define ASYNC_EXTMSG_UNDERRUN 0x800A 178#define ASYNC_SCAM_INT 0x800B 179#define ASYNC_HUNG_SCSI 0x800C 180#define ASYNC_KILLED_BUS 0x800D 181#define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 182#define ASYNC_LIP_OCCURRED 0x8010 183#define ASYNC_LOOP_UP 0x8011 184#define ASYNC_LOOP_DOWN 0x8012 185#define ASYNC_LOOP_RESET 0x8013 186#define ASYNC_PDB_CHANGED 0x8014 187#define ASYNC_CHANGE_NOTIFY 0x8015 188#define ASYNC_LIP_F8 0x8016 189#define ASYNC_CMD_CMPLT 0x8020 190#define ASYNC_CTIO_DONE 0x8021 191#define ASYNC_IP_XMIT_DONE 0x8022 192#define ASYNC_IP_RECV_DONE 0x8023 193#define ASYNC_IP_BROADCAST 0x8024 194#define ASYNC_IP_RCVQ_LOW 0x8025 195#define ASYNC_IP_RCVQ_EMPTY 0x8026 196#define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 197#define ASYNC_PTPMODE 0x8030 198#define ASYNC_RIO1 0x8031 199#define ASYNC_RIO2 0x8032 200#define ASYNC_RIO3 0x8033 201#define ASYNC_RIO4 0x8034 202#define ASYNC_RIO5 0x8035 203#define ASYNC_CONNMODE 0x8036 204#define ISP_CONN_LOOP 1 205#define ISP_CONN_PTP 2 206#define ISP_CONN_BADLIP 3 207#define ISP_CONN_FATAL 4 208#define ISP_CONN_LOOPBACK 5 209#define ASYNC_RIO_RESP 0x8040 210#define ASYNC_RIO_COMP 0x8042 211/* 212 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 213 * mailbox command to enable this. 214 */ 215#define ASYNC_QFULL_SENT 0x8049 216 217/* 218 * Mailbox Usages 219 */ 220 221#define WRITE_REQUEST_QUEUE_IN_POINTER(isp, value) \ 222 ISP_WRITE(isp, isp->isp_rqstinrp, value) 223 224#define READ_REQUEST_QUEUE_OUT_POINTER(isp) \ 225 ISP_READ(isp, isp->isp_rqstoutrp) 226 227#define READ_RESPONSE_QUEUE_IN_POINTER(isp) \ 228 ISP_READ(isp, isp->isp_respinrp) 229 230#define WRITE_RESPONSE_QUEUE_OUT_POINTER(isp, value) \ 231 ISP_WRITE(isp, isp->isp_respoutrp, value) 232 233/* 234 * Command Structure Definitions 235 */ 236 237typedef struct { 238 u_int32_t ds_base; 239 u_int32_t ds_count; 240} ispds_t; 241 242typedef struct { 243 u_int32_t ds_base; 244 u_int32_t ds_basehi; 245 u_int32_t ds_count; 246} ispds64_t; 247 248typedef struct { 249 u_int16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 250 u_int32_t ds_segment; /* unused */ 251 u_int32_t ds_base; /* 32 bit address of DSD list */ 252} ispdslist_t; 253 254 255/* 256 * These elements get swizzled around for SBus instances. 257 */ 258#define _ISP_SWAP8(a, b) { \ 259 u_int8_t tmp; \ 260 tmp = a; \ 261 a = b; \ 262 b = tmp; \ 263} 264typedef struct { 265 u_int8_t rqs_entry_type; 266 u_int8_t rqs_entry_count; 267 u_int8_t rqs_seqno; 268 u_int8_t rqs_flags; 269} isphdr_t; 270/* 271 * There are no (for all intents and purposes) non-sparc SBus machines 272 */ 273#ifdef __sparc__ 274#define ISP_SBUSIFY_ISPHDR(isp, hdrp) \ 275 if ((isp)->isp_bustype == ISP_BT_SBUS) { \ 276 _ISP_SWAP8((hdrp)->rqs_entry_count, (hdrp)->rqs_entry_type); \ 277 _ISP_SWAP8((hdrp)->rqs_flags, (hdrp)->rqs_seqno); \ 278 } 279#else 280#define ISP_SBUSIFY_ISPHDR(a, b) 281#endif 282 283/* RQS Flag definitions */ 284#define RQSFLAG_CONTINUATION 0x01 285#define RQSFLAG_FULL 0x02 286#define RQSFLAG_BADHEADER 0x04 287#define RQSFLAG_BADPACKET 0x08 288 289/* RQS entry_type definitions */ 290#define RQSTYPE_REQUEST 0x01 291#define RQSTYPE_DATASEG 0x02 292#define RQSTYPE_RESPONSE 0x03 293#define RQSTYPE_MARKER 0x04 294#define RQSTYPE_CMDONLY 0x05 295#define RQSTYPE_ATIO 0x06 /* Target Mode */ 296#define RQSTYPE_CTIO 0x07 /* Target Mode */ 297#define RQSTYPE_SCAM 0x08 298#define RQSTYPE_A64 0x09 299#define RQSTYPE_A64_CONT 0x0a 300#define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 301#define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 302#define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 303#define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 304#define RQSTYPE_CTIO1 0x0f /* Target Mode */ 305#define RQSTYPE_STATUS_CONT 0x10 306#define RQSTYPE_T2RQS 0x11 307#define RQSTYPE_IP_XMIT 0x13 308#define RQSTYPE_T4RQS 0x15 309#define RQSTYPE_ATIO2 0x16 /* Target Mode */ 310#define RQSTYPE_CTIO2 0x17 /* Target Mode */ 311#define RQSTYPE_CSET0 0x18 312#define RQSTYPE_T3RQS 0x19 313#define RQSTYPE_IP_XMIT_64 0x1b 314#define RQSTYPE_CTIO4 0x1e /* Target Mode */ 315#define RQSTYPE_CTIO3 0x1f /* Target Mode */ 316#define RQSTYPE_RIO1 0x21 317#define RQSTYPE_RIO2 0x22 318#define RQSTYPE_IP_RECV 0x23 319#define RQSTYPE_IP_RECV_CONT 0x24 320 321 322#define ISP_RQDSEG 4 323typedef struct { 324 isphdr_t req_header; 325 u_int32_t req_handle; 326 u_int8_t req_lun_trn; 327 u_int8_t req_target; 328 u_int16_t req_cdblen; 329#define req_modifier req_cdblen /* marker packet */ 330 u_int16_t req_flags; 331 u_int16_t req_reserved; 332 u_int16_t req_time; 333 u_int16_t req_seg_count; 334 u_int8_t req_cdb[12]; 335 ispds_t req_dataseg[ISP_RQDSEG]; 336} ispreq_t; 337 338/* 339 * A request packet can also be a marker packet. 340 */ 341#define SYNC_DEVICE 0 342#define SYNC_TARGET 1 343#define SYNC_ALL 2 344 345/* 346 * There are no (for all intents and purposes) non-sparc SBus machines 347 */ 348#ifdef __sparc__ 349#define ISP_SBUSIFY_ISPREQ(isp, rqp) \ 350 if ((isp)->isp_bustype == ISP_BT_SBUS) { \ 351 _ISP_SWAP8((rqp)->req_target, (rqp)->req_lun_trn); \ 352 } 353#else 354#define ISP_SBUSIFY_ISPREQ(a, b) 355#endif 356 357#define ISP_RQDSEG_T2 3 358typedef struct { 359 isphdr_t req_header; 360 u_int32_t req_handle; 361 u_int8_t req_lun_trn; 362 u_int8_t req_target; 363 u_int16_t req_scclun; 364 u_int16_t req_flags; 365 u_int16_t _res2; 366 u_int16_t req_time; 367 u_int16_t req_seg_count; 368 u_int32_t req_cdb[4]; 369 u_int32_t req_totalcnt; 370 ispds_t req_dataseg[ISP_RQDSEG_T2]; 371} ispreqt2_t; 372 373#define ISP_RQDSEG_T3 2 374typedef struct { 375 isphdr_t req_header; 376 u_int32_t req_handle; 377 u_int8_t req_lun_trn; 378 u_int8_t req_target; 379 u_int16_t req_scclun; 380 u_int16_t req_flags; 381 u_int16_t _res2; 382 u_int16_t req_time; 383 u_int16_t req_seg_count; 384 u_int32_t req_cdb[4]; 385 u_int32_t req_totalcnt; 386 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 387} ispreqt3_t; 388 389/* req_flag values */ 390#define REQFLAG_NODISCON 0x0001 391#define REQFLAG_HTAG 0x0002 392#define REQFLAG_OTAG 0x0004 393#define REQFLAG_STAG 0x0008 394#define REQFLAG_TARGET_RTN 0x0010 395 396#define REQFLAG_NODATA 0x0000 397#define REQFLAG_DATA_IN 0x0020 398#define REQFLAG_DATA_OUT 0x0040 399#define REQFLAG_DATA_UNKNOWN 0x0060 400 401#define REQFLAG_DISARQ 0x0100 402#define REQFLAG_FRC_ASYNC 0x0200 403#define REQFLAG_FRC_SYNC 0x0400 404#define REQFLAG_FRC_WIDE 0x0800 405#define REQFLAG_NOPARITY 0x1000 406#define REQFLAG_STOPQ 0x2000 407#define REQFLAG_XTRASNS 0x4000 408#define REQFLAG_PRIORITY 0x8000 409 410typedef struct { 411 isphdr_t req_header; 412 u_int32_t req_handle; 413 u_int8_t req_lun_trn; 414 u_int8_t req_target; 415 u_int16_t req_cdblen; 416 u_int16_t req_flags; 417 u_int16_t _res1; 418 u_int16_t req_time; 419 u_int16_t req_seg_count; 420 u_int8_t req_cdb[44]; 421} ispextreq_t; 422 423#define ISP_CDSEG 7 424typedef struct { 425 isphdr_t req_header; 426 u_int32_t _res1; 427 ispds_t req_dataseg[ISP_CDSEG]; 428} ispcontreq_t; 429 430#define ISP_CDSEG64 5 431typedef struct { 432 isphdr_t req_header; 433 ispds64_t req_dataseg[ISP_CDSEG64]; 434} ispcontreq64_t; 435 436typedef struct { 437 isphdr_t req_header; 438 u_int32_t req_handle; 439 u_int16_t req_scsi_status; 440 u_int16_t req_completion_status; 441 u_int16_t req_state_flags; 442 u_int16_t req_status_flags; 443 u_int16_t req_time; 444#define req_response_len req_time /* FC only */ 445 u_int16_t req_sense_len; 446 u_int32_t req_resid; 447 u_int8_t req_response[8]; /* FC only */ 448 u_int8_t req_sense_data[32]; 449} ispstatusreq_t; 450 451/* 452 * For Qlogic 2X00, the high order byte of SCSI status has 453 * additional meaning. 454 */ 455#define RQCS_RU 0x800 /* Residual Under */ 456#define RQCS_RO 0x400 /* Residual Over */ 457#define RQCS_RESID (RQCS_RU|RQCS_RO) 458#define RQCS_SV 0x200 /* Sense Length Valid */ 459#define RQCS_RV 0x100 /* FCP Response Length Valid */ 460 461/* 462 * Completion Status Codes. 463 */ 464#define RQCS_COMPLETE 0x0000 465#define RQCS_DMA_ERROR 0x0002 466#define RQCS_RESET_OCCURRED 0x0004 467#define RQCS_ABORTED 0x0005 468#define RQCS_TIMEOUT 0x0006 469#define RQCS_DATA_OVERRUN 0x0007 470#define RQCS_DATA_UNDERRUN 0x0015 471#define RQCS_QUEUE_FULL 0x001C 472 473/* 1X00 Only Completion Codes */ 474#define RQCS_INCOMPLETE 0x0001 475#define RQCS_TRANSPORT_ERROR 0x0003 476#define RQCS_COMMAND_OVERRUN 0x0008 477#define RQCS_STATUS_OVERRUN 0x0009 478#define RQCS_BAD_MESSAGE 0x000a 479#define RQCS_NO_MESSAGE_OUT 0x000b 480#define RQCS_EXT_ID_FAILED 0x000c 481#define RQCS_IDE_MSG_FAILED 0x000d 482#define RQCS_ABORT_MSG_FAILED 0x000e 483#define RQCS_REJECT_MSG_FAILED 0x000f 484#define RQCS_NOP_MSG_FAILED 0x0010 485#define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 486#define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 487#define RQCS_ID_MSG_FAILED 0x0013 488#define RQCS_UNEXP_BUS_FREE 0x0014 489#define RQCS_XACT_ERR1 0x0018 490#define RQCS_XACT_ERR2 0x0019 491#define RQCS_XACT_ERR3 0x001A 492#define RQCS_BAD_ENTRY 0x001B 493#define RQCS_PHASE_SKIPPED 0x001D 494#define RQCS_ARQS_FAILED 0x001E 495#define RQCS_WIDE_FAILED 0x001F 496#define RQCS_SYNCXFER_FAILED 0x0020 497#define RQCS_LVD_BUSERR 0x0021 498 499/* 2X00 Only Completion Codes */ 500#define RQCS_PORT_UNAVAILABLE 0x0028 501#define RQCS_PORT_LOGGED_OUT 0x0029 502#define RQCS_PORT_CHANGED 0x002A 503#define RQCS_PORT_BUSY 0x002B 504 505/* 506 * 1X00 specific State Flags 507 */ 508#define RQSF_GOT_BUS 0x0100 509#define RQSF_GOT_TARGET 0x0200 510#define RQSF_SENT_CDB 0x0400 511#define RQSF_XFRD_DATA 0x0800 512#define RQSF_GOT_STATUS 0x1000 513#define RQSF_GOT_SENSE 0x2000 514#define RQSF_XFER_COMPLETE 0x4000 515 516/* 517 * 2X00 specific State Flags 518 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 519 */ 520#define RQSF_DATA_IN 0x0020 521#define RQSF_DATA_OUT 0x0040 522#define RQSF_STAG 0x0008 523#define RQSF_OTAG 0x0004 524#define RQSF_HTAG 0x0002 525/* 526 * 1X00 Status Flags 527 */ 528#define RQSTF_DISCONNECT 0x0001 529#define RQSTF_SYNCHRONOUS 0x0002 530#define RQSTF_PARITY_ERROR 0x0004 531#define RQSTF_BUS_RESET 0x0008 532#define RQSTF_DEVICE_RESET 0x0010 533#define RQSTF_ABORTED 0x0020 534#define RQSTF_TIMEOUT 0x0040 535#define RQSTF_NEGOTIATION 0x0080 536 537/* 538 * 2X00 specific state flags 539 */ 540/* RQSF_SENT_CDB */ 541/* RQSF_XFRD_DATA */ 542/* RQSF_GOT_STATUS */ 543/* RQSF_XFER_COMPLETE */ 544 545/* 546 * 2X00 specific status flags 547 */ 548/* RQSTF_ABORTED */ 549/* RQSTF_TIMEOUT */ 550#define RQSTF_DMA_ERROR 0x0080 551#define RQSTF_LOGOUT 0x2000 552 553/* 554 * Miscellaneous 555 */ 556#ifndef ISP_EXEC_THROTTLE 557#define ISP_EXEC_THROTTLE 16 558#endif 559 560/* 561 * About Firmware returns an 'attribute' word in mailbox 6. 562 */ 563#define ISP_FW_ATTR_TMODE 0x01 564#define ISP_FW_ATTR_SCCLUN 0x02 565#define ISP_FW_ATTR_FABRIC 0x04 566#define ISP_FW_ATTR_CLASS2 0x08 567#define ISP_FW_ATTR_FCTAPE 0x10 568#define ISP_FW_ATTR_IP 0x20 569 570/* 571 * Reduced Interrupt Operation Response Queue Entreis 572 */ 573 574typedef struct { 575 isphdr_t req_header; 576 u_int32_t req_handles[15]; 577} isp_rio1_t; 578 579typedef struct { 580 isphdr_t req_header; 581 u_int16_t req_handles[30]; 582} isp_rio2_t; 583 584/* 585 * FC (ISP2100) specific data structures 586 */ 587 588/* 589 * Initialization Control Block 590 * 591 * Version One (prime) format. 592 */ 593typedef struct isp_icb { 594 u_int8_t icb_version; 595 u_int8_t _reserved0; 596 u_int16_t icb_fwoptions; 597 u_int16_t icb_maxfrmlen; 598 u_int16_t icb_maxalloc; 599 u_int16_t icb_execthrottle; 600 u_int8_t icb_retry_count; 601 u_int8_t icb_retry_delay; 602 u_int8_t icb_portname[8]; 603 u_int16_t icb_hardaddr; 604 u_int8_t icb_iqdevtype; 605 u_int8_t icb_logintime; 606 u_int8_t icb_nodename[8]; 607 u_int16_t icb_rqstout; 608 u_int16_t icb_rspnsin; 609 u_int16_t icb_rqstqlen; 610 u_int16_t icb_rsltqlen; 611 u_int16_t icb_rqstaddr[4]; 612 u_int16_t icb_respaddr[4]; 613 u_int16_t icb_lunenables; 614 u_int8_t icb_ccnt; 615 u_int8_t icb_icnt; 616 u_int16_t icb_lunetimeout; 617 u_int16_t _reserved1; 618 u_int16_t icb_xfwoptions; 619 u_int8_t icb_racctimer; 620 u_int8_t icb_idelaytimer; 621 u_int16_t icb_zfwoptions; 622 u_int16_t _reserved2[13]; 623} isp_icb_t; 624#define ICB_VERSION1 1 625 626#define ICBOPT_HARD_ADDRESS 0x0001 627#define ICBOPT_FAIRNESS 0x0002 628#define ICBOPT_FULL_DUPLEX 0x0004 629#define ICBOPT_FAST_POST 0x0008 630#define ICBOPT_TGT_ENABLE 0x0010 631#define ICBOPT_INI_DISABLE 0x0020 632#define ICBOPT_INI_ADISC 0x0040 633#define ICBOPT_INI_TGTTYPE 0x0080 634#define ICBOPT_PDBCHANGE_AE 0x0100 635#define ICBOPT_NOLIP 0x0200 636#define ICBOPT_SRCHDOWN 0x0400 637#define ICBOPT_PREVLOOP 0x0800 638#define ICBOPT_STOP_ON_QFULL 0x1000 639#define ICBOPT_FULL_LOGIN 0x2000 640#define ICBOPT_BOTH_WWNS 0x4000 641#define ICBOPT_EXTENDED 0x8000 642 643#define ICBXOPT_CLASS2_ACK0 0x0200 644#define ICBXOPT_CLASS2 0x0100 645#define ICBXOPT_LOOP_ONLY (0 << 4) 646#define ICBXOPT_PTP_ONLY (1 << 4) 647#define ICBXOPT_LOOP_2_PTP (2 << 4) 648#define ICBXOPT_PTP_2_LOOP (3 << 4) 649 650#define ICBXOPT_RIO_OFF 0 651#define ICBXOPT_RIO_16BIT 1 652#define ICBXOPT_RIO_32BIT 2 653#define ICBXOPT_RIO_16BIT_DELAY 3 654#define ICBXOPT_RIO_32BIT_DELAY 4 655 656/* These 3 only apply to the 2300 */ 657#define ICBXOPT_RATE_ONEGB (0 << 14) 658#define ICBXOPT_RATE_TWOGB (1 << 14) 659#define ICBXOPT_RATE_AUTO (2 << 14) 660 661 662#define ICB_MIN_FRMLEN 256 663#define ICB_MAX_FRMLEN 2112 664#define ICB_DFLT_FRMLEN 1024 665#define ICB_DFLT_ALLOC 256 666#define ICB_DFLT_THROTTLE 16 667#define ICB_DFLT_RDELAY 5 668#define ICB_DFLT_RCOUNT 3 669 670 671#define RQRSP_ADDR0015 0 672#define RQRSP_ADDR1631 1 673#define RQRSP_ADDR3247 2 674#define RQRSP_ADDR4863 3 675 676 677#define ICB_NNM0 7 678#define ICB_NNM1 6 679#define ICB_NNM2 5 680#define ICB_NNM3 4 681#define ICB_NNM4 3 682#define ICB_NNM5 2 683#define ICB_NNM6 1 684#define ICB_NNM7 0 685 686#define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 687 array[ICB_NNM0] = (u_int8_t) ((wwn >> 0) & 0xff), \ 688 array[ICB_NNM1] = (u_int8_t) ((wwn >> 8) & 0xff), \ 689 array[ICB_NNM2] = (u_int8_t) ((wwn >> 16) & 0xff), \ 690 array[ICB_NNM3] = (u_int8_t) ((wwn >> 24) & 0xff), \ 691 array[ICB_NNM4] = (u_int8_t) ((wwn >> 32) & 0xff), \ 692 array[ICB_NNM5] = (u_int8_t) ((wwn >> 40) & 0xff), \ 693 array[ICB_NNM6] = (u_int8_t) ((wwn >> 48) & 0xff), \ 694 array[ICB_NNM7] = (u_int8_t) ((wwn >> 56) & 0xff) 695 696/* 697 * FC-AL Position Map 698 * 699 * This is an at most 128 byte map that returns either 700 * the LILP or Firmware generated list of ports. 701 * 702 * We deviate a bit from the returned qlogic format to 703 * use an extra bit to say whether this was a LILP or 704 * f/w generated map. 705 */ 706typedef struct { 707 u_int8_t fwmap : 1, 708 count : 7; 709 u_int8_t map[127]; 710} fcpos_map_t; 711 712/* 713 * Port Data Base Element 714 */ 715 716typedef struct { 717 u_int16_t pdb_options; 718 u_int8_t pdb_mstate; 719 u_int8_t pdb_sstate; 720#define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 721 u_int8_t pdb_hardaddr_bits[4]; 722 u_int8_t pdb_portid_bits[4]; 723 u_int8_t pdb_nodename[8]; 724 u_int8_t pdb_portname[8]; 725 u_int16_t pdb_execthrottle; 726 u_int16_t pdb_exec_count; 727 u_int8_t pdb_retry_count; 728 u_int8_t pdb_retry_delay; 729 u_int16_t pdb_resalloc; 730 u_int16_t pdb_curalloc; 731 u_int16_t pdb_qhead; 732 u_int16_t pdb_qtail; 733 u_int16_t pdb_tl_next; 734 u_int16_t pdb_tl_last; 735 u_int16_t pdb_features; /* PLOGI, Common Service */ 736 u_int16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 737 u_int16_t pdb_roi; /* PLOGI, Common Service */ 738 u_int8_t pdb_target; 739 u_int8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 740 u_int16_t pdb_rdsiz; /* PLOGI, Class 3 */ 741 u_int16_t pdb_ncseq; /* PLOGI, Class 3 */ 742 u_int16_t pdb_noseq; /* PLOGI, Class 3 */ 743 u_int16_t pdb_labrtflg; 744 u_int16_t pdb_lstopflg; 745 u_int16_t pdb_sqhead; 746 u_int16_t pdb_sqtail; 747 u_int16_t pdb_ptimer; 748 u_int16_t pdb_nxt_seqid; 749 u_int16_t pdb_fcount; 750 u_int16_t pdb_prli_len; 751 u_int16_t pdb_prli_svc0; 752 u_int16_t pdb_prli_svc3; 753 u_int16_t pdb_loopid; 754 u_int16_t pdb_il_ptr; 755 u_int16_t pdb_sl_ptr; 756} isp_pdb_t; 757 758#define PDB_OPTIONS_XMITTING (1<<11) 759#define PDB_OPTIONS_LNKXMIT (1<<10) 760#define PDB_OPTIONS_ABORTED (1<<9) 761#define PDB_OPTIONS_ADISC (1<<1) 762 763#define PDB_STATE_DISCOVERY 0 764#define PDB_STATE_WDISC_ACK 1 765#define PDB_STATE_PLOGI 2 766#define PDB_STATE_PLOGI_ACK 3 767#define PDB_STATE_PRLI 4 768#define PDB_STATE_PRLI_ACK 5 769#define PDB_STATE_LOGGED_IN 6 770#define PDB_STATE_PORT_UNAVAIL 7 771#define PDB_STATE_PRLO 8 772#define PDB_STATE_PRLO_ACK 9 773#define PDB_STATE_PLOGO 10 774#define PDB_STATE_PLOG_ACK 11 775 776#define SVC3_TGT_ROLE 0x10 777#define SVC3_INI_ROLE 0x20 778#define SVC3_ROLE_MASK 0x30 779#define SVC3_ROLE_SHIFT 4 780 781#define SNS_GAN 0x100 782#define SNS_GP3 0x171 783#define SNS_RFT 0x217 784typedef struct { 785 u_int16_t snscb_rblen; /* response buffer length (words) */ 786 u_int16_t snscb_res0; 787 u_int16_t snscb_addr[4]; /* response buffer address */ 788 u_int16_t snscb_sblen; /* subcommand buffer length (words) */ 789 u_int16_t snscb_res1; 790 u_int16_t snscb_data[1]; /* variable data */ 791} sns_screq_t; /* Subcommand Request Structure */ 792#define SNS_GAN_REQ_SIZE (sizeof (sns_screq_t)+(5*(sizeof (u_int16_t)))) 793#define SNS_GP3_REQ_SIZE (sizeof (sns_screq_t)+(5*(sizeof (u_int16_t)))) 794#define SNS_RFT_REQ_SIZE (sizeof (sns_screq_t)+(21*(sizeof (u_int16_t)))) 795 796typedef struct { 797 u_int8_t snscb_cthdr[16]; 798 u_int8_t snscb_port_type; 799 u_int8_t snscb_port_id[3]; 800 u_int8_t snscb_portname[8]; 801 u_int16_t snscb_data[1]; /* variable data */ 802} sns_scrsp_t; /* Subcommand Response Structure */ 803#define SNS_GAN_RESP_SIZE 608 /* Maximum response size (bytes) */ 804#define SNS_GP3_RESP_SIZE 532 /* XXX: For 128 ports */ 805#define SNS_RFT_RESP_SIZE 16 806 807typedef struct { 808 u_int8_t snscb_cthdr[16]; 809 u_int8_t snscb_port_type; 810 u_int8_t snscb_port_id[3]; 811 u_int8_t snscb_portname[8]; 812 u_int8_t snscb_pnlen; /* symbolic port name length */ 813 u_int8_t snscb_pname[255]; /* symbolic port name */ 814 u_int8_t snscb_nodename[8]; 815 u_int8_t snscb_nnlen; /* symbolic node name length */ 816 u_int8_t snscb_nname[255]; /* symbolic node name */ 817 u_int8_t snscb_ipassoc[8]; 818 u_int8_t snscb_ipaddr[16]; 819 u_int8_t snscb_svc_class[4]; 820 u_int8_t snscb_fc4_types[32]; 821 u_int8_t snscb_fpname[8]; 822 u_int8_t snscb_reserved; 823 u_int8_t snscb_hardaddr[3]; 824} sns_ganrsp_t; /* Subcommand Response Structure */ 825 826#endif /* _ISPMBOX_H */ 827