ispmbox.h revision 72354
1/* $FreeBSD: head/sys/dev/isp/ispmbox.h 72354 2001-02-11 03:53:58Z mjacob $ */
2/*
3 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters.
4 *
5 * Copyright (c) 1997, 1998, 1999, 2000 by Matthew Jacob
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice immediately at the beginning of the file, without modification,
13 *    this list of conditions, and the following disclaimer.
14 * 2. The name of the author may not be used to endorse or promote products
15 *    derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 */
30#ifndef	_ISPMBOX_H
31#define	_ISPMBOX_H
32
33/*
34 * Mailbox Command Opcodes
35 */
36
37#define MBOX_NO_OP			0x0000
38#define MBOX_LOAD_RAM			0x0001
39#define MBOX_EXEC_FIRMWARE		0x0002
40#define MBOX_DUMP_RAM			0x0003
41#define MBOX_WRITE_RAM_WORD		0x0004
42#define MBOX_READ_RAM_WORD		0x0005
43#define MBOX_MAILBOX_REG_TEST		0x0006
44#define MBOX_VERIFY_CHECKSUM		0x0007
45#define MBOX_ABOUT_FIRMWARE		0x0008
46					/*   9 */
47					/*   a */
48					/*   b */
49					/*   c */
50					/*   d */
51#define MBOX_CHECK_FIRMWARE		0x000e
52					/*   f */
53#define MBOX_INIT_REQ_QUEUE		0x0010
54#define MBOX_INIT_RES_QUEUE		0x0011
55#define MBOX_EXECUTE_IOCB		0x0012
56#define MBOX_WAKE_UP			0x0013
57#define MBOX_STOP_FIRMWARE		0x0014
58#define MBOX_ABORT			0x0015
59#define MBOX_ABORT_DEVICE		0x0016
60#define MBOX_ABORT_TARGET		0x0017
61#define MBOX_BUS_RESET			0x0018
62#define MBOX_STOP_QUEUE			0x0019
63#define MBOX_START_QUEUE		0x001a
64#define MBOX_SINGLE_STEP_QUEUE		0x001b
65#define MBOX_ABORT_QUEUE		0x001c
66#define MBOX_GET_DEV_QUEUE_STATUS	0x001d
67					/*  1e */
68#define MBOX_GET_FIRMWARE_STATUS	0x001f
69#define MBOX_GET_INIT_SCSI_ID		0x0020
70#define MBOX_GET_SELECT_TIMEOUT		0x0021
71#define MBOX_GET_RETRY_COUNT		0x0022
72#define MBOX_GET_TAG_AGE_LIMIT		0x0023
73#define MBOX_GET_CLOCK_RATE		0x0024
74#define MBOX_GET_ACT_NEG_STATE		0x0025
75#define MBOX_GET_ASYNC_DATA_SETUP_TIME	0x0026
76#define MBOX_GET_SBUS_PARAMS		0x0027
77#define MBOX_GET_TARGET_PARAMS		0x0028
78#define MBOX_GET_DEV_QUEUE_PARAMS	0x0029
79#define	MBOX_GET_RESET_DELAY_PARAMS	0x002a
80					/*  2b */
81					/*  2c */
82					/*  2d */
83					/*  2e */
84					/*  2f */
85#define MBOX_SET_INIT_SCSI_ID		0x0030
86#define MBOX_SET_SELECT_TIMEOUT		0x0031
87#define MBOX_SET_RETRY_COUNT		0x0032
88#define MBOX_SET_TAG_AGE_LIMIT		0x0033
89#define MBOX_SET_CLOCK_RATE		0x0034
90#define MBOX_SET_ACT_NEG_STATE		0x0035
91#define MBOX_SET_ASYNC_DATA_SETUP_TIME	0x0036
92#define MBOX_SET_SBUS_CONTROL_PARAMS	0x0037
93#define		MBOX_SET_PCI_PARAMETERS	0x0037
94#define MBOX_SET_TARGET_PARAMS		0x0038
95#define MBOX_SET_DEV_QUEUE_PARAMS	0x0039
96#define	MBOX_SET_RESET_DELAY_PARAMS	0x003a
97					/*  3b */
98					/*  3c */
99					/*  3d */
100					/*  3e */
101					/*  3f */
102#define	MBOX_RETURN_BIOS_BLOCK_ADDR	0x0040
103#define	MBOX_WRITE_FOUR_RAM_WORDS	0x0041
104#define	MBOX_EXEC_BIOS_IOCB		0x0042
105#define	MBOX_SET_FW_FEATURES		0x004a
106#define	MBOX_GET_FW_FEATURES		0x004b
107#define		FW_FEATURE_LVD_NOTIFY	0x2
108#define		FW_FEATURE_FAST_POST	0x1
109
110#define	MBOX_ENABLE_TARGET_MODE		0x55
111#define		ENABLE_TARGET_FLAG	0x8000
112
113/* These are for the ISP2100 FC cards */
114#define	MBOX_GET_LOOP_ID		0x20
115#define	MBOX_GET_RESOURCE_COUNT		0x42
116#define	MBOX_EXEC_COMMAND_IOCB_A64	0x54
117#define	MBOX_INIT_FIRMWARE		0x60
118#define	MBOX_GET_INIT_CONTROL_BLOCK	0x61
119#define	MBOX_INIT_LIP			0x62
120#define	MBOX_GET_FC_AL_POSITION_MAP	0x63
121#define	MBOX_GET_PORT_DB		0x64
122#define	MBOX_CLEAR_ACA			0x65
123#define	MBOX_TARGET_RESET		0x66
124#define	MBOX_CLEAR_TASK_SET		0x67
125#define	MBOX_ABORT_TASK_SET		0x68
126#define	MBOX_GET_FW_STATE		0x69
127#define	MBOX_GET_PORT_NAME		0x6a
128#define	MBOX_GET_LINK_STATUS		0x6b
129#define	MBOX_INIT_LIP_RESET		0x6c
130#define	MBOX_SEND_SNS			0x6e
131#define	MBOX_FABRIC_LOGIN		0x6f
132#define	MBOX_SEND_CHANGE_REQUEST	0x70
133#define	MBOX_FABRIC_LOGOUT		0x71
134#define	MBOX_INIT_LIP_LOGIN		0x72
135
136#define	ISP2100_SET_PCI_PARAM		0x00ff
137
138#define	MBOX_BUSY			0x04
139
140typedef struct {
141	u_int16_t param[8];
142} mbreg_t;
143
144/*
145 * Mailbox Command Complete Status Codes
146 */
147#define	MBOX_COMMAND_COMPLETE		0x4000
148#define	MBOX_INVALID_COMMAND		0x4001
149#define	MBOX_HOST_INTERFACE_ERROR	0x4002
150#define	MBOX_TEST_FAILED		0x4003
151#define	MBOX_COMMAND_ERROR		0x4005
152#define	MBOX_COMMAND_PARAM_ERROR	0x4006
153#define	MBOX_PORT_ID_USED		0x4007
154#define	MBOX_LOOP_ID_USED		0x4008
155#define	MBOX_ALL_IDS_USED		0x4009
156#define	MBOX_NOT_LOGGED_IN		0x400A
157#define	MBLOGALL			0x000f
158#define	MBLOGNONE			0x0000
159#define	MBLOGMASK(x)			((x) & 0xf)
160
161/*
162 * Asynchronous event status codes
163 */
164#define	ASYNC_BUS_RESET			0x8001
165#define	ASYNC_SYSTEM_ERROR		0x8002
166#define	ASYNC_RQS_XFER_ERR		0x8003
167#define	ASYNC_RSP_XFER_ERR		0x8004
168#define	ASYNC_QWAKEUP			0x8005
169#define	ASYNC_TIMEOUT_RESET		0x8006
170#define	ASYNC_DEVICE_RESET		0x8007
171#define	ASYNC_EXTMSG_UNDERRUN		0x800A
172#define	ASYNC_SCAM_INT			0x800B
173#define	ASYNC_HUNG_SCSI			0x800C
174#define	ASYNC_KILLED_BUS		0x800D
175#define	ASYNC_BUS_TRANSIT		0x800E	/* LVD -> HVD, eg. */
176#define	ASYNC_CMD_CMPLT			0x8020
177#define	ASYNC_CTIO_DONE			0x8021
178
179/* for ISP2100 only */
180#define	ASYNC_LIP_OCCURRED		0x8010
181#define	ASYNC_LOOP_UP			0x8011
182#define	ASYNC_LOOP_DOWN			0x8012
183#define	ASYNC_LOOP_RESET		0x8013
184#define	ASYNC_PDB_CHANGED		0x8014
185#define	ASYNC_CHANGE_NOTIFY		0x8015
186
187/* for ISP2200 only */
188#define	ASYNC_PTPMODE			0x8030
189#define	ASYNC_CONNMODE			0x8036
190#define		ISP_CONN_LOOP		1
191#define		ISP_CONN_PTP		2
192#define		ISP_CONN_BADLIP		3
193#define		ISP_CONN_FATAL		4
194#define		ISP_CONN_LOOPBACK	5
195
196/*
197 * Command Structure Definitions
198 */
199
200typedef struct {
201	u_int32_t	ds_base;
202	u_int32_t	ds_count;
203} ispds_t;
204
205#define	_ISP_SWAP8(a, b)	{	\
206	u_int8_t tmp;			\
207	tmp = a;			\
208	a = b;				\
209	b = tmp;			\
210}
211
212/*
213 * These elements get swizzled around for SBus instances.
214 */
215typedef struct {
216	u_int8_t	rqs_entry_type;
217	u_int8_t	rqs_entry_count;
218	u_int8_t	rqs_seqno;
219	u_int8_t	rqs_flags;
220} isphdr_t;
221/*
222 * There are no (for all intents and purposes) non-sparc SBus machines
223 */
224#ifdef	__sparc__
225#define	ISP_SBUSIFY_ISPHDR(isp, hdrp)					\
226    if ((isp)->isp_bustype == ISP_BT_SBUS) {				\
227	_ISP_SWAP8((hdrp)->rqs_entry_count, (hdrp)->rqs_entry_type);	\
228	_ISP_SWAP8((hdrp)->rqs_flags, (hdrp)->rqs_seqno);		\
229    }
230#else
231#define	ISP_SBUSIFY_ISPHDR(a, b)
232#endif
233
234/* RQS Flag definitions */
235#define	RQSFLAG_CONTINUATION	0x01
236#define	RQSFLAG_FULL		0x02
237#define	RQSFLAG_BADHEADER	0x04
238#define	RQSFLAG_BADPACKET	0x08
239
240/* RQS entry_type definitions */
241#define	RQSTYPE_REQUEST		0x01
242#define	RQSTYPE_DATASEG		0x02
243#define	RQSTYPE_RESPONSE	0x03
244#define	RQSTYPE_MARKER		0x04
245#define	RQSTYPE_CMDONLY		0x05
246#define	RQSTYPE_ATIO		0x06	/* Target Mode */
247#define	RQSTYPE_CTIO		0x07	/* Target Mode */
248#define	RQSTYPE_SCAM		0x08
249#define	RQSTYPE_A64		0x09
250#define	RQSTYPE_A64_CONT	0x0a
251#define	RQSTYPE_ENABLE_LUN	0x0b	/* Target Mode */
252#define	RQSTYPE_MODIFY_LUN	0x0c	/* Target Mode */
253#define	RQSTYPE_NOTIFY		0x0d	/* Target Mode */
254#define	RQSTYPE_NOTIFY_ACK	0x0e	/* Target Mode */
255#define	RQSTYPE_CTIO1		0x0f	/* Target Mode */
256#define	RQSTYPE_STATUS_CONT	0x10
257#define	RQSTYPE_T2RQS		0x11
258
259#define	RQSTYPE_T4RQS		0x15
260#define	RQSTYPE_ATIO2		0x16
261#define	RQSTYPE_CTIO2		0x17
262#define	RQSTYPE_CSET0		0x18
263#define	RQSTYPE_T3RQS		0x19
264
265#define	RQSTYPE_CTIO3		0x1f
266
267
268#define	ISP_RQDSEG	4
269typedef struct {
270	isphdr_t	req_header;
271	u_int32_t	req_handle;
272	u_int8_t	req_lun_trn;
273	u_int8_t	req_target;
274	u_int16_t	req_cdblen;
275#define	req_modifier	req_cdblen	/* marker packet */
276	u_int16_t	req_flags;
277	u_int16_t	req_reserved;
278	u_int16_t	req_time;
279	u_int16_t	req_seg_count;
280	u_int8_t	req_cdb[12];
281	ispds_t		req_dataseg[ISP_RQDSEG];
282} ispreq_t;
283
284/*
285 * A request packet can also be a marker packet.
286 */
287#define SYNC_DEVICE	0
288#define SYNC_TARGET	1
289#define SYNC_ALL	2
290
291/*
292 * There are no (for all intents and purposes) non-sparc SBus machines
293 */
294#ifdef	__sparc__
295#define	ISP_SBUSIFY_ISPREQ(isp, rqp)					\
296    if ((isp)->isp_bustype == ISP_BT_SBUS) {				\
297	_ISP_SWAP8((rqp)->req_target, (rqp)->req_lun_trn);		\
298    }
299#else
300#define	ISP_SBUSIFY_ISPREQ(a, b)
301#endif
302
303#define	ISP_RQDSEG_T2	3
304typedef struct {
305	isphdr_t	req_header;
306	u_int32_t	req_handle;
307	u_int8_t	req_lun_trn;
308	u_int8_t	req_target;
309	u_int16_t	req_scclun;
310	u_int16_t	req_flags;
311	u_int16_t	_res2;
312	u_int16_t	req_time;
313	u_int16_t	req_seg_count;
314	u_int32_t	req_cdb[4];
315	u_int32_t	req_totalcnt;
316	ispds_t		req_dataseg[ISP_RQDSEG_T2];
317} ispreqt2_t;
318
319/* req_flag values */
320#define	REQFLAG_NODISCON	0x0001
321#define	REQFLAG_HTAG		0x0002
322#define	REQFLAG_OTAG		0x0004
323#define	REQFLAG_STAG		0x0008
324#define	REQFLAG_TARGET_RTN	0x0010
325
326#define	REQFLAG_NODATA		0x0000
327#define	REQFLAG_DATA_IN		0x0020
328#define	REQFLAG_DATA_OUT	0x0040
329#define	REQFLAG_DATA_UNKNOWN	0x0060
330
331#define	REQFLAG_DISARQ		0x0100
332#define	REQFLAG_FRC_ASYNC	0x0200
333#define	REQFLAG_FRC_SYNC	0x0400
334#define	REQFLAG_FRC_WIDE	0x0800
335#define	REQFLAG_NOPARITY	0x1000
336#define	REQFLAG_STOPQ		0x2000
337#define	REQFLAG_XTRASNS		0x4000
338#define	REQFLAG_PRIORITY	0x8000
339
340typedef struct {
341	isphdr_t	req_header;
342	u_int32_t	req_handle;
343	u_int8_t	req_lun_trn;
344	u_int8_t	req_target;
345	u_int16_t	req_cdblen;
346	u_int16_t	req_flags;
347	u_int16_t	_res1;
348	u_int16_t	req_time;
349	u_int16_t	req_seg_count;
350	u_int8_t	req_cdb[44];
351} ispextreq_t;
352
353#define	ISP_CDSEG	7
354typedef struct {
355	isphdr_t	req_header;
356	u_int32_t	_res1;
357	ispds_t		req_dataseg[ISP_CDSEG];
358} ispcontreq_t;
359
360typedef struct {
361	isphdr_t	req_header;
362	u_int32_t	req_handle;
363	u_int16_t	req_scsi_status;
364	u_int16_t	req_completion_status;
365	u_int16_t	req_state_flags;
366	u_int16_t	req_status_flags;
367	u_int16_t	req_time;
368#define	req_response_len	req_time	/* FC only */
369	u_int16_t	req_sense_len;
370	u_int32_t	req_resid;
371	u_int8_t	req_response[8];	/* FC only */
372	u_int8_t	req_sense_data[32];
373} ispstatusreq_t;
374
375/*
376 * For Qlogic 2X00, the high order byte of SCSI status has
377 * additional meaning.
378 */
379#define	RQCS_RU	0x800	/* Residual Under */
380#define	RQCS_RO	0x400	/* Residual Over */
381#define	RQCS_RESID	(RQCS_RU|RQCS_RO)
382#define	RQCS_SV	0x200	/* Sense Length Valid */
383#define	RQCS_RV	0x100	/* FCP Response Length Valid */
384
385/*
386 * Completion Status Codes.
387 */
388#define RQCS_COMPLETE			0x0000
389#define RQCS_DMA_ERROR			0x0002
390#define RQCS_RESET_OCCURRED		0x0004
391#define RQCS_ABORTED			0x0005
392#define RQCS_TIMEOUT			0x0006
393#define RQCS_DATA_OVERRUN		0x0007
394#define RQCS_DATA_UNDERRUN		0x0015
395#define	RQCS_QUEUE_FULL			0x001C
396
397/* 1X00 Only Completion Codes */
398#define RQCS_INCOMPLETE			0x0001
399#define RQCS_TRANSPORT_ERROR		0x0003
400#define RQCS_COMMAND_OVERRUN		0x0008
401#define RQCS_STATUS_OVERRUN		0x0009
402#define RQCS_BAD_MESSAGE		0x000a
403#define RQCS_NO_MESSAGE_OUT		0x000b
404#define RQCS_EXT_ID_FAILED		0x000c
405#define RQCS_IDE_MSG_FAILED		0x000d
406#define RQCS_ABORT_MSG_FAILED		0x000e
407#define RQCS_REJECT_MSG_FAILED		0x000f
408#define RQCS_NOP_MSG_FAILED		0x0010
409#define RQCS_PARITY_ERROR_MSG_FAILED	0x0011
410#define RQCS_DEVICE_RESET_MSG_FAILED	0x0012
411#define RQCS_ID_MSG_FAILED		0x0013
412#define RQCS_UNEXP_BUS_FREE		0x0014
413#define	RQCS_XACT_ERR1			0x0018
414#define	RQCS_XACT_ERR2			0x0019
415#define	RQCS_XACT_ERR3			0x001A
416#define	RQCS_BAD_ENTRY			0x001B
417#define	RQCS_PHASE_SKIPPED		0x001D
418#define	RQCS_ARQS_FAILED		0x001E
419#define	RQCS_WIDE_FAILED		0x001F
420#define	RQCS_SYNCXFER_FAILED		0x0020
421#define	RQCS_LVD_BUSERR			0x0021
422
423/* 2X00 Only Completion Codes */
424#define	RQCS_PORT_UNAVAILABLE		0x0028
425#define	RQCS_PORT_LOGGED_OUT		0x0029
426#define	RQCS_PORT_CHANGED		0x002A
427#define	RQCS_PORT_BUSY			0x002B
428
429/*
430 * 1X00 specific State Flags
431 */
432#define RQSF_GOT_BUS			0x0100
433#define RQSF_GOT_TARGET			0x0200
434#define RQSF_SENT_CDB			0x0400
435#define RQSF_XFRD_DATA			0x0800
436#define RQSF_GOT_STATUS			0x1000
437#define RQSF_GOT_SENSE			0x2000
438#define	RQSF_XFER_COMPLETE		0x4000
439
440/*
441 * 2X00 specific State Flags
442 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available)
443 */
444#define	RQSF_DATA_IN			0x0020
445#define	RQSF_DATA_OUT			0x0040
446#define	RQSF_STAG			0x0008
447#define	RQSF_OTAG			0x0004
448#define	RQSF_HTAG			0x0002
449/*
450 * 1X00 Status Flags
451 */
452#define RQSTF_DISCONNECT		0x0001
453#define RQSTF_SYNCHRONOUS		0x0002
454#define RQSTF_PARITY_ERROR		0x0004
455#define RQSTF_BUS_RESET			0x0008
456#define RQSTF_DEVICE_RESET		0x0010
457#define RQSTF_ABORTED			0x0020
458#define RQSTF_TIMEOUT			0x0040
459#define RQSTF_NEGOTIATION		0x0080
460
461/*
462 * 2X00 specific state flags
463 */
464/* RQSF_SENT_CDB	*/
465/* RQSF_XFRD_DATA	*/
466/* RQSF_GOT_STATUS	*/
467/* RQSF_XFER_COMPLETE	*/
468
469/*
470 * 2X00 specific status flags
471 */
472/* RQSTF_ABORTED */
473/* RQSTF_TIMEOUT */
474#define	RQSTF_DMA_ERROR			0x0080
475#define	RQSTF_LOGOUT			0x2000
476
477/*
478 * Miscellaneous
479 */
480#ifndef	ISP_EXEC_THROTTLE
481#define	ISP_EXEC_THROTTLE	16
482#endif
483
484/*
485 * FC (ISP2100) specific data structures
486 */
487
488/*
489 * Initialization Control Block
490 *
491 * Version One (prime) format.
492 */
493typedef struct isp_icb {
494	u_int8_t	icb_version;
495	u_int8_t	_reserved0;
496	u_int16_t	icb_fwoptions;
497	u_int16_t	icb_maxfrmlen;
498	u_int16_t	icb_maxalloc;
499	u_int16_t	icb_execthrottle;
500	u_int8_t	icb_retry_count;
501	u_int8_t	icb_retry_delay;
502	u_int8_t	icb_portname[8];
503	u_int16_t	icb_hardaddr;
504	u_int8_t	icb_iqdevtype;
505	u_int8_t	icb_logintime;
506	u_int8_t	icb_nodename[8];
507	u_int16_t	icb_rqstout;
508	u_int16_t	icb_rspnsin;
509	u_int16_t	icb_rqstqlen;
510	u_int16_t	icb_rsltqlen;
511	u_int16_t	icb_rqstaddr[4];
512	u_int16_t	icb_respaddr[4];
513	u_int16_t	icb_lunenables;
514	u_int8_t	icb_ccnt;
515	u_int8_t	icb_icnt;
516	u_int16_t	icb_lunetimeout;
517	u_int16_t	_reserved1;
518	u_int16_t	icb_xfwoptions;
519	u_int8_t	icb_racctimer;
520	u_int8_t	icb_idelaytimer;
521	u_int16_t	icb_zfwoptions;
522	u_int16_t	_reserved2[13];
523} isp_icb_t;
524#define	ICB_VERSION1	1
525
526#define	ICBOPT_HARD_ADDRESS	0x0001
527#define	ICBOPT_FAIRNESS		0x0002
528#define	ICBOPT_FULL_DUPLEX	0x0004
529#define	ICBOPT_FAST_POST	0x0008
530#define	ICBOPT_TGT_ENABLE	0x0010
531#define	ICBOPT_INI_DISABLE	0x0020
532#define	ICBOPT_INI_ADISC	0x0040
533#define	ICBOPT_INI_TGTTYPE	0x0080
534#define	ICBOPT_PDBCHANGE_AE	0x0100
535#define	ICBOPT_NOLIP		0x0200
536#define	ICBOPT_SRCHDOWN		0x0400
537#define	ICBOPT_PREVLOOP		0x0800
538#define	ICBOPT_STOP_ON_QFULL	0x1000
539#define	ICBOPT_FULL_LOGIN	0x2000
540#define	ICBOPT_USE_PORTNAME	0x4000
541#define	ICBOPT_EXTENDED		0x8000
542
543#define	ICBXOPT_CLASS2_ACK0	0x0200
544#define	ICBXOPT_CLASS2		0x0100
545#define	ICBXOPT_LOOP_ONLY	(0 << 4)
546#define	ICBXOPT_PTP_ONLY	(1 << 4)
547#define	ICBXOPT_LOOP_2_PTP	(2 << 4)
548#define	ICBXOPT_PTP_2_LOOP	(3 << 4)
549
550#define	ICBXOPT_RIO_OFF		0
551#define	ICBXOPT_RIO_16BIT	1
552#define	ICBXOPT_RIO_32BIT	2
553#define	ICBXOPT_RIO_16BIT_DELAY	3
554#define	ICBXOPT_RIO_32BIT_DELAY	4
555
556
557
558#define	ICB_MIN_FRMLEN		256
559#define	ICB_MAX_FRMLEN		2112
560#define	ICB_DFLT_FRMLEN		1024
561#define	ICB_DFLT_ALLOC		256
562#define	ICB_DFLT_THROTTLE	16
563#define	ICB_DFLT_RDELAY		5
564#define	ICB_DFLT_RCOUNT		3
565
566
567#define	RQRSP_ADDR0015	0
568#define	RQRSP_ADDR1631	1
569#define	RQRSP_ADDR3247	2
570#define	RQRSP_ADDR4863	3
571
572
573#define	ICB_NNM0	7
574#define	ICB_NNM1	6
575#define	ICB_NNM2	5
576#define	ICB_NNM3	4
577#define	ICB_NNM4	3
578#define	ICB_NNM5	2
579#define	ICB_NNM6	1
580#define	ICB_NNM7	0
581
582#define	MAKE_NODE_NAME_FROM_WWN(array, wwn)	\
583	array[ICB_NNM0] = (u_int8_t) ((wwn >>  0) & 0xff), \
584	array[ICB_NNM1] = (u_int8_t) ((wwn >>  8) & 0xff), \
585	array[ICB_NNM2] = (u_int8_t) ((wwn >> 16) & 0xff), \
586	array[ICB_NNM3] = (u_int8_t) ((wwn >> 24) & 0xff), \
587	array[ICB_NNM4] = (u_int8_t) ((wwn >> 32) & 0xff), \
588	array[ICB_NNM5] = (u_int8_t) ((wwn >> 40) & 0xff), \
589	array[ICB_NNM6] = (u_int8_t) ((wwn >> 48) & 0xff), \
590	array[ICB_NNM7] = (u_int8_t) ((wwn >> 56) & 0xff)
591
592/*
593 * FC-AL Position Map
594 *
595 * This is an at most 128 byte map that returns either
596 * the LILP or Firmware generated list of ports.
597 *
598 * We deviate a bit from the returned qlogic format to
599 * use an extra bit to say whether this was a LILP or
600 * f/w generated map.
601 */
602typedef struct {
603	u_int8_t	fwmap	: 1,
604			count	: 7;
605	u_int8_t	map[127];
606} fcpos_map_t;
607
608/*
609 * Port Data Base Element
610 */
611
612typedef struct {
613	u_int16_t	pdb_options;
614	u_int8_t	pdb_mstate;
615	u_int8_t	pdb_sstate;
616#define	BITS2WORD(x)	((x)[0] << 16 | (x)[3] << 8 | (x)[2])
617	u_int8_t	pdb_hardaddr_bits[4];
618	u_int8_t	pdb_portid_bits[4];
619	u_int8_t	pdb_nodename[8];
620	u_int8_t	pdb_portname[8];
621	u_int16_t	pdb_execthrottle;
622	u_int16_t	pdb_exec_count;
623	u_int8_t	pdb_retry_count;
624	u_int8_t	pdb_retry_delay;
625	u_int16_t	pdb_resalloc;
626	u_int16_t	pdb_curalloc;
627	u_int16_t	pdb_qhead;
628	u_int16_t	pdb_qtail;
629	u_int16_t	pdb_tl_next;
630	u_int16_t	pdb_tl_last;
631	u_int16_t	pdb_features;	/* PLOGI, Common Service */
632	u_int16_t	pdb_pconcurrnt;	/* PLOGI, Common Service */
633	u_int16_t	pdb_roi;	/* PLOGI, Common Service */
634	u_int8_t	pdb_target;
635	u_int8_t	pdb_initiator;	/* PLOGI, Class 3 Control Flags */
636	u_int16_t	pdb_rdsiz;	/* PLOGI, Class 3 */
637	u_int16_t	pdb_ncseq;	/* PLOGI, Class 3 */
638	u_int16_t	pdb_noseq;	/* PLOGI, Class 3 */
639	u_int16_t	pdb_labrtflg;
640	u_int16_t	pdb_lstopflg;
641	u_int16_t	pdb_sqhead;
642	u_int16_t	pdb_sqtail;
643	u_int16_t	pdb_ptimer;
644	u_int16_t	pdb_nxt_seqid;
645	u_int16_t	pdb_fcount;
646	u_int16_t	pdb_prli_len;
647	u_int16_t	pdb_prli_svc0;
648	u_int16_t	pdb_prli_svc3;
649	u_int16_t	pdb_loopid;
650	u_int16_t	pdb_il_ptr;
651	u_int16_t	pdb_sl_ptr;
652} isp_pdb_t;
653
654#define	PDB_OPTIONS_XMITTING	(1<<11)
655#define	PDB_OPTIONS_LNKXMIT	(1<<10)
656#define	PDB_OPTIONS_ABORTED	(1<<9)
657#define	PDB_OPTIONS_ADISC	(1<<1)
658
659#define	PDB_STATE_DISCOVERY	0
660#define	PDB_STATE_WDISC_ACK	1
661#define	PDB_STATE_PLOGI		2
662#define	PDB_STATE_PLOGI_ACK	3
663#define	PDB_STATE_PRLI		4
664#define	PDB_STATE_PRLI_ACK	5
665#define	PDB_STATE_LOGGED_IN	6
666#define	PDB_STATE_PORT_UNAVAIL	7
667#define	PDB_STATE_PRLO		8
668#define	PDB_STATE_PRLO_ACK	9
669#define	PDB_STATE_PLOGO		10
670#define	PDB_STATE_PLOG_ACK	11
671
672#define		SVC3_TGT_ROLE		0x10
673#define 	SVC3_INI_ROLE		0x20
674#define			SVC3_ROLE_MASK	0x30
675#define			SVC3_ROLE_SHIFT	4
676
677#define	SNS_GAN	0x100
678#define	SNS_GP3	0x171
679#define	SNS_RFT	0x217
680typedef struct {
681	u_int16_t	snscb_rblen;	/* response buffer length (words) */
682	u_int16_t	snscb_res0;
683	u_int16_t	snscb_addr[4];	/* response buffer address */
684	u_int16_t	snscb_sblen;	/* subcommand buffer length (words) */
685	u_int16_t	snscb_res1;
686	u_int16_t	snscb_data[1];	/* variable data */
687} sns_screq_t;	/* Subcommand Request Structure */
688#define	SNS_GAN_REQ_SIZE	(sizeof (sns_screq_t)+(5*(sizeof (u_int16_t))))
689#define	SNS_GP3_REQ_SIZE	(sizeof (sns_screq_t)+(5*(sizeof (u_int16_t))))
690#define	SNS_RFT_REQ_SIZE	(sizeof (sns_screq_t)+(21*(sizeof (u_int16_t))))
691
692typedef struct {
693	u_int8_t	snscb_cthdr[16];
694	u_int8_t	snscb_port_type;
695	u_int8_t	snscb_port_id[3];
696	u_int8_t	snscb_portname[8];
697	u_int16_t	snscb_data[1];	/* variable data */
698} sns_scrsp_t;	/* Subcommand Response Structure */
699#define	SNS_GAN_RESP_SIZE	608	/* Maximum response size (bytes) */
700#define	SNS_GP3_RESP_SIZE	532	/* XXX: For 128 ports */
701#define	SNS_RFT_RESP_SIZE	16
702
703typedef struct {
704	u_int8_t	snscb_cthdr[16];
705	u_int8_t	snscb_port_type;
706	u_int8_t	snscb_port_id[3];
707	u_int8_t	snscb_portname[8];
708	u_int8_t	snscb_pnlen;		/* symbolic port name length */
709	u_int8_t	snscb_pname[255];	/* symbolic port name */
710	u_int8_t	snscb_nodename[8];
711	u_int8_t	snscb_nnlen;		/* symbolic node name length */
712	u_int8_t	snscb_nname[255];	/* symbolic node name */
713	u_int8_t	snscb_ipassoc[8];
714	u_int8_t	snscb_ipaddr[16];
715	u_int8_t	snscb_svc_class[4];
716	u_int8_t	snscb_fc4_types[32];
717	u_int8_t	snscb_fpname[8];
718	u_int8_t	snscb_reserved;
719	u_int8_t	snscb_hardaddr[3];
720} sns_ganrsp_t;	/* Subcommand Response Structure */
721
722#endif	/* _ISPMBOX_H */
723