ispmbox.h revision 291654
1/* $FreeBSD: head/sys/dev/isp/ispmbox.h 291654 2015-12-02 20:22:50Z mav $ */
2/*-
3 *  Copyright (c) 1997-2009 by Matthew Jacob
4 *  All rights reserved.
5 *
6 *  Redistribution and use in source and binary forms, with or without
7 *  modification, are permitted provided that the following conditions
8 *  are met:
9 *
10 *  1. Redistributions of source code must retain the above copyright
11 *     notice, this list of conditions and the following disclaimer.
12 *  2. Redistributions in binary form must reproduce the above copyright
13 *     notice, this list of conditions and the following disclaimer in the
14 *     documentation and/or other materials provided with the distribution.
15 *
16 *  THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 *  ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
20 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 *  SUCH DAMAGE.
27 *
28 */
29
30/*
31 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters.
32 */
33#ifndef	_ISPMBOX_H
34#define	_ISPMBOX_H
35
36/*
37 * Mailbox Command Opcodes
38 */
39#define MBOX_NO_OP			0x0000
40#define MBOX_LOAD_RAM			0x0001
41#define MBOX_EXEC_FIRMWARE		0x0002
42#define MBOX_DUMP_RAM			0x0003
43#define MBOX_WRITE_RAM_WORD		0x0004
44#define MBOX_READ_RAM_WORD		0x0005
45#define MBOX_MAILBOX_REG_TEST		0x0006
46#define MBOX_VERIFY_CHECKSUM		0x0007
47#define MBOX_ABOUT_FIRMWARE		0x0008
48#define	MBOX_LOAD_RISC_RAM_2100		0x0009
49					/*   a */
50#define	MBOX_LOAD_RISC_RAM		0x000b
51#define	MBOX_DUMP_RISC_RAM		0x000c
52#define MBOX_WRITE_RAM_WORD_EXTENDED	0x000d
53#define MBOX_CHECK_FIRMWARE		0x000e
54#define	MBOX_READ_RAM_WORD_EXTENDED	0x000f
55#define MBOX_INIT_REQ_QUEUE		0x0010
56#define MBOX_INIT_RES_QUEUE		0x0011
57#define MBOX_EXECUTE_IOCB		0x0012
58#define MBOX_WAKE_UP			0x0013
59#define MBOX_STOP_FIRMWARE		0x0014
60#define MBOX_ABORT			0x0015
61#define MBOX_ABORT_DEVICE		0x0016
62#define MBOX_ABORT_TARGET		0x0017
63#define MBOX_BUS_RESET			0x0018
64#define MBOX_STOP_QUEUE			0x0019
65#define MBOX_START_QUEUE		0x001a
66#define MBOX_SINGLE_STEP_QUEUE		0x001b
67#define MBOX_ABORT_QUEUE		0x001c
68#define MBOX_GET_DEV_QUEUE_STATUS	0x001d
69					/*  1e */
70#define MBOX_GET_FIRMWARE_STATUS	0x001f
71#define MBOX_GET_INIT_SCSI_ID		0x0020
72#define MBOX_GET_SELECT_TIMEOUT		0x0021
73#define MBOX_GET_RETRY_COUNT		0x0022
74#define MBOX_GET_TAG_AGE_LIMIT		0x0023
75#define MBOX_GET_CLOCK_RATE		0x0024
76#define MBOX_GET_ACT_NEG_STATE		0x0025
77#define MBOX_GET_ASYNC_DATA_SETUP_TIME	0x0026
78#define MBOX_GET_SBUS_PARAMS		0x0027
79#define		MBOX_GET_PCI_PARAMS	MBOX_GET_SBUS_PARAMS
80#define MBOX_GET_TARGET_PARAMS		0x0028
81#define MBOX_GET_DEV_QUEUE_PARAMS	0x0029
82#define	MBOX_GET_RESET_DELAY_PARAMS	0x002a
83					/*  2b */
84					/*  2c */
85					/*  2d */
86					/*  2e */
87					/*  2f */
88#define MBOX_SET_INIT_SCSI_ID		0x0030
89#define MBOX_SET_SELECT_TIMEOUT		0x0031
90#define MBOX_SET_RETRY_COUNT		0x0032
91#define MBOX_SET_TAG_AGE_LIMIT		0x0033
92#define MBOX_SET_CLOCK_RATE		0x0034
93#define MBOX_SET_ACT_NEG_STATE		0x0035
94#define MBOX_SET_ASYNC_DATA_SETUP_TIME	0x0036
95#define MBOX_SET_SBUS_CONTROL_PARAMS	0x0037
96#define		MBOX_SET_PCI_PARAMETERS	0x0037
97#define MBOX_SET_TARGET_PARAMS		0x0038
98#define MBOX_SET_DEV_QUEUE_PARAMS	0x0039
99#define	MBOX_SET_RESET_DELAY_PARAMS	0x003a
100					/*  3b */
101					/*  3c */
102					/*  3d */
103					/*  3e */
104					/*  3f */
105#define	MBOX_RETURN_BIOS_BLOCK_ADDR	0x0040
106#define	MBOX_WRITE_FOUR_RAM_WORDS	0x0041
107#define	MBOX_EXEC_BIOS_IOCB		0x0042
108#define	MBOX_SET_FW_FEATURES		0x004a
109#define	MBOX_GET_FW_FEATURES		0x004b
110#define		FW_FEATURE_FAST_POST	0x1
111#define		FW_FEATURE_LVD_NOTIFY	0x2
112#define		FW_FEATURE_RIO_32BIT	0x4
113#define		FW_FEATURE_RIO_16BIT	0x8
114
115#define	MBOX_INIT_REQ_QUEUE_A64		0x0052
116#define	MBOX_INIT_RES_QUEUE_A64		0x0053
117
118#define	MBOX_ENABLE_TARGET_MODE		0x0055
119#define		ENABLE_TARGET_FLAG	0x8000
120#define		ENABLE_TQING_FLAG	0x0004
121#define		ENABLE_MANDATORY_DISC	0x0002
122#define	MBOX_GET_TARGET_STATUS		0x0056
123
124/* These are for the ISP2X00 FC cards */
125#define	MBOX_LOAD_FLASH_FIRMWARE	0x0003
126#define	MBOX_WRITE_FC_SERDES_REG	0x0003	/* FC only */
127#define	MBOX_READ_FC_SERDES_REG		0x0004	/* FC only */
128#define	MBOX_GET_IO_STATUS		0x0012
129#define	MBOX_SET_TRANSMIT_PARAMS	0x0019
130#define	MBOX_SET_PORT_PARAMS		0x001a
131#define	MBOX_LOAD_OP_FW_PARAMS		0x001b
132#define	MBOX_INIT_MULTIPLE_QUEUE	0x001f
133#define	MBOX_GET_LOOP_ID		0x0020
134/* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */
135#define		ISP24XX_INORDER		0x0100
136#define		ISP24XX_NPIV_SAN	0x0400
137#define		ISP24XX_VSAN_SAN	0x1000
138#define		ISP24XX_FC_SP_SAN	0x2000
139#define	MBOX_GET_TIMEOUT_PARAMS		0x0022
140#define	MBOX_GET_FIRMWARE_OPTIONS	0x0028
141#define	MBOX_GENERATE_SYSTEM_ERROR	0x002a
142#define	MBOX_WRITE_SFP			0x0030
143#define	MBOX_READ_SFP			0x0031
144#define	MBOX_SET_TIMEOUT_PARAMS		0x0032
145#define	MBOX_SET_FIRMWARE_OPTIONS	0x0038
146#define	MBOX_GET_SET_FC_LED_CONF	0x003b
147#define	MBOX_RESTART_NIC_FIRMWARE	0x003d	/* FCoE only */
148#define	MBOX_ACCESS_CONTROL		0x003e
149#define	MBOX_LOOP_PORT_BYPASS		0x0040	/* FC only */
150#define	MBOX_LOOP_PORT_ENABLE		0x0041	/* FC only */
151#define	MBOX_GET_RESOURCE_COUNT		0x0042
152#define	MBOX_REQUEST_OFFLINE_MODE	0x0043
153#define	MBOX_DIAGNOSTIC_ECHO_TEST	0x0044
154#define	MBOX_DIAGNOSTIC_LOOPBACK	0x0045
155#define	MBOX_ENHANCED_GET_PDB		0x0047
156#define	MBOX_INIT_FIRMWARE_MULTI_ID	0x0048	/* 2400 only */
157#define	MBOX_GET_VP_DATABASE		0x0049	/* 2400 only */
158#define	MBOX_GET_VP_DATABASE_ENTRY	0x004a	/* 2400 only */
159#define	MBOX_GET_FCF_LIST		0x0050	/* FCoE only */
160#define	MBOX_GET_DCBX_PARAMETERS	0x0051	/* FCoE only */
161#define	MBOX_HOST_MEMORY_COPY		0x0053
162#define	MBOX_EXEC_COMMAND_IOCB_A64	0x0054
163#define	MBOX_SEND_RNID			0x0057
164#define	MBOX_SET_PARAMETERS		0x0059
165#define	MBOX_GET_PARAMETERS		0x005a
166#define	MBOX_DRIVER_HEARTBEAT		0x005B	/* FC only */
167#define	MBOX_FW_HEARTBEAT		0x005C
168#define	MBOX_GET_SET_DATA_RATE		0x005D	/* >=23XX only */
169#define		MBGSD_GET_RATE		0
170#define		MBGSD_SET_RATE		1
171#define		MBGSD_SET_RATE_NOW	2	/* 24XX only */
172#define		MBGSD_1GB	0x00
173#define		MBGSD_2GB	0x01
174#define		MBGSD_AUTO	0x02
175#define		MBGSD_4GB	0x03		/* 24XX only */
176#define		MBGSD_8GB	0x04		/* 25XX only */
177#define		MBGSD_16GB	0x05		/* 26XX only */
178#define		MBGSD_10GB	0x13		/* 26XX only */
179#define	MBOX_SEND_RNFT			0x005e
180#define	MBOX_INIT_FIRMWARE		0x0060
181#define	MBOX_GET_INIT_CONTROL_BLOCK	0x0061
182#define	MBOX_INIT_LIP			0x0062
183#define	MBOX_GET_FC_AL_POSITION_MAP	0x0063
184#define	MBOX_GET_PORT_DB		0x0064
185#define	MBOX_CLEAR_ACA			0x0065
186#define	MBOX_TARGET_RESET		0x0066
187#define	MBOX_CLEAR_TASK_SET		0x0067
188#define	MBOX_ABORT_TASK_SET		0x0068
189#define	MBOX_GET_FW_STATE		0x0069
190#define	MBOX_GET_PORT_NAME		0x006A
191#define	MBOX_GET_LINK_STATUS		0x006B
192#define	MBOX_INIT_LIP_RESET		0x006C
193#define	MBOX_GET_LINK_STAT_PR_DATA_CNT	0x006D
194#define	MBOX_SEND_SNS			0x006E
195#define	MBOX_FABRIC_LOGIN		0x006F
196#define	MBOX_SEND_CHANGE_REQUEST	0x0070
197#define	MBOX_FABRIC_LOGOUT		0x0071
198#define	MBOX_INIT_LIP_LOGIN		0x0072
199#define	MBOX_GET_PORT_NODE_NAME_LIST	0x0075
200#define	MBOX_SET_VENDOR_ID		0x0076
201#define	MBOX_GET_XGMAC_STATS		0x007a
202#define	MBOX_GET_ID_LIST		0x007C
203#define	MBOX_SEND_LFA			0x007d
204#define	MBOX_LUN_RESET			0x007E
205
206#define	ISP2100_SET_PCI_PARAM		0x00ff
207
208#define	MBOX_BUSY			0x04
209
210/*
211 * Mailbox Command Complete Status Codes
212 */
213#define	MBOX_COMMAND_COMPLETE		0x4000
214#define	MBOX_INVALID_COMMAND		0x4001
215#define	MBOX_HOST_INTERFACE_ERROR	0x4002
216#define	MBOX_TEST_FAILED		0x4003
217#define	MBOX_COMMAND_ERROR		0x4005
218#define	MBOX_COMMAND_PARAM_ERROR	0x4006
219#define	MBOX_PORT_ID_USED		0x4007
220#define	MBOX_LOOP_ID_USED		0x4008
221#define	MBOX_ALL_IDS_USED		0x4009
222#define	MBOX_NOT_LOGGED_IN		0x400A
223#define	MBOX_LINK_DOWN_ERROR		0x400B
224#define	MBOX_LOOPBACK_ERROR		0x400C
225#define	MBOX_CHECKSUM_ERROR		0x4010
226#define	MBOX_INVALID_PRODUCT_KEY	0x4020
227/* pseudo mailbox completion codes */
228#define	MBOX_REGS_BUSY			0x6000	/* registers in use */
229#define	MBOX_TIMEOUT			0x6001	/* command timed out */
230
231#define	MBLOGALL			0xffffffff
232#define	MBLOGNONE			0x00000000
233#define	MBLOGMASK(x)			(1 << (((x) - 1) & 0x1f))
234
235/*
236 * Asynchronous event status codes
237 */
238#define	ASYNC_BUS_RESET			0x8001
239#define	ASYNC_SYSTEM_ERROR		0x8002
240#define	ASYNC_RQS_XFER_ERR		0x8003
241#define	ASYNC_RSP_XFER_ERR		0x8004
242#define	ASYNC_QWAKEUP			0x8005
243#define	ASYNC_TIMEOUT_RESET		0x8006
244#define	ASYNC_DEVICE_RESET		0x8007
245#define	ASYNC_EXTMSG_UNDERRUN		0x800A
246#define	ASYNC_SCAM_INT			0x800B
247#define	ASYNC_HUNG_SCSI			0x800C
248#define	ASYNC_KILLED_BUS		0x800D
249#define	ASYNC_BUS_TRANSIT		0x800E	/* LVD -> HVD, eg. */
250#define	ASYNC_LIP_OCCURRED		0x8010	/* FC only */
251#define	ASYNC_LOOP_UP			0x8011
252#define	ASYNC_LOOP_DOWN			0x8012
253#define	ASYNC_LOOP_RESET		0x8013	/* FC only */
254#define	ASYNC_PDB_CHANGED		0x8014
255#define	ASYNC_CHANGE_NOTIFY		0x8015
256#define	ASYNC_LIP_NOS_OLS_RECV		0x8016	/* FC only */
257#define	ASYNC_LIP_ERROR			0x8017	/* FC only */
258#define	ASYNC_AUTO_PLOGI_RJT		0x8018
259#define	ASYNC_SECURITY_UPDATE		0x801B
260#define	ASYNC_CMD_CMPLT			0x8020
261#define	ASYNC_CTIO_DONE			0x8021
262#define	ASYNC_RIO32_1			0x8021
263#define	ASYNC_RIO32_2			0x8022
264#define	ASYNC_IP_XMIT_DONE		0x8022
265#define	ASYNC_IP_RECV_DONE		0x8023
266#define	ASYNC_IP_BROADCAST		0x8024
267#define	ASYNC_IP_RCVQ_LOW		0x8025
268#define	ASYNC_IP_RCVQ_EMPTY		0x8026
269#define	ASYNC_IP_RECV_DONE_ALIGNED	0x8027
270#define	ASYNC_ERR_LOGGING_DISABLED	0x8029
271#define	ASYNC_PTPMODE			0x8030	/* FC only */
272#define	ASYNC_RIO16_1			0x8031
273#define	ASYNC_RIO16_2			0x8032
274#define	ASYNC_RIO16_3			0x8033
275#define	ASYNC_RIO16_4			0x8034
276#define	ASYNC_RIO16_5			0x8035
277#define	ASYNC_CONNMODE			0x8036
278#define		ISP_CONN_LOOP		1
279#define		ISP_CONN_PTP		2
280#define		ISP_CONN_BADLIP		3
281#define		ISP_CONN_FATAL		4
282#define		ISP_CONN_LOOPBACK	5
283#define	ASYNC_P2P_INIT_ERR		0x8037
284#define	ASYNC_RIOZIO_STALL		0x8040	/* there's a RIO/ZIO entry that hasn't been serviced */
285#define	ASYNC_RIO32_2_2200		0x8042	/* same as ASYNC_RIO32_2, but for 2100/2200 */
286#define	ASYNC_RCV_ERR			0x8048
287/*
288 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options
289 * mailbox command to enable this.
290 */
291#define	ASYNC_QFULL_SENT		0x8049
292#define	ASYNC_RJT_SENT			0x8049	/* 24XX only */
293#define	ASYNC_SEL_CLASS2_P_RJT_SENT	0x804f
294#define	ASYNC_FW_RESTART_COMPLETE	0x8060
295#define	ASYNC_TEMPERATURE_ALERT		0x8070
296#define	ASYNC_INTER_DRIVER_COMP		0x8100	/* FCoE only */
297#define	ASYNC_INTER_DRIVER_NOTIFY	0x8101	/* FCoE only */
298#define	ASYNC_INTER_DRIVER_TIME_EXT	0x8102	/* FCoE only */
299#define	ASYNC_NIC_FW_STATE_CHANGE	0x8200	/* FCoE only */
300#define	ASYNC_AUTOLOAD_FW_COMPLETE	0x8400
301#define	ASYNC_AUTOLOAD_FW_FAILURE	0x8401
302
303/*
304 * Firmware Options. There are a lot of them.
305 *
306 * IFCOPTN - ISP Fibre Channel Option Word N
307 */
308#define	IFCOPT1_EQFQASYNC	(1 << 13)	/* enable QFULL notification */
309#define	IFCOPT1_EAABSRCVD	(1 << 12)
310#define	IFCOPT1_RJTASYNC	(1 << 11)	/* enable 8018 notification */
311#define	IFCOPT1_ENAPURE		(1 << 10)
312#define	IFCOPT1_ENA8017		(1 << 7)
313#define	IFCOPT1_DISGPIO67	(1 << 6)
314#define	IFCOPT1_LIPLOSSIMM	(1 << 5)
315#define	IFCOPT1_DISF7SWTCH	(1 << 4)
316#define	IFCOPT1_CTIO_RETRY	(1 << 3)
317#define	IFCOPT1_LIPASYNC	(1 << 1)
318#define	IFCOPT1_LIPF8		(1 << 0)
319
320#define	IFCOPT2_LOOPBACK	(1 << 1)
321#define	IFCOPT2_ATIO3_ONLY	(1 << 0)
322
323#define	IFCOPT3_NOPRLI		(1 << 4)	/* disable automatic sending of PRLI on local loops */
324#define	IFCOPT3_RNDASYNC	(1 << 1)
325
326/*
327 * All IOCB Queue entries are this size
328 */
329#define	QENTRY_LEN			64
330
331/*
332 * Command Structure Definitions
333 */
334
335typedef struct {
336	uint32_t	ds_base;
337	uint32_t	ds_count;
338} ispds_t;
339
340typedef struct {
341	uint32_t	ds_base;
342	uint32_t	ds_basehi;
343	uint32_t	ds_count;
344} ispds64_t;
345
346#define	DSTYPE_32BIT	0
347#define	DSTYPE_64BIT	1
348typedef struct {
349	uint16_t	ds_type;	/* 0-> ispds_t, 1-> ispds64_t */
350	uint32_t	ds_segment;	/* unused */
351	uint32_t	ds_base;	/* 32 bit address of DSD list */
352} ispdslist_t;
353
354
355typedef struct {
356	uint8_t		rqs_entry_type;
357	uint8_t		rqs_entry_count;
358	uint8_t		rqs_seqno;
359	uint8_t		rqs_flags;
360} isphdr_t;
361
362/* RQS Flag definitions */
363#define	RQSFLAG_CONTINUATION	0x01
364#define	RQSFLAG_FULL		0x02
365#define	RQSFLAG_BADHEADER	0x04
366#define	RQSFLAG_BADPACKET	0x08
367#define	RQSFLAG_BADCOUNT	0x10
368#define	RQSFLAG_BADORDER	0x20
369#define	RQSFLAG_MASK		0x3f
370
371/* RQS entry_type definitions */
372#define	RQSTYPE_REQUEST		0x01
373#define	RQSTYPE_DATASEG		0x02
374#define	RQSTYPE_RESPONSE	0x03
375#define	RQSTYPE_MARKER		0x04
376#define	RQSTYPE_CMDONLY		0x05
377#define	RQSTYPE_ATIO		0x06	/* Target Mode */
378#define	RQSTYPE_CTIO		0x07	/* Target Mode */
379#define	RQSTYPE_SCAM		0x08
380#define	RQSTYPE_A64		0x09
381#define	RQSTYPE_A64_CONT	0x0a
382#define	RQSTYPE_ENABLE_LUN	0x0b	/* Target Mode */
383#define	RQSTYPE_MODIFY_LUN	0x0c	/* Target Mode */
384#define	RQSTYPE_NOTIFY		0x0d	/* Target Mode */
385#define	RQSTYPE_NOTIFY_ACK	0x0e	/* Target Mode */
386#define	RQSTYPE_CTIO1		0x0f	/* Target Mode */
387#define	RQSTYPE_STATUS_CONT	0x10
388#define	RQSTYPE_T2RQS		0x11
389#define	RQSTYPE_CTIO7		0x12
390#define	RQSTYPE_IP_XMIT		0x13
391#define	RQSTYPE_TSK_MGMT	0x14
392#define	RQSTYPE_T4RQS		0x15
393#define	RQSTYPE_ATIO2		0x16	/* Target Mode */
394#define	RQSTYPE_CTIO2		0x17	/* Target Mode */
395#define	RQSTYPE_T7RQS		0x18
396#define	RQSTYPE_T3RQS		0x19
397#define	RQSTYPE_IP_XMIT_64	0x1b
398#define	RQSTYPE_CTIO4		0x1e	/* Target Mode */
399#define	RQSTYPE_CTIO3		0x1f	/* Target Mode */
400#define	RQSTYPE_RIO1		0x21
401#define	RQSTYPE_RIO2		0x22
402#define	RQSTYPE_IP_RECV		0x23
403#define	RQSTYPE_IP_RECV_CONT	0x24
404#define	RQSTYPE_CT_PASSTHRU	0x29
405#define	RQSTYPE_MS_PASSTHRU	0x29
406#define	RQSTYPE_VP_CTRL		0x30	/* 24XX only */
407#define	RQSTYPE_VP_MODIFY	0x31	/* 24XX only */
408#define	RQSTYPE_RPT_ID_ACQ	0x32	/* 24XX only */
409#define	RQSTYPE_ABORT_IO	0x33
410#define	RQSTYPE_T6RQS		0x48
411#define	RQSTYPE_LOGIN		0x52
412#define	RQSTYPE_ABTS_RCVD	0x54	/* 24XX only */
413#define	RQSTYPE_ABTS_RSP	0x55	/* 24XX only */
414
415
416#define	ISP_RQDSEG	4
417typedef struct {
418	isphdr_t	req_header;
419	uint32_t	req_handle;
420	uint8_t		req_lun_trn;
421	uint8_t		req_target;
422	uint16_t	req_cdblen;
423	uint16_t	req_flags;
424	uint16_t	req_reserved;
425	uint16_t	req_time;
426	uint16_t	req_seg_count;
427	uint8_t		req_cdb[12];
428	ispds_t		req_dataseg[ISP_RQDSEG];
429} ispreq_t;
430#define	ISP_RQDSEG_A64	2
431
432typedef struct {
433	isphdr_t	mrk_header;
434	uint32_t	mrk_handle;
435	uint8_t		mrk_reserved0;
436	uint8_t		mrk_target;
437	uint16_t	mrk_modifier;
438	uint16_t	mrk_flags;
439	uint16_t	mrk_lun;
440	uint8_t		mrk_reserved1[48];
441} isp_marker_t;
442
443typedef struct {
444	isphdr_t	mrk_header;
445	uint32_t	mrk_handle;
446	uint16_t	mrk_nphdl;
447	uint8_t		mrk_modifier;
448	uint8_t		mrk_reserved0;
449	uint8_t		mrk_reserved1;
450	uint8_t		mrk_vphdl;
451	uint16_t	mrk_reserved2;
452	uint8_t		mrk_lun[8];
453	uint8_t		mrk_reserved3[40];
454} isp_marker_24xx_t;
455
456
457#define SYNC_DEVICE	0
458#define SYNC_TARGET	1
459#define SYNC_ALL	2
460#define SYNC_LIP	3
461
462#define	ISP_RQDSEG_T2		3
463typedef struct {
464	isphdr_t	req_header;
465	uint32_t	req_handle;
466	uint8_t		req_lun_trn;
467	uint8_t		req_target;
468	uint16_t	req_scclun;
469	uint16_t	req_flags;
470	uint8_t		req_crn;
471	uint8_t		req_reserved;
472	uint16_t	req_time;
473	uint16_t	req_seg_count;
474	uint8_t		req_cdb[16];
475	uint32_t	req_totalcnt;
476	ispds_t		req_dataseg[ISP_RQDSEG_T2];
477} ispreqt2_t;
478
479typedef struct {
480	isphdr_t	req_header;
481	uint32_t	req_handle;
482	uint16_t	req_target;
483	uint16_t	req_scclun;
484	uint16_t	req_flags;
485	uint8_t		req_crn;
486	uint8_t		req_reserved;
487	uint16_t	req_time;
488	uint16_t	req_seg_count;
489	uint8_t		req_cdb[16];
490	uint32_t	req_totalcnt;
491	ispds_t		req_dataseg[ISP_RQDSEG_T2];
492} ispreqt2e_t;
493
494#define	ISP_RQDSEG_T3		2
495typedef struct {
496	isphdr_t	req_header;
497	uint32_t	req_handle;
498	uint8_t		req_lun_trn;
499	uint8_t		req_target;
500	uint16_t	req_scclun;
501	uint16_t	req_flags;
502	uint8_t		req_crn;
503	uint8_t		req_reserved;
504	uint16_t	req_time;
505	uint16_t	req_seg_count;
506	uint8_t		req_cdb[16];
507	uint32_t	req_totalcnt;
508	ispds64_t	req_dataseg[ISP_RQDSEG_T3];
509} ispreqt3_t;
510#define	ispreq64_t	ispreqt3_t	/* same as.... */
511
512typedef struct {
513	isphdr_t	req_header;
514	uint32_t	req_handle;
515	uint16_t	req_target;
516	uint16_t	req_scclun;
517	uint16_t	req_flags;
518	uint8_t		req_crn;
519	uint8_t		req_reserved;
520	uint16_t	req_time;
521	uint16_t	req_seg_count;
522	uint8_t		req_cdb[16];
523	uint32_t	req_totalcnt;
524	ispds64_t	req_dataseg[ISP_RQDSEG_T3];
525} ispreqt3e_t;
526
527/* req_flag values */
528#define	REQFLAG_NODISCON	0x0001
529#define	REQFLAG_HTAG		0x0002
530#define	REQFLAG_OTAG		0x0004
531#define	REQFLAG_STAG		0x0008
532#define	REQFLAG_TARGET_RTN	0x0010
533
534#define	REQFLAG_NODATA		0x0000
535#define	REQFLAG_DATA_IN		0x0020
536#define	REQFLAG_DATA_OUT	0x0040
537#define	REQFLAG_DATA_UNKNOWN	0x0060
538
539#define	REQFLAG_DISARQ		0x0100
540#define	REQFLAG_FRC_ASYNC	0x0200
541#define	REQFLAG_FRC_SYNC	0x0400
542#define	REQFLAG_FRC_WIDE	0x0800
543#define	REQFLAG_NOPARITY	0x1000
544#define	REQFLAG_STOPQ		0x2000
545#define	REQFLAG_XTRASNS		0x4000
546#define	REQFLAG_PRIORITY	0x8000
547
548typedef struct {
549	isphdr_t	req_header;
550	uint32_t	req_handle;
551	uint8_t		req_lun_trn;
552	uint8_t		req_target;
553	uint16_t	req_cdblen;
554	uint16_t	req_flags;
555	uint16_t	req_reserved;
556	uint16_t	req_time;
557	uint16_t	req_seg_count;
558	uint8_t		req_cdb[44];
559} ispextreq_t;
560
561
562/*
563 * ISP24XX structures
564 */
565typedef struct {
566	isphdr_t	req_header;
567	uint32_t	req_handle;
568	uint16_t	req_nphdl;
569	uint16_t	req_time;
570	uint16_t	req_seg_count;
571	uint16_t	req_reserved;
572	uint8_t		req_lun[8];
573	uint8_t		req_alen_datadir;
574	uint8_t		req_task_management;
575	uint8_t		req_task_attribute;
576	uint8_t		req_crn;
577	uint8_t		req_cdb[16];
578	uint32_t	req_dl;
579	uint16_t	req_tidlo;
580	uint8_t		req_tidhi;
581	uint8_t		req_vpidx;
582	ispds64_t	req_dataseg;
583} ispreqt7_t;
584
585/* Task Management Request Function */
586typedef struct {
587	isphdr_t	tmf_header;
588	uint32_t	tmf_handle;
589	uint16_t	tmf_nphdl;
590	uint8_t		tmf_reserved0[2];
591	uint16_t	tmf_delay;
592	uint16_t	tmf_timeout;
593	uint8_t		tmf_lun[8];
594	uint32_t	tmf_flags;
595	uint8_t		tmf_reserved1[20];
596	uint16_t	tmf_tidlo;
597	uint8_t		tmf_tidhi;
598	uint8_t		tmf_vpidx;
599	uint8_t		tmf_reserved2[12];
600} isp24xx_tmf_t;
601
602#define	ISP24XX_TMF_NOSEND		0x80000000
603
604#define	ISP24XX_TMF_LUN_RESET		0x00000010
605#define	ISP24XX_TMF_ABORT_TASK_SET	0x00000008
606#define	ISP24XX_TMF_CLEAR_TASK_SET	0x00000004
607#define	ISP24XX_TMF_TARGET_RESET	0x00000002
608#define	ISP24XX_TMF_CLEAR_ACA		0x00000001
609
610/* I/O Abort Structure */
611typedef struct {
612	isphdr_t	abrt_header;
613	uint32_t	abrt_handle;
614	uint16_t	abrt_nphdl;
615	uint16_t	abrt_options;
616	uint32_t	abrt_cmd_handle;
617	uint16_t	abrt_queue_number;
618	uint8_t		abrt_reserved[30];
619	uint16_t	abrt_tidlo;
620	uint8_t		abrt_tidhi;
621	uint8_t		abrt_vpidx;
622	uint8_t		abrt_reserved1[12];
623} isp24xx_abrt_t;
624
625#define	ISP24XX_ABRT_NOSEND	0x01	/* don't actually send ABTS */
626#define	ISP24XX_ABRT_OKAY	0x00	/* in nphdl on return */
627#define	ISP24XX_ABRT_ENXIO	0x31	/* in nphdl on return */
628
629#define	ISP_CDSEG	7
630typedef struct {
631	isphdr_t	req_header;
632	uint32_t	req_reserved;
633	ispds_t		req_dataseg[ISP_CDSEG];
634} ispcontreq_t;
635
636#define	ISP_CDSEG64	5
637typedef struct {
638	isphdr_t	req_header;
639	ispds64_t	req_dataseg[ISP_CDSEG64];
640} ispcontreq64_t;
641
642typedef struct {
643	isphdr_t	req_header;
644	uint32_t	req_handle;
645	uint16_t	req_scsi_status;
646	uint16_t	req_completion_status;
647	uint16_t	req_state_flags;
648	uint16_t	req_status_flags;
649	uint16_t	req_time;
650#define	req_response_len	req_time	/* FC only */
651	uint16_t	req_sense_len;
652	uint32_t	req_resid;
653	uint8_t		req_response[8];	/* FC only */
654	uint8_t		req_sense_data[32];
655} ispstatusreq_t;
656
657/*
658 * Status Continuation
659 */
660typedef struct {
661	isphdr_t	req_header;
662	uint8_t		req_sense_data[60];
663} ispstatus_cont_t;
664
665/*
666 * 24XX Type 0 status
667 */
668typedef struct {
669	isphdr_t	req_header;
670	uint32_t	req_handle;
671	uint16_t	req_completion_status;
672	uint16_t	req_oxid;
673	uint32_t	req_resid;
674	uint16_t	req_reserved0;
675	uint16_t	req_state_flags;
676	uint16_t	req_retry_delay;	/* aka Status Qualifier */
677	uint16_t	req_scsi_status;
678	uint32_t	req_fcp_residual;
679	uint32_t	req_sense_len;
680	uint32_t	req_response_len;
681	uint8_t		req_rsp_sense[28];
682} isp24xx_statusreq_t;
683
684/*
685 * For Qlogic 2X00, the high order byte of SCSI status has
686 * additional meaning.
687 */
688#define	RQCS_CR	0x1000	/* Confirmation Request */
689#define	RQCS_RU	0x0800	/* Residual Under */
690#define	RQCS_RO	0x0400	/* Residual Over */
691#define	RQCS_RESID	(RQCS_RU|RQCS_RO)
692#define	RQCS_SV	0x0200	/* Sense Length Valid */
693#define	RQCS_RV	0x0100	/* FCP Response Length Valid */
694
695/*
696 * CT Passthru IOCB
697 */
698typedef struct {
699	isphdr_t	ctp_header;
700	uint32_t	ctp_handle;
701	uint16_t	ctp_status;
702	uint16_t	ctp_nphdl;	/* n-port handle */
703	uint16_t	ctp_cmd_cnt;	/* Command DSD count */
704	uint8_t		ctp_vpidx;
705	uint8_t		ctp_reserved0;
706	uint16_t	ctp_time;
707	uint16_t	ctp_reserved1;
708	uint16_t	ctp_rsp_cnt;	/* Response DSD count */
709	uint16_t	ctp_reserved2[5];
710	uint32_t	ctp_rsp_bcnt;	/* Response byte count */
711	uint32_t	ctp_cmd_bcnt;	/* Command byte count */
712	ispds64_t	ctp_dataseg[2];
713} isp_ct_pt_t;
714
715/*
716 * MS Passthru IOCB
717 */
718typedef struct {
719	isphdr_t	ms_header;
720	uint32_t	ms_handle;
721	uint16_t	ms_nphdl;	/* handle in high byte for !2k f/w */
722	uint16_t	ms_status;
723	uint16_t	ms_flags;
724	uint16_t	ms_reserved1;	/* low 8 bits */
725	uint16_t	ms_time;
726	uint16_t	ms_cmd_cnt;	/* Command DSD count */
727	uint16_t	ms_tot_cnt;	/* Total DSD Count */
728	uint8_t		ms_type;	/* MS type */
729	uint8_t		ms_r_ctl;	/* R_CTL */
730	uint16_t	ms_rxid;	/* RX_ID */
731	uint16_t	ms_reserved2;
732	uint32_t	ms_handle2;
733	uint32_t	ms_rsp_bcnt;	/* Response byte count */
734	uint32_t	ms_cmd_bcnt;	/* Command byte count */
735	ispds64_t	ms_dataseg[2];
736} isp_ms_t;
737
738/*
739 * Completion Status Codes.
740 */
741#define RQCS_COMPLETE			0x0000
742#define RQCS_DMA_ERROR			0x0002
743#define RQCS_RESET_OCCURRED		0x0004
744#define RQCS_ABORTED			0x0005
745#define RQCS_TIMEOUT			0x0006
746#define RQCS_DATA_OVERRUN		0x0007
747#define RQCS_DATA_UNDERRUN		0x0015
748#define	RQCS_QUEUE_FULL			0x001C
749
750/* 1X00 Only Completion Codes */
751#define RQCS_INCOMPLETE			0x0001
752#define RQCS_TRANSPORT_ERROR		0x0003
753#define RQCS_COMMAND_OVERRUN		0x0008
754#define RQCS_STATUS_OVERRUN		0x0009
755#define RQCS_BAD_MESSAGE		0x000a
756#define RQCS_NO_MESSAGE_OUT		0x000b
757#define RQCS_EXT_ID_FAILED		0x000c
758#define RQCS_IDE_MSG_FAILED		0x000d
759#define RQCS_ABORT_MSG_FAILED		0x000e
760#define RQCS_REJECT_MSG_FAILED		0x000f
761#define RQCS_NOP_MSG_FAILED		0x0010
762#define RQCS_PARITY_ERROR_MSG_FAILED	0x0011
763#define RQCS_DEVICE_RESET_MSG_FAILED	0x0012
764#define RQCS_ID_MSG_FAILED		0x0013
765#define RQCS_UNEXP_BUS_FREE		0x0014
766#define	RQCS_XACT_ERR1			0x0018
767#define	RQCS_XACT_ERR2			0x0019
768#define	RQCS_XACT_ERR3			0x001A
769#define	RQCS_BAD_ENTRY			0x001B
770#define	RQCS_PHASE_SKIPPED		0x001D
771#define	RQCS_ARQS_FAILED		0x001E
772#define	RQCS_WIDE_FAILED		0x001F
773#define	RQCS_SYNCXFER_FAILED		0x0020
774#define	RQCS_LVD_BUSERR			0x0021
775
776/* 2X00 Only Completion Codes */
777#define	RQCS_PORT_UNAVAILABLE		0x0028
778#define	RQCS_PORT_LOGGED_OUT		0x0029
779#define	RQCS_PORT_CHANGED		0x002A
780#define	RQCS_PORT_BUSY			0x002B
781
782/* 24XX Only Completion Codes */
783#define	RQCS_24XX_DRE			0x0011	/* data reassembly error */
784#define	RQCS_24XX_TABORT		0x0013	/* aborted by target */
785#define	RQCS_24XX_ENOMEM		0x002C	/* f/w resource unavailable */
786#define	RQCS_24XX_TMO			0x0030	/* task management overrun */
787
788
789/*
790 * 1X00 specific State Flags
791 */
792#define RQSF_GOT_BUS			0x0100
793#define RQSF_GOT_TARGET			0x0200
794#define RQSF_SENT_CDB			0x0400
795#define RQSF_XFRD_DATA			0x0800
796#define RQSF_GOT_STATUS			0x1000
797#define RQSF_GOT_SENSE			0x2000
798#define	RQSF_XFER_COMPLETE		0x4000
799
800/*
801 * 2X00 specific State Flags
802 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available)
803 */
804#define	RQSF_DATA_IN			0x0020
805#define	RQSF_DATA_OUT			0x0040
806#define	RQSF_STAG			0x0008
807#define	RQSF_OTAG			0x0004
808#define	RQSF_HTAG			0x0002
809/*
810 * 1X00 Status Flags
811 */
812#define RQSTF_DISCONNECT		0x0001
813#define RQSTF_SYNCHRONOUS		0x0002
814#define RQSTF_PARITY_ERROR		0x0004
815#define RQSTF_BUS_RESET			0x0008
816#define RQSTF_DEVICE_RESET		0x0010
817#define RQSTF_ABORTED			0x0020
818#define RQSTF_TIMEOUT			0x0040
819#define RQSTF_NEGOTIATION		0x0080
820
821/*
822 * 2X00 specific state flags
823 */
824/* RQSF_SENT_CDB	*/
825/* RQSF_XFRD_DATA	*/
826/* RQSF_GOT_STATUS	*/
827/* RQSF_XFER_COMPLETE	*/
828
829/*
830 * 2X00 specific status flags
831 */
832/* RQSTF_ABORTED */
833/* RQSTF_TIMEOUT */
834#define	RQSTF_DMA_ERROR			0x0080
835#define	RQSTF_LOGOUT			0x2000
836
837/*
838 * Miscellaneous
839 */
840#ifndef	ISP_EXEC_THROTTLE
841#define	ISP_EXEC_THROTTLE	16
842#endif
843
844/*
845 * About Firmware returns an 'attribute' word in mailbox 6.
846 * These attributes are for 2200 and 2300.
847 */
848#define	ISP_FW_ATTR_TMODE	0x0001
849#define	ISP_FW_ATTR_SCCLUN	0x0002
850#define	ISP_FW_ATTR_FABRIC	0x0004
851#define	ISP_FW_ATTR_CLASS2	0x0008
852#define	ISP_FW_ATTR_FCTAPE	0x0010
853#define	ISP_FW_ATTR_IP		0x0020
854#define	ISP_FW_ATTR_VI		0x0040
855#define	ISP_FW_ATTR_VI_SOLARIS	0x0080
856#define	ISP_FW_ATTR_2KLOGINS	0x0100	/* just a guess... */
857
858/* and these are for the 2400 */
859#define	ISP2400_FW_ATTR_CLASS2	0x0001
860#define	ISP2400_FW_ATTR_IP	0x0002
861#define	ISP2400_FW_ATTR_MULTIID	0x0004
862#define	ISP2400_FW_ATTR_SB2	0x0008
863#define	ISP2400_FW_ATTR_T10CRC	0x0010
864#define	ISP2400_FW_ATTR_VI	0x0020
865#define	ISP2400_FW_ATTR_MQ	0x0040
866#define	ISP2400_FW_ATTR_MSIX	0x0080
867#define	ISP2400_FW_ATTR_FCOE	0x0800
868#define	ISP2400_FW_ATTR_VP0	0x1000
869#define	ISP2400_FW_ATTR_EXPFW	0x2000
870#define	ISP2400_FW_ATTR_HOTFW	0x4000
871#define	ISP2400_FW_ATTR_EXTNDED	0x8000
872#define	ISP2400_FW_ATTR_EXTVP	0x00010000
873#define	ISP2400_FW_ATTR_VN2VN	0x00040000
874#define	ISP2400_FW_ATTR_EXMOFF	0x00080000
875#define	ISP2400_FW_ATTR_NPMOFF	0x00100000
876#define	ISP2400_FW_ATTR_DIFCHOP	0x00400000
877#define	ISP2400_FW_ATTR_SRIOV	0x02000000
878#define	ISP2400_FW_ATTR_ASICTMP	0x0200000000
879#define	ISP2400_FW_ATTR_ATIOMQ	0x0400000000
880
881/*
882 * These are either manifestly true or are dependent on f/w attributes
883 */
884#define	ISP_CAP_TMODE(isp)	\
885	(IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE))
886#define	ISP_CAP_SCCFW(isp)	\
887	(IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN))
888#define	ISP_CAP_2KLOGIN(isp)	\
889	(IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS))
890
891/*
892 * This is only true for 24XX cards with this f/w attribute
893 */
894#define	ISP_CAP_MULTI_ID(isp)	\
895	(IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0)
896#define	ISP_GET_VPIDX(isp, tag) \
897	(ISP_CAP_MULTI_ID(isp) ? tag : 0)
898#define	ISP_CAP_VP0(isp)	\
899	(IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_VP0) : 0)
900
901/*
902 * This is true manifestly or is dependent on a f/w attribute
903 * but may or may not actually be *enabled*. In any case, it
904 * is enabled on a per-channel basis.
905 */
906#define	ISP_CAP_FCTAPE(isp)	\
907	(IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_FCTAPE))
908
909#define	ISP_FCTAPE_ENABLED(isp, chan)	\
910	(IS_24XX(isp)? (FCPARAM(isp, chan)->isp_xfwoptions & ICB2400_OPT2_FCTAPE) != 0 : (FCPARAM(isp, chan)->isp_xfwoptions & ICBXOPT_FCTAPE) != 0)
911
912/*
913 * Reduced Interrupt Operation Response Queue Entries
914 */
915
916typedef struct {
917	isphdr_t	req_header;
918	uint32_t	req_handles[15];
919} isp_rio1_t;
920
921typedef struct {
922	isphdr_t	req_header;
923	uint16_t	req_handles[30];
924} isp_rio2_t;
925
926/*
927 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures
928 */
929
930/*
931 * Initialization Control Block
932 *
933 * Version One (prime) format.
934 */
935typedef struct {
936	uint8_t		icb_version;
937	uint8_t		icb_reserved0;
938	uint16_t	icb_fwoptions;
939	uint16_t	icb_maxfrmlen;
940	uint16_t	icb_maxalloc;
941	uint16_t	icb_execthrottle;
942	uint8_t		icb_retry_count;
943	uint8_t		icb_retry_delay;
944	uint8_t		icb_portname[8];
945	uint16_t	icb_hardaddr;
946	uint8_t		icb_iqdevtype;
947	uint8_t		icb_logintime;
948	uint8_t		icb_nodename[8];
949	uint16_t	icb_rqstout;
950	uint16_t	icb_rspnsin;
951	uint16_t	icb_rqstqlen;
952	uint16_t	icb_rsltqlen;
953	uint16_t	icb_rqstaddr[4];
954	uint16_t	icb_respaddr[4];
955	uint16_t	icb_lunenables;
956	uint8_t		icb_ccnt;
957	uint8_t		icb_icnt;
958	uint16_t	icb_lunetimeout;
959	uint16_t	icb_reserved1;
960	uint16_t	icb_xfwoptions;
961	uint8_t		icb_racctimer;
962	uint8_t		icb_idelaytimer;
963	uint16_t	icb_zfwoptions;
964	uint16_t	icb_reserved2[13];
965} isp_icb_t;
966
967#define	ICB_VERSION1	1
968
969#define	ICBOPT_EXTENDED		0x8000
970#define	ICBOPT_BOTH_WWNS	0x4000
971#define	ICBOPT_FULL_LOGIN	0x2000
972#define	ICBOPT_STOP_ON_QFULL	0x1000	/* 2200/2100 only */
973#define	ICBOPT_PREV_ADDRESS	0x0800
974#define	ICBOPT_SRCHDOWN		0x0400
975#define	ICBOPT_NOLIP		0x0200
976#define	ICBOPT_PDBCHANGE_AE	0x0100
977#define	ICBOPT_TGT_TYPE		0x0080
978#define	ICBOPT_INI_ADISC	0x0040
979#define	ICBOPT_INI_DISABLE	0x0020
980#define	ICBOPT_TGT_ENABLE	0x0010
981#define	ICBOPT_FAST_POST	0x0008
982#define	ICBOPT_FULL_DUPLEX	0x0004
983#define	ICBOPT_FAIRNESS		0x0002
984#define	ICBOPT_HARD_ADDRESS	0x0001
985
986#define	ICBXOPT_NO_LOGOUT	0x8000	/* no logout on link failure */
987#define	ICBXOPT_FCTAPE_CCQ	0x4000	/* FC-Tape Command Queueing */
988#define	ICBXOPT_FCTAPE_CONFIRM	0x2000
989#define	ICBXOPT_FCTAPE		0x1000
990#define	ICBXOPT_CLASS2_ACK0	0x0200
991#define	ICBXOPT_CLASS2		0x0100
992#define	ICBXOPT_NO_PLAY		0x0080	/* don't play if can't get hard addr */
993#define	ICBXOPT_TOPO_MASK	0x0070
994#define	ICBXOPT_LOOP_ONLY	0x0000
995#define	ICBXOPT_PTP_ONLY	0x0010
996#define	ICBXOPT_LOOP_2_PTP	0x0020
997#define	ICBXOPT_PTP_2_LOOP	0x0030
998/*
999 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits.
1000 * RIO is not defined for the 23XX cards (just 2200)
1001 */
1002#define	ICBXOPT_RIO_OFF		0
1003#define	ICBXOPT_RIO_16BIT	1
1004#define	ICBXOPT_RIO_32BIT	2
1005#define	ICBXOPT_RIO_16BIT_IOCB	3
1006#define	ICBXOPT_RIO_32BIT_IOCB	4
1007#define	ICBXOPT_ZIO		5
1008#define	ICBXOPT_TIMER_MASK	0x7
1009
1010#define	ICBZOPT_RATE_MASK	0xC000
1011#define	ICBZOPT_RATE_1GB	0x0000
1012#define	ICBZOPT_RATE_AUTO	0x8000
1013#define	ICBZOPT_RATE_2GB	0x4000
1014#define	ICBZOPT_50_OHM		0x2000
1015#define	ICBZOPT_NO_LOCAL_PLOGI	0x0080
1016#define	ICBZOPT_ENA_OOF		0x0040	/* out of order frame handling */
1017#define	ICBZOPT_RSPSZ_MASK	0x0030
1018#define	ICBZOPT_RSPSZ_24	0x0000
1019#define	ICBZOPT_RSPSZ_12	0x0010
1020#define	ICBZOPT_RSPSZ_24A	0x0020
1021#define	ICBZOPT_RSPSZ_32	0x0030
1022#define	ICBZOPT_SOFTID		0x0002
1023#define	ICBZOPT_ENA_RDXFR_RDY	0x0001
1024
1025/* 2400 F/W options */
1026#define	ICB2400_OPT1_BOTH_WWNS		0x00004000
1027#define	ICB2400_OPT1_FULL_LOGIN		0x00002000
1028#define	ICB2400_OPT1_PREV_ADDRESS	0x00000800
1029#define	ICB2400_OPT1_SRCHDOWN		0x00000400
1030#define	ICB2400_OPT1_NOLIP		0x00000200
1031#define	ICB2400_OPT1_INI_DISABLE	0x00000020
1032#define	ICB2400_OPT1_TGT_ENABLE		0x00000010
1033#define	ICB2400_OPT1_FULL_DUPLEX	0x00000004
1034#define	ICB2400_OPT1_FAIRNESS		0x00000002
1035#define	ICB2400_OPT1_HARD_ADDRESS	0x00000001
1036
1037#define	ICB2400_OPT2_ENA_ATIOMQ		0x08000000
1038#define	ICB2400_OPT2_ENA_IHA		0x04000000
1039#define	ICB2400_OPT2_QOS		0x02000000
1040#define	ICB2400_OPT2_IOCBS		0x01000000
1041#define	ICB2400_OPT2_ENA_IHR		0x00400000
1042#define	ICB2400_OPT2_ENA_VMS		0x00200000
1043#define	ICB2400_OPT2_ENA_TA		0x00100000
1044#define	ICB2400_OPT2_TPRLIC		0x00004000
1045#define	ICB2400_OPT2_FCTAPE		0x00001000
1046#define	ICB2400_OPT2_FCSP		0x00000800
1047#define	ICB2400_OPT2_CLASS2_ACK0	0x00000200
1048#define	ICB2400_OPT2_CLASS2		0x00000100
1049#define	ICB2400_OPT2_NO_PLAY		0x00000080
1050#define	ICB2400_OPT2_TOPO_MASK		0x00000070
1051#define	ICB2400_OPT2_LOOP_ONLY		0x00000000
1052#define	ICB2400_OPT2_PTP_ONLY		0x00000010
1053#define	ICB2400_OPT2_LOOP_2_PTP		0x00000020
1054#define	ICB2400_OPT2_TIMER_MASK		0x0000000f
1055#define	ICB2400_OPT2_ZIO		0x00000005
1056#define	ICB2400_OPT2_ZIO1		0x00000006
1057
1058#define	ICB2400_OPT3_NO_CTXDIS		0x40000000
1059#define	ICB2400_OPT3_ENA_ETH_RESP	0x08000000
1060#define	ICB2400_OPT3_ENA_ETH_ATIO	0x04000000
1061#define	ICB2400_OPT3_ENA_MFCF		0x00020000
1062#define	ICB2400_OPT3_SKIP_4GB		0x00010000
1063#define	ICB2400_OPT3_RATE_MASK		0x0000E000
1064#define	ICB2400_OPT3_RATE_1GB		0x00000000
1065#define	ICB2400_OPT3_RATE_2GB		0x00002000
1066#define	ICB2400_OPT3_RATE_AUTO		0x00004000
1067#define	ICB2400_OPT3_RATE_4GB		0x00006000
1068#define	ICB2400_OPT3_RATE_8GB		0x00008000
1069#define	ICB2400_OPT3_RATE_16GB		0x0000A000
1070#define	ICB2400_OPT3_ENA_OOF_XFRDY	0x00000200
1071#define	ICB2400_OPT3_NO_N2N_LOGI	0x00000100
1072#define	ICB2400_OPT3_NO_LOCAL_PLOGI	0x00000080
1073#define	ICB2400_OPT3_ENA_OOF		0x00000040
1074/* note that a response size flag of zero is reserved! */
1075#define	ICB2400_OPT3_RSPSZ_MASK		0x00000030
1076#define	ICB2400_OPT3_RSPSZ_12		0x00000010
1077#define	ICB2400_OPT3_RSPSZ_24		0x00000020
1078#define	ICB2400_OPT3_RSPSZ_32		0x00000030
1079#define	ICB2400_OPT3_SOFTID		0x00000002
1080
1081#define	ICB_MIN_FRMLEN		256
1082#define	ICB_MAX_FRMLEN		2112
1083#define	ICB_DFLT_FRMLEN		1024
1084#define	ICB_DFLT_ALLOC		256
1085#define	ICB_DFLT_THROTTLE	16
1086#define	ICB_DFLT_RDELAY		5
1087#define	ICB_DFLT_RCOUNT		3
1088
1089#define	ICB_LOGIN_TOV		30
1090#define	ICB_LUN_ENABLE_TOV	15
1091
1092
1093/*
1094 * And somebody at QLogic had a great idea that you could just change
1095 * the structure *and* keep the version number the same as the other cards.
1096 */
1097typedef struct {
1098	uint16_t	icb_version;
1099	uint16_t	icb_reserved0;
1100	uint16_t	icb_maxfrmlen;
1101	uint16_t	icb_execthrottle;
1102	uint16_t	icb_xchgcnt;
1103	uint16_t	icb_hardaddr;
1104	uint8_t		icb_portname[8];
1105	uint8_t		icb_nodename[8];
1106	uint16_t	icb_rspnsin;
1107	uint16_t	icb_rqstout;
1108	uint16_t	icb_retry_count;
1109	uint16_t	icb_priout;
1110	uint16_t	icb_rsltqlen;
1111	uint16_t	icb_rqstqlen;
1112	uint16_t	icb_ldn_nols;
1113	uint16_t	icb_prqstqlen;
1114	uint16_t	icb_rqstaddr[4];
1115	uint16_t	icb_respaddr[4];
1116	uint16_t	icb_priaddr[4];
1117	uint16_t	icb_msixresp;
1118	uint16_t	icb_msixatio;
1119	uint16_t	icb_reserved1[2];
1120	uint16_t	icb_atio_in;
1121	uint16_t	icb_atioqlen;
1122	uint16_t	icb_atioqaddr[4];
1123	uint16_t	icb_idelaytimer;
1124	uint16_t	icb_logintime;
1125	uint32_t	icb_fwoptions1;
1126	uint32_t	icb_fwoptions2;
1127	uint32_t	icb_fwoptions3;
1128	uint16_t	icb_qos;
1129	uint16_t	icb_reserved2[3];
1130	uint16_t	icb_enodemac[3];
1131	uint16_t	icb_disctime;
1132	uint16_t	icb_reserved3[4];
1133} isp_icb_2400_t;
1134
1135#define	RQRSP_ADDR0015	0
1136#define	RQRSP_ADDR1631	1
1137#define	RQRSP_ADDR3247	2
1138#define	RQRSP_ADDR4863	3
1139
1140
1141#define	ICB_NNM0	7
1142#define	ICB_NNM1	6
1143#define	ICB_NNM2	5
1144#define	ICB_NNM3	4
1145#define	ICB_NNM4	3
1146#define	ICB_NNM5	2
1147#define	ICB_NNM6	1
1148#define	ICB_NNM7	0
1149
1150#define	MAKE_NODE_NAME_FROM_WWN(array, wwn)	\
1151	array[ICB_NNM0] = (uint8_t) ((wwn >>  0) & 0xff), \
1152	array[ICB_NNM1] = (uint8_t) ((wwn >>  8) & 0xff), \
1153	array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \
1154	array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \
1155	array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \
1156	array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \
1157	array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \
1158	array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff)
1159
1160#define	MAKE_WWN_FROM_NODE_NAME(wwn, array)	\
1161	wwn =	((uint64_t) array[ICB_NNM0]) | \
1162		((uint64_t) array[ICB_NNM1] <<  8) | \
1163		((uint64_t) array[ICB_NNM2] << 16) | \
1164		((uint64_t) array[ICB_NNM3] << 24) | \
1165		((uint64_t) array[ICB_NNM4] << 32) | \
1166		((uint64_t) array[ICB_NNM5] << 40) | \
1167		((uint64_t) array[ICB_NNM6] << 48) | \
1168		((uint64_t) array[ICB_NNM7] << 56)
1169
1170
1171/*
1172 * For MULTI_ID firmware, this describes a
1173 * virtual port entity for getting status.
1174 */
1175typedef struct {
1176	uint16_t	vp_port_status;
1177	uint8_t		vp_port_options;
1178	uint8_t		vp_port_loopid;
1179	uint8_t		vp_port_portname[8];
1180	uint8_t		vp_port_nodename[8];
1181	uint16_t	vp_port_portid_lo;	/* not present when trailing icb */
1182	uint16_t	vp_port_portid_hi;	/* not present when trailing icb */
1183} vp_port_info_t;
1184
1185#define	ICB2400_VPOPT_ENA_SNSLOGIN	0x00000040	/* Enable SNS Login and SCR for Virtual Ports */
1186#define	ICB2400_VPOPT_TGT_DISABLE	0x00000020	/* Target Mode Disabled */
1187#define	ICB2400_VPOPT_INI_ENABLE	0x00000010	/* Initiator Mode Enabled */
1188#define	ICB2400_VPOPT_ENABLED		0x00000008	/* VP Enabled */
1189#define	ICB2400_VPOPT_NOPLAY		0x00000004	/* ID Not Acquired */
1190#define	ICB2400_VPOPT_PREV_ADDRESS	0x00000002	/* Previously Assigned ID */
1191#define	ICB2400_VPOPT_HARD_ADDRESS	0x00000001	/* Hard Assigned ID */
1192
1193#define	ICB2400_VPOPT_WRITE_SIZE	20
1194
1195/*
1196 * For MULTI_ID firmware, we append this structure
1197 * to the isp_icb_2400_t above, followed by a list
1198 * structures that are *most* of the vp_port_info_t.
1199 */
1200typedef struct {
1201	uint16_t	vp_count;
1202	uint16_t	vp_global_options;
1203} isp_icb_2400_vpinfo_t;
1204
1205#define	ICB2400_VPINFO_OFF	0x80	/* offset from start of ICB */
1206#define	ICB2400_VPINFO_PORT_OFF(chan)		\
1207    (ICB2400_VPINFO_OFF + 			\
1208     sizeof (isp_icb_2400_vpinfo_t) + (chan * ICB2400_VPOPT_WRITE_SIZE))
1209
1210#define	ICB2400_VPGOPT_FCA		0x01	/* Assume Clean Address bit in FLOGI ACC set (works only in static configurations) */
1211#define	ICB2400_VPGOPT_MID_DISABLE	0x02	/* when set, connection mode2 will work with NPIV-capable switched */
1212#define	ICB2400_VPGOPT_VP0_DECOUPLE	0x04	/* Allow VP0 decoupling if firmware supports it */
1213#define	ICB2400_VPGOPT_SUSP_FDISK	0x10	/* Suspend FDISC for Enabled VPs */
1214#define	ICB2400_VPGOPT_GEN_RIDA		0x20	/* Generate RIDA if FLOGI Fails */
1215
1216typedef struct {
1217	isphdr_t	vp_ctrl_hdr;
1218	uint32_t	vp_ctrl_handle;
1219	uint16_t	vp_ctrl_index_fail;
1220	uint16_t	vp_ctrl_status;
1221	uint16_t	vp_ctrl_command;
1222	uint16_t	vp_ctrl_vp_count;
1223	uint16_t	vp_ctrl_idmap[16];
1224	uint16_t	vp_ctrl_reserved[7];
1225	uint16_t	vp_ctrl_fcf_index;
1226} vp_ctrl_info_t;
1227
1228#define	VP_CTRL_CMD_ENABLE_VP			0x00
1229#define	VP_CTRL_CMD_DISABLE_VP			0x08
1230#define	VP_CTRL_CMD_DISABLE_VP_REINIT_LINK	0x09
1231#define	VP_CTRL_CMD_DISABLE_VP_LOGO		0x0A
1232#define	VP_CTRL_CMD_DISABLE_VP_LOGO_ALL		0x0B
1233
1234/*
1235 * We can use this structure for modifying either one or two VP ports after initialization
1236 */
1237typedef struct {
1238	isphdr_t	vp_mod_hdr;
1239	uint32_t	vp_mod_hdl;
1240	uint16_t	vp_mod_reserved0;
1241	uint16_t	vp_mod_status;
1242	uint8_t		vp_mod_cmd;
1243	uint8_t		vp_mod_cnt;
1244	uint8_t		vp_mod_idx0;
1245	uint8_t		vp_mod_idx1;
1246	struct {
1247		uint8_t		options;
1248		uint8_t		loopid;
1249		uint16_t	reserved1;
1250		uint8_t		wwpn[8];
1251		uint8_t		wwnn[8];
1252	} vp_mod_ports[2];
1253	uint8_t		vp_mod_reserved2[8];
1254} vp_modify_t;
1255
1256#define	VP_STS_OK	0x00
1257#define	VP_STS_ERR	0x01
1258#define	VP_CNT_ERR	0x02
1259#define	VP_GEN_ERR	0x03
1260#define	VP_IDX_ERR	0x04
1261#define	VP_STS_BSY	0x05
1262
1263#define	VP_MODIFY	0x00
1264#define	VP_MODIFY_ENA	0x01
1265#define	VP_MODIFY_OPT	0x02
1266#define	VP_RESUME	0x03
1267
1268/*
1269 * Port Data Base Element
1270 */
1271
1272typedef struct {
1273	uint16_t	pdb_options;
1274	uint8_t		pdb_mstate;
1275	uint8_t		pdb_sstate;
1276	uint8_t		pdb_hardaddr_bits[4];
1277	uint8_t		pdb_portid_bits[4];
1278	uint8_t		pdb_nodename[8];
1279	uint8_t		pdb_portname[8];
1280	uint16_t	pdb_execthrottle;
1281	uint16_t	pdb_exec_count;
1282	uint8_t		pdb_retry_count;
1283	uint8_t		pdb_retry_delay;
1284	uint16_t	pdb_resalloc;
1285	uint16_t	pdb_curalloc;
1286	uint16_t	pdb_qhead;
1287	uint16_t	pdb_qtail;
1288	uint16_t	pdb_tl_next;
1289	uint16_t	pdb_tl_last;
1290	uint16_t	pdb_features;	/* PLOGI, Common Service */
1291	uint16_t	pdb_pconcurrnt;	/* PLOGI, Common Service */
1292	uint16_t	pdb_roi;	/* PLOGI, Common Service */
1293	uint8_t		pdb_target;
1294	uint8_t		pdb_initiator;	/* PLOGI, Class 3 Control Flags */
1295	uint16_t	pdb_rdsiz;	/* PLOGI, Class 3 */
1296	uint16_t	pdb_ncseq;	/* PLOGI, Class 3 */
1297	uint16_t	pdb_noseq;	/* PLOGI, Class 3 */
1298	uint16_t	pdb_labrtflg;
1299	uint16_t	pdb_lstopflg;
1300	uint16_t	pdb_sqhead;
1301	uint16_t	pdb_sqtail;
1302	uint16_t	pdb_ptimer;
1303	uint16_t	pdb_nxt_seqid;
1304	uint16_t	pdb_fcount;
1305	uint16_t	pdb_prli_len;
1306	uint16_t	pdb_prli_svc0;
1307	uint16_t	pdb_prli_svc3;
1308	uint16_t	pdb_loopid;
1309	uint16_t	pdb_il_ptr;
1310	uint16_t	pdb_sl_ptr;
1311} isp_pdb_21xx_t;
1312
1313#define	PDB_OPTIONS_XMITTING	(1<<11)
1314#define	PDB_OPTIONS_LNKXMIT	(1<<10)
1315#define	PDB_OPTIONS_ABORTED	(1<<9)
1316#define	PDB_OPTIONS_ADISC	(1<<1)
1317
1318#define	PDB_STATE_DISCOVERY	0
1319#define	PDB_STATE_WDISC_ACK	1
1320#define	PDB_STATE_PLOGI		2
1321#define	PDB_STATE_PLOGI_ACK	3
1322#define	PDB_STATE_PRLI		4
1323#define	PDB_STATE_PRLI_ACK	5
1324#define	PDB_STATE_LOGGED_IN	6
1325#define	PDB_STATE_PORT_UNAVAIL	7
1326#define	PDB_STATE_PRLO		8
1327#define	PDB_STATE_PRLO_ACK	9
1328#define	PDB_STATE_PLOGO		10
1329#define	PDB_STATE_PLOG_ACK	11
1330
1331#define	SVC3_ROLE_MASK		0x30
1332#define	SVC3_ROLE_SHIFT		4
1333
1334#define	BITS2WORD(x)		((x)[0] << 16 | (x)[3] << 8 | (x)[2])
1335#define	BITS2WORD_24XX(x)	((x)[0] << 16 | (x)[1] << 8 | (x)[2])
1336
1337/*
1338 * Port Data Base Element- 24XX cards
1339 */
1340typedef struct {
1341	uint16_t	pdb_flags;
1342	uint8_t		pdb_curstate;
1343	uint8_t		pdb_laststate;
1344	uint8_t		pdb_hardaddr_bits[4];
1345	uint8_t		pdb_portid_bits[4];
1346#define		pdb_nxt_seqid_2400	pdb_portid_bits[3]
1347	uint16_t	pdb_retry_timer;
1348	uint16_t	pdb_handle;
1349	uint16_t	pdb_rcv_dsize;
1350	uint16_t	pdb_reserved0;
1351	uint16_t	pdb_prli_svc0;
1352	uint16_t	pdb_prli_svc3;
1353	uint8_t		pdb_portname[8];
1354	uint8_t		pdb_nodename[8];
1355	uint8_t		pdb_reserved1[24];
1356} isp_pdb_24xx_t;
1357
1358#define	PDB2400_TID_SUPPORTED	0x4000
1359#define	PDB2400_FC_TAPE		0x0080
1360#define	PDB2400_CLASS2_ACK0	0x0040
1361#define	PDB2400_FCP_CONF	0x0020
1362#define	PDB2400_CLASS2		0x0010
1363#define	PDB2400_ADDR_VALID	0x0002
1364
1365#define	PDB2400_STATE_PLOGI_PEND	0x03
1366#define	PDB2400_STATE_PLOGI_DONE	0x04
1367#define	PDB2400_STATE_PRLI_PEND		0x05
1368#define	PDB2400_STATE_LOGGED_IN		0x06
1369#define	PDB2400_STATE_PORT_UNAVAIL	0x07
1370#define	PDB2400_STATE_PRLO_PEND		0x09
1371#define	PDB2400_STATE_LOGO_PEND		0x0B
1372
1373/*
1374 * Common elements from the above two structures that are actually useful to us.
1375 */
1376typedef struct {
1377	uint16_t	handle;
1378	uint16_t	prli_word3;
1379	uint32_t		: 8,
1380			portid	: 24;
1381	uint8_t		portname[8];
1382	uint8_t		nodename[8];
1383} isp_pdb_t;
1384
1385/*
1386 * Port/Node Name List Element
1387 */
1388typedef struct {
1389	uint8_t		pnnle_name[8];
1390	uint16_t	pnnle_handle;
1391	uint16_t	pnnle_reserved;
1392} isp_pnnle_t;
1393
1394#define	PNNL_OPTIONS_NODE_NAMES	(1<<0)
1395#define	PNNL_OPTIONS_PORT_DATA	(1<<2)
1396#define	PNNL_OPTIONS_INITIATORS	(1<<3)
1397
1398/*
1399 * Port and N-Port Handle List Element
1400 */
1401typedef struct {
1402	uint16_t	pnhle_port_id_lo;
1403	uint16_t	pnhle_port_id_hi_handle;
1404} isp_pnhle_21xx_t;
1405
1406typedef struct {
1407	uint16_t	pnhle_port_id_lo;
1408	uint16_t	pnhle_port_id_hi;
1409	uint16_t	pnhle_handle;
1410} isp_pnhle_23xx_t;
1411
1412typedef struct {
1413	uint16_t	pnhle_port_id_lo;
1414	uint16_t	pnhle_port_id_hi;
1415	uint16_t	pnhle_handle;
1416	uint16_t	pnhle_reserved;
1417} isp_pnhle_24xx_t;
1418
1419/*
1420 * Port Database Changed Async Event information for 24XX cards
1421 */
1422#define	PDB24XX_AE_OK		0x00
1423#define	PDB24XX_AE_IMPL_LOGO_1	0x01
1424#define	PDB24XX_AE_IMPL_LOGO_2	0x02
1425#define	PDB24XX_AE_IMPL_LOGO_3	0x03
1426#define	PDB24XX_AE_PLOGI_RCVD	0x04
1427#define	PDB24XX_AE_PLOGI_RJT	0x05
1428#define	PDB24XX_AE_PRLI_RCVD	0x06
1429#define	PDB24XX_AE_PRLI_RJT	0x07
1430#define	PDB24XX_AE_TPRLO	0x08
1431#define	PDB24XX_AE_TPRLO_RJT	0x09
1432#define	PDB24XX_AE_PRLO_RCVD	0x0a
1433#define	PDB24XX_AE_LOGO_RCVD	0x0b
1434#define	PDB24XX_AE_TOPO_CHG	0x0c
1435#define	PDB24XX_AE_NPORT_CHG	0x0d
1436#define	PDB24XX_AE_FLOGI_RJT	0x0e
1437#define	PDB24XX_AE_BAD_FANN	0x0f
1438#define	PDB24XX_AE_FLOGI_TIMO	0x10
1439#define	PDB24XX_AE_ABX_LOGO	0x11
1440#define	PDB24XX_AE_PLOGI_DONE	0x12
1441#define	PDB24XX_AE_PRLI_DONJE	0x13
1442#define	PDB24XX_AE_OPN_1	0x14
1443#define	PDB24XX_AE_OPN_2	0x15
1444#define	PDB24XX_AE_TXERR	0x16
1445#define	PDB24XX_AE_FORCED_LOGO	0x17
1446#define	PDB24XX_AE_DISC_TIMO	0x18
1447
1448/*
1449 * Genericized Port Login/Logout software structure
1450 */
1451typedef struct {
1452	uint16_t	handle;
1453	uint16_t	channel;
1454	uint32_t
1455		flags	: 8,
1456		portid	: 24;
1457} isp_plcmd_t;
1458/* the flags to use are those for PLOGX_FLG_* below */
1459
1460/*
1461 * ISP24XX- Login/Logout Port IOCB
1462 */
1463typedef struct {
1464	isphdr_t	plogx_header;
1465	uint32_t	plogx_handle;
1466	uint16_t	plogx_status;
1467	uint16_t	plogx_nphdl;
1468	uint16_t	plogx_flags;
1469	uint16_t	plogx_vphdl;		/* low 8 bits */
1470	uint16_t	plogx_portlo;		/* low 16 bits */
1471	uint16_t	plogx_rspsz_porthi;
1472	struct {
1473		uint16_t	lo16;
1474		uint16_t	hi16;
1475	} plogx_ioparm[11];
1476} isp_plogx_t;
1477
1478#define	PLOGX_STATUS_OK		0x00
1479#define	PLOGX_STATUS_UNAVAIL	0x28
1480#define	PLOGX_STATUS_LOGOUT	0x29
1481#define	PLOGX_STATUS_IOCBERR	0x31
1482
1483#define	PLOGX_IOCBERR_NOLINK	0x01
1484#define	PLOGX_IOCBERR_NOIOCB	0x02
1485#define	PLOGX_IOCBERR_NOXGHG	0x03
1486#define	PLOGX_IOCBERR_FAILED	0x04	/* further info in IOPARM 1 */
1487#define	PLOGX_IOCBERR_NOFABRIC	0x05
1488#define	PLOGX_IOCBERR_NOTREADY	0x07
1489#define	PLOGX_IOCBERR_NOLOGIN	0x09	/* further info in IOPARM 1 */
1490#define	PLOGX_IOCBERR_NOPCB	0x0a
1491#define	PLOGX_IOCBERR_REJECT	0x18	/* further info in IOPARM 1 */
1492#define	PLOGX_IOCBERR_EINVAL	0x19	/* further info in IOPARM 1 */
1493#define	PLOGX_IOCBERR_PORTUSED	0x1a	/* further info in IOPARM 1 */
1494#define	PLOGX_IOCBERR_HNDLUSED	0x1b	/* further info in IOPARM 1 */
1495#define	PLOGX_IOCBERR_NOHANDLE	0x1c
1496#define	PLOGX_IOCBERR_NOFLOGI	0x1f	/* further info in IOPARM 1 */
1497
1498#define	PLOGX_FLG_CMD_MASK	0xf
1499#define	PLOGX_FLG_CMD_PLOGI	0
1500#define	PLOGX_FLG_CMD_PRLI	1
1501#define	PLOGX_FLG_CMD_PDISC	2
1502#define	PLOGX_FLG_CMD_LOGO	8
1503#define	PLOGX_FLG_CMD_PRLO	9
1504#define	PLOGX_FLG_CMD_TPRLO	10
1505
1506#define	PLOGX_FLG_COND_PLOGI		0x10	/* if with PLOGI */
1507#define	PLOGX_FLG_IMPLICIT		0x10	/* if with LOGO, PRLO, TPRLO */
1508#define	PLOGX_FLG_SKIP_PRLI		0x20	/* if with PLOGI */
1509#define	PLOGX_FLG_IMPLICIT_LOGO_ALL	0x20	/* if with LOGO */
1510#define	PLOGX_FLG_EXPLICIT_LOGO		0x40	/* if with LOGO */
1511#define	PLOGX_FLG_COMMON_FEATURES	0x80	/* if with PLOGI */
1512#define	PLOGX_FLG_FREE_NPHDL		0x80	/* if with with LOGO */
1513
1514#define	PLOGX_FLG_CLASS2		0x100	/* if with PLOGI */
1515#define	PLOGX_FLG_FCP2_OVERRIDE		0x200	/* if with PRLOG, PRLI */
1516
1517/*
1518 * Report ID Acquisistion (24XX multi-id firmware)
1519 */
1520typedef struct {
1521	isphdr_t	ridacq_hdr;
1522	uint32_t	ridacq_handle;
1523	uint8_t		ridacq_vp_acquired;
1524	uint8_t		ridacq_vp_setup;
1525	uint8_t		ridacq_vp_index;
1526	uint8_t		ridacq_vp_status;
1527	uint16_t	ridacq_vp_port_lo;
1528	uint8_t		ridacq_vp_port_hi;
1529	uint8_t		ridacq_format;		/* 0 or 1 */
1530	uint16_t	ridacq_map[8];
1531	uint8_t		ridacq_reserved1[32];
1532} isp_ridacq_t;
1533
1534#define	RIDACQ_STS_COMPLETE	0
1535#define	RIDACQ_STS_UNACQUIRED	1
1536#define	RIDACQ_STS_CHANGED	2
1537#define	RIDACQ_STS_SNS_TIMEOUT	3
1538#define	RIDACQ_STS_SNS_REJECTED	4
1539#define	RIDACQ_STS_SCR_TIMEOUT	5
1540#define	RIDACQ_STS_SCR_REJECTED	6
1541
1542/*
1543 * Simple Name Server Data Structures
1544 */
1545#define	SNS_GA_NXT	0x100
1546#define	SNS_GPN_ID	0x112
1547#define	SNS_GNN_ID	0x113
1548#define	SNS_GFF_ID	0x11F
1549#define	SNS_GID_FT	0x171
1550#define	SNS_RFT_ID	0x217
1551#define	SNS_RFF_ID	0x21F
1552typedef struct {
1553	uint16_t	snscb_rblen;	/* response buffer length (words) */
1554	uint16_t	snscb_reserved0;
1555	uint16_t	snscb_addr[4];	/* response buffer address */
1556	uint16_t	snscb_sblen;	/* subcommand buffer length (words) */
1557	uint16_t	snscb_reserved1;
1558	uint16_t	snscb_data[];	/* variable data */
1559} sns_screq_t;	/* Subcommand Request Structure */
1560
1561typedef struct {
1562	uint16_t	snscb_rblen;	/* response buffer length (words) */
1563	uint16_t	snscb_reserved0;
1564	uint16_t	snscb_addr[4];	/* response buffer address */
1565	uint16_t	snscb_sblen;	/* subcommand buffer length (words) */
1566	uint16_t	snscb_reserved1;
1567	uint16_t	snscb_cmd;
1568	uint16_t	snscb_reserved2;
1569	uint32_t	snscb_reserved3;
1570	uint32_t	snscb_port;
1571} sns_ga_nxt_req_t;
1572#define	SNS_GA_NXT_REQ_SIZE	(sizeof (sns_ga_nxt_req_t))
1573
1574typedef struct {
1575	uint16_t	snscb_rblen;	/* response buffer length (words) */
1576	uint16_t	snscb_reserved0;
1577	uint16_t	snscb_addr[4];	/* response buffer address */
1578	uint16_t	snscb_sblen;	/* subcommand buffer length (words) */
1579	uint16_t	snscb_reserved1;
1580	uint16_t	snscb_cmd;
1581	uint16_t	snscb_reserved2;
1582	uint32_t	snscb_reserved3;
1583	uint32_t	snscb_portid;
1584} sns_gxn_id_req_t;
1585#define	SNS_GXN_ID_REQ_SIZE	(sizeof (sns_gxn_id_req_t))
1586
1587typedef struct {
1588	uint16_t	snscb_rblen;	/* response buffer length (words) */
1589	uint16_t	snscb_reserved0;
1590	uint16_t	snscb_addr[4];	/* response buffer address */
1591	uint16_t	snscb_sblen;	/* subcommand buffer length (words) */
1592	uint16_t	snscb_reserved1;
1593	uint16_t	snscb_cmd;
1594	uint16_t	snscb_mword_div_2;
1595	uint32_t	snscb_reserved3;
1596	uint32_t	snscb_fc4_type;
1597} sns_gid_ft_req_t;
1598#define	SNS_GID_FT_REQ_SIZE	(sizeof (sns_gid_ft_req_t))
1599
1600typedef struct {
1601	uint16_t	snscb_rblen;	/* response buffer length (words) */
1602	uint16_t	snscb_reserved0;
1603	uint16_t	snscb_addr[4];	/* response buffer address */
1604	uint16_t	snscb_sblen;	/* subcommand buffer length (words) */
1605	uint16_t	snscb_reserved1;
1606	uint16_t	snscb_cmd;
1607	uint16_t	snscb_reserved2;
1608	uint32_t	snscb_reserved3;
1609	uint32_t	snscb_port;
1610	uint32_t	snscb_fc4_types[8];
1611} sns_rft_id_req_t;
1612#define	SNS_RFT_ID_REQ_SIZE	(sizeof (sns_rft_id_req_t))
1613
1614typedef struct {
1615	ct_hdr_t	snscb_cthdr;
1616	uint8_t		snscb_port_type;
1617	uint8_t		snscb_port_id[3];
1618	uint8_t		snscb_portname[8];
1619	uint16_t	snscb_data[];	/* variable data */
1620} sns_scrsp_t;	/* Subcommand Response Structure */
1621
1622typedef struct {
1623	ct_hdr_t	snscb_cthdr;
1624	uint8_t		snscb_port_type;
1625	uint8_t		snscb_port_id[3];
1626	uint8_t		snscb_portname[8];
1627	uint8_t		snscb_pnlen;		/* symbolic port name length */
1628	uint8_t		snscb_pname[255];	/* symbolic port name */
1629	uint8_t		snscb_nodename[8];
1630	uint8_t		snscb_nnlen;		/* symbolic node name length */
1631	uint8_t		snscb_nname[255];	/* symbolic node name */
1632	uint8_t		snscb_ipassoc[8];
1633	uint8_t		snscb_ipaddr[16];
1634	uint8_t		snscb_svc_class[4];
1635	uint8_t		snscb_fc4_types[32];
1636	uint8_t		snscb_fpname[8];
1637	uint8_t		snscb_reserved;
1638	uint8_t		snscb_hardaddr[3];
1639} sns_ga_nxt_rsp_t;	/* Subcommand Response Structure */
1640#define	SNS_GA_NXT_RESP_SIZE	(sizeof (sns_ga_nxt_rsp_t))
1641
1642typedef struct {
1643	ct_hdr_t	snscb_cthdr;
1644	uint8_t		snscb_wwn[8];
1645} sns_gxn_id_rsp_t;
1646#define	SNS_GXN_ID_RESP_SIZE	(sizeof (sns_gxn_id_rsp_t))
1647
1648typedef struct {
1649	ct_hdr_t	snscb_cthdr;
1650	uint32_t	snscb_fc4_features[32];
1651} sns_gff_id_rsp_t;
1652#define	SNS_GFF_ID_RESP_SIZE	(sizeof (sns_gff_id_rsp_t))
1653
1654typedef struct {
1655	ct_hdr_t	snscb_cthdr;
1656	struct {
1657		uint8_t		control;
1658		uint8_t		portid[3];
1659	} snscb_ports[1];
1660} sns_gid_ft_rsp_t;
1661#define	SNS_GID_FT_RESP_SIZE(x)	((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2))
1662#define	SNS_RFT_ID_RESP_SIZE	(sizeof (ct_hdr_t))
1663
1664/*
1665 * Other Misc Structures
1666 */
1667
1668/* ELS Pass Through */
1669typedef struct {
1670	isphdr_t	els_hdr;
1671	uint32_t	els_handle;
1672	uint16_t	els_status;
1673	uint16_t	els_nphdl;
1674	uint16_t	els_xmit_dsd_count;	/* outgoing only */
1675	uint8_t		els_vphdl;
1676	uint8_t		els_sof;
1677	uint32_t	els_rxid;
1678	uint16_t	els_recv_dsd_count;	/* outgoing only */
1679	uint8_t		els_opcode;
1680	uint8_t		els_reserved1;
1681	uint8_t		els_did_lo;
1682	uint8_t		els_did_mid;
1683	uint8_t		els_did_hi;
1684	uint8_t		els_reserved2;
1685	uint16_t	els_reserved3;
1686	uint16_t	els_ctl_flags;
1687	union {
1688		struct {
1689			uint32_t	_els_bytecnt;
1690			uint32_t	_els_subcode1;
1691			uint32_t	_els_subcode2;
1692			uint8_t		_els_reserved4[20];
1693		} in;
1694		struct {
1695			uint32_t	_els_recv_bytecnt;
1696			uint32_t	_els_xmit_bytecnt;
1697			uint32_t	_els_xmit_dsd_length;
1698			uint16_t	_els_xmit_dsd_a1500;
1699			uint16_t	_els_xmit_dsd_a3116;
1700			uint16_t	_els_xmit_dsd_a4732;
1701			uint16_t	_els_xmit_dsd_a6348;
1702			uint32_t	_els_recv_dsd_length;
1703			uint16_t	_els_recv_dsd_a1500;
1704			uint16_t	_els_recv_dsd_a3116;
1705			uint16_t	_els_recv_dsd_a4732;
1706			uint16_t	_els_recv_dsd_a6348;
1707		} out;
1708	} inout;
1709#define	els_bytecnt		inout.in._els_bytecnt
1710#define	els_subcode1		inout.in._els_subcode1
1711#define	els_subcode2		inout.in._els_subcode2
1712#define	els_reserved4		inout.in._els_reserved4
1713#define	els_recv_bytecnt	inout.out._els_recv_bytecnt
1714#define	els_xmit_bytecnt	inout.out._els_xmit_bytecnt
1715#define	els_xmit_dsd_length	inout.out._els_xmit_dsd_length
1716#define	els_xmit_dsd_a1500	inout.out._els_xmit_dsd_a1500
1717#define	els_xmit_dsd_a3116	inout.out._els_xmit_dsd_a3116
1718#define	els_xmit_dsd_a4732	inout.out._els_xmit_dsd_a4732
1719#define	els_xmit_dsd_a6348	inout.out._els_xmit_dsd_a6348
1720#define	els_recv_dsd_length	inout.out._els_recv_dsd_length
1721#define	els_recv_dsd_a1500	inout.out._els_recv_dsd_a1500
1722#define	els_recv_dsd_a3116	inout.out._els_recv_dsd_a3116
1723#define	els_recv_dsd_a4732	inout.out._els_recv_dsd_a4732
1724#define	els_recv_dsd_a6348	inout.out._els_recv_dsd_a6348
1725} els_t;
1726
1727/*
1728 * A handy package structure for running FC-SCSI commands internally
1729 */
1730typedef struct {
1731	uint16_t	handle;
1732	uint16_t	lun;
1733	uint32_t
1734		channel : 8,
1735		portid	: 24;
1736	uint32_t	timeout;
1737	union {
1738		struct {
1739			uint32_t data_length;
1740			uint32_t
1741				no_wait : 1,
1742				do_read : 1;
1743			uint8_t cdb[16];
1744			void *data_ptr;
1745		} beg;
1746		struct {
1747			uint32_t data_residual;
1748			uint8_t status;
1749			uint8_t pad;
1750			uint16_t sense_length;
1751			uint8_t sense_data[32];
1752		} end;
1753	} fcd;
1754} isp_xcmd_t;
1755
1756/*
1757 * Target Mode related definitions
1758 */
1759#define	QLTM_SENSELEN	18	/* non-FC cards only */
1760#define QLTM_SVALID	0x80
1761
1762/*
1763 * Structure for Enable Lun and Modify Lun queue entries
1764 */
1765typedef struct {
1766	isphdr_t	le_header;
1767	uint32_t	le_reserved;
1768	uint8_t		le_lun;
1769	uint8_t		le_rsvd;
1770	uint8_t		le_ops;		/* Modify LUN only */
1771	uint8_t		le_tgt;		/* Not for FC */
1772	uint32_t	le_flags;	/* Not for FC */
1773	uint8_t		le_status;
1774	uint8_t		le_reserved2;
1775	uint8_t		le_cmd_count;
1776	uint8_t		le_in_count;
1777	uint8_t		le_cdb6len;	/* Not for FC */
1778	uint8_t		le_cdb7len;	/* Not for FC */
1779	uint16_t	le_timeout;
1780	uint16_t	le_reserved3[20];
1781} lun_entry_t;
1782
1783/*
1784 * le_flags values
1785 */
1786#define LUN_TQAE	0x00000002	/* bit1  Tagged Queue Action Enable */
1787#define LUN_DSSM	0x01000000	/* bit24 Disable Sending SDP Message */
1788#define	LUN_DISAD	0x02000000	/* bit25 Disable autodisconnect */
1789#define LUN_DM		0x40000000	/* bit30 Disconnects Mandatory */
1790
1791/*
1792 * le_ops values
1793 */
1794#define LUN_CCINCR	0x01	/* increment command count */
1795#define LUN_CCDECR	0x02	/* decrement command count */
1796#define LUN_ININCR	0x40	/* increment immed. notify count */
1797#define LUN_INDECR	0x80	/* decrement immed. notify count */
1798
1799/*
1800 * le_status values
1801 */
1802#define	LUN_OK		0x01	/* we be rockin' */
1803#define LUN_ERR		0x04	/* request completed with error */
1804#define LUN_INVAL	0x06	/* invalid request */
1805#define LUN_NOCAP	0x16	/* can't provide requested capability */
1806#define LUN_ENABLED	0x3E	/* LUN already enabled */
1807
1808/*
1809 * Immediate Notify Entry structure
1810 */
1811#define IN_MSGLEN	8	/* 8 bytes */
1812#define IN_RSVDLEN	8	/* 8 words */
1813typedef struct {
1814	isphdr_t	in_header;
1815	uint32_t	in_reserved;
1816	uint8_t		in_lun;		/* lun */
1817	uint8_t		in_iid;		/* initiator */
1818	uint8_t		in_reserved2;
1819	uint8_t		in_tgt;		/* target */
1820	uint32_t	in_flags;
1821	uint8_t		in_status;
1822	uint8_t		in_rsvd2;
1823	uint8_t		in_tag_val;	/* tag value */
1824	uint8_t		in_tag_type;	/* tag type */
1825	uint16_t	in_seqid;	/* sequence id */
1826	uint8_t		in_msg[IN_MSGLEN];	/* SCSI message bytes */
1827	uint16_t	in_reserved3[IN_RSVDLEN];
1828	uint8_t		in_sense[QLTM_SENSELEN];/* suggested sense data */
1829} in_entry_t;
1830
1831typedef struct {
1832	isphdr_t	in_header;
1833	uint32_t	in_reserved;
1834	uint8_t		in_lun;		/* lun */
1835	uint8_t		in_iid;		/* initiator */
1836	uint16_t	in_scclun;
1837	uint32_t	in_reserved2;
1838	uint16_t	in_status;
1839	uint16_t	in_task_flags;
1840	uint16_t	in_seqid;	/* sequence id */
1841} in_fcentry_t;
1842
1843typedef struct {
1844	isphdr_t	in_header;
1845	uint32_t	in_reserved;
1846	uint16_t	in_iid;		/* initiator */
1847	uint16_t	in_scclun;
1848	uint32_t	in_reserved2;
1849	uint16_t	in_status;
1850	uint16_t	in_task_flags;
1851	uint16_t	in_seqid;	/* sequence id */
1852} in_fcentry_e_t;
1853
1854/*
1855 * Values for the in_status field
1856 */
1857#define	IN_REJECT	0x0D	/* Message Reject message received */
1858#define IN_RESET	0x0E	/* Bus Reset occurred */
1859#define IN_NO_RCAP	0x16	/* requested capability not available */
1860#define IN_IDE_RECEIVED	0x33	/* Initiator Detected Error msg received */
1861#define IN_RSRC_UNAVAIL	0x34	/* resource unavailable */
1862#define IN_MSG_RECEIVED	0x36	/* SCSI message received */
1863#define	IN_ABORT_TASK	0x20	/* task named in RX_ID is being aborted (FC) */
1864#define	IN_PORT_LOGOUT	0x29	/* port has logged out (FC) */
1865#define	IN_PORT_CHANGED	0x2A	/* port changed */
1866#define	IN_GLOBAL_LOGO	0x2E	/* all ports logged out */
1867#define	IN_NO_NEXUS	0x3B	/* Nexus not established */
1868#define	IN_SRR_RCVD	0x45	/* SRR received */
1869
1870/*
1871 * Values for the in_task_flags field- should only get one at a time!
1872 */
1873#define	TASK_FLAGS_RESERVED_MASK	(0xe700)
1874#define	TASK_FLAGS_CLEAR_ACA		(1<<14)
1875#define	TASK_FLAGS_TARGET_RESET		(1<<13)
1876#define	TASK_FLAGS_LUN_RESET		(1<<12)
1877#define	TASK_FLAGS_CLEAR_TASK_SET	(1<<10)
1878#define	TASK_FLAGS_ABORT_TASK_SET	(1<<9)
1879
1880/*
1881 * ISP24XX Immediate Notify
1882 */
1883typedef struct {
1884	isphdr_t	in_header;
1885	uint32_t	in_reserved;
1886	uint16_t	in_nphdl;
1887	uint16_t	in_reserved1;
1888	uint16_t	in_flags;
1889	uint16_t	in_srr_rxid;
1890	uint16_t	in_status;
1891	uint8_t		in_status_subcode;
1892	uint8_t		in_fwhandle;
1893	uint32_t	in_rxid;
1894	uint16_t	in_srr_reloff_lo;
1895	uint16_t	in_srr_reloff_hi;
1896	uint16_t	in_srr_iu;
1897	uint16_t	in_srr_oxid;
1898	/*
1899	 * If bit 2 is set in in_flags, the N-Port and
1900	 * handle tags are valid. If the received ELS is
1901	 * a LOGO, then these tags contain the N Port ID
1902	 * from the LOGO payload. If the received ELS
1903	 * request is TPRLO, these tags contain the
1904	 * Third Party Originator N Port ID.
1905	 */
1906	uint16_t	in_nport_id_hi;
1907#define	in_prli_options in_nport_id_hi
1908	uint8_t		in_nport_id_lo;
1909	uint8_t		in_reserved3;
1910	uint16_t	in_np_handle;
1911	uint8_t		in_reserved4[12];
1912	uint8_t		in_reserved5;
1913	uint8_t		in_vpidx;
1914	uint32_t	in_reserved6;
1915	uint16_t	in_portid_lo;
1916	uint8_t		in_portid_hi;
1917	uint8_t		in_reserved7;
1918	uint16_t	in_reserved8;
1919	uint16_t	in_oxid;
1920} in_fcentry_24xx_t;
1921
1922#define	IN24XX_FLAG_PUREX_IOCB		0x1
1923#define	IN24XX_FLAG_GLOBAL_LOGOUT	0x2
1924#define	IN24XX_FLAG_NPHDL_VALID		0x4
1925#define	IN24XX_FLAG_N2N_PRLI		0x8
1926#define	IN24XX_FLAG_PN_NN_VALID		0x10
1927
1928#define	IN24XX_LIP_RESET	0x0E
1929#define	IN24XX_LINK_RESET	0x0F
1930#define	IN24XX_PORT_LOGOUT	0x29
1931#define	IN24XX_PORT_CHANGED	0x2A
1932#define	IN24XX_LINK_FAILED	0x2E
1933#define	IN24XX_SRR_RCVD		0x45
1934#define	IN24XX_ELS_RCVD		0x46	/*
1935					 * login-affectin ELS received- check
1936					 * subcode for specific opcode
1937					 */
1938
1939/*
1940 * For f/w > 4.0.25, these offsets in the Immediate Notify contain
1941 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in
1942 * Big Endian format.
1943 */
1944#define	IN24XX_PRLI_WWNN_OFF	0x18
1945#define	IN24XX_PRLI_WWPN_OFF	0x28
1946#define	IN24XX_PLOGI_WWNN_OFF	0x20
1947#define	IN24XX_PLOGI_WWPN_OFF	0x28
1948
1949/*
1950 * For f/w > 4.0.25, this offset in the Immediate Notify contain
1951 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format.
1952 */
1953#define	IN24XX_LOGO_WWPN_OFF	0x28
1954
1955/*
1956 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT
1957 */
1958#define	IN24XX_PORT_LOGOUT_PDISC_TMO	0x00
1959#define	IN24XX_PORT_LOGOUT_UXPR_DISC	0x01
1960#define	IN24XX_PORT_LOGOUT_OWN_OPN	0x02
1961#define	IN24XX_PORT_LOGOUT_OWN_OPN_SFT	0x03
1962#define	IN24XX_PORT_LOGOUT_ABTS_TMO	0x04
1963#define	IN24XX_PORT_LOGOUT_DISC_RJT	0x05
1964#define	IN24XX_PORT_LOGOUT_LOGIN_NEEDED	0x06
1965#define	IN24XX_PORT_LOGOUT_BAD_DISC	0x07
1966#define	IN24XX_PORT_LOGOUT_LOST_ALPA	0x08
1967#define	IN24XX_PORT_LOGOUT_XMIT_FAILURE	0x09
1968
1969/*
1970 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED
1971 */
1972#define	IN24XX_PORT_CHANGED_BADFAN	0x00
1973#define	IN24XX_PORT_CHANGED_TOPO_CHANGE	0x01
1974#define	IN24XX_PORT_CHANGED_FLOGI_ACC	0x02
1975#define	IN24XX_PORT_CHANGED_FLOGI_RJT	0x03
1976#define	IN24XX_PORT_CHANGED_TIMEOUT	0x04
1977#define	IN24XX_PORT_CHANGED_PORT_CHANGE	0x05
1978
1979/*
1980 * Notify Acknowledge Entry structure
1981 */
1982#define NA_RSVDLEN	22
1983typedef struct {
1984	isphdr_t	na_header;
1985	uint32_t	na_reserved;
1986	uint8_t		na_lun;		/* lun */
1987	uint8_t		na_iid;		/* initiator */
1988	uint8_t		na_reserved2;
1989	uint8_t		na_tgt;		/* target */
1990	uint32_t	na_flags;
1991	uint8_t		na_status;
1992	uint8_t		na_event;
1993	uint16_t	na_seqid;	/* sequence id */
1994	uint16_t	na_reserved3[NA_RSVDLEN];
1995} na_entry_t;
1996
1997/*
1998 * Value for the na_event field
1999 */
2000#define NA_RST_CLRD	0x80	/* Clear an async event notification */
2001#define	NA_OK		0x01	/* Notify Acknowledge Succeeded */
2002#define	NA_INVALID	0x06	/* Invalid Notify Acknowledge */
2003
2004#define	NA2_RSVDLEN	21
2005typedef struct {
2006	isphdr_t	na_header;
2007	uint32_t	na_reserved;
2008	uint8_t		na_reserved1;
2009	uint8_t		na_iid;		/* initiator loop id */
2010	uint16_t	na_response;
2011	uint16_t	na_flags;
2012	uint16_t	na_reserved2;
2013	uint16_t	na_status;
2014	uint16_t	na_task_flags;
2015	uint16_t	na_seqid;	/* sequence id */
2016	uint16_t	na_reserved3[NA2_RSVDLEN];
2017} na_fcentry_t;
2018
2019typedef struct {
2020	isphdr_t	na_header;
2021	uint32_t	na_reserved;
2022	uint16_t	na_iid;		/* initiator loop id */
2023	uint16_t	na_response;	/* response code */
2024	uint16_t	na_flags;
2025	uint16_t	na_reserved2;
2026	uint16_t	na_status;
2027	uint16_t	na_task_flags;
2028	uint16_t	na_seqid;	/* sequence id */
2029	uint16_t	na_reserved3[NA2_RSVDLEN];
2030} na_fcentry_e_t;
2031
2032#define	NAFC_RCOUNT	0x80	/* increment resource count */
2033#define NAFC_RST_CLRD	0x20	/* Clear LIP Reset */
2034#define	NAFC_TVALID	0x10	/* task mangement response code is valid */
2035
2036/*
2037 * ISP24XX Notify Acknowledge
2038 */
2039
2040typedef struct {
2041	isphdr_t	na_header;
2042	uint32_t	na_handle;
2043	uint16_t	na_nphdl;
2044	uint16_t	na_reserved1;
2045	uint16_t	na_flags;
2046	uint16_t	na_srr_rxid;
2047	uint16_t	na_status;
2048	uint8_t		na_status_subcode;
2049	uint8_t		na_fwhandle;
2050	uint32_t	na_rxid;
2051	uint16_t	na_srr_reloff_lo;
2052	uint16_t	na_srr_reloff_hi;
2053	uint16_t	na_srr_iu;
2054	uint16_t	na_srr_flags;
2055	uint8_t		na_reserved3[18];
2056	uint8_t		na_reserved4;
2057	uint8_t		na_vpidx;
2058	uint8_t		na_srr_reject_vunique;
2059	uint8_t		na_srr_reject_explanation;
2060	uint8_t		na_srr_reject_code;
2061	uint8_t		na_reserved5;
2062	uint8_t		na_reserved6[6];
2063	uint16_t	na_oxid;
2064} na_fcentry_24xx_t;
2065
2066/*
2067 * Accept Target I/O Entry structure
2068 */
2069#define ATIO_CDBLEN	26
2070
2071typedef struct {
2072	isphdr_t	at_header;
2073	uint16_t	at_reserved;
2074	uint16_t	at_handle;
2075	uint8_t		at_lun;		/* lun */
2076	uint8_t		at_iid;		/* initiator */
2077	uint8_t		at_cdblen; 	/* cdb length */
2078	uint8_t		at_tgt;		/* target */
2079	uint32_t	at_flags;
2080	uint8_t		at_status;	/* firmware status */
2081	uint8_t		at_scsi_status;	/* scsi status */
2082	uint8_t		at_tag_val;	/* tag value */
2083	uint8_t		at_tag_type;	/* tag type */
2084	uint8_t		at_cdb[ATIO_CDBLEN];	/* received CDB */
2085	uint8_t		at_sense[QLTM_SENSELEN];/* suggested sense data */
2086} at_entry_t;
2087
2088/*
2089 * at_flags values
2090 */
2091#define AT_NODISC	0x00008000	/* disconnect disabled */
2092#define AT_TQAE		0x00000002	/* Tagged Queue Action enabled */
2093
2094/*
2095 * at_status values
2096 */
2097#define AT_PATH_INVALID	0x07	/* ATIO sent to firmware for disabled lun */
2098#define	AT_RESET	0x0E	/* SCSI Bus Reset Occurred */
2099#define AT_PHASE_ERROR	0x14	/* Bus phase sequence error */
2100#define AT_NOCAP	0x16	/* Requested capability not available */
2101#define AT_BDR_MSG	0x17	/* Bus Device Reset msg received */
2102#define AT_CDB		0x3D	/* CDB received */
2103/*
2104 * Macros to create and fetch and test concatenated handle and tag value macros
2105 * (SPI only)
2106 */
2107#define	AT_MAKE_TAGID(tid, aep)						\
2108	tid = aep->at_handle;						\
2109	if (aep->at_flags & AT_TQAE) {					\
2110		tid |= (aep->at_tag_val << 16);				\
2111		tid |= (1 << 24);					\
2112	}
2113
2114#define	CT_MAKE_TAGID(tid, ct)						\
2115	tid = ct->ct_fwhandle;						\
2116	if (ct->ct_flags & CT_TQAE) {					\
2117		tid |= (ct->ct_tag_val << 16);				\
2118		tid |= (1 << 24);					\
2119	}
2120
2121#define	AT_HAS_TAG(val)		((val) & (1 << 24))
2122#define	AT_GET_TAG(val)		(((val) >> 16) & 0xff)
2123#define	AT_GET_HANDLE(val)	((val) & 0xffff)
2124
2125#define	IN_MAKE_TAGID(tid, inp)						\
2126	tid = inp->in_seqid;						\
2127	tid |= (inp->in_tag_val << 16);					\
2128	tid |= (1 << 24)
2129
2130/*
2131 * Accept Target I/O Entry structure, Type 2
2132 */
2133#define ATIO2_CDBLEN	16
2134
2135typedef struct {
2136	isphdr_t	at_header;
2137	uint32_t	at_reserved;
2138	uint8_t		at_lun;		/* lun or reserved */
2139	uint8_t		at_iid;		/* initiator */
2140	uint16_t	at_rxid; 	/* response ID */
2141	uint16_t	at_flags;
2142	uint16_t	at_status;	/* firmware status */
2143	uint8_t		at_crn;		/* command reference number */
2144	uint8_t		at_taskcodes;
2145	uint8_t		at_taskflags;
2146	uint8_t		at_execodes;
2147	uint8_t		at_cdb[ATIO2_CDBLEN];	/* received CDB */
2148	uint32_t	at_datalen;		/* allocated data len */
2149	uint16_t	at_scclun;		/* SCC Lun or reserved */
2150	uint16_t	at_wwpn[4];		/* WWPN of initiator */
2151	uint16_t	at_reserved2[6];
2152	uint16_t	at_oxid;
2153} at2_entry_t;
2154
2155typedef struct {
2156	isphdr_t	at_header;
2157	uint32_t	at_reserved;
2158	uint16_t	at_iid;		/* initiator */
2159	uint16_t	at_rxid; 	/* response ID */
2160	uint16_t	at_flags;
2161	uint16_t	at_status;	/* firmware status */
2162	uint8_t		at_crn;		/* command reference number */
2163	uint8_t		at_taskcodes;
2164	uint8_t		at_taskflags;
2165	uint8_t		at_execodes;
2166	uint8_t		at_cdb[ATIO2_CDBLEN];	/* received CDB */
2167	uint32_t	at_datalen;		/* allocated data len */
2168	uint16_t	at_scclun;		/* SCC Lun or reserved */
2169	uint16_t	at_wwpn[4];		/* WWPN of initiator */
2170	uint16_t	at_reserved2[6];
2171	uint16_t	at_oxid;
2172} at2e_entry_t;
2173
2174#define	ATIO2_WWPN_OFFSET	0x2A
2175#define	ATIO2_OXID_OFFSET	0x3E
2176
2177#define	ATIO2_TC_ATTR_MASK	0x7
2178#define	ATIO2_TC_ATTR_SIMPLEQ	0
2179#define	ATIO2_TC_ATTR_HEADOFQ	1
2180#define	ATIO2_TC_ATTR_ORDERED	2
2181#define	ATIO2_TC_ATTR_ACAQ	4
2182#define	ATIO2_TC_ATTR_UNTAGGED	5
2183
2184#define	ATIO2_EX_WRITE		0x1
2185#define	ATIO2_EX_READ		0x2
2186/*
2187 * Macros to create and fetch and test concatenated handle and tag value macros
2188 */
2189#define	AT2_MAKE_TAGID(tid, bus, inst, aep)				\
2190	tid = aep->at_rxid;						\
2191	tid |= (((uint64_t)inst) << 32);				\
2192	tid |= (((uint64_t)bus) << 48)
2193
2194#define	CT2_MAKE_TAGID(tid, bus, inst, ct)				\
2195	tid = ct->ct_rxid;						\
2196	tid |= (((uint64_t)inst) << 32);				\
2197	tid |= (((uint64_t)(bus & 0xff)) << 48)
2198
2199#define	AT2_HAS_TAG(val)	1
2200#define	AT2_GET_TAG(val)	((val) & 0xffffffff)
2201#define	AT2_GET_INST(val)	(((val) >> 32) & 0xffff)
2202#define	AT2_GET_HANDLE		AT2_GET_TAG
2203#define	AT2_GET_BUS(val)	(((val) >> 48) & 0xff)
2204
2205#define	FC_HAS_TAG	AT2_HAS_TAG
2206#define	FC_GET_TAG	AT2_GET_TAG
2207#define	FC_GET_INST	AT2_GET_INST
2208#define	FC_GET_HANDLE	AT2_GET_HANDLE
2209
2210#define	IN_FC_MAKE_TAGID(tid, bus, inst, seqid)				\
2211	tid = seqid;							\
2212	tid |= (((uint64_t)inst) << 32);				\
2213	tid |= (((uint64_t)(bus & 0xff)) << 48)
2214
2215#define	FC_TAG_INSERT_INST(tid, inst)					\
2216	tid &= ~0x0000ffff00000000ull;					\
2217	tid |= (((uint64_t)inst) << 32)
2218
2219/*
2220 * 24XX ATIO Definition
2221 *
2222 * This is *quite* different from other entry types.
2223 * First of all, it has its own queue it comes in on.
2224 *
2225 * Secondly, it doesn't have a normal header.
2226 *
2227 * Thirdly, it's just a passthru of the FCP CMND IU
2228 * which is recorded in big endian mode.
2229 */
2230typedef struct {
2231	uint8_t		at_type;
2232	uint8_t		at_count;
2233	/*
2234	 * Task attribute in high four bits,
2235	 * the rest is the FCP CMND IU Length.
2236	 * NB: the command can extend past the
2237	 * length for a single queue entry.
2238	 */
2239	uint16_t	at_ta_len;
2240	uint32_t	at_rxid;
2241	fc_hdr_t	at_hdr;
2242	fcp_cmnd_iu_t	at_cmnd;
2243} at7_entry_t;
2244#define	AT7_NORESRC_RXID	0xffffffff
2245
2246
2247/*
2248 * Continue Target I/O Entry structure
2249 * Request from driver. The response from the
2250 * ISP firmware is the same except that the last 18
2251 * bytes are overwritten by suggested sense data if
2252 * the 'autosense valid' bit is set in the status byte.
2253 */
2254typedef struct {
2255	isphdr_t	ct_header;
2256	uint16_t	ct_syshandle;
2257	uint16_t	ct_fwhandle;	/* required by f/w */
2258	uint8_t		ct_lun;	/* lun */
2259	uint8_t		ct_iid;	/* initiator id */
2260	uint8_t		ct_reserved2;
2261	uint8_t		ct_tgt;	/* our target id */
2262	uint32_t	ct_flags;
2263	uint8_t 	ct_status;	/* isp status */
2264	uint8_t 	ct_scsi_status;	/* scsi status */
2265	uint8_t 	ct_tag_val;	/* tag value */
2266	uint8_t 	ct_tag_type;	/* tag type */
2267	uint32_t	ct_xfrlen;	/* transfer length */
2268	uint32_t	ct_resid;	/* residual length */
2269	uint16_t	ct_timeout;
2270	uint16_t	ct_seg_count;
2271	ispds_t		ct_dataseg[ISP_RQDSEG];
2272} ct_entry_t;
2273
2274/*
2275 * For some of the dual port SCSI adapters, port (bus #) is reported
2276 * in the MSbit of ct_iid. Bit fields are a bit too awkward here.
2277 *
2278 * Note that this does not apply to FC adapters at all which can and
2279 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices
2280 * that have logged in across a SCSI fabric.
2281 */
2282#define	GET_IID_VAL(x)		(x & 0x3f)
2283#define	GET_BUS_VAL(x)		((x >> 7) & 0x1)
2284#define	SET_IID_VAL(y, x)	y = ((y & ~0x3f) | (x & 0x3f))
2285#define	SET_BUS_VAL(y, x)	y = ((y & 0x3f) | ((x & 0x1) << 7))
2286
2287/*
2288 * ct_flags values
2289 */
2290#define CT_TQAE		0x00000002	/* bit  1, Tagged Queue Action enable */
2291#define CT_DATA_IN	0x00000040	/* bits 6&7, Data direction - *to* initiator */
2292#define CT_DATA_OUT	0x00000080	/* bits 6&7, Data direction - *from* initiator */
2293#define CT_NO_DATA	0x000000C0	/* bits 6&7, Data direction */
2294#define	CT_CCINCR	0x00000100	/* bit 8, autoincrement atio count */
2295#define CT_DATAMASK	0x000000C0	/* bits 6&7, Data direction */
2296#define	CT_INISYNCWIDE	0x00004000	/* bit 14, Do Sync/Wide Negotiation */
2297#define CT_NODISC	0x00008000	/* bit 15, Disconnects disabled */
2298#define CT_DSDP		0x01000000	/* bit 24, Disable Save Data Pointers */
2299#define CT_SENDRDP	0x04000000	/* bit 26, Send Restore Pointers msg */
2300#define CT_SENDSTATUS	0x80000000	/* bit 31, Send SCSI status byte */
2301
2302/*
2303 * ct_status values
2304 * - set by the firmware when it returns the CTIO
2305 */
2306#define CT_OK		0x01	/* completed without error */
2307#define CT_ABORTED	0x02	/* aborted by host */
2308#define CT_ERR		0x04	/* see sense data for error */
2309#define CT_INVAL	0x06	/* request for disabled lun */
2310#define CT_NOPATH	0x07	/* invalid ITL nexus */
2311#define	CT_INVRXID	0x08	/* (FC only) Invalid RX_ID */
2312#define	CT_DATA_OVER	0x09	/* (FC only) Data Overrun */
2313#define CT_RSELTMO	0x0A	/* reselection timeout after 2 tries */
2314#define CT_TIMEOUT	0x0B	/* timed out */
2315#define CT_RESET	0x0E	/* SCSI Bus Reset occurred */
2316#define	CT_PARITY	0x0F	/* Uncorrectable Parity Error */
2317#define	CT_BUS_ERROR	0x10	/* (FC Only) DMA PCI Error */
2318#define	CT_PANIC	0x13	/* Unrecoverable Error */
2319#define CT_PHASE_ERROR	0x14	/* Bus phase sequence error */
2320#define	CT_DATA_UNDER	0x15	/* (FC only) Data Underrun */
2321#define CT_BDR_MSG	0x17	/* Bus Device Reset msg received */
2322#define CT_TERMINATED	0x19	/* due to Terminate Transfer mbox cmd */
2323#define	CT_PORTUNAVAIL	0x28	/* port not available */
2324#define	CT_LOGOUT	0x29	/* port logout */
2325#define	CT_PORTCHANGED	0x2A	/* port changed */
2326#define	CT_IDE		0x33	/* Initiator Detected Error */
2327#define CT_NOACK	0x35	/* Outstanding Immed. Notify. entry */
2328#define	CT_SRR		0x45	/* SRR Received */
2329#define	CT_LUN_RESET	0x48	/* Lun Reset Received */
2330
2331#define	CT_HBA_RESET	0xffff	/* pseudo error - command destroyed by HBA reset*/
2332
2333/*
2334 * When the firmware returns a CTIO entry, it may overwrite the last
2335 * part of the structure with sense data. This starts at offset 0x2E
2336 * into the entry, which is in the middle of ct_dataseg[1]. Rather
2337 * than define a new struct for this, I'm just using the sense data
2338 * offset.
2339 */
2340#define CTIO_SENSE_OFFSET	0x2E
2341
2342/*
2343 * Entry length in u_longs. All entries are the same size so
2344 * any one will do as the numerator.
2345 */
2346#define UINT32_ENTRY_SIZE	(sizeof(at_entry_t)/sizeof(uint32_t))
2347
2348/*
2349 * QLA2100 CTIO (type 2) entry
2350 */
2351#define	MAXRESPLEN	26
2352typedef struct {
2353	isphdr_t	ct_header;
2354	uint32_t	ct_syshandle;
2355	uint8_t		ct_lun;		/* lun */
2356	uint8_t		ct_iid;		/* initiator id */
2357	uint16_t	ct_rxid;	/* response ID */
2358	uint16_t	ct_flags;
2359	uint16_t 	ct_status;	/* isp status */
2360	uint16_t	ct_timeout;
2361	uint16_t	ct_seg_count;
2362	uint32_t	ct_reloff;	/* relative offset */
2363	uint32_t	ct_resid;	/* residual length */
2364	union {
2365		/*
2366		 * The three different modes that the target driver
2367		 * can set the CTIO{2,3,4} up as.
2368		 *
2369		 * The first is for sending FCP_DATA_IUs as well as
2370		 * (optionally) sending a terminal SCSI status FCP_RSP_IU.
2371		 *
2372		 * The second is for sending SCSI sense data in an FCP_RSP_IU.
2373		 * Note that no FCP_DATA_IUs will be sent.
2374		 *
2375		 * The third is for sending FCP_RSP_IUs as built specifically
2376		 * in system memory as located by the isp_dataseg.
2377		 */
2378		struct {
2379			uint32_t _reserved;
2380			uint16_t _reserved2;
2381			uint16_t ct_scsi_status;
2382			uint32_t ct_xfrlen;
2383			union {
2384				ispds_t ct_dataseg[ISP_RQDSEG_T2];
2385				ispds64_t ct_dataseg64[ISP_RQDSEG_T3];
2386				ispdslist_t ct_dslist;
2387			} u;
2388		} m0;
2389		struct {
2390			uint16_t _reserved;
2391			uint16_t _reserved2;
2392			uint16_t ct_senselen;
2393			uint16_t ct_scsi_status;
2394			uint16_t ct_resplen;
2395			uint8_t  ct_resp[MAXRESPLEN];
2396		} m1;
2397		struct {
2398			uint32_t _reserved;
2399			uint16_t _reserved2;
2400			uint16_t _reserved3;
2401			uint32_t ct_datalen;
2402			union {
2403				ispds_t	ct_fcp_rsp_iudata_32;
2404				ispds64_t ct_fcp_rsp_iudata_64;
2405			} u;
2406		} m2;
2407	} rsp;
2408} ct2_entry_t;
2409
2410typedef struct {
2411	isphdr_t	ct_header;
2412	uint32_t	ct_syshandle;
2413	uint16_t	ct_iid;		/* initiator id */
2414	uint16_t	ct_rxid;	/* response ID */
2415	uint16_t	ct_flags;
2416	uint16_t 	ct_status;	/* isp status */
2417	uint16_t	ct_timeout;
2418	uint16_t	ct_seg_count;
2419	uint32_t	ct_reloff;	/* relative offset */
2420	uint32_t	ct_resid;	/* residual length */
2421	union {
2422		struct {
2423			uint32_t _reserved;
2424			uint16_t _reserved2;
2425			uint16_t ct_scsi_status;
2426			uint32_t ct_xfrlen;
2427			union {
2428				ispds_t ct_dataseg[ISP_RQDSEG_T2];
2429				ispds64_t ct_dataseg64[ISP_RQDSEG_T3];
2430				ispdslist_t ct_dslist;
2431			} u;
2432		} m0;
2433		struct {
2434			uint16_t _reserved;
2435			uint16_t _reserved2;
2436			uint16_t ct_senselen;
2437			uint16_t ct_scsi_status;
2438			uint16_t ct_resplen;
2439			uint8_t  ct_resp[MAXRESPLEN];
2440		} m1;
2441		struct {
2442			uint32_t _reserved;
2443			uint16_t _reserved2;
2444			uint16_t _reserved3;
2445			uint32_t ct_datalen;
2446			union {
2447				ispds_t	ct_fcp_rsp_iudata_32;
2448				ispds64_t ct_fcp_rsp_iudata_64;
2449			} u;
2450		} m2;
2451	} rsp;
2452} ct2e_entry_t;
2453
2454/*
2455 * ct_flags values for CTIO2
2456 */
2457#define	CT2_FLAG_MODE0	0x0000
2458#define	CT2_FLAG_MODE1	0x0001
2459#define	CT2_FLAG_MODE2	0x0002
2460#define		CT2_FLAG_MMASK	0x0003
2461#define CT2_DATA_IN	0x0040	/* *to* initiator */
2462#define CT2_DATA_OUT	0x0080	/* *from* initiator */
2463#define CT2_NO_DATA	0x00C0
2464#define 	CT2_DATAMASK	0x00C0
2465#define	CT2_CCINCR	0x0100
2466#define	CT2_FASTPOST	0x0200
2467#define	CT2_CONFIRM	0x2000
2468#define	CT2_TERMINATE	0x4000
2469#define CT2_SENDSTATUS	0x8000
2470
2471/*
2472 * ct_status values are (mostly) the same as that for ct_entry.
2473 */
2474
2475/*
2476 * ct_scsi_status values- the low 8 bits are the normal SCSI status
2477 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU
2478 * fields.
2479 */
2480#define	CT2_RSPLEN_VALID	0x0100
2481#define	CT2_SNSLEN_VALID	0x0200
2482#define	CT2_DATA_OVER		0x0400
2483#define	CT2_DATA_UNDER		0x0800
2484
2485/*
2486 * ISP24XX CTIO
2487 */
2488#define	MAXRESPLEN_24XX	24
2489typedef struct {
2490	isphdr_t	ct_header;
2491	uint32_t	ct_syshandle;
2492	uint16_t	ct_nphdl;	/* status on returned CTIOs */
2493	uint16_t	ct_timeout;
2494	uint16_t	ct_seg_count;
2495	uint8_t		ct_vpidx;
2496	uint8_t		ct_xflags;
2497	uint16_t	ct_iid_lo;	/* low 16 bits of portid */
2498	uint8_t		ct_iid_hi;	/* hi 8 bits of portid */
2499	uint8_t		ct_reserved;
2500	uint32_t	ct_rxid;
2501	uint16_t	ct_senselen;	/* mode 1 only */
2502	uint16_t	ct_flags;
2503	uint32_t	ct_resid;	/* residual length */
2504	uint16_t	ct_oxid;
2505	uint16_t	ct_scsi_status;	/* modes 0 && 1 only */
2506	union {
2507		struct {
2508			uint32_t	reloff;
2509			uint32_t	reserved0;
2510			uint32_t	ct_xfrlen;
2511			uint32_t	reserved1;
2512			ispds64_t	ds;
2513		} m0;
2514		struct {
2515			uint16_t ct_resplen;
2516			uint16_t reserved;
2517			uint8_t  ct_resp[MAXRESPLEN_24XX];
2518		} m1;
2519		struct {
2520			uint32_t reserved0;
2521			uint32_t reserved1;
2522			uint32_t ct_datalen;
2523			uint32_t reserved2;
2524			ispds64_t ct_fcp_rsp_iudata;
2525		} m2;
2526	} rsp;
2527} ct7_entry_t;
2528
2529/*
2530 * ct_flags values for CTIO7
2531 */
2532#define CT7_NO_DATA	0x0000
2533#define CT7_DATA_OUT	0x0001	/* *from* initiator */
2534#define CT7_DATA_IN	0x0002	/* *to* initiator */
2535#define 	CT7_DATAMASK	0x3
2536#define	CT7_DSD_ENABLE	0x0004
2537#define	CT7_CONF_STSFD	0x0010
2538#define	CT7_EXPLCT_CONF	0x0020
2539#define	CT7_FLAG_MODE0	0x0000
2540#define	CT7_FLAG_MODE1	0x0040
2541#define	CT7_FLAG_MODE2	0x0080
2542#define		CT7_FLAG_MMASK	0x00C0
2543#define	CT7_NOACK	    0x0100
2544#define	CT7_TASK_ATTR_SHIFT	9
2545#define	CT7_CONFIRM     0x2000
2546#define	CT7_TERMINATE	0x4000
2547#define CT7_SENDSTATUS	0x8000
2548
2549/*
2550 * Type 7 CTIO status codes
2551 */
2552#define CT7_OK		0x01	/* completed without error */
2553#define CT7_ABORTED	0x02	/* aborted by host */
2554#define CT7_ERR		0x04	/* see sense data for error */
2555#define CT7_INVAL	0x06	/* request for disabled lun */
2556#define	CT7_INVRXID	0x08	/* Invalid RX_ID */
2557#define	CT7_DATA_OVER	0x09	/* Data Overrun */
2558#define CT7_TIMEOUT	0x0B	/* timed out */
2559#define CT7_RESET	0x0E	/* LIP Rset Received */
2560#define	CT7_BUS_ERROR	0x10	/* DMA PCI Error */
2561#define	CT7_REASSY_ERR	0x11	/* DMA reassembly error */
2562#define	CT7_DATA_UNDER	0x15	/* Data Underrun */
2563#define	CT7_PORTUNAVAIL	0x28	/* port not available */
2564#define	CT7_LOGOUT	0x29	/* port logout */
2565#define	CT7_PORTCHANGED	0x2A	/* port changed */
2566#define	CT7_SRR		0x45	/* SRR Received */
2567
2568/*
2569 * Other 24XX related target IOCBs
2570 */
2571
2572/*
2573 * ABTS Received
2574 */
2575typedef struct {
2576	isphdr_t	abts_header;
2577	uint8_t		abts_reserved0[6];
2578	uint16_t	abts_nphdl;
2579	uint16_t	abts_reserved1;
2580	uint16_t	abts_sof;
2581	uint32_t	abts_rxid_abts;
2582	uint16_t	abts_did_lo;
2583	uint8_t		abts_did_hi;
2584	uint8_t		abts_r_ctl;
2585	uint16_t	abts_sid_lo;
2586	uint8_t		abts_sid_hi;
2587	uint8_t		abts_cs_ctl;
2588	uint16_t	abts_fs_ctl;
2589	uint8_t		abts_f_ctl;
2590	uint8_t		abts_type;
2591	uint16_t	abts_seq_cnt;
2592	uint8_t		abts_df_ctl;
2593	uint8_t		abts_seq_id;
2594	uint16_t	abts_rx_id;
2595	uint16_t	abts_ox_id;
2596	uint32_t	abts_param;
2597	uint8_t		abts_reserved2[16];
2598	uint32_t	abts_rxid_task;
2599} abts_t;
2600
2601typedef struct {
2602	isphdr_t	abts_rsp_header;
2603	uint32_t	abts_rsp_handle;
2604	uint16_t	abts_rsp_status;
2605	uint16_t	abts_rsp_nphdl;
2606	uint16_t	abts_rsp_ctl_flags;
2607	uint16_t	abts_rsp_sof;
2608	uint32_t	abts_rsp_rxid_abts;
2609	uint16_t	abts_rsp_did_lo;
2610	uint8_t		abts_rsp_did_hi;
2611	uint8_t		abts_rsp_r_ctl;
2612	uint16_t	abts_rsp_sid_lo;
2613	uint8_t		abts_rsp_sid_hi;
2614	uint8_t		abts_rsp_cs_ctl;
2615	uint16_t	abts_rsp_f_ctl_lo;
2616	uint8_t		abts_rsp_f_ctl_hi;
2617	uint8_t		abts_rsp_type;
2618	uint16_t	abts_rsp_seq_cnt;
2619	uint8_t		abts_rsp_df_ctl;
2620	uint8_t		abts_rsp_seq_id;
2621	uint16_t	abts_rsp_rx_id;
2622	uint16_t	abts_rsp_ox_id;
2623	uint32_t	abts_rsp_param;
2624	union {
2625		struct {
2626			uint16_t reserved;
2627			uint8_t	last_seq_id;
2628			uint8_t seq_id_valid;
2629			uint16_t aborted_rx_id;
2630			uint16_t aborted_ox_id;
2631			uint16_t high_seq_cnt;
2632			uint16_t low_seq_cnt;
2633			uint8_t reserved2[4];
2634		} ba_acc;
2635		struct {
2636			uint8_t vendor_unique;
2637			uint8_t	explanation;
2638			uint8_t reason;
2639			uint8_t reserved;
2640			uint8_t reserved2[12];
2641		} ba_rjt;
2642		struct {
2643			uint8_t reserved[8];
2644			uint32_t subcode1;
2645			uint32_t subcode2;
2646		} rsp;
2647		uint8_t reserved[16];
2648	} abts_rsp_payload;
2649	uint32_t	abts_rsp_rxid_task;
2650} abts_rsp_t;
2651
2652/* terminate this ABTS exchange */
2653#define	ISP24XX_ABTS_RSP_TERMINATE	0x01
2654
2655#define	ISP24XX_ABTS_RSP_COMPLETE	0x00
2656#define	ISP24XX_ABTS_RSP_RESET		0x04
2657#define	ISP24XX_ABTS_RSP_ABORTED	0x05
2658#define	ISP24XX_ABTS_RSP_TIMEOUT	0x06
2659#define	ISP24XX_ABTS_RSP_INVXID		0x08
2660#define	ISP24XX_ABTS_RSP_LOGOUT		0x29
2661#define	ISP24XX_ABTS_RSP_SUBCODE	0x31
2662
2663#define	ISP24XX_NO_TASK			0xffffffff
2664
2665/*
2666 * Miscellaneous
2667 *
2668 * These are the limits of the number of dma segments we
2669 * can deal with based not on the size of the segment counter
2670 * (which is 16 bits), but on the size of the number of
2671 * queue entries field (which is 8 bits). We assume no
2672 * segments in the first queue entry, so we can either
2673 * have 7 dma segments per continuation entry or 5
2674 * (for 64 bit dma).. multiplying out by 254....
2675 */
2676#define	ISP_NSEG_MAX	1778
2677#define	ISP_NSEG64_MAX	1270
2678
2679#endif	/* _ISPMBOX_H */
2680