ispmbox.h revision 290104
1/* $FreeBSD: head/sys/dev/isp/ispmbox.h 290104 2015-10-28 12:34:59Z mav $ */ 2/*- 3 * Copyright (c) 1997-2009 by Matthew Jacob 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30/* 31 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 32 */ 33#ifndef _ISPMBOX_H 34#define _ISPMBOX_H 35 36/* 37 * Mailbox Command Opcodes 38 */ 39#define MBOX_NO_OP 0x0000 40#define MBOX_LOAD_RAM 0x0001 41#define MBOX_EXEC_FIRMWARE 0x0002 42#define MBOX_DUMP_RAM 0x0003 43#define MBOX_WRITE_RAM_WORD 0x0004 44#define MBOX_READ_RAM_WORD 0x0005 45#define MBOX_MAILBOX_REG_TEST 0x0006 46#define MBOX_VERIFY_CHECKSUM 0x0007 47#define MBOX_ABOUT_FIRMWARE 0x0008 48#define MBOX_LOAD_RISC_RAM_2100 0x0009 49 /* a */ 50#define MBOX_LOAD_RISC_RAM 0x000b 51 /* c */ 52#define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d 53#define MBOX_CHECK_FIRMWARE 0x000e 54#define MBOX_READ_RAM_WORD_EXTENDED 0x000f 55#define MBOX_INIT_REQ_QUEUE 0x0010 56#define MBOX_INIT_RES_QUEUE 0x0011 57#define MBOX_EXECUTE_IOCB 0x0012 58#define MBOX_WAKE_UP 0x0013 59#define MBOX_STOP_FIRMWARE 0x0014 60#define MBOX_ABORT 0x0015 61#define MBOX_ABORT_DEVICE 0x0016 62#define MBOX_ABORT_TARGET 0x0017 63#define MBOX_BUS_RESET 0x0018 64#define MBOX_STOP_QUEUE 0x0019 65#define MBOX_START_QUEUE 0x001a 66#define MBOX_SINGLE_STEP_QUEUE 0x001b 67#define MBOX_ABORT_QUEUE 0x001c 68#define MBOX_GET_DEV_QUEUE_STATUS 0x001d 69 /* 1e */ 70#define MBOX_GET_FIRMWARE_STATUS 0x001f 71#define MBOX_GET_INIT_SCSI_ID 0x0020 72#define MBOX_GET_SELECT_TIMEOUT 0x0021 73#define MBOX_GET_RETRY_COUNT 0x0022 74#define MBOX_GET_TAG_AGE_LIMIT 0x0023 75#define MBOX_GET_CLOCK_RATE 0x0024 76#define MBOX_GET_ACT_NEG_STATE 0x0025 77#define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 78#define MBOX_GET_SBUS_PARAMS 0x0027 79#define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 80#define MBOX_GET_TARGET_PARAMS 0x0028 81#define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 82#define MBOX_GET_RESET_DELAY_PARAMS 0x002a 83 /* 2b */ 84 /* 2c */ 85 /* 2d */ 86 /* 2e */ 87 /* 2f */ 88#define MBOX_SET_INIT_SCSI_ID 0x0030 89#define MBOX_SET_SELECT_TIMEOUT 0x0031 90#define MBOX_SET_RETRY_COUNT 0x0032 91#define MBOX_SET_TAG_AGE_LIMIT 0x0033 92#define MBOX_SET_CLOCK_RATE 0x0034 93#define MBOX_SET_ACT_NEG_STATE 0x0035 94#define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 95#define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 96#define MBOX_SET_PCI_PARAMETERS 0x0037 97#define MBOX_SET_TARGET_PARAMS 0x0038 98#define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 99#define MBOX_SET_RESET_DELAY_PARAMS 0x003a 100 /* 3b */ 101 /* 3c */ 102 /* 3d */ 103 /* 3e */ 104 /* 3f */ 105#define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 106#define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 107#define MBOX_EXEC_BIOS_IOCB 0x0042 108#define MBOX_SET_FW_FEATURES 0x004a 109#define MBOX_GET_FW_FEATURES 0x004b 110#define FW_FEATURE_FAST_POST 0x1 111#define FW_FEATURE_LVD_NOTIFY 0x2 112#define FW_FEATURE_RIO_32BIT 0x4 113#define FW_FEATURE_RIO_16BIT 0x8 114 115#define MBOX_INIT_REQ_QUEUE_A64 0x0052 116#define MBOX_INIT_RES_QUEUE_A64 0x0053 117 118#define MBOX_ENABLE_TARGET_MODE 0x0055 119#define ENABLE_TARGET_FLAG 0x8000 120#define ENABLE_TQING_FLAG 0x0004 121#define ENABLE_MANDATORY_DISC 0x0002 122#define MBOX_GET_TARGET_STATUS 0x0056 123 124/* These are for the ISP2X00 FC cards */ 125#define MBOX_GET_LOOP_ID 0x0020 126/* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */ 127#define ISP24XX_INORDER 0x0100 128#define ISP24XX_NPIV_SAN 0x0400 129#define ISP24XX_VSAN_SAN 0x1000 130#define ISP24XX_FC_SP_SAN 0x2000 131 132#define MBOX_GET_FIRMWARE_OPTIONS 0x0028 133#define MBOX_SET_FIRMWARE_OPTIONS 0x0038 134#define MBOX_GET_RESOURCE_COUNT 0x0042 135#define MBOX_REQUEST_OFFLINE_MODE 0x0043 136#define MBOX_ENHANCED_GET_PDB 0x0047 137#define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */ 138#define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */ 139#define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */ 140#define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 141#define MBOX_INIT_FIRMWARE 0x0060 142#define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 143#define MBOX_INIT_LIP 0x0062 144#define MBOX_GET_FC_AL_POSITION_MAP 0x0063 145#define MBOX_GET_PORT_DB 0x0064 146#define MBOX_CLEAR_ACA 0x0065 147#define MBOX_TARGET_RESET 0x0066 148#define MBOX_CLEAR_TASK_SET 0x0067 149#define MBOX_ABORT_TASK_SET 0x0068 150#define MBOX_GET_FW_STATE 0x0069 151#define MBOX_GET_PORT_NAME 0x006A 152#define MBOX_GET_LINK_STATUS 0x006B 153#define MBOX_INIT_LIP_RESET 0x006C 154#define MBOX_SEND_SNS 0x006E 155#define MBOX_FABRIC_LOGIN 0x006F 156#define MBOX_SEND_CHANGE_REQUEST 0x0070 157#define MBOX_FABRIC_LOGOUT 0x0071 158#define MBOX_INIT_LIP_LOGIN 0x0072 159#define MBOX_GET_PORT_NODE_NAME_LIST 0x0075 160#define MBOX_GET_ID_LIST 0x007C 161#define MBOX_LUN_RESET 0x007E 162 163#define MBOX_DRIVER_HEARTBEAT 0x005B 164#define MBOX_FW_HEARTBEAT 0x005C 165 166#define MBOX_GET_SET_DATA_RATE 0x005D /* 24XX/23XX only */ 167#define MBGSD_GET_RATE 0 168#define MBGSD_SET_RATE 1 169#define MBGSD_SET_RATE_NOW 2 /* 24XX only */ 170#define MBGSD_ONEGB 0 171#define MBGSD_TWOGB 1 172#define MBGSD_AUTO 2 173#define MBGSD_FOURGB 3 /* 24XX only */ 174#define MBGSD_EIGHTGB 4 /* 25XX only */ 175 176 177#define ISP2100_SET_PCI_PARAM 0x00ff 178 179#define MBOX_BUSY 0x04 180 181/* 182 * Mailbox Command Complete Status Codes 183 */ 184#define MBOX_COMMAND_COMPLETE 0x4000 185#define MBOX_INVALID_COMMAND 0x4001 186#define MBOX_HOST_INTERFACE_ERROR 0x4002 187#define MBOX_TEST_FAILED 0x4003 188#define MBOX_COMMAND_ERROR 0x4005 189#define MBOX_COMMAND_PARAM_ERROR 0x4006 190#define MBOX_PORT_ID_USED 0x4007 191#define MBOX_LOOP_ID_USED 0x4008 192#define MBOX_ALL_IDS_USED 0x4009 193#define MBOX_NOT_LOGGED_IN 0x400A 194/* pseudo mailbox completion codes */ 195#define MBOX_REGS_BUSY 0x6000 /* registers in use */ 196#define MBOX_TIMEOUT 0x6001 /* command timed out */ 197 198#define MBLOGALL 0x000f 199#define MBLOGNONE 0x0000 200#define MBLOGMASK(x) ((x) & 0xf) 201 202/* 203 * Asynchronous event status codes 204 */ 205#define ASYNC_BUS_RESET 0x8001 206#define ASYNC_SYSTEM_ERROR 0x8002 207#define ASYNC_RQS_XFER_ERR 0x8003 208#define ASYNC_RSP_XFER_ERR 0x8004 209#define ASYNC_QWAKEUP 0x8005 210#define ASYNC_TIMEOUT_RESET 0x8006 211#define ASYNC_DEVICE_RESET 0x8007 212#define ASYNC_EXTMSG_UNDERRUN 0x800A 213#define ASYNC_SCAM_INT 0x800B 214#define ASYNC_HUNG_SCSI 0x800C 215#define ASYNC_KILLED_BUS 0x800D 216#define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 217#define ASYNC_LIP_OCCURRED 0x8010 218#define ASYNC_LOOP_UP 0x8011 219#define ASYNC_LOOP_DOWN 0x8012 220#define ASYNC_LOOP_RESET 0x8013 221#define ASYNC_PDB_CHANGED 0x8014 222#define ASYNC_CHANGE_NOTIFY 0x8015 223#define ASYNC_LIP_F8 0x8016 224#define ASYNC_LIP_ERROR 0x8017 225#define ASYNC_SECURITY_UPDATE 0x801B 226#define ASYNC_CMD_CMPLT 0x8020 227#define ASYNC_CTIO_DONE 0x8021 228#define ASYNC_RIO32_1 0x8021 229#define ASYNC_RIO32_2 0x8022 230#define ASYNC_IP_XMIT_DONE 0x8022 231#define ASYNC_IP_RECV_DONE 0x8023 232#define ASYNC_IP_BROADCAST 0x8024 233#define ASYNC_IP_RCVQ_LOW 0x8025 234#define ASYNC_IP_RCVQ_EMPTY 0x8026 235#define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 236#define ASYNC_PTPMODE 0x8030 237#define ASYNC_RIO16_1 0x8031 238#define ASYNC_RIO16_2 0x8032 239#define ASYNC_RIO16_3 0x8033 240#define ASYNC_RIO16_4 0x8034 241#define ASYNC_RIO16_5 0x8035 242#define ASYNC_CONNMODE 0x8036 243#define ISP_CONN_LOOP 1 244#define ISP_CONN_PTP 2 245#define ISP_CONN_BADLIP 3 246#define ISP_CONN_FATAL 4 247#define ISP_CONN_LOOPBACK 5 248#define ASYNC_RIOZIO_STALL 0x8040 /* there's a RIO/ZIO entry that hasn't been serviced */ 249#define ASYNC_RIO32_2_2200 0x8042 /* same as ASYNC_RIO32_2, but for 2100/2200 */ 250#define ASYNC_RCV_ERR 0x8048 251 252/* 253 * Firmware Options. There are a lot of them. 254 * 255 * IFCOPTN - ISP Fibre Channel Option Word N 256 */ 257#define IFCOPT1_EQFQASYNC (1 << 13) /* enable QFULL notification */ 258#define IFCOPT1_EAABSRCVD (1 << 12) 259#define IFCOPT1_RJTASYNC (1 << 11) /* enable 8018 notification */ 260#define IFCOPT1_ENAPURE (1 << 10) 261#define IFCOPT1_ENA8017 (1 << 7) 262#define IFCOPT1_DISGPIO67 (1 << 6) 263#define IFCOPT1_LIPLOSSIMM (1 << 5) 264#define IFCOPT1_DISF7SWTCH (1 << 4) 265#define IFCOPT1_CTIO_RETRY (1 << 3) 266#define IFCOPT1_LIPASYNC (1 << 1) 267#define IFCOPT1_LIPF8 (1 << 0) 268 269#define IFCOPT2_LOOPBACK (1 << 1) 270#define IFCOPT2_ATIO3_ONLY (1 << 0) 271 272#define IFCOPT3_NOPRLI (1 << 4) /* disable automatic sending of PRLI on local loops */ 273#define IFCOPT3_RNDASYNC (1 << 1) 274/* 275 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 276 * mailbox command to enable this. 277 */ 278#define ASYNC_QFULL_SENT 0x8049 279 280/* 281 * Needs to be enabled 282 */ 283#define ASYNC_AUTO_PLOGI_RJT 0x8018 284/* 285 * 24XX only 286 */ 287#define ASYNC_RJT_SENT 0x8049 288 289/* 290 * All IOCB Queue entries are this size 291 */ 292#define QENTRY_LEN 64 293 294/* 295 * Command Structure Definitions 296 */ 297 298typedef struct { 299 uint32_t ds_base; 300 uint32_t ds_count; 301} ispds_t; 302 303typedef struct { 304 uint32_t ds_base; 305 uint32_t ds_basehi; 306 uint32_t ds_count; 307} ispds64_t; 308 309#define DSTYPE_32BIT 0 310#define DSTYPE_64BIT 1 311typedef struct { 312 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 313 uint32_t ds_segment; /* unused */ 314 uint32_t ds_base; /* 32 bit address of DSD list */ 315} ispdslist_t; 316 317 318typedef struct { 319 uint8_t rqs_entry_type; 320 uint8_t rqs_entry_count; 321 uint8_t rqs_seqno; 322 uint8_t rqs_flags; 323} isphdr_t; 324 325/* RQS Flag definitions */ 326#define RQSFLAG_CONTINUATION 0x01 327#define RQSFLAG_FULL 0x02 328#define RQSFLAG_BADHEADER 0x04 329#define RQSFLAG_BADPACKET 0x08 330#define RQSFLAG_BADCOUNT 0x10 331#define RQSFLAG_BADORDER 0x20 332#define RQSFLAG_MASK 0x3f 333 334/* RQS entry_type definitions */ 335#define RQSTYPE_REQUEST 0x01 336#define RQSTYPE_DATASEG 0x02 337#define RQSTYPE_RESPONSE 0x03 338#define RQSTYPE_MARKER 0x04 339#define RQSTYPE_CMDONLY 0x05 340#define RQSTYPE_ATIO 0x06 /* Target Mode */ 341#define RQSTYPE_CTIO 0x07 /* Target Mode */ 342#define RQSTYPE_SCAM 0x08 343#define RQSTYPE_A64 0x09 344#define RQSTYPE_A64_CONT 0x0a 345#define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 346#define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 347#define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 348#define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 349#define RQSTYPE_CTIO1 0x0f /* Target Mode */ 350#define RQSTYPE_STATUS_CONT 0x10 351#define RQSTYPE_T2RQS 0x11 352#define RQSTYPE_CTIO7 0x12 353#define RQSTYPE_IP_XMIT 0x13 354#define RQSTYPE_TSK_MGMT 0x14 355#define RQSTYPE_T4RQS 0x15 356#define RQSTYPE_ATIO2 0x16 /* Target Mode */ 357#define RQSTYPE_CTIO2 0x17 /* Target Mode */ 358#define RQSTYPE_T7RQS 0x18 359#define RQSTYPE_T3RQS 0x19 360#define RQSTYPE_IP_XMIT_64 0x1b 361#define RQSTYPE_CTIO4 0x1e /* Target Mode */ 362#define RQSTYPE_CTIO3 0x1f /* Target Mode */ 363#define RQSTYPE_RIO1 0x21 364#define RQSTYPE_RIO2 0x22 365#define RQSTYPE_IP_RECV 0x23 366#define RQSTYPE_IP_RECV_CONT 0x24 367#define RQSTYPE_CT_PASSTHRU 0x29 368#define RQSTYPE_MS_PASSTHRU 0x29 369#define RQSTYPE_VP_CTRL 0x30 /* 24XX only */ 370#define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */ 371#define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */ 372#define RQSTYPE_ABORT_IO 0x33 373#define RQSTYPE_T6RQS 0x48 374#define RQSTYPE_LOGIN 0x52 375#define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */ 376#define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */ 377 378 379#define ISP_RQDSEG 4 380typedef struct { 381 isphdr_t req_header; 382 uint32_t req_handle; 383 uint8_t req_lun_trn; 384 uint8_t req_target; 385 uint16_t req_cdblen; 386 uint16_t req_flags; 387 uint16_t req_reserved; 388 uint16_t req_time; 389 uint16_t req_seg_count; 390 uint8_t req_cdb[12]; 391 ispds_t req_dataseg[ISP_RQDSEG]; 392} ispreq_t; 393#define ISP_RQDSEG_A64 2 394 395typedef struct { 396 isphdr_t mrk_header; 397 uint32_t mrk_handle; 398 uint8_t mrk_reserved0; 399 uint8_t mrk_target; 400 uint16_t mrk_modifier; 401 uint16_t mrk_flags; 402 uint16_t mrk_lun; 403 uint8_t mrk_reserved1[48]; 404} isp_marker_t; 405 406typedef struct { 407 isphdr_t mrk_header; 408 uint32_t mrk_handle; 409 uint16_t mrk_nphdl; 410 uint8_t mrk_modifier; 411 uint8_t mrk_reserved0; 412 uint8_t mrk_reserved1; 413 uint8_t mrk_vphdl; 414 uint16_t mrk_reserved2; 415 uint8_t mrk_lun[8]; 416 uint8_t mrk_reserved3[40]; 417} isp_marker_24xx_t; 418 419 420#define SYNC_DEVICE 0 421#define SYNC_TARGET 1 422#define SYNC_ALL 2 423#define SYNC_LIP 3 424 425#define ISP_RQDSEG_T2 3 426typedef struct { 427 isphdr_t req_header; 428 uint32_t req_handle; 429 uint8_t req_lun_trn; 430 uint8_t req_target; 431 uint16_t req_scclun; 432 uint16_t req_flags; 433 uint8_t req_crn; 434 uint8_t req_reserved; 435 uint16_t req_time; 436 uint16_t req_seg_count; 437 uint8_t req_cdb[16]; 438 uint32_t req_totalcnt; 439 ispds_t req_dataseg[ISP_RQDSEG_T2]; 440} ispreqt2_t; 441 442typedef struct { 443 isphdr_t req_header; 444 uint32_t req_handle; 445 uint16_t req_target; 446 uint16_t req_scclun; 447 uint16_t req_flags; 448 uint16_t req_reserved; 449 uint16_t req_time; 450 uint16_t req_seg_count; 451 uint8_t req_cdb[16]; 452 uint32_t req_totalcnt; 453 ispds_t req_dataseg[ISP_RQDSEG_T2]; 454} ispreqt2e_t; 455 456#define ISP_RQDSEG_T3 2 457typedef struct { 458 isphdr_t req_header; 459 uint32_t req_handle; 460 uint8_t req_lun_trn; 461 uint8_t req_target; 462 uint16_t req_scclun; 463 uint16_t req_flags; 464 uint8_t req_crn; 465 uint8_t req_reserved; 466 uint16_t req_time; 467 uint16_t req_seg_count; 468 uint8_t req_cdb[16]; 469 uint32_t req_totalcnt; 470 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 471} ispreqt3_t; 472#define ispreq64_t ispreqt3_t /* same as.... */ 473 474typedef struct { 475 isphdr_t req_header; 476 uint32_t req_handle; 477 uint16_t req_target; 478 uint16_t req_scclun; 479 uint16_t req_flags; 480 uint8_t req_crn; 481 uint8_t req_reserved; 482 uint16_t req_time; 483 uint16_t req_seg_count; 484 uint8_t req_cdb[16]; 485 uint32_t req_totalcnt; 486 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 487} ispreqt3e_t; 488 489/* req_flag values */ 490#define REQFLAG_NODISCON 0x0001 491#define REQFLAG_HTAG 0x0002 492#define REQFLAG_OTAG 0x0004 493#define REQFLAG_STAG 0x0008 494#define REQFLAG_TARGET_RTN 0x0010 495 496#define REQFLAG_NODATA 0x0000 497#define REQFLAG_DATA_IN 0x0020 498#define REQFLAG_DATA_OUT 0x0040 499#define REQFLAG_DATA_UNKNOWN 0x0060 500 501#define REQFLAG_DISARQ 0x0100 502#define REQFLAG_FRC_ASYNC 0x0200 503#define REQFLAG_FRC_SYNC 0x0400 504#define REQFLAG_FRC_WIDE 0x0800 505#define REQFLAG_NOPARITY 0x1000 506#define REQFLAG_STOPQ 0x2000 507#define REQFLAG_XTRASNS 0x4000 508#define REQFLAG_PRIORITY 0x8000 509 510typedef struct { 511 isphdr_t req_header; 512 uint32_t req_handle; 513 uint8_t req_lun_trn; 514 uint8_t req_target; 515 uint16_t req_cdblen; 516 uint16_t req_flags; 517 uint16_t req_reserved; 518 uint16_t req_time; 519 uint16_t req_seg_count; 520 uint8_t req_cdb[44]; 521} ispextreq_t; 522 523 524/* 525 * ISP24XX structures 526 */ 527typedef struct { 528 isphdr_t req_header; 529 uint32_t req_handle; 530 uint16_t req_nphdl; 531 uint16_t req_time; 532 uint16_t req_seg_count; 533 uint16_t req_reserved; 534 uint8_t req_lun[8]; 535 uint8_t req_alen_datadir; 536 uint8_t req_task_management; 537 uint8_t req_task_attribute; 538 uint8_t req_crn; 539 uint8_t req_cdb[16]; 540 uint32_t req_dl; 541 uint16_t req_tidlo; 542 uint8_t req_tidhi; 543 uint8_t req_vpidx; 544 ispds64_t req_dataseg; 545} ispreqt7_t; 546 547/* Task Management Request Function */ 548typedef struct { 549 isphdr_t tmf_header; 550 uint32_t tmf_handle; 551 uint16_t tmf_nphdl; 552 uint8_t tmf_reserved0[2]; 553 uint16_t tmf_delay; 554 uint16_t tmf_timeout; 555 uint8_t tmf_lun[8]; 556 uint32_t tmf_flags; 557 uint8_t tmf_reserved1[20]; 558 uint16_t tmf_tidlo; 559 uint8_t tmf_tidhi; 560 uint8_t tmf_vpidx; 561 uint8_t tmf_reserved2[12]; 562} isp24xx_tmf_t; 563 564#define ISP24XX_TMF_NOSEND 0x80000000 565 566#define ISP24XX_TMF_LUN_RESET 0x00000010 567#define ISP24XX_TMF_ABORT_TASK_SET 0x00000008 568#define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004 569#define ISP24XX_TMF_TARGET_RESET 0x00000002 570#define ISP24XX_TMF_CLEAR_ACA 0x00000001 571 572/* I/O Abort Structure */ 573typedef struct { 574 isphdr_t abrt_header; 575 uint32_t abrt_handle; 576 uint16_t abrt_nphdl; 577 uint16_t abrt_options; 578 uint32_t abrt_cmd_handle; 579 uint16_t abrt_queue_number; 580 uint8_t abrt_reserved[30]; 581 uint16_t abrt_tidlo; 582 uint8_t abrt_tidhi; 583 uint8_t abrt_vpidx; 584 uint8_t abrt_reserved1[12]; 585} isp24xx_abrt_t; 586 587#define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */ 588#define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */ 589#define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */ 590 591#define ISP_CDSEG 7 592typedef struct { 593 isphdr_t req_header; 594 uint32_t req_reserved; 595 ispds_t req_dataseg[ISP_CDSEG]; 596} ispcontreq_t; 597 598#define ISP_CDSEG64 5 599typedef struct { 600 isphdr_t req_header; 601 ispds64_t req_dataseg[ISP_CDSEG64]; 602} ispcontreq64_t; 603 604typedef struct { 605 isphdr_t req_header; 606 uint32_t req_handle; 607 uint16_t req_scsi_status; 608 uint16_t req_completion_status; 609 uint16_t req_state_flags; 610 uint16_t req_status_flags; 611 uint16_t req_time; 612#define req_response_len req_time /* FC only */ 613 uint16_t req_sense_len; 614 uint32_t req_resid; 615 uint8_t req_response[8]; /* FC only */ 616 uint8_t req_sense_data[32]; 617} ispstatusreq_t; 618 619/* 620 * Status Continuation 621 */ 622typedef struct { 623 isphdr_t req_header; 624 uint8_t req_sense_data[60]; 625} ispstatus_cont_t; 626 627/* 628 * 24XX Type 0 status 629 */ 630typedef struct { 631 isphdr_t req_header; 632 uint32_t req_handle; 633 uint16_t req_completion_status; 634 uint16_t req_oxid; 635 uint32_t req_resid; 636 uint16_t req_reserved0; 637 uint16_t req_state_flags; 638 uint16_t req_retry_delay; /* aka Status Qualifier */ 639 uint16_t req_scsi_status; 640 uint32_t req_fcp_residual; 641 uint32_t req_sense_len; 642 uint32_t req_response_len; 643 uint8_t req_rsp_sense[28]; 644} isp24xx_statusreq_t; 645 646/* 647 * For Qlogic 2X00, the high order byte of SCSI status has 648 * additional meaning. 649 */ 650#define RQCS_CR 0x1000 /* Confirmation Request */ 651#define RQCS_RU 0x0800 /* Residual Under */ 652#define RQCS_RO 0x0400 /* Residual Over */ 653#define RQCS_RESID (RQCS_RU|RQCS_RO) 654#define RQCS_SV 0x0200 /* Sense Length Valid */ 655#define RQCS_RV 0x0100 /* FCP Response Length Valid */ 656 657/* 658 * CT Passthru IOCB 659 */ 660typedef struct { 661 isphdr_t ctp_header; 662 uint32_t ctp_handle; 663 uint16_t ctp_status; 664 uint16_t ctp_nphdl; /* n-port handle */ 665 uint16_t ctp_cmd_cnt; /* Command DSD count */ 666 uint8_t ctp_vpidx; 667 uint8_t ctp_reserved0; 668 uint16_t ctp_time; 669 uint16_t ctp_reserved1; 670 uint16_t ctp_rsp_cnt; /* Response DSD count */ 671 uint16_t ctp_reserved2[5]; 672 uint32_t ctp_rsp_bcnt; /* Response byte count */ 673 uint32_t ctp_cmd_bcnt; /* Command byte count */ 674 ispds64_t ctp_dataseg[2]; 675} isp_ct_pt_t; 676 677/* 678 * MS Passthru IOCB 679 */ 680typedef struct { 681 isphdr_t ms_header; 682 uint32_t ms_handle; 683 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */ 684 uint16_t ms_status; 685 uint16_t ms_flags; 686 uint16_t ms_reserved1; /* low 8 bits */ 687 uint16_t ms_time; 688 uint16_t ms_cmd_cnt; /* Command DSD count */ 689 uint16_t ms_tot_cnt; /* Total DSD Count */ 690 uint8_t ms_type; /* MS type */ 691 uint8_t ms_r_ctl; /* R_CTL */ 692 uint16_t ms_rxid; /* RX_ID */ 693 uint16_t ms_reserved2; 694 uint32_t ms_handle2; 695 uint32_t ms_rsp_bcnt; /* Response byte count */ 696 uint32_t ms_cmd_bcnt; /* Command byte count */ 697 ispds64_t ms_dataseg[2]; 698} isp_ms_t; 699 700/* 701 * Completion Status Codes. 702 */ 703#define RQCS_COMPLETE 0x0000 704#define RQCS_DMA_ERROR 0x0002 705#define RQCS_RESET_OCCURRED 0x0004 706#define RQCS_ABORTED 0x0005 707#define RQCS_TIMEOUT 0x0006 708#define RQCS_DATA_OVERRUN 0x0007 709#define RQCS_DATA_UNDERRUN 0x0015 710#define RQCS_QUEUE_FULL 0x001C 711 712/* 1X00 Only Completion Codes */ 713#define RQCS_INCOMPLETE 0x0001 714#define RQCS_TRANSPORT_ERROR 0x0003 715#define RQCS_COMMAND_OVERRUN 0x0008 716#define RQCS_STATUS_OVERRUN 0x0009 717#define RQCS_BAD_MESSAGE 0x000a 718#define RQCS_NO_MESSAGE_OUT 0x000b 719#define RQCS_EXT_ID_FAILED 0x000c 720#define RQCS_IDE_MSG_FAILED 0x000d 721#define RQCS_ABORT_MSG_FAILED 0x000e 722#define RQCS_REJECT_MSG_FAILED 0x000f 723#define RQCS_NOP_MSG_FAILED 0x0010 724#define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 725#define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 726#define RQCS_ID_MSG_FAILED 0x0013 727#define RQCS_UNEXP_BUS_FREE 0x0014 728#define RQCS_XACT_ERR1 0x0018 729#define RQCS_XACT_ERR2 0x0019 730#define RQCS_XACT_ERR3 0x001A 731#define RQCS_BAD_ENTRY 0x001B 732#define RQCS_PHASE_SKIPPED 0x001D 733#define RQCS_ARQS_FAILED 0x001E 734#define RQCS_WIDE_FAILED 0x001F 735#define RQCS_SYNCXFER_FAILED 0x0020 736#define RQCS_LVD_BUSERR 0x0021 737 738/* 2X00 Only Completion Codes */ 739#define RQCS_PORT_UNAVAILABLE 0x0028 740#define RQCS_PORT_LOGGED_OUT 0x0029 741#define RQCS_PORT_CHANGED 0x002A 742#define RQCS_PORT_BUSY 0x002B 743 744/* 24XX Only Completion Codes */ 745#define RQCS_24XX_DRE 0x0011 /* data reassembly error */ 746#define RQCS_24XX_TABORT 0x0013 /* aborted by target */ 747#define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */ 748#define RQCS_24XX_TMO 0x0030 /* task management overrun */ 749 750 751/* 752 * 1X00 specific State Flags 753 */ 754#define RQSF_GOT_BUS 0x0100 755#define RQSF_GOT_TARGET 0x0200 756#define RQSF_SENT_CDB 0x0400 757#define RQSF_XFRD_DATA 0x0800 758#define RQSF_GOT_STATUS 0x1000 759#define RQSF_GOT_SENSE 0x2000 760#define RQSF_XFER_COMPLETE 0x4000 761 762/* 763 * 2X00 specific State Flags 764 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 765 */ 766#define RQSF_DATA_IN 0x0020 767#define RQSF_DATA_OUT 0x0040 768#define RQSF_STAG 0x0008 769#define RQSF_OTAG 0x0004 770#define RQSF_HTAG 0x0002 771/* 772 * 1X00 Status Flags 773 */ 774#define RQSTF_DISCONNECT 0x0001 775#define RQSTF_SYNCHRONOUS 0x0002 776#define RQSTF_PARITY_ERROR 0x0004 777#define RQSTF_BUS_RESET 0x0008 778#define RQSTF_DEVICE_RESET 0x0010 779#define RQSTF_ABORTED 0x0020 780#define RQSTF_TIMEOUT 0x0040 781#define RQSTF_NEGOTIATION 0x0080 782 783/* 784 * 2X00 specific state flags 785 */ 786/* RQSF_SENT_CDB */ 787/* RQSF_XFRD_DATA */ 788/* RQSF_GOT_STATUS */ 789/* RQSF_XFER_COMPLETE */ 790 791/* 792 * 2X00 specific status flags 793 */ 794/* RQSTF_ABORTED */ 795/* RQSTF_TIMEOUT */ 796#define RQSTF_DMA_ERROR 0x0080 797#define RQSTF_LOGOUT 0x2000 798 799/* 800 * Miscellaneous 801 */ 802#ifndef ISP_EXEC_THROTTLE 803#define ISP_EXEC_THROTTLE 16 804#endif 805 806/* 807 * About Firmware returns an 'attribute' word in mailbox 6. 808 * These attributes are for 2200 and 2300. 809 */ 810#define ISP_FW_ATTR_TMODE 0x0001 811#define ISP_FW_ATTR_SCCLUN 0x0002 812#define ISP_FW_ATTR_FABRIC 0x0004 813#define ISP_FW_ATTR_CLASS2 0x0008 814#define ISP_FW_ATTR_FCTAPE 0x0010 815#define ISP_FW_ATTR_IP 0x0020 816#define ISP_FW_ATTR_VI 0x0040 817#define ISP_FW_ATTR_VI_SOLARIS 0x0080 818#define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */ 819 820/* and these are for the 2400 */ 821#define ISP2400_FW_ATTR_CLASS2 0x0001 822#define ISP2400_FW_ATTR_IP 0x0002 823#define ISP2400_FW_ATTR_MULTIID 0x0004 824#define ISP2400_FW_ATTR_SB2 0x0008 825#define ISP2400_FW_ATTR_T10CRC 0x0010 826#define ISP2400_FW_ATTR_VI 0x0020 827#define ISP2400_FW_ATTR_MQ 0x0040 828#define ISP2400_FW_ATTR_MSIX 0x0080 829#define ISP2400_FW_ATTR_FCOE 0x0800 830#define ISP2400_FW_ATTR_VP0 0x1000 831#define ISP2400_FW_ATTR_EXPFW 0x2000 832#define ISP2400_FW_ATTR_HOTFW 0x4000 833#define ISP2400_FW_ATTR_EXTNDED 0x8000 834#define ISP2400_FW_ATTR_EXTVP 0x00010000 835#define ISP2400_FW_ATTR_VN2VN 0x00040000 836#define ISP2400_FW_ATTR_EXMOFF 0x00080000 837#define ISP2400_FW_ATTR_NPMOFF 0x00100000 838#define ISP2400_FW_ATTR_DIFCHOP 0x00400000 839#define ISP2400_FW_ATTR_SRIOV 0x02000000 840#define ISP2400_FW_ATTR_ASICTMP 0x0200000000 841#define ISP2400_FW_ATTR_ATIOMQ 0x0400000000 842 843/* 844 * These are either manifestly true or are dependent on f/w attributes 845 */ 846#define ISP_CAP_TMODE(isp) \ 847 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE)) 848#define ISP_CAP_SCCFW(isp) \ 849 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN)) 850#define ISP_CAP_2KLOGIN(isp) \ 851 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS)) 852 853/* 854 * This is only true for 24XX cards with this f/w attribute 855 */ 856#define ISP_CAP_MULTI_ID(isp) \ 857 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0) 858#define ISP_GET_VPIDX(isp, tag) \ 859 (ISP_CAP_MULTI_ID(isp) ? tag : 0) 860#define ISP_CAP_VP0(isp) \ 861 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_VP0) : 0) 862 863/* 864 * This is true manifestly or is dependent on a f/w attribute 865 * but may or may not actually be *enabled*. In any case, it 866 * is enabled on a per-channel basis. 867 */ 868#define ISP_CAP_FCTAPE(isp) \ 869 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_FCTAPE)) 870 871#define ISP_FCTAPE_ENABLED(isp, chan) \ 872 (IS_24XX(isp)? (FCPARAM(isp, chan)->isp_xfwoptions & ICB2400_OPT2_FCTAPE) != 0 : (FCPARAM(isp, chan)->isp_xfwoptions & ICBXOPT_FCTAPE) != 0) 873 874/* 875 * Reduced Interrupt Operation Response Queue Entries 876 */ 877 878typedef struct { 879 isphdr_t req_header; 880 uint32_t req_handles[15]; 881} isp_rio1_t; 882 883typedef struct { 884 isphdr_t req_header; 885 uint16_t req_handles[30]; 886} isp_rio2_t; 887 888/* 889 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures 890 */ 891 892/* 893 * Initialization Control Block 894 * 895 * Version One (prime) format. 896 */ 897typedef struct { 898 uint8_t icb_version; 899 uint8_t icb_reserved0; 900 uint16_t icb_fwoptions; 901 uint16_t icb_maxfrmlen; 902 uint16_t icb_maxalloc; 903 uint16_t icb_execthrottle; 904 uint8_t icb_retry_count; 905 uint8_t icb_retry_delay; 906 uint8_t icb_portname[8]; 907 uint16_t icb_hardaddr; 908 uint8_t icb_iqdevtype; 909 uint8_t icb_logintime; 910 uint8_t icb_nodename[8]; 911 uint16_t icb_rqstout; 912 uint16_t icb_rspnsin; 913 uint16_t icb_rqstqlen; 914 uint16_t icb_rsltqlen; 915 uint16_t icb_rqstaddr[4]; 916 uint16_t icb_respaddr[4]; 917 uint16_t icb_lunenables; 918 uint8_t icb_ccnt; 919 uint8_t icb_icnt; 920 uint16_t icb_lunetimeout; 921 uint16_t icb_reserved1; 922 uint16_t icb_xfwoptions; 923 uint8_t icb_racctimer; 924 uint8_t icb_idelaytimer; 925 uint16_t icb_zfwoptions; 926 uint16_t icb_reserved2[13]; 927} isp_icb_t; 928 929#define ICB_VERSION1 1 930 931#define ICBOPT_EXTENDED 0x8000 932#define ICBOPT_BOTH_WWNS 0x4000 933#define ICBOPT_FULL_LOGIN 0x2000 934#define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */ 935#define ICBOPT_PREV_ADDRESS 0x0800 936#define ICBOPT_SRCHDOWN 0x0400 937#define ICBOPT_NOLIP 0x0200 938#define ICBOPT_PDBCHANGE_AE 0x0100 939#define ICBOPT_TGT_TYPE 0x0080 940#define ICBOPT_INI_ADISC 0x0040 941#define ICBOPT_INI_DISABLE 0x0020 942#define ICBOPT_TGT_ENABLE 0x0010 943#define ICBOPT_FAST_POST 0x0008 944#define ICBOPT_FULL_DUPLEX 0x0004 945#define ICBOPT_FAIRNESS 0x0002 946#define ICBOPT_HARD_ADDRESS 0x0001 947 948#define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */ 949#define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */ 950#define ICBXOPT_FCTAPE_CONFIRM 0x2000 951#define ICBXOPT_FCTAPE 0x1000 952#define ICBXOPT_CLASS2_ACK0 0x0200 953#define ICBXOPT_CLASS2 0x0100 954#define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */ 955#define ICBXOPT_TOPO_MASK 0x0070 956#define ICBXOPT_LOOP_ONLY 0x0000 957#define ICBXOPT_PTP_ONLY 0x0010 958#define ICBXOPT_LOOP_2_PTP 0x0020 959#define ICBXOPT_PTP_2_LOOP 0x0030 960/* 961 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits. 962 * RIO is not defined for the 23XX cards (just 2200) 963 */ 964#define ICBXOPT_RIO_OFF 0 965#define ICBXOPT_RIO_16BIT 1 966#define ICBXOPT_RIO_32BIT 2 967#define ICBXOPT_RIO_16BIT_IOCB 3 968#define ICBXOPT_RIO_32BIT_IOCB 4 969#define ICBXOPT_ZIO 5 970#define ICBXOPT_TIMER_MASK 0x7 971 972#define ICBZOPT_RATE_MASK 0xC000 973#define ICBZOPT_RATE_ONEGB 0x0000 974#define ICBZOPT_RATE_AUTO 0x8000 975#define ICBZOPT_RATE_TWOGB 0x4000 976#define ICBZOPT_50_OHM 0x2000 977#define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */ 978#define ICBZOPT_RSPSZ_MASK 0x0030 979#define ICBZOPT_RSPSZ_24 0x0000 980#define ICBZOPT_RSPSZ_12 0x0010 981#define ICBZOPT_RSPSZ_24A 0x0020 982#define ICBZOPT_RSPSZ_32 0x0030 983#define ICBZOPT_SOFTID 0x0002 984#define ICBZOPT_ENA_RDXFR_RDY 0x0001 985 986/* 2400 F/W options */ 987#define ICB2400_OPT1_BOTH_WWNS 0x00004000 988#define ICB2400_OPT1_FULL_LOGIN 0x00002000 989#define ICB2400_OPT1_PREV_ADDRESS 0x00000800 990#define ICB2400_OPT1_SRCHDOWN 0x00000400 991#define ICB2400_OPT1_NOLIP 0x00000200 992#define ICB2400_OPT1_INI_DISABLE 0x00000020 993#define ICB2400_OPT1_TGT_ENABLE 0x00000010 994#define ICB2400_OPT1_FULL_DUPLEX 0x00000004 995#define ICB2400_OPT1_FAIRNESS 0x00000002 996#define ICB2400_OPT1_HARD_ADDRESS 0x00000001 997 998#define ICB2400_OPT2_ENA_ATIOMQ 0x08000000 999#define ICB2400_OPT2_ENA_IHA 0x04000000 1000#define ICB2400_OPT2_QOS 0x02000000 1001#define ICB2400_OPT2_IOCBS 0x01000000 1002#define ICB2400_OPT2_ENA_IHR 0x00400000 1003#define ICB2400_OPT2_ENA_VMS 0x00200000 1004#define ICB2400_OPT2_ENA_TA 0x00100000 1005#define ICB2400_OPT2_TPRLIC 0x00004000 1006#define ICB2400_OPT2_FCTAPE 0x00001000 1007#define ICB2400_OPT2_FCSP 0x00000800 1008#define ICB2400_OPT2_CLASS2_ACK0 0x00000200 1009#define ICB2400_OPT2_CLASS2 0x00000100 1010#define ICB2400_OPT2_NO_PLAY 0x00000080 1011#define ICB2400_OPT2_TOPO_MASK 0x00000070 1012#define ICB2400_OPT2_LOOP_ONLY 0x00000000 1013#define ICB2400_OPT2_PTP_ONLY 0x00000010 1014#define ICB2400_OPT2_LOOP_2_PTP 0x00000020 1015#define ICB2400_OPT2_TIMER_MASK 0x0000000f 1016#define ICB2400_OPT2_ZIO 0x00000005 1017#define ICB2400_OPT2_ZIO1 0x00000006 1018 1019#define ICB2400_OPT3_NO_CTXDIS 0x40000000 1020#define ICB2400_OPT3_ENA_ETH_RESP 0x08000000 1021#define ICB2400_OPT3_ENA_ETH_ATIO 0x04000000 1022#define ICB2400_OPT3_ENA_MFCF 0x00020000 1023#define ICB2400_OPT3_SKIP_FOURGB 0x00010000 1024#define ICB2400_OPT3_RATE_MASK 0x0000E000 1025#define ICB2400_OPT3_RATE_ONEGB 0x00000000 1026#define ICB2400_OPT3_RATE_TWOGB 0x00002000 1027#define ICB2400_OPT3_RATE_AUTO 0x00004000 1028#define ICB2400_OPT3_RATE_FOURGB 0x00006000 1029#define ICB2400_OPT3_RATE_EIGHTGB 0x00008000 1030#define ICB2400_OPT3_RATE_SIXTEENGB 0x0000A000 1031#define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200 1032#define ICB2400_OPT3_NO_N2N_LOGI 0x00000100 1033#define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080 1034#define ICB2400_OPT3_ENA_OOF 0x00000040 1035/* note that a response size flag of zero is reserved! */ 1036#define ICB2400_OPT3_RSPSZ_MASK 0x00000030 1037#define ICB2400_OPT3_RSPSZ_12 0x00000010 1038#define ICB2400_OPT3_RSPSZ_24 0x00000020 1039#define ICB2400_OPT3_RSPSZ_32 0x00000030 1040#define ICB2400_OPT3_SOFTID 0x00000002 1041 1042#define ICB_MIN_FRMLEN 256 1043#define ICB_MAX_FRMLEN 2112 1044#define ICB_DFLT_FRMLEN 1024 1045#define ICB_DFLT_ALLOC 256 1046#define ICB_DFLT_THROTTLE 16 1047#define ICB_DFLT_RDELAY 5 1048#define ICB_DFLT_RCOUNT 3 1049 1050#define ICB_LOGIN_TOV 30 1051#define ICB_LUN_ENABLE_TOV 15 1052 1053 1054/* 1055 * And somebody at QLogic had a great idea that you could just change 1056 * the structure *and* keep the version number the same as the other cards. 1057 */ 1058typedef struct { 1059 uint16_t icb_version; 1060 uint16_t icb_reserved0; 1061 uint16_t icb_maxfrmlen; 1062 uint16_t icb_execthrottle; 1063 uint16_t icb_xchgcnt; 1064 uint16_t icb_hardaddr; 1065 uint8_t icb_portname[8]; 1066 uint8_t icb_nodename[8]; 1067 uint16_t icb_rspnsin; 1068 uint16_t icb_rqstout; 1069 uint16_t icb_retry_count; 1070 uint16_t icb_priout; 1071 uint16_t icb_rsltqlen; 1072 uint16_t icb_rqstqlen; 1073 uint16_t icb_ldn_nols; 1074 uint16_t icb_prqstqlen; 1075 uint16_t icb_rqstaddr[4]; 1076 uint16_t icb_respaddr[4]; 1077 uint16_t icb_priaddr[4]; 1078 uint16_t icb_msixresp; 1079 uint16_t icb_msixatio; 1080 uint16_t icb_reserved1[2]; 1081 uint16_t icb_atio_in; 1082 uint16_t icb_atioqlen; 1083 uint16_t icb_atioqaddr[4]; 1084 uint16_t icb_idelaytimer; 1085 uint16_t icb_logintime; 1086 uint32_t icb_fwoptions1; 1087 uint32_t icb_fwoptions2; 1088 uint32_t icb_fwoptions3; 1089 uint16_t icb_qos; 1090 uint16_t icb_reserved2[3]; 1091 uint16_t icb_enodemac[3]; 1092 uint16_t icb_disctime; 1093 uint16_t icb_reserved3[4]; 1094} isp_icb_2400_t; 1095 1096#define RQRSP_ADDR0015 0 1097#define RQRSP_ADDR1631 1 1098#define RQRSP_ADDR3247 2 1099#define RQRSP_ADDR4863 3 1100 1101 1102#define ICB_NNM0 7 1103#define ICB_NNM1 6 1104#define ICB_NNM2 5 1105#define ICB_NNM3 4 1106#define ICB_NNM4 3 1107#define ICB_NNM5 2 1108#define ICB_NNM6 1 1109#define ICB_NNM7 0 1110 1111#define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 1112 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \ 1113 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \ 1114 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \ 1115 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \ 1116 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \ 1117 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \ 1118 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \ 1119 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff) 1120 1121#define MAKE_WWN_FROM_NODE_NAME(wwn, array) \ 1122 wwn = ((uint64_t) array[ICB_NNM0]) | \ 1123 ((uint64_t) array[ICB_NNM1] << 8) | \ 1124 ((uint64_t) array[ICB_NNM2] << 16) | \ 1125 ((uint64_t) array[ICB_NNM3] << 24) | \ 1126 ((uint64_t) array[ICB_NNM4] << 32) | \ 1127 ((uint64_t) array[ICB_NNM5] << 40) | \ 1128 ((uint64_t) array[ICB_NNM6] << 48) | \ 1129 ((uint64_t) array[ICB_NNM7] << 56) 1130 1131 1132/* 1133 * For MULTI_ID firmware, this describes a 1134 * virtual port entity for getting status. 1135 */ 1136typedef struct { 1137 uint16_t vp_port_status; 1138 uint8_t vp_port_options; 1139 uint8_t vp_port_loopid; 1140 uint8_t vp_port_portname[8]; 1141 uint8_t vp_port_nodename[8]; 1142 uint16_t vp_port_portid_lo; /* not present when trailing icb */ 1143 uint16_t vp_port_portid_hi; /* not present when trailing icb */ 1144} vp_port_info_t; 1145 1146#define ICB2400_VPOPT_ENA_SNSLOGIN 0x00000040 /* Enable SNS Login and SCR for Virtual Ports */ 1147#define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* Target Mode Disabled */ 1148#define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* Initiator Mode Enabled */ 1149#define ICB2400_VPOPT_ENABLED 0x00000008 /* VP Enabled */ 1150#define ICB2400_VPOPT_NOPLAY 0x00000004 /* ID Not Acquired */ 1151#define ICB2400_VPOPT_PREV_ADDRESS 0x00000002 /* Previously Assigned ID */ 1152#define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 /* Hard Assigned ID */ 1153 1154#define ICB2400_VPOPT_WRITE_SIZE 20 1155 1156/* 1157 * For MULTI_ID firmware, we append this structure 1158 * to the isp_icb_2400_t above, followed by a list 1159 * structures that are *most* of the vp_port_info_t. 1160 */ 1161typedef struct { 1162 uint16_t vp_count; 1163 uint16_t vp_global_options; 1164} isp_icb_2400_vpinfo_t; 1165 1166#define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */ 1167#define ICB2400_VPINFO_PORT_OFF(chan) \ 1168 (ICB2400_VPINFO_OFF + \ 1169 sizeof (isp_icb_2400_vpinfo_t) + (chan * ICB2400_VPOPT_WRITE_SIZE)) 1170 1171#define ICB2400_VPGOPT_FCA 0x01 /* Assume Clean Address bit in FLOGI ACC set (works only in static configurations) */ 1172#define ICB2400_VPGOPT_MID_DISABLE 0x02 /* when set, connection mode2 will work with NPIV-capable switched */ 1173#define ICB2400_VPGOPT_VP0_DECOUPLE 0x04 /* Allow VP0 decoupling if firmware supports it */ 1174#define ICB2400_VPGOPT_SUSP_FDISK 0x10 /* Suspend FDISC for Enabled VPs */ 1175#define ICB2400_VPGOPT_GEN_RIDA 0x20 /* Generate RIDA if FLOGI Fails */ 1176 1177typedef struct { 1178 isphdr_t vp_ctrl_hdr; 1179 uint32_t vp_ctrl_handle; 1180 uint16_t vp_ctrl_index_fail; 1181 uint16_t vp_ctrl_status; 1182 uint16_t vp_ctrl_command; 1183 uint16_t vp_ctrl_vp_count; 1184 uint16_t vp_ctrl_idmap[16]; 1185 uint16_t vp_ctrl_reserved[7]; 1186 uint16_t vp_ctrl_fcf_index; 1187} vp_ctrl_info_t; 1188 1189#define VP_CTRL_CMD_ENABLE_VP 0x00 1190#define VP_CTRL_CMD_DISABLE_VP 0x08 1191#define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 0x09 1192#define VP_CTRL_CMD_DISABLE_VP_LOGO 0x0A 1193#define VP_CTRL_CMD_DISABLE_VP_LOGO_ALL 0x0B 1194 1195/* 1196 * We can use this structure for modifying either one or two VP ports after initialization 1197 */ 1198typedef struct { 1199 isphdr_t vp_mod_hdr; 1200 uint32_t vp_mod_hdl; 1201 uint16_t vp_mod_reserved0; 1202 uint16_t vp_mod_status; 1203 uint8_t vp_mod_cmd; 1204 uint8_t vp_mod_cnt; 1205 uint8_t vp_mod_idx0; 1206 uint8_t vp_mod_idx1; 1207 struct { 1208 uint8_t options; 1209 uint8_t loopid; 1210 uint16_t reserved1; 1211 uint8_t wwpn[8]; 1212 uint8_t wwnn[8]; 1213 } vp_mod_ports[2]; 1214 uint8_t vp_mod_reserved2[8]; 1215} vp_modify_t; 1216 1217#define VP_STS_OK 0x00 1218#define VP_STS_ERR 0x01 1219#define VP_CNT_ERR 0x02 1220#define VP_GEN_ERR 0x03 1221#define VP_IDX_ERR 0x04 1222#define VP_STS_BSY 0x05 1223 1224#define VP_MODIFY 0x00 1225#define VP_MODIFY_ENA 0x01 1226#define VP_MODIFY_OPT 0x02 1227#define VP_RESUME 0x03 1228 1229/* 1230 * Port Data Base Element 1231 */ 1232 1233typedef struct { 1234 uint16_t pdb_options; 1235 uint8_t pdb_mstate; 1236 uint8_t pdb_sstate; 1237 uint8_t pdb_hardaddr_bits[4]; 1238 uint8_t pdb_portid_bits[4]; 1239 uint8_t pdb_nodename[8]; 1240 uint8_t pdb_portname[8]; 1241 uint16_t pdb_execthrottle; 1242 uint16_t pdb_exec_count; 1243 uint8_t pdb_retry_count; 1244 uint8_t pdb_retry_delay; 1245 uint16_t pdb_resalloc; 1246 uint16_t pdb_curalloc; 1247 uint16_t pdb_qhead; 1248 uint16_t pdb_qtail; 1249 uint16_t pdb_tl_next; 1250 uint16_t pdb_tl_last; 1251 uint16_t pdb_features; /* PLOGI, Common Service */ 1252 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 1253 uint16_t pdb_roi; /* PLOGI, Common Service */ 1254 uint8_t pdb_target; 1255 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 1256 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */ 1257 uint16_t pdb_ncseq; /* PLOGI, Class 3 */ 1258 uint16_t pdb_noseq; /* PLOGI, Class 3 */ 1259 uint16_t pdb_labrtflg; 1260 uint16_t pdb_lstopflg; 1261 uint16_t pdb_sqhead; 1262 uint16_t pdb_sqtail; 1263 uint16_t pdb_ptimer; 1264 uint16_t pdb_nxt_seqid; 1265 uint16_t pdb_fcount; 1266 uint16_t pdb_prli_len; 1267 uint16_t pdb_prli_svc0; 1268 uint16_t pdb_prli_svc3; 1269 uint16_t pdb_loopid; 1270 uint16_t pdb_il_ptr; 1271 uint16_t pdb_sl_ptr; 1272} isp_pdb_21xx_t; 1273 1274#define PDB_OPTIONS_XMITTING (1<<11) 1275#define PDB_OPTIONS_LNKXMIT (1<<10) 1276#define PDB_OPTIONS_ABORTED (1<<9) 1277#define PDB_OPTIONS_ADISC (1<<1) 1278 1279#define PDB_STATE_DISCOVERY 0 1280#define PDB_STATE_WDISC_ACK 1 1281#define PDB_STATE_PLOGI 2 1282#define PDB_STATE_PLOGI_ACK 3 1283#define PDB_STATE_PRLI 4 1284#define PDB_STATE_PRLI_ACK 5 1285#define PDB_STATE_LOGGED_IN 6 1286#define PDB_STATE_PORT_UNAVAIL 7 1287#define PDB_STATE_PRLO 8 1288#define PDB_STATE_PRLO_ACK 9 1289#define PDB_STATE_PLOGO 10 1290#define PDB_STATE_PLOG_ACK 11 1291 1292#define SVC3_ROLE_MASK 0x30 1293#define SVC3_ROLE_SHIFT 4 1294 1295#define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 1296#define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2]) 1297 1298/* 1299 * Port Data Base Element- 24XX cards 1300 */ 1301typedef struct { 1302 uint16_t pdb_flags; 1303 uint8_t pdb_curstate; 1304 uint8_t pdb_laststate; 1305 uint8_t pdb_hardaddr_bits[4]; 1306 uint8_t pdb_portid_bits[4]; 1307#define pdb_nxt_seqid_2400 pdb_portid_bits[3] 1308 uint16_t pdb_retry_timer; 1309 uint16_t pdb_handle; 1310 uint16_t pdb_rcv_dsize; 1311 uint16_t pdb_reserved0; 1312 uint16_t pdb_prli_svc0; 1313 uint16_t pdb_prli_svc3; 1314 uint8_t pdb_portname[8]; 1315 uint8_t pdb_nodename[8]; 1316 uint8_t pdb_reserved1[24]; 1317} isp_pdb_24xx_t; 1318 1319#define PDB2400_TID_SUPPORTED 0x4000 1320#define PDB2400_FC_TAPE 0x0080 1321#define PDB2400_CLASS2_ACK0 0x0040 1322#define PDB2400_FCP_CONF 0x0020 1323#define PDB2400_CLASS2 0x0010 1324#define PDB2400_ADDR_VALID 0x0002 1325 1326#define PDB2400_STATE_PLOGI_PEND 0x03 1327#define PDB2400_STATE_PLOGI_DONE 0x04 1328#define PDB2400_STATE_PRLI_PEND 0x05 1329#define PDB2400_STATE_LOGGED_IN 0x06 1330#define PDB2400_STATE_PORT_UNAVAIL 0x07 1331#define PDB2400_STATE_PRLO_PEND 0x09 1332#define PDB2400_STATE_LOGO_PEND 0x0B 1333 1334/* 1335 * Common elements from the above two structures that are actually useful to us. 1336 */ 1337typedef struct { 1338 uint16_t handle; 1339 uint16_t prli_word3; 1340 uint32_t : 8, 1341 portid : 24; 1342 uint8_t portname[8]; 1343 uint8_t nodename[8]; 1344} isp_pdb_t; 1345 1346/* 1347 * Port/Node Name List Element 1348 */ 1349typedef struct { 1350 uint8_t pnnle_name[8]; 1351 uint16_t pnnle_handle; 1352 uint16_t pnnle_reserved; 1353} isp_pnnle_t; 1354 1355#define PNNL_OPTIONS_NODE_NAMES (1<<0) 1356#define PNNL_OPTIONS_PORT_DATA (1<<2) 1357#define PNNL_OPTIONS_INITIATORS (1<<3) 1358 1359/* 1360 * Port and N-Port Handle List Element 1361 */ 1362typedef struct { 1363 uint16_t pnhle_port_id_lo; 1364 uint16_t pnhle_port_id_hi_handle; 1365} isp_pnhle_21xx_t; 1366 1367typedef struct { 1368 uint16_t pnhle_port_id_lo; 1369 uint16_t pnhle_port_id_hi; 1370 uint16_t pnhle_handle; 1371} isp_pnhle_23xx_t; 1372 1373typedef struct { 1374 uint16_t pnhle_port_id_lo; 1375 uint16_t pnhle_port_id_hi; 1376 uint16_t pnhle_handle; 1377 uint16_t pnhle_reserved; 1378} isp_pnhle_24xx_t; 1379 1380/* 1381 * Port Database Changed Async Event information for 24XX cards 1382 */ 1383#define PDB24XX_AE_OK 0x00 1384#define PDB24XX_AE_IMPL_LOGO_1 0x01 1385#define PDB24XX_AE_IMPL_LOGO_2 0x02 1386#define PDB24XX_AE_IMPL_LOGO_3 0x03 1387#define PDB24XX_AE_PLOGI_RCVD 0x04 1388#define PDB24XX_AE_PLOGI_RJT 0x05 1389#define PDB24XX_AE_PRLI_RCVD 0x06 1390#define PDB24XX_AE_PRLI_RJT 0x07 1391#define PDB24XX_AE_TPRLO 0x08 1392#define PDB24XX_AE_TPRLO_RJT 0x09 1393#define PDB24XX_AE_PRLO_RCVD 0x0a 1394#define PDB24XX_AE_LOGO_RCVD 0x0b 1395#define PDB24XX_AE_TOPO_CHG 0x0c 1396#define PDB24XX_AE_NPORT_CHG 0x0d 1397#define PDB24XX_AE_FLOGI_RJT 0x0e 1398#define PDB24XX_AE_BAD_FANN 0x0f 1399#define PDB24XX_AE_FLOGI_TIMO 0x10 1400#define PDB24XX_AE_ABX_LOGO 0x11 1401#define PDB24XX_AE_PLOGI_DONE 0x12 1402#define PDB24XX_AE_PRLI_DONJE 0x13 1403#define PDB24XX_AE_OPN_1 0x14 1404#define PDB24XX_AE_OPN_2 0x15 1405#define PDB24XX_AE_TXERR 0x16 1406#define PDB24XX_AE_FORCED_LOGO 0x17 1407#define PDB24XX_AE_DISC_TIMO 0x18 1408 1409/* 1410 * Genericized Port Login/Logout software structure 1411 */ 1412typedef struct { 1413 uint16_t handle; 1414 uint16_t channel; 1415 uint32_t 1416 flags : 8, 1417 portid : 24; 1418} isp_plcmd_t; 1419/* the flags to use are those for PLOGX_FLG_* below */ 1420 1421/* 1422 * ISP24XX- Login/Logout Port IOCB 1423 */ 1424typedef struct { 1425 isphdr_t plogx_header; 1426 uint32_t plogx_handle; 1427 uint16_t plogx_status; 1428 uint16_t plogx_nphdl; 1429 uint16_t plogx_flags; 1430 uint16_t plogx_vphdl; /* low 8 bits */ 1431 uint16_t plogx_portlo; /* low 16 bits */ 1432 uint16_t plogx_rspsz_porthi; 1433 struct { 1434 uint16_t lo16; 1435 uint16_t hi16; 1436 } plogx_ioparm[11]; 1437} isp_plogx_t; 1438 1439#define PLOGX_STATUS_OK 0x00 1440#define PLOGX_STATUS_UNAVAIL 0x28 1441#define PLOGX_STATUS_LOGOUT 0x29 1442#define PLOGX_STATUS_IOCBERR 0x31 1443 1444#define PLOGX_IOCBERR_NOLINK 0x01 1445#define PLOGX_IOCBERR_NOIOCB 0x02 1446#define PLOGX_IOCBERR_NOXGHG 0x03 1447#define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */ 1448#define PLOGX_IOCBERR_NOFABRIC 0x05 1449#define PLOGX_IOCBERR_NOTREADY 0x07 1450#define PLOGX_IOCBERR_NOLOGIN 0x09 /* further info in IOPARM 1 */ 1451#define PLOGX_IOCBERR_NOPCB 0x0a 1452#define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */ 1453#define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */ 1454#define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */ 1455#define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */ 1456#define PLOGX_IOCBERR_NOHANDLE 0x1c 1457#define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */ 1458 1459#define PLOGX_FLG_CMD_MASK 0xf 1460#define PLOGX_FLG_CMD_PLOGI 0 1461#define PLOGX_FLG_CMD_PRLI 1 1462#define PLOGX_FLG_CMD_PDISC 2 1463#define PLOGX_FLG_CMD_LOGO 8 1464#define PLOGX_FLG_CMD_PRLO 9 1465#define PLOGX_FLG_CMD_TPRLO 10 1466 1467#define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */ 1468#define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */ 1469#define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */ 1470#define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */ 1471#define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */ 1472#define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */ 1473#define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */ 1474 1475#define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */ 1476#define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */ 1477 1478/* 1479 * Report ID Acquisistion (24XX multi-id firmware) 1480 */ 1481typedef struct { 1482 isphdr_t ridacq_hdr; 1483 uint32_t ridacq_handle; 1484 union { 1485 struct { 1486 uint8_t ridacq_vp_acquired; 1487 uint8_t ridacq_vp_setup; 1488 uint16_t ridacq_reserved0; 1489 } type0; /* type 0 */ 1490 struct { 1491 uint16_t ridacq_vp_count; 1492 uint8_t ridacq_vp_index; 1493 uint8_t ridacq_vp_status; 1494 } type1; /* type 1 */ 1495 } un; 1496 uint16_t ridacq_vp_port_lo; 1497 uint8_t ridacq_vp_port_hi; 1498 uint8_t ridacq_format; /* 0 or 1 */ 1499 uint16_t ridacq_map[8]; 1500 uint8_t ridacq_reserved1[32]; 1501} isp_ridacq_t; 1502 1503#define RIDACQ_STS_COMPLETE 0 1504#define RIDACQ_STS_UNACQUIRED 1 1505#define RIDACQ_STS_CHANGED 20 1506 1507 1508/* 1509 * Simple Name Server Data Structures 1510 */ 1511#define SNS_GA_NXT 0x100 1512#define SNS_GPN_ID 0x112 1513#define SNS_GNN_ID 0x113 1514#define SNS_GFF_ID 0x11F 1515#define SNS_GID_FT 0x171 1516#define SNS_RFT_ID 0x217 1517typedef struct { 1518 uint16_t snscb_rblen; /* response buffer length (words) */ 1519 uint16_t snscb_reserved0; 1520 uint16_t snscb_addr[4]; /* response buffer address */ 1521 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1522 uint16_t snscb_reserved1; 1523 uint16_t snscb_data[]; /* variable data */ 1524} sns_screq_t; /* Subcommand Request Structure */ 1525 1526typedef struct { 1527 uint16_t snscb_rblen; /* response buffer length (words) */ 1528 uint16_t snscb_reserved0; 1529 uint16_t snscb_addr[4]; /* response buffer address */ 1530 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1531 uint16_t snscb_reserved1; 1532 uint16_t snscb_cmd; 1533 uint16_t snscb_reserved2; 1534 uint32_t snscb_reserved3; 1535 uint32_t snscb_port; 1536} sns_ga_nxt_req_t; 1537#define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t)) 1538 1539typedef struct { 1540 uint16_t snscb_rblen; /* response buffer length (words) */ 1541 uint16_t snscb_reserved0; 1542 uint16_t snscb_addr[4]; /* response buffer address */ 1543 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1544 uint16_t snscb_reserved1; 1545 uint16_t snscb_cmd; 1546 uint16_t snscb_reserved2; 1547 uint32_t snscb_reserved3; 1548 uint32_t snscb_portid; 1549} sns_gxn_id_req_t; 1550#define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t)) 1551 1552typedef struct { 1553 uint16_t snscb_rblen; /* response buffer length (words) */ 1554 uint16_t snscb_reserved0; 1555 uint16_t snscb_addr[4]; /* response buffer address */ 1556 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1557 uint16_t snscb_reserved1; 1558 uint16_t snscb_cmd; 1559 uint16_t snscb_mword_div_2; 1560 uint32_t snscb_reserved3; 1561 uint32_t snscb_fc4_type; 1562} sns_gid_ft_req_t; 1563#define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t)) 1564 1565typedef struct { 1566 uint16_t snscb_rblen; /* response buffer length (words) */ 1567 uint16_t snscb_reserved0; 1568 uint16_t snscb_addr[4]; /* response buffer address */ 1569 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1570 uint16_t snscb_reserved1; 1571 uint16_t snscb_cmd; 1572 uint16_t snscb_reserved2; 1573 uint32_t snscb_reserved3; 1574 uint32_t snscb_port; 1575 uint32_t snscb_fc4_types[8]; 1576} sns_rft_id_req_t; 1577#define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t)) 1578 1579typedef struct { 1580 ct_hdr_t snscb_cthdr; 1581 uint8_t snscb_port_type; 1582 uint8_t snscb_port_id[3]; 1583 uint8_t snscb_portname[8]; 1584 uint16_t snscb_data[]; /* variable data */ 1585} sns_scrsp_t; /* Subcommand Response Structure */ 1586 1587typedef struct { 1588 ct_hdr_t snscb_cthdr; 1589 uint8_t snscb_port_type; 1590 uint8_t snscb_port_id[3]; 1591 uint8_t snscb_portname[8]; 1592 uint8_t snscb_pnlen; /* symbolic port name length */ 1593 uint8_t snscb_pname[255]; /* symbolic port name */ 1594 uint8_t snscb_nodename[8]; 1595 uint8_t snscb_nnlen; /* symbolic node name length */ 1596 uint8_t snscb_nname[255]; /* symbolic node name */ 1597 uint8_t snscb_ipassoc[8]; 1598 uint8_t snscb_ipaddr[16]; 1599 uint8_t snscb_svc_class[4]; 1600 uint8_t snscb_fc4_types[32]; 1601 uint8_t snscb_fpname[8]; 1602 uint8_t snscb_reserved; 1603 uint8_t snscb_hardaddr[3]; 1604} sns_ga_nxt_rsp_t; /* Subcommand Response Structure */ 1605#define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t)) 1606 1607typedef struct { 1608 ct_hdr_t snscb_cthdr; 1609 uint8_t snscb_wwn[8]; 1610} sns_gxn_id_rsp_t; 1611#define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t)) 1612 1613typedef struct { 1614 ct_hdr_t snscb_cthdr; 1615 uint32_t snscb_fc4_features[32]; 1616} sns_gff_id_rsp_t; 1617#define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t)) 1618 1619typedef struct { 1620 ct_hdr_t snscb_cthdr; 1621 struct { 1622 uint8_t control; 1623 uint8_t portid[3]; 1624 } snscb_ports[1]; 1625} sns_gid_ft_rsp_t; 1626#define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2)) 1627#define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t)) 1628 1629/* 1630 * Other Misc Structures 1631 */ 1632 1633/* ELS Pass Through */ 1634typedef struct { 1635 isphdr_t els_hdr; 1636 uint32_t els_handle; 1637 uint16_t els_status; 1638 uint16_t els_nphdl; 1639 uint16_t els_xmit_dsd_count; /* outgoing only */ 1640 uint8_t els_vphdl; 1641 uint8_t els_sof; 1642 uint32_t els_rxid; 1643 uint16_t els_recv_dsd_count; /* outgoing only */ 1644 uint8_t els_opcode; 1645 uint8_t els_reserved1; 1646 uint8_t els_did_lo; 1647 uint8_t els_did_mid; 1648 uint8_t els_did_hi; 1649 uint8_t els_reserved2; 1650 uint16_t els_reserved3; 1651 uint16_t els_ctl_flags; 1652 union { 1653 struct { 1654 uint32_t _els_bytecnt; 1655 uint32_t _els_subcode1; 1656 uint32_t _els_subcode2; 1657 uint8_t _els_reserved4[20]; 1658 } in; 1659 struct { 1660 uint32_t _els_recv_bytecnt; 1661 uint32_t _els_xmit_bytecnt; 1662 uint32_t _els_xmit_dsd_length; 1663 uint16_t _els_xmit_dsd_a1500; 1664 uint16_t _els_xmit_dsd_a3116; 1665 uint16_t _els_xmit_dsd_a4732; 1666 uint16_t _els_xmit_dsd_a6348; 1667 uint32_t _els_recv_dsd_length; 1668 uint16_t _els_recv_dsd_a1500; 1669 uint16_t _els_recv_dsd_a3116; 1670 uint16_t _els_recv_dsd_a4732; 1671 uint16_t _els_recv_dsd_a6348; 1672 } out; 1673 } inout; 1674#define els_bytecnt inout.in._els_bytecnt 1675#define els_subcode1 inout.in._els_subcode1 1676#define els_subcode2 inout.in._els_subcode2 1677#define els_reserved4 inout.in._els_reserved4 1678#define els_recv_bytecnt inout.out._els_recv_bytecnt 1679#define els_xmit_bytecnt inout.out._els_xmit_bytecnt 1680#define els_xmit_dsd_length inout.out._els_xmit_dsd_length 1681#define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500 1682#define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116 1683#define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732 1684#define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348 1685#define els_recv_dsd_length inout.out._els_recv_dsd_length 1686#define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500 1687#define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116 1688#define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732 1689#define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348 1690} els_t; 1691 1692/* 1693 * A handy package structure for running FC-SCSI commands internally 1694 */ 1695typedef struct { 1696 uint16_t handle; 1697 uint16_t lun; 1698 uint32_t 1699 channel : 8, 1700 portid : 24; 1701 uint32_t timeout; 1702 union { 1703 struct { 1704 uint32_t data_length; 1705 uint32_t 1706 no_wait : 1, 1707 do_read : 1; 1708 uint8_t cdb[16]; 1709 void *data_ptr; 1710 } beg; 1711 struct { 1712 uint32_t data_residual; 1713 uint8_t status; 1714 uint8_t pad; 1715 uint16_t sense_length; 1716 uint8_t sense_data[32]; 1717 } end; 1718 } fcd; 1719} isp_xcmd_t; 1720 1721/* 1722 * Target Mode related definitions 1723 */ 1724#define QLTM_SENSELEN 18 /* non-FC cards only */ 1725#define QLTM_SVALID 0x80 1726 1727/* 1728 * Structure for Enable Lun and Modify Lun queue entries 1729 */ 1730typedef struct { 1731 isphdr_t le_header; 1732 uint32_t le_reserved; 1733 uint8_t le_lun; 1734 uint8_t le_rsvd; 1735 uint8_t le_ops; /* Modify LUN only */ 1736 uint8_t le_tgt; /* Not for FC */ 1737 uint32_t le_flags; /* Not for FC */ 1738 uint8_t le_status; 1739 uint8_t le_reserved2; 1740 uint8_t le_cmd_count; 1741 uint8_t le_in_count; 1742 uint8_t le_cdb6len; /* Not for FC */ 1743 uint8_t le_cdb7len; /* Not for FC */ 1744 uint16_t le_timeout; 1745 uint16_t le_reserved3[20]; 1746} lun_entry_t; 1747 1748/* 1749 * le_flags values 1750 */ 1751#define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */ 1752#define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */ 1753#define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */ 1754#define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */ 1755 1756/* 1757 * le_ops values 1758 */ 1759#define LUN_CCINCR 0x01 /* increment command count */ 1760#define LUN_CCDECR 0x02 /* decrement command count */ 1761#define LUN_ININCR 0x40 /* increment immed. notify count */ 1762#define LUN_INDECR 0x80 /* decrement immed. notify count */ 1763 1764/* 1765 * le_status values 1766 */ 1767#define LUN_OK 0x01 /* we be rockin' */ 1768#define LUN_ERR 0x04 /* request completed with error */ 1769#define LUN_INVAL 0x06 /* invalid request */ 1770#define LUN_NOCAP 0x16 /* can't provide requested capability */ 1771#define LUN_ENABLED 0x3E /* LUN already enabled */ 1772 1773/* 1774 * Immediate Notify Entry structure 1775 */ 1776#define IN_MSGLEN 8 /* 8 bytes */ 1777#define IN_RSVDLEN 8 /* 8 words */ 1778typedef struct { 1779 isphdr_t in_header; 1780 uint32_t in_reserved; 1781 uint8_t in_lun; /* lun */ 1782 uint8_t in_iid; /* initiator */ 1783 uint8_t in_reserved2; 1784 uint8_t in_tgt; /* target */ 1785 uint32_t in_flags; 1786 uint8_t in_status; 1787 uint8_t in_rsvd2; 1788 uint8_t in_tag_val; /* tag value */ 1789 uint8_t in_tag_type; /* tag type */ 1790 uint16_t in_seqid; /* sequence id */ 1791 uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 1792 uint16_t in_reserved3[IN_RSVDLEN]; 1793 uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */ 1794} in_entry_t; 1795 1796typedef struct { 1797 isphdr_t in_header; 1798 uint32_t in_reserved; 1799 uint8_t in_lun; /* lun */ 1800 uint8_t in_iid; /* initiator */ 1801 uint16_t in_scclun; 1802 uint32_t in_reserved2; 1803 uint16_t in_status; 1804 uint16_t in_task_flags; 1805 uint16_t in_seqid; /* sequence id */ 1806} in_fcentry_t; 1807 1808typedef struct { 1809 isphdr_t in_header; 1810 uint32_t in_reserved; 1811 uint16_t in_iid; /* initiator */ 1812 uint16_t in_scclun; 1813 uint32_t in_reserved2; 1814 uint16_t in_status; 1815 uint16_t in_task_flags; 1816 uint16_t in_seqid; /* sequence id */ 1817} in_fcentry_e_t; 1818 1819/* 1820 * Values for the in_status field 1821 */ 1822#define IN_REJECT 0x0D /* Message Reject message received */ 1823#define IN_RESET 0x0E /* Bus Reset occurred */ 1824#define IN_NO_RCAP 0x16 /* requested capability not available */ 1825#define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 1826#define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 1827#define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 1828#define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 1829#define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 1830#define IN_PORT_CHANGED 0x2A /* port changed */ 1831#define IN_GLOBAL_LOGO 0x2E /* all ports logged out */ 1832#define IN_NO_NEXUS 0x3B /* Nexus not established */ 1833#define IN_SRR_RCVD 0x45 /* SRR received */ 1834 1835/* 1836 * Values for the in_task_flags field- should only get one at a time! 1837 */ 1838#define TASK_FLAGS_RESERVED_MASK (0xe700) 1839#define TASK_FLAGS_CLEAR_ACA (1<<14) 1840#define TASK_FLAGS_TARGET_RESET (1<<13) 1841#define TASK_FLAGS_LUN_RESET (1<<12) 1842#define TASK_FLAGS_CLEAR_TASK_SET (1<<10) 1843#define TASK_FLAGS_ABORT_TASK_SET (1<<9) 1844 1845/* 1846 * ISP24XX Immediate Notify 1847 */ 1848typedef struct { 1849 isphdr_t in_header; 1850 uint32_t in_reserved; 1851 uint16_t in_nphdl; 1852 uint16_t in_reserved1; 1853 uint16_t in_flags; 1854 uint16_t in_srr_rxid; 1855 uint16_t in_status; 1856 uint8_t in_status_subcode; 1857 uint8_t in_fwhandle; 1858 uint32_t in_rxid; 1859 uint16_t in_srr_reloff_lo; 1860 uint16_t in_srr_reloff_hi; 1861 uint16_t in_srr_iu; 1862 uint16_t in_srr_oxid; 1863 /* 1864 * If bit 2 is set in in_flags, the N-Port and 1865 * handle tags are valid. If the received ELS is 1866 * a LOGO, then these tags contain the N Port ID 1867 * from the LOGO payload. If the received ELS 1868 * request is TPRLO, these tags contain the 1869 * Third Party Originator N Port ID. 1870 */ 1871 uint16_t in_nport_id_hi; 1872#define in_prli_options in_nport_id_hi 1873 uint8_t in_nport_id_lo; 1874 uint8_t in_reserved3; 1875 uint16_t in_np_handle; 1876 uint8_t in_reserved4[12]; 1877 uint8_t in_reserved5; 1878 uint8_t in_vpidx; 1879 uint32_t in_reserved6; 1880 uint16_t in_portid_lo; 1881 uint8_t in_portid_hi; 1882 uint8_t in_reserved7; 1883 uint16_t in_reserved8; 1884 uint16_t in_oxid; 1885} in_fcentry_24xx_t; 1886 1887#define IN24XX_FLAG_PUREX_IOCB 0x1 1888#define IN24XX_FLAG_GLOBAL_LOGOUT 0x2 1889#define IN24XX_FLAG_NPHDL_VALID 0x4 1890#define IN24XX_FLAG_N2N_PRLI 0x8 1891#define IN24XX_FLAG_PN_NN_VALID 0x10 1892 1893#define IN24XX_LIP_RESET 0x0E 1894#define IN24XX_LINK_RESET 0x0F 1895#define IN24XX_PORT_LOGOUT 0x29 1896#define IN24XX_PORT_CHANGED 0x2A 1897#define IN24XX_LINK_FAILED 0x2E 1898#define IN24XX_SRR_RCVD 0x45 1899#define IN24XX_ELS_RCVD 0x46 /* 1900 * login-affectin ELS received- check 1901 * subcode for specific opcode 1902 */ 1903 1904/* 1905 * For f/w > 4.0.25, these offsets in the Immediate Notify contain 1906 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in 1907 * Big Endian format. 1908 */ 1909#define IN24XX_PRLI_WWNN_OFF 0x18 1910#define IN24XX_PRLI_WWPN_OFF 0x28 1911#define IN24XX_PLOGI_WWNN_OFF 0x20 1912#define IN24XX_PLOGI_WWPN_OFF 0x28 1913 1914/* 1915 * For f/w > 4.0.25, this offset in the Immediate Notify contain 1916 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format. 1917 */ 1918#define IN24XX_LOGO_WWPN_OFF 0x28 1919 1920/* 1921 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT 1922 */ 1923#define IN24XX_PORT_LOGOUT_PDISC_TMO 0x00 1924#define IN24XX_PORT_LOGOUT_UXPR_DISC 0x01 1925#define IN24XX_PORT_LOGOUT_OWN_OPN 0x02 1926#define IN24XX_PORT_LOGOUT_OWN_OPN_SFT 0x03 1927#define IN24XX_PORT_LOGOUT_ABTS_TMO 0x04 1928#define IN24XX_PORT_LOGOUT_DISC_RJT 0x05 1929#define IN24XX_PORT_LOGOUT_LOGIN_NEEDED 0x06 1930#define IN24XX_PORT_LOGOUT_BAD_DISC 0x07 1931#define IN24XX_PORT_LOGOUT_LOST_ALPA 0x08 1932#define IN24XX_PORT_LOGOUT_XMIT_FAILURE 0x09 1933 1934/* 1935 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED 1936 */ 1937#define IN24XX_PORT_CHANGED_BADFAN 0x00 1938#define IN24XX_PORT_CHANGED_TOPO_CHANGE 0x01 1939#define IN24XX_PORT_CHANGED_FLOGI_ACC 0x02 1940#define IN24XX_PORT_CHANGED_FLOGI_RJT 0x03 1941#define IN24XX_PORT_CHANGED_TIMEOUT 0x04 1942#define IN24XX_PORT_CHANGED_PORT_CHANGE 0x05 1943 1944/* 1945 * Notify Acknowledge Entry structure 1946 */ 1947#define NA_RSVDLEN 22 1948typedef struct { 1949 isphdr_t na_header; 1950 uint32_t na_reserved; 1951 uint8_t na_lun; /* lun */ 1952 uint8_t na_iid; /* initiator */ 1953 uint8_t na_reserved2; 1954 uint8_t na_tgt; /* target */ 1955 uint32_t na_flags; 1956 uint8_t na_status; 1957 uint8_t na_event; 1958 uint16_t na_seqid; /* sequence id */ 1959 uint16_t na_reserved3[NA_RSVDLEN]; 1960} na_entry_t; 1961 1962/* 1963 * Value for the na_event field 1964 */ 1965#define NA_RST_CLRD 0x80 /* Clear an async event notification */ 1966#define NA_OK 0x01 /* Notify Acknowledge Succeeded */ 1967#define NA_INVALID 0x06 /* Invalid Notify Acknowledge */ 1968 1969#define NA2_RSVDLEN 21 1970typedef struct { 1971 isphdr_t na_header; 1972 uint32_t na_reserved; 1973 uint8_t na_reserved1; 1974 uint8_t na_iid; /* initiator loop id */ 1975 uint16_t na_response; 1976 uint16_t na_flags; 1977 uint16_t na_reserved2; 1978 uint16_t na_status; 1979 uint16_t na_task_flags; 1980 uint16_t na_seqid; /* sequence id */ 1981 uint16_t na_reserved3[NA2_RSVDLEN]; 1982} na_fcentry_t; 1983 1984typedef struct { 1985 isphdr_t na_header; 1986 uint32_t na_reserved; 1987 uint16_t na_iid; /* initiator loop id */ 1988 uint16_t na_response; /* response code */ 1989 uint16_t na_flags; 1990 uint16_t na_reserved2; 1991 uint16_t na_status; 1992 uint16_t na_task_flags; 1993 uint16_t na_seqid; /* sequence id */ 1994 uint16_t na_reserved3[NA2_RSVDLEN]; 1995} na_fcentry_e_t; 1996 1997#define NAFC_RCOUNT 0x80 /* increment resource count */ 1998#define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */ 1999#define NAFC_TVALID 0x10 /* task mangement response code is valid */ 2000 2001/* 2002 * ISP24XX Notify Acknowledge 2003 */ 2004 2005typedef struct { 2006 isphdr_t na_header; 2007 uint32_t na_handle; 2008 uint16_t na_nphdl; 2009 uint16_t na_reserved1; 2010 uint16_t na_flags; 2011 uint16_t na_srr_rxid; 2012 uint16_t na_status; 2013 uint8_t na_status_subcode; 2014 uint8_t na_fwhandle; 2015 uint32_t na_rxid; 2016 uint16_t na_srr_reloff_lo; 2017 uint16_t na_srr_reloff_hi; 2018 uint16_t na_srr_iu; 2019 uint16_t na_srr_flags; 2020 uint8_t na_reserved3[18]; 2021 uint8_t na_reserved4; 2022 uint8_t na_vpidx; 2023 uint8_t na_srr_reject_vunique; 2024 uint8_t na_srr_reject_explanation; 2025 uint8_t na_srr_reject_code; 2026 uint8_t na_reserved5; 2027 uint8_t na_reserved6[6]; 2028 uint16_t na_oxid; 2029} na_fcentry_24xx_t; 2030 2031/* 2032 * Accept Target I/O Entry structure 2033 */ 2034#define ATIO_CDBLEN 26 2035 2036typedef struct { 2037 isphdr_t at_header; 2038 uint16_t at_reserved; 2039 uint16_t at_handle; 2040 uint8_t at_lun; /* lun */ 2041 uint8_t at_iid; /* initiator */ 2042 uint8_t at_cdblen; /* cdb length */ 2043 uint8_t at_tgt; /* target */ 2044 uint32_t at_flags; 2045 uint8_t at_status; /* firmware status */ 2046 uint8_t at_scsi_status; /* scsi status */ 2047 uint8_t at_tag_val; /* tag value */ 2048 uint8_t at_tag_type; /* tag type */ 2049 uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 2050 uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */ 2051} at_entry_t; 2052 2053/* 2054 * at_flags values 2055 */ 2056#define AT_NODISC 0x00008000 /* disconnect disabled */ 2057#define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */ 2058 2059/* 2060 * at_status values 2061 */ 2062#define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 2063#define AT_RESET 0x0E /* SCSI Bus Reset Occurred */ 2064#define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2065#define AT_NOCAP 0x16 /* Requested capability not available */ 2066#define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2067#define AT_CDB 0x3D /* CDB received */ 2068/* 2069 * Macros to create and fetch and test concatenated handle and tag value macros 2070 * (SPI only) 2071 */ 2072#define AT_MAKE_TAGID(tid, aep) \ 2073 tid = aep->at_handle; \ 2074 if (aep->at_flags & AT_TQAE) { \ 2075 tid |= (aep->at_tag_val << 16); \ 2076 tid |= (1 << 24); \ 2077 } 2078 2079#define CT_MAKE_TAGID(tid, ct) \ 2080 tid = ct->ct_fwhandle; \ 2081 if (ct->ct_flags & CT_TQAE) { \ 2082 tid |= (ct->ct_tag_val << 16); \ 2083 tid |= (1 << 24); \ 2084 } 2085 2086#define AT_HAS_TAG(val) ((val) & (1 << 24)) 2087#define AT_GET_TAG(val) (((val) >> 16) & 0xff) 2088#define AT_GET_HANDLE(val) ((val) & 0xffff) 2089 2090#define IN_MAKE_TAGID(tid, inp) \ 2091 tid = inp->in_seqid; \ 2092 tid |= (inp->in_tag_val << 16); \ 2093 tid |= (1 << 24) 2094 2095/* 2096 * Accept Target I/O Entry structure, Type 2 2097 */ 2098#define ATIO2_CDBLEN 16 2099 2100typedef struct { 2101 isphdr_t at_header; 2102 uint32_t at_reserved; 2103 uint8_t at_lun; /* lun or reserved */ 2104 uint8_t at_iid; /* initiator */ 2105 uint16_t at_rxid; /* response ID */ 2106 uint16_t at_flags; 2107 uint16_t at_status; /* firmware status */ 2108 uint8_t at_crn; /* command reference number */ 2109 uint8_t at_taskcodes; 2110 uint8_t at_taskflags; 2111 uint8_t at_execodes; 2112 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2113 uint32_t at_datalen; /* allocated data len */ 2114 uint16_t at_scclun; /* SCC Lun or reserved */ 2115 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2116 uint16_t at_reserved2[6]; 2117 uint16_t at_oxid; 2118} at2_entry_t; 2119 2120typedef struct { 2121 isphdr_t at_header; 2122 uint32_t at_reserved; 2123 uint16_t at_iid; /* initiator */ 2124 uint16_t at_rxid; /* response ID */ 2125 uint16_t at_flags; 2126 uint16_t at_status; /* firmware status */ 2127 uint8_t at_crn; /* command reference number */ 2128 uint8_t at_taskcodes; 2129 uint8_t at_taskflags; 2130 uint8_t at_execodes; 2131 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2132 uint32_t at_datalen; /* allocated data len */ 2133 uint16_t at_scclun; /* SCC Lun or reserved */ 2134 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2135 uint16_t at_reserved2[6]; 2136 uint16_t at_oxid; 2137} at2e_entry_t; 2138 2139#define ATIO2_WWPN_OFFSET 0x2A 2140#define ATIO2_OXID_OFFSET 0x3E 2141 2142#define ATIO2_TC_ATTR_MASK 0x7 2143#define ATIO2_TC_ATTR_SIMPLEQ 0 2144#define ATIO2_TC_ATTR_HEADOFQ 1 2145#define ATIO2_TC_ATTR_ORDERED 2 2146#define ATIO2_TC_ATTR_ACAQ 4 2147#define ATIO2_TC_ATTR_UNTAGGED 5 2148 2149#define ATIO2_EX_WRITE 0x1 2150#define ATIO2_EX_READ 0x2 2151/* 2152 * Macros to create and fetch and test concatenated handle and tag value macros 2153 */ 2154#define AT2_MAKE_TAGID(tid, bus, inst, aep) \ 2155 tid = aep->at_rxid; \ 2156 tid |= (((uint64_t)inst) << 32); \ 2157 tid |= (((uint64_t)bus) << 48) 2158 2159#define CT2_MAKE_TAGID(tid, bus, inst, ct) \ 2160 tid = ct->ct_rxid; \ 2161 tid |= (((uint64_t)inst) << 32); \ 2162 tid |= (((uint64_t)(bus & 0xff)) << 48) 2163 2164#define AT2_HAS_TAG(val) 1 2165#define AT2_GET_TAG(val) ((val) & 0xffffffff) 2166#define AT2_GET_INST(val) (((val) >> 32) & 0xffff) 2167#define AT2_GET_HANDLE AT2_GET_TAG 2168#define AT2_GET_BUS(val) (((val) >> 48) & 0xff) 2169 2170#define FC_HAS_TAG AT2_HAS_TAG 2171#define FC_GET_TAG AT2_GET_TAG 2172#define FC_GET_INST AT2_GET_INST 2173#define FC_GET_HANDLE AT2_GET_HANDLE 2174 2175#define IN_FC_MAKE_TAGID(tid, bus, inst, seqid) \ 2176 tid = seqid; \ 2177 tid |= (((uint64_t)inst) << 32); \ 2178 tid |= (((uint64_t)(bus & 0xff)) << 48) 2179 2180#define FC_TAG_INSERT_INST(tid, inst) \ 2181 tid &= ~0x0000ffff00000000ull; \ 2182 tid |= (((uint64_t)inst) << 32) 2183 2184/* 2185 * 24XX ATIO Definition 2186 * 2187 * This is *quite* different from other entry types. 2188 * First of all, it has its own queue it comes in on. 2189 * 2190 * Secondly, it doesn't have a normal header. 2191 * 2192 * Thirdly, it's just a passthru of the FCP CMND IU 2193 * which is recorded in big endian mode. 2194 */ 2195typedef struct { 2196 uint8_t at_type; 2197 uint8_t at_count; 2198 /* 2199 * Task attribute in high four bits, 2200 * the rest is the FCP CMND IU Length. 2201 * NB: the command can extend past the 2202 * length for a single queue entry. 2203 */ 2204 uint16_t at_ta_len; 2205 uint32_t at_rxid; 2206 fc_hdr_t at_hdr; 2207 fcp_cmnd_iu_t at_cmnd; 2208} at7_entry_t; 2209#define AT7_NORESRC_RXID 0xffffffff 2210 2211 2212/* 2213 * Continue Target I/O Entry structure 2214 * Request from driver. The response from the 2215 * ISP firmware is the same except that the last 18 2216 * bytes are overwritten by suggested sense data if 2217 * the 'autosense valid' bit is set in the status byte. 2218 */ 2219typedef struct { 2220 isphdr_t ct_header; 2221 uint16_t ct_syshandle; 2222 uint16_t ct_fwhandle; /* required by f/w */ 2223 uint8_t ct_lun; /* lun */ 2224 uint8_t ct_iid; /* initiator id */ 2225 uint8_t ct_reserved2; 2226 uint8_t ct_tgt; /* our target id */ 2227 uint32_t ct_flags; 2228 uint8_t ct_status; /* isp status */ 2229 uint8_t ct_scsi_status; /* scsi status */ 2230 uint8_t ct_tag_val; /* tag value */ 2231 uint8_t ct_tag_type; /* tag type */ 2232 uint32_t ct_xfrlen; /* transfer length */ 2233 uint32_t ct_resid; /* residual length */ 2234 uint16_t ct_timeout; 2235 uint16_t ct_seg_count; 2236 ispds_t ct_dataseg[ISP_RQDSEG]; 2237} ct_entry_t; 2238 2239/* 2240 * For some of the dual port SCSI adapters, port (bus #) is reported 2241 * in the MSbit of ct_iid. Bit fields are a bit too awkward here. 2242 * 2243 * Note that this does not apply to FC adapters at all which can and 2244 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices 2245 * that have logged in across a SCSI fabric. 2246 */ 2247#define GET_IID_VAL(x) (x & 0x3f) 2248#define GET_BUS_VAL(x) ((x >> 7) & 0x1) 2249#define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f)) 2250#define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7)) 2251 2252/* 2253 * ct_flags values 2254 */ 2255#define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */ 2256#define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction - *to* initiator */ 2257#define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction - *from* initiator */ 2258#define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */ 2259#define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */ 2260#define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */ 2261#define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */ 2262#define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */ 2263#define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */ 2264#define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */ 2265#define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */ 2266 2267/* 2268 * ct_status values 2269 * - set by the firmware when it returns the CTIO 2270 */ 2271#define CT_OK 0x01 /* completed without error */ 2272#define CT_ABORTED 0x02 /* aborted by host */ 2273#define CT_ERR 0x04 /* see sense data for error */ 2274#define CT_INVAL 0x06 /* request for disabled lun */ 2275#define CT_NOPATH 0x07 /* invalid ITL nexus */ 2276#define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 2277#define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */ 2278#define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 2279#define CT_TIMEOUT 0x0B /* timed out */ 2280#define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 2281#define CT_PARITY 0x0F /* Uncorrectable Parity Error */ 2282#define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */ 2283#define CT_PANIC 0x13 /* Unrecoverable Error */ 2284#define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2285#define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */ 2286#define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2287#define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 2288#define CT_PORTUNAVAIL 0x28 /* port not available */ 2289#define CT_LOGOUT 0x29 /* port logout */ 2290#define CT_PORTCHANGED 0x2A /* port changed */ 2291#define CT_IDE 0x33 /* Initiator Detected Error */ 2292#define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 2293#define CT_SRR 0x45 /* SRR Received */ 2294#define CT_LUN_RESET 0x48 /* Lun Reset Received */ 2295 2296#define CT_HBA_RESET 0xffff /* pseudo error - command destroyed by HBA reset*/ 2297 2298/* 2299 * When the firmware returns a CTIO entry, it may overwrite the last 2300 * part of the structure with sense data. This starts at offset 0x2E 2301 * into the entry, which is in the middle of ct_dataseg[1]. Rather 2302 * than define a new struct for this, I'm just using the sense data 2303 * offset. 2304 */ 2305#define CTIO_SENSE_OFFSET 0x2E 2306 2307/* 2308 * Entry length in u_longs. All entries are the same size so 2309 * any one will do as the numerator. 2310 */ 2311#define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t)) 2312 2313/* 2314 * QLA2100 CTIO (type 2) entry 2315 */ 2316#define MAXRESPLEN 26 2317typedef struct { 2318 isphdr_t ct_header; 2319 uint32_t ct_syshandle; 2320 uint8_t ct_lun; /* lun */ 2321 uint8_t ct_iid; /* initiator id */ 2322 uint16_t ct_rxid; /* response ID */ 2323 uint16_t ct_flags; 2324 uint16_t ct_status; /* isp status */ 2325 uint16_t ct_timeout; 2326 uint16_t ct_seg_count; 2327 uint32_t ct_reloff; /* relative offset */ 2328 uint32_t ct_resid; /* residual length */ 2329 union { 2330 /* 2331 * The three different modes that the target driver 2332 * can set the CTIO{2,3,4} up as. 2333 * 2334 * The first is for sending FCP_DATA_IUs as well as 2335 * (optionally) sending a terminal SCSI status FCP_RSP_IU. 2336 * 2337 * The second is for sending SCSI sense data in an FCP_RSP_IU. 2338 * Note that no FCP_DATA_IUs will be sent. 2339 * 2340 * The third is for sending FCP_RSP_IUs as built specifically 2341 * in system memory as located by the isp_dataseg. 2342 */ 2343 struct { 2344 uint32_t _reserved; 2345 uint16_t _reserved2; 2346 uint16_t ct_scsi_status; 2347 uint32_t ct_xfrlen; 2348 union { 2349 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2350 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2351 ispdslist_t ct_dslist; 2352 } u; 2353 } m0; 2354 struct { 2355 uint16_t _reserved; 2356 uint16_t _reserved2; 2357 uint16_t ct_senselen; 2358 uint16_t ct_scsi_status; 2359 uint16_t ct_resplen; 2360 uint8_t ct_resp[MAXRESPLEN]; 2361 } m1; 2362 struct { 2363 uint32_t _reserved; 2364 uint16_t _reserved2; 2365 uint16_t _reserved3; 2366 uint32_t ct_datalen; 2367 union { 2368 ispds_t ct_fcp_rsp_iudata_32; 2369 ispds64_t ct_fcp_rsp_iudata_64; 2370 } u; 2371 } m2; 2372 } rsp; 2373} ct2_entry_t; 2374 2375typedef struct { 2376 isphdr_t ct_header; 2377 uint32_t ct_syshandle; 2378 uint16_t ct_iid; /* initiator id */ 2379 uint16_t ct_rxid; /* response ID */ 2380 uint16_t ct_flags; 2381 uint16_t ct_status; /* isp status */ 2382 uint16_t ct_timeout; 2383 uint16_t ct_seg_count; 2384 uint32_t ct_reloff; /* relative offset */ 2385 uint32_t ct_resid; /* residual length */ 2386 union { 2387 struct { 2388 uint32_t _reserved; 2389 uint16_t _reserved2; 2390 uint16_t ct_scsi_status; 2391 uint32_t ct_xfrlen; 2392 union { 2393 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2394 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2395 ispdslist_t ct_dslist; 2396 } u; 2397 } m0; 2398 struct { 2399 uint16_t _reserved; 2400 uint16_t _reserved2; 2401 uint16_t ct_senselen; 2402 uint16_t ct_scsi_status; 2403 uint16_t ct_resplen; 2404 uint8_t ct_resp[MAXRESPLEN]; 2405 } m1; 2406 struct { 2407 uint32_t _reserved; 2408 uint16_t _reserved2; 2409 uint16_t _reserved3; 2410 uint32_t ct_datalen; 2411 union { 2412 ispds_t ct_fcp_rsp_iudata_32; 2413 ispds64_t ct_fcp_rsp_iudata_64; 2414 } u; 2415 } m2; 2416 } rsp; 2417} ct2e_entry_t; 2418 2419/* 2420 * ct_flags values for CTIO2 2421 */ 2422#define CT2_FLAG_MODE0 0x0000 2423#define CT2_FLAG_MODE1 0x0001 2424#define CT2_FLAG_MODE2 0x0002 2425#define CT2_FLAG_MMASK 0x0003 2426#define CT2_DATA_IN 0x0040 /* *to* initiator */ 2427#define CT2_DATA_OUT 0x0080 /* *from* initiator */ 2428#define CT2_NO_DATA 0x00C0 2429#define CT2_DATAMASK 0x00C0 2430#define CT2_CCINCR 0x0100 2431#define CT2_FASTPOST 0x0200 2432#define CT2_CONFIRM 0x2000 2433#define CT2_TERMINATE 0x4000 2434#define CT2_SENDSTATUS 0x8000 2435 2436/* 2437 * ct_status values are (mostly) the same as that for ct_entry. 2438 */ 2439 2440/* 2441 * ct_scsi_status values- the low 8 bits are the normal SCSI status 2442 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 2443 * fields. 2444 */ 2445#define CT2_RSPLEN_VALID 0x0100 2446#define CT2_SNSLEN_VALID 0x0200 2447#define CT2_DATA_OVER 0x0400 2448#define CT2_DATA_UNDER 0x0800 2449 2450/* 2451 * ISP24XX CTIO 2452 */ 2453#define MAXRESPLEN_24XX 24 2454typedef struct { 2455 isphdr_t ct_header; 2456 uint32_t ct_syshandle; 2457 uint16_t ct_nphdl; /* status on returned CTIOs */ 2458 uint16_t ct_timeout; 2459 uint16_t ct_seg_count; 2460 uint8_t ct_vpidx; 2461 uint8_t ct_xflags; 2462 uint16_t ct_iid_lo; /* low 16 bits of portid */ 2463 uint8_t ct_iid_hi; /* hi 8 bits of portid */ 2464 uint8_t ct_reserved; 2465 uint32_t ct_rxid; 2466 uint16_t ct_senselen; /* mode 1 only */ 2467 uint16_t ct_flags; 2468 uint32_t ct_resid; /* residual length */ 2469 uint16_t ct_oxid; 2470 uint16_t ct_scsi_status; /* modes 0 && 1 only */ 2471 union { 2472 struct { 2473 uint32_t reloff; 2474 uint32_t reserved0; 2475 uint32_t ct_xfrlen; 2476 uint32_t reserved1; 2477 ispds64_t ds; 2478 } m0; 2479 struct { 2480 uint16_t ct_resplen; 2481 uint16_t reserved; 2482 uint8_t ct_resp[MAXRESPLEN_24XX]; 2483 } m1; 2484 struct { 2485 uint32_t reserved0; 2486 uint32_t reserved1; 2487 uint32_t ct_datalen; 2488 uint32_t reserved2; 2489 ispds64_t ct_fcp_rsp_iudata; 2490 } m2; 2491 } rsp; 2492} ct7_entry_t; 2493 2494/* 2495 * ct_flags values for CTIO7 2496 */ 2497#define CT7_NO_DATA 0x0000 2498#define CT7_DATA_OUT 0x0001 /* *from* initiator */ 2499#define CT7_DATA_IN 0x0002 /* *to* initiator */ 2500#define CT7_DATAMASK 0x3 2501#define CT7_DSD_ENABLE 0x0004 2502#define CT7_CONF_STSFD 0x0010 2503#define CT7_EXPLCT_CONF 0x0020 2504#define CT7_FLAG_MODE0 0x0000 2505#define CT7_FLAG_MODE1 0x0040 2506#define CT7_FLAG_MODE2 0x0080 2507#define CT7_FLAG_MMASK 0x00C0 2508#define CT7_NOACK 0x0100 2509#define CT7_TASK_ATTR_SHIFT 9 2510#define CT7_CONFIRM 0x2000 2511#define CT7_TERMINATE 0x4000 2512#define CT7_SENDSTATUS 0x8000 2513 2514/* 2515 * Type 7 CTIO status codes 2516 */ 2517#define CT7_OK 0x01 /* completed without error */ 2518#define CT7_ABORTED 0x02 /* aborted by host */ 2519#define CT7_ERR 0x04 /* see sense data for error */ 2520#define CT7_INVAL 0x06 /* request for disabled lun */ 2521#define CT7_INVRXID 0x08 /* Invalid RX_ID */ 2522#define CT7_DATA_OVER 0x09 /* Data Overrun */ 2523#define CT7_TIMEOUT 0x0B /* timed out */ 2524#define CT7_RESET 0x0E /* LIP Rset Received */ 2525#define CT7_BUS_ERROR 0x10 /* DMA PCI Error */ 2526#define CT7_REASSY_ERR 0x11 /* DMA reassembly error */ 2527#define CT7_DATA_UNDER 0x15 /* Data Underrun */ 2528#define CT7_PORTUNAVAIL 0x28 /* port not available */ 2529#define CT7_LOGOUT 0x29 /* port logout */ 2530#define CT7_PORTCHANGED 0x2A /* port changed */ 2531#define CT7_SRR 0x45 /* SRR Received */ 2532 2533/* 2534 * Other 24XX related target IOCBs 2535 */ 2536 2537/* 2538 * ABTS Received 2539 */ 2540typedef struct { 2541 isphdr_t abts_header; 2542 uint8_t abts_reserved0[6]; 2543 uint16_t abts_nphdl; 2544 uint16_t abts_reserved1; 2545 uint16_t abts_sof; 2546 uint32_t abts_rxid_abts; 2547 uint16_t abts_did_lo; 2548 uint8_t abts_did_hi; 2549 uint8_t abts_r_ctl; 2550 uint16_t abts_sid_lo; 2551 uint8_t abts_sid_hi; 2552 uint8_t abts_cs_ctl; 2553 uint16_t abts_fs_ctl; 2554 uint8_t abts_f_ctl; 2555 uint8_t abts_type; 2556 uint16_t abts_seq_cnt; 2557 uint8_t abts_df_ctl; 2558 uint8_t abts_seq_id; 2559 uint16_t abts_rx_id; 2560 uint16_t abts_ox_id; 2561 uint32_t abts_param; 2562 uint8_t abts_reserved2[16]; 2563 uint32_t abts_rxid_task; 2564} abts_t; 2565 2566typedef struct { 2567 isphdr_t abts_rsp_header; 2568 uint32_t abts_rsp_handle; 2569 uint16_t abts_rsp_status; 2570 uint16_t abts_rsp_nphdl; 2571 uint16_t abts_rsp_ctl_flags; 2572 uint16_t abts_rsp_sof; 2573 uint32_t abts_rsp_rxid_abts; 2574 uint16_t abts_rsp_did_lo; 2575 uint8_t abts_rsp_did_hi; 2576 uint8_t abts_rsp_r_ctl; 2577 uint16_t abts_rsp_sid_lo; 2578 uint8_t abts_rsp_sid_hi; 2579 uint8_t abts_rsp_cs_ctl; 2580 uint16_t abts_rsp_f_ctl_lo; 2581 uint8_t abts_rsp_f_ctl_hi; 2582 uint8_t abts_rsp_type; 2583 uint16_t abts_rsp_seq_cnt; 2584 uint8_t abts_rsp_df_ctl; 2585 uint8_t abts_rsp_seq_id; 2586 uint16_t abts_rsp_rx_id; 2587 uint16_t abts_rsp_ox_id; 2588 uint32_t abts_rsp_param; 2589 union { 2590 struct { 2591 uint16_t reserved; 2592 uint8_t last_seq_id; 2593 uint8_t seq_id_valid; 2594 uint16_t aborted_rx_id; 2595 uint16_t aborted_ox_id; 2596 uint16_t high_seq_cnt; 2597 uint16_t low_seq_cnt; 2598 uint8_t reserved2[4]; 2599 } ba_acc; 2600 struct { 2601 uint8_t vendor_unique; 2602 uint8_t explanation; 2603 uint8_t reason; 2604 uint8_t reserved; 2605 uint8_t reserved2[12]; 2606 } ba_rjt; 2607 struct { 2608 uint8_t reserved[8]; 2609 uint32_t subcode1; 2610 uint32_t subcode2; 2611 } rsp; 2612 uint8_t reserved[16]; 2613 } abts_rsp_payload; 2614 uint32_t abts_rsp_rxid_task; 2615} abts_rsp_t; 2616 2617/* terminate this ABTS exchange */ 2618#define ISP24XX_ABTS_RSP_TERMINATE 0x01 2619 2620#define ISP24XX_ABTS_RSP_COMPLETE 0x00 2621#define ISP24XX_ABTS_RSP_RESET 0x04 2622#define ISP24XX_ABTS_RSP_ABORTED 0x05 2623#define ISP24XX_ABTS_RSP_TIMEOUT 0x06 2624#define ISP24XX_ABTS_RSP_INVXID 0x08 2625#define ISP24XX_ABTS_RSP_LOGOUT 0x29 2626#define ISP24XX_ABTS_RSP_SUBCODE 0x31 2627 2628#define ISP24XX_NO_TASK 0xffffffff 2629 2630/* 2631 * Miscellaneous 2632 * 2633 * These are the limits of the number of dma segments we 2634 * can deal with based not on the size of the segment counter 2635 * (which is 16 bits), but on the size of the number of 2636 * queue entries field (which is 8 bits). We assume no 2637 * segments in the first queue entry, so we can either 2638 * have 7 dma segments per continuation entry or 5 2639 * (for 64 bit dma).. multiplying out by 254.... 2640 */ 2641#define ISP_NSEG_MAX 1778 2642#define ISP_NSEG64_MAX 1270 2643 2644#endif /* _ISPMBOX_H */ 2645