ispmbox.h revision 289937
1/* $FreeBSD: head/sys/dev/isp/ispmbox.h 289937 2015-10-25 16:04:31Z mav $ */ 2/*- 3 * Copyright (c) 1997-2009 by Matthew Jacob 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30/* 31 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 32 */ 33#ifndef _ISPMBOX_H 34#define _ISPMBOX_H 35 36/* 37 * Mailbox Command Opcodes 38 */ 39#define MBOX_NO_OP 0x0000 40#define MBOX_LOAD_RAM 0x0001 41#define MBOX_EXEC_FIRMWARE 0x0002 42#define MBOX_DUMP_RAM 0x0003 43#define MBOX_WRITE_RAM_WORD 0x0004 44#define MBOX_READ_RAM_WORD 0x0005 45#define MBOX_MAILBOX_REG_TEST 0x0006 46#define MBOX_VERIFY_CHECKSUM 0x0007 47#define MBOX_ABOUT_FIRMWARE 0x0008 48#define MBOX_LOAD_RISC_RAM_2100 0x0009 49 /* a */ 50#define MBOX_LOAD_RISC_RAM 0x000b 51 /* c */ 52#define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d 53#define MBOX_CHECK_FIRMWARE 0x000e 54#define MBOX_READ_RAM_WORD_EXTENDED 0x000f 55#define MBOX_INIT_REQ_QUEUE 0x0010 56#define MBOX_INIT_RES_QUEUE 0x0011 57#define MBOX_EXECUTE_IOCB 0x0012 58#define MBOX_WAKE_UP 0x0013 59#define MBOX_STOP_FIRMWARE 0x0014 60#define MBOX_ABORT 0x0015 61#define MBOX_ABORT_DEVICE 0x0016 62#define MBOX_ABORT_TARGET 0x0017 63#define MBOX_BUS_RESET 0x0018 64#define MBOX_STOP_QUEUE 0x0019 65#define MBOX_START_QUEUE 0x001a 66#define MBOX_SINGLE_STEP_QUEUE 0x001b 67#define MBOX_ABORT_QUEUE 0x001c 68#define MBOX_GET_DEV_QUEUE_STATUS 0x001d 69 /* 1e */ 70#define MBOX_GET_FIRMWARE_STATUS 0x001f 71#define MBOX_GET_INIT_SCSI_ID 0x0020 72#define MBOX_GET_SELECT_TIMEOUT 0x0021 73#define MBOX_GET_RETRY_COUNT 0x0022 74#define MBOX_GET_TAG_AGE_LIMIT 0x0023 75#define MBOX_GET_CLOCK_RATE 0x0024 76#define MBOX_GET_ACT_NEG_STATE 0x0025 77#define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 78#define MBOX_GET_SBUS_PARAMS 0x0027 79#define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 80#define MBOX_GET_TARGET_PARAMS 0x0028 81#define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 82#define MBOX_GET_RESET_DELAY_PARAMS 0x002a 83 /* 2b */ 84 /* 2c */ 85 /* 2d */ 86 /* 2e */ 87 /* 2f */ 88#define MBOX_SET_INIT_SCSI_ID 0x0030 89#define MBOX_SET_SELECT_TIMEOUT 0x0031 90#define MBOX_SET_RETRY_COUNT 0x0032 91#define MBOX_SET_TAG_AGE_LIMIT 0x0033 92#define MBOX_SET_CLOCK_RATE 0x0034 93#define MBOX_SET_ACT_NEG_STATE 0x0035 94#define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 95#define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 96#define MBOX_SET_PCI_PARAMETERS 0x0037 97#define MBOX_SET_TARGET_PARAMS 0x0038 98#define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 99#define MBOX_SET_RESET_DELAY_PARAMS 0x003a 100 /* 3b */ 101 /* 3c */ 102 /* 3d */ 103 /* 3e */ 104 /* 3f */ 105#define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 106#define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 107#define MBOX_EXEC_BIOS_IOCB 0x0042 108#define MBOX_SET_FW_FEATURES 0x004a 109#define MBOX_GET_FW_FEATURES 0x004b 110#define FW_FEATURE_FAST_POST 0x1 111#define FW_FEATURE_LVD_NOTIFY 0x2 112#define FW_FEATURE_RIO_32BIT 0x4 113#define FW_FEATURE_RIO_16BIT 0x8 114 115#define MBOX_INIT_REQ_QUEUE_A64 0x0052 116#define MBOX_INIT_RES_QUEUE_A64 0x0053 117 118#define MBOX_ENABLE_TARGET_MODE 0x0055 119#define ENABLE_TARGET_FLAG 0x8000 120#define ENABLE_TQING_FLAG 0x0004 121#define ENABLE_MANDATORY_DISC 0x0002 122#define MBOX_GET_TARGET_STATUS 0x0056 123 124/* These are for the ISP2X00 FC cards */ 125#define MBOX_GET_LOOP_ID 0x0020 126/* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */ 127#define ISP24XX_INORDER 0x0100 128#define ISP24XX_NPIV_SAN 0x0400 129#define ISP24XX_VSAN_SAN 0x1000 130#define ISP24XX_FC_SP_SAN 0x2000 131 132#define MBOX_GET_FIRMWARE_OPTIONS 0x0028 133#define MBOX_SET_FIRMWARE_OPTIONS 0x0038 134#define MBOX_GET_RESOURCE_COUNT 0x0042 135#define MBOX_REQUEST_OFFLINE_MODE 0x0043 136#define MBOX_ENHANCED_GET_PDB 0x0047 137#define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */ 138#define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */ 139#define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */ 140#define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 141#define MBOX_INIT_FIRMWARE 0x0060 142#define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 143#define MBOX_INIT_LIP 0x0062 144#define MBOX_GET_FC_AL_POSITION_MAP 0x0063 145#define MBOX_GET_PORT_DB 0x0064 146#define MBOX_CLEAR_ACA 0x0065 147#define MBOX_TARGET_RESET 0x0066 148#define MBOX_CLEAR_TASK_SET 0x0067 149#define MBOX_ABORT_TASK_SET 0x0068 150#define MBOX_GET_FW_STATE 0x0069 151#define MBOX_GET_PORT_NAME 0x006A 152#define MBOX_GET_LINK_STATUS 0x006B 153#define MBOX_INIT_LIP_RESET 0x006C 154#define MBOX_SEND_SNS 0x006E 155#define MBOX_FABRIC_LOGIN 0x006F 156#define MBOX_SEND_CHANGE_REQUEST 0x0070 157#define MBOX_FABRIC_LOGOUT 0x0071 158#define MBOX_INIT_LIP_LOGIN 0x0072 159#define MBOX_LUN_RESET 0x007E 160 161#define MBOX_DRIVER_HEARTBEAT 0x005B 162#define MBOX_FW_HEARTBEAT 0x005C 163 164#define MBOX_GET_SET_DATA_RATE 0x005D /* 24XX/23XX only */ 165#define MBGSD_GET_RATE 0 166#define MBGSD_SET_RATE 1 167#define MBGSD_SET_RATE_NOW 2 /* 24XX only */ 168#define MBGSD_ONEGB 0 169#define MBGSD_TWOGB 1 170#define MBGSD_AUTO 2 171#define MBGSD_FOURGB 3 /* 24XX only */ 172#define MBGSD_EIGHTGB 4 /* 25XX only */ 173 174 175#define ISP2100_SET_PCI_PARAM 0x00ff 176 177#define MBOX_BUSY 0x04 178 179/* 180 * Mailbox Command Complete Status Codes 181 */ 182#define MBOX_COMMAND_COMPLETE 0x4000 183#define MBOX_INVALID_COMMAND 0x4001 184#define MBOX_HOST_INTERFACE_ERROR 0x4002 185#define MBOX_TEST_FAILED 0x4003 186#define MBOX_COMMAND_ERROR 0x4005 187#define MBOX_COMMAND_PARAM_ERROR 0x4006 188#define MBOX_PORT_ID_USED 0x4007 189#define MBOX_LOOP_ID_USED 0x4008 190#define MBOX_ALL_IDS_USED 0x4009 191#define MBOX_NOT_LOGGED_IN 0x400A 192/* pseudo mailbox completion codes */ 193#define MBOX_REGS_BUSY 0x6000 /* registers in use */ 194#define MBOX_TIMEOUT 0x6001 /* command timed out */ 195 196#define MBLOGALL 0x000f 197#define MBLOGNONE 0x0000 198#define MBLOGMASK(x) ((x) & 0xf) 199 200/* 201 * Asynchronous event status codes 202 */ 203#define ASYNC_BUS_RESET 0x8001 204#define ASYNC_SYSTEM_ERROR 0x8002 205#define ASYNC_RQS_XFER_ERR 0x8003 206#define ASYNC_RSP_XFER_ERR 0x8004 207#define ASYNC_QWAKEUP 0x8005 208#define ASYNC_TIMEOUT_RESET 0x8006 209#define ASYNC_DEVICE_RESET 0x8007 210#define ASYNC_EXTMSG_UNDERRUN 0x800A 211#define ASYNC_SCAM_INT 0x800B 212#define ASYNC_HUNG_SCSI 0x800C 213#define ASYNC_KILLED_BUS 0x800D 214#define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 215#define ASYNC_LIP_OCCURRED 0x8010 216#define ASYNC_LOOP_UP 0x8011 217#define ASYNC_LOOP_DOWN 0x8012 218#define ASYNC_LOOP_RESET 0x8013 219#define ASYNC_PDB_CHANGED 0x8014 220#define ASYNC_CHANGE_NOTIFY 0x8015 221#define ASYNC_LIP_F8 0x8016 222#define ASYNC_LIP_ERROR 0x8017 223#define ASYNC_SECURITY_UPDATE 0x801B 224#define ASYNC_CMD_CMPLT 0x8020 225#define ASYNC_CTIO_DONE 0x8021 226#define ASYNC_RIO32_1 0x8021 227#define ASYNC_RIO32_2 0x8022 228#define ASYNC_IP_XMIT_DONE 0x8022 229#define ASYNC_IP_RECV_DONE 0x8023 230#define ASYNC_IP_BROADCAST 0x8024 231#define ASYNC_IP_RCVQ_LOW 0x8025 232#define ASYNC_IP_RCVQ_EMPTY 0x8026 233#define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 234#define ASYNC_PTPMODE 0x8030 235#define ASYNC_RIO16_1 0x8031 236#define ASYNC_RIO16_2 0x8032 237#define ASYNC_RIO16_3 0x8033 238#define ASYNC_RIO16_4 0x8034 239#define ASYNC_RIO16_5 0x8035 240#define ASYNC_CONNMODE 0x8036 241#define ISP_CONN_LOOP 1 242#define ISP_CONN_PTP 2 243#define ISP_CONN_BADLIP 3 244#define ISP_CONN_FATAL 4 245#define ISP_CONN_LOOPBACK 5 246#define ASYNC_RIOZIO_STALL 0x8040 /* there's a RIO/ZIO entry that hasn't been serviced */ 247#define ASYNC_RIO32_2_2200 0x8042 /* same as ASYNC_RIO32_2, but for 2100/2200 */ 248#define ASYNC_RCV_ERR 0x8048 249 250/* 251 * Firmware Options. There are a lot of them. 252 * 253 * IFCOPTN - ISP Fibre Channel Option Word N 254 */ 255#define IFCOPT1_EQFQASYNC (1 << 13) /* enable QFULL notification */ 256#define IFCOPT1_EAABSRCVD (1 << 12) 257#define IFCOPT1_RJTASYNC (1 << 11) /* enable 8018 notification */ 258#define IFCOPT1_ENAPURE (1 << 10) 259#define IFCOPT1_ENA8017 (1 << 7) 260#define IFCOPT1_DISGPIO67 (1 << 6) 261#define IFCOPT1_LIPLOSSIMM (1 << 5) 262#define IFCOPT1_DISF7SWTCH (1 << 4) 263#define IFCOPT1_CTIO_RETRY (1 << 3) 264#define IFCOPT1_LIPASYNC (1 << 1) 265#define IFCOPT1_LIPF8 (1 << 0) 266 267#define IFCOPT2_LOOPBACK (1 << 1) 268#define IFCOPT2_ATIO3_ONLY (1 << 0) 269 270#define IFCOPT3_NOPRLI (1 << 4) /* disable automatic sending of PRLI on local loops */ 271#define IFCOPT3_RNDASYNC (1 << 1) 272/* 273 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 274 * mailbox command to enable this. 275 */ 276#define ASYNC_QFULL_SENT 0x8049 277 278/* 279 * Needs to be enabled 280 */ 281#define ASYNC_AUTO_PLOGI_RJT 0x8018 282/* 283 * 24XX only 284 */ 285#define ASYNC_RJT_SENT 0x8049 286 287/* 288 * All IOCB Queue entries are this size 289 */ 290#define QENTRY_LEN 64 291 292/* 293 * Command Structure Definitions 294 */ 295 296typedef struct { 297 uint32_t ds_base; 298 uint32_t ds_count; 299} ispds_t; 300 301typedef struct { 302 uint32_t ds_base; 303 uint32_t ds_basehi; 304 uint32_t ds_count; 305} ispds64_t; 306 307#define DSTYPE_32BIT 0 308#define DSTYPE_64BIT 1 309typedef struct { 310 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 311 uint32_t ds_segment; /* unused */ 312 uint32_t ds_base; /* 32 bit address of DSD list */ 313} ispdslist_t; 314 315 316typedef struct { 317 uint8_t rqs_entry_type; 318 uint8_t rqs_entry_count; 319 uint8_t rqs_seqno; 320 uint8_t rqs_flags; 321} isphdr_t; 322 323/* RQS Flag definitions */ 324#define RQSFLAG_CONTINUATION 0x01 325#define RQSFLAG_FULL 0x02 326#define RQSFLAG_BADHEADER 0x04 327#define RQSFLAG_BADPACKET 0x08 328#define RQSFLAG_BADCOUNT 0x10 329#define RQSFLAG_BADORDER 0x20 330#define RQSFLAG_MASK 0x3f 331 332/* RQS entry_type definitions */ 333#define RQSTYPE_REQUEST 0x01 334#define RQSTYPE_DATASEG 0x02 335#define RQSTYPE_RESPONSE 0x03 336#define RQSTYPE_MARKER 0x04 337#define RQSTYPE_CMDONLY 0x05 338#define RQSTYPE_ATIO 0x06 /* Target Mode */ 339#define RQSTYPE_CTIO 0x07 /* Target Mode */ 340#define RQSTYPE_SCAM 0x08 341#define RQSTYPE_A64 0x09 342#define RQSTYPE_A64_CONT 0x0a 343#define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 344#define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 345#define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 346#define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 347#define RQSTYPE_CTIO1 0x0f /* Target Mode */ 348#define RQSTYPE_STATUS_CONT 0x10 349#define RQSTYPE_T2RQS 0x11 350#define RQSTYPE_CTIO7 0x12 351#define RQSTYPE_IP_XMIT 0x13 352#define RQSTYPE_TSK_MGMT 0x14 353#define RQSTYPE_T4RQS 0x15 354#define RQSTYPE_ATIO2 0x16 /* Target Mode */ 355#define RQSTYPE_CTIO2 0x17 /* Target Mode */ 356#define RQSTYPE_T7RQS 0x18 357#define RQSTYPE_T3RQS 0x19 358#define RQSTYPE_IP_XMIT_64 0x1b 359#define RQSTYPE_CTIO4 0x1e /* Target Mode */ 360#define RQSTYPE_CTIO3 0x1f /* Target Mode */ 361#define RQSTYPE_RIO1 0x21 362#define RQSTYPE_RIO2 0x22 363#define RQSTYPE_IP_RECV 0x23 364#define RQSTYPE_IP_RECV_CONT 0x24 365#define RQSTYPE_CT_PASSTHRU 0x29 366#define RQSTYPE_MS_PASSTHRU 0x29 367#define RQSTYPE_VP_CTRL 0x30 /* 24XX only */ 368#define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */ 369#define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */ 370#define RQSTYPE_ABORT_IO 0x33 371#define RQSTYPE_T6RQS 0x48 372#define RQSTYPE_LOGIN 0x52 373#define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */ 374#define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */ 375 376 377#define ISP_RQDSEG 4 378typedef struct { 379 isphdr_t req_header; 380 uint32_t req_handle; 381 uint8_t req_lun_trn; 382 uint8_t req_target; 383 uint16_t req_cdblen; 384 uint16_t req_flags; 385 uint16_t req_reserved; 386 uint16_t req_time; 387 uint16_t req_seg_count; 388 uint8_t req_cdb[12]; 389 ispds_t req_dataseg[ISP_RQDSEG]; 390} ispreq_t; 391#define ISP_RQDSEG_A64 2 392 393typedef struct { 394 isphdr_t mrk_header; 395 uint32_t mrk_handle; 396 uint8_t mrk_reserved0; 397 uint8_t mrk_target; 398 uint16_t mrk_modifier; 399 uint16_t mrk_flags; 400 uint16_t mrk_lun; 401 uint8_t mrk_reserved1[48]; 402} isp_marker_t; 403 404typedef struct { 405 isphdr_t mrk_header; 406 uint32_t mrk_handle; 407 uint16_t mrk_nphdl; 408 uint8_t mrk_modifier; 409 uint8_t mrk_reserved0; 410 uint8_t mrk_reserved1; 411 uint8_t mrk_vphdl; 412 uint16_t mrk_reserved2; 413 uint8_t mrk_lun[8]; 414 uint8_t mrk_reserved3[40]; 415} isp_marker_24xx_t; 416 417 418#define SYNC_DEVICE 0 419#define SYNC_TARGET 1 420#define SYNC_ALL 2 421#define SYNC_LIP 3 422 423#define ISP_RQDSEG_T2 3 424typedef struct { 425 isphdr_t req_header; 426 uint32_t req_handle; 427 uint8_t req_lun_trn; 428 uint8_t req_target; 429 uint16_t req_scclun; 430 uint16_t req_flags; 431 uint8_t req_crn; 432 uint8_t req_reserved; 433 uint16_t req_time; 434 uint16_t req_seg_count; 435 uint8_t req_cdb[16]; 436 uint32_t req_totalcnt; 437 ispds_t req_dataseg[ISP_RQDSEG_T2]; 438} ispreqt2_t; 439 440typedef struct { 441 isphdr_t req_header; 442 uint32_t req_handle; 443 uint16_t req_target; 444 uint16_t req_scclun; 445 uint16_t req_flags; 446 uint16_t req_reserved; 447 uint16_t req_time; 448 uint16_t req_seg_count; 449 uint8_t req_cdb[16]; 450 uint32_t req_totalcnt; 451 ispds_t req_dataseg[ISP_RQDSEG_T2]; 452} ispreqt2e_t; 453 454#define ISP_RQDSEG_T3 2 455typedef struct { 456 isphdr_t req_header; 457 uint32_t req_handle; 458 uint8_t req_lun_trn; 459 uint8_t req_target; 460 uint16_t req_scclun; 461 uint16_t req_flags; 462 uint8_t req_crn; 463 uint8_t req_reserved; 464 uint16_t req_time; 465 uint16_t req_seg_count; 466 uint8_t req_cdb[16]; 467 uint32_t req_totalcnt; 468 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 469} ispreqt3_t; 470#define ispreq64_t ispreqt3_t /* same as.... */ 471 472typedef struct { 473 isphdr_t req_header; 474 uint32_t req_handle; 475 uint16_t req_target; 476 uint16_t req_scclun; 477 uint16_t req_flags; 478 uint8_t req_crn; 479 uint8_t req_reserved; 480 uint16_t req_time; 481 uint16_t req_seg_count; 482 uint8_t req_cdb[16]; 483 uint32_t req_totalcnt; 484 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 485} ispreqt3e_t; 486 487/* req_flag values */ 488#define REQFLAG_NODISCON 0x0001 489#define REQFLAG_HTAG 0x0002 490#define REQFLAG_OTAG 0x0004 491#define REQFLAG_STAG 0x0008 492#define REQFLAG_TARGET_RTN 0x0010 493 494#define REQFLAG_NODATA 0x0000 495#define REQFLAG_DATA_IN 0x0020 496#define REQFLAG_DATA_OUT 0x0040 497#define REQFLAG_DATA_UNKNOWN 0x0060 498 499#define REQFLAG_DISARQ 0x0100 500#define REQFLAG_FRC_ASYNC 0x0200 501#define REQFLAG_FRC_SYNC 0x0400 502#define REQFLAG_FRC_WIDE 0x0800 503#define REQFLAG_NOPARITY 0x1000 504#define REQFLAG_STOPQ 0x2000 505#define REQFLAG_XTRASNS 0x4000 506#define REQFLAG_PRIORITY 0x8000 507 508typedef struct { 509 isphdr_t req_header; 510 uint32_t req_handle; 511 uint8_t req_lun_trn; 512 uint8_t req_target; 513 uint16_t req_cdblen; 514 uint16_t req_flags; 515 uint16_t req_reserved; 516 uint16_t req_time; 517 uint16_t req_seg_count; 518 uint8_t req_cdb[44]; 519} ispextreq_t; 520 521 522/* 523 * ISP24XX structures 524 */ 525typedef struct { 526 isphdr_t req_header; 527 uint32_t req_handle; 528 uint16_t req_nphdl; 529 uint16_t req_time; 530 uint16_t req_seg_count; 531 uint16_t req_reserved; 532 uint8_t req_lun[8]; 533 uint8_t req_alen_datadir; 534 uint8_t req_task_management; 535 uint8_t req_task_attribute; 536 uint8_t req_crn; 537 uint8_t req_cdb[16]; 538 uint32_t req_dl; 539 uint16_t req_tidlo; 540 uint8_t req_tidhi; 541 uint8_t req_vpidx; 542 ispds64_t req_dataseg; 543} ispreqt7_t; 544 545/* Task Management Request Function */ 546typedef struct { 547 isphdr_t tmf_header; 548 uint32_t tmf_handle; 549 uint16_t tmf_nphdl; 550 uint8_t tmf_reserved0[2]; 551 uint16_t tmf_delay; 552 uint16_t tmf_timeout; 553 uint8_t tmf_lun[8]; 554 uint32_t tmf_flags; 555 uint8_t tmf_reserved1[20]; 556 uint16_t tmf_tidlo; 557 uint8_t tmf_tidhi; 558 uint8_t tmf_vpidx; 559 uint8_t tmf_reserved2[12]; 560} isp24xx_tmf_t; 561 562#define ISP24XX_TMF_NOSEND 0x80000000 563 564#define ISP24XX_TMF_LUN_RESET 0x00000010 565#define ISP24XX_TMF_ABORT_TASK_SET 0x00000008 566#define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004 567#define ISP24XX_TMF_TARGET_RESET 0x00000002 568#define ISP24XX_TMF_CLEAR_ACA 0x00000001 569 570/* I/O Abort Structure */ 571typedef struct { 572 isphdr_t abrt_header; 573 uint32_t abrt_handle; 574 uint16_t abrt_nphdl; 575 uint16_t abrt_options; 576 uint32_t abrt_cmd_handle; 577 uint16_t abrt_queue_number; 578 uint8_t abrt_reserved[30]; 579 uint16_t abrt_tidlo; 580 uint8_t abrt_tidhi; 581 uint8_t abrt_vpidx; 582 uint8_t abrt_reserved1[12]; 583} isp24xx_abrt_t; 584 585#define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */ 586#define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */ 587#define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */ 588 589#define ISP_CDSEG 7 590typedef struct { 591 isphdr_t req_header; 592 uint32_t req_reserved; 593 ispds_t req_dataseg[ISP_CDSEG]; 594} ispcontreq_t; 595 596#define ISP_CDSEG64 5 597typedef struct { 598 isphdr_t req_header; 599 ispds64_t req_dataseg[ISP_CDSEG64]; 600} ispcontreq64_t; 601 602typedef struct { 603 isphdr_t req_header; 604 uint32_t req_handle; 605 uint16_t req_scsi_status; 606 uint16_t req_completion_status; 607 uint16_t req_state_flags; 608 uint16_t req_status_flags; 609 uint16_t req_time; 610#define req_response_len req_time /* FC only */ 611 uint16_t req_sense_len; 612 uint32_t req_resid; 613 uint8_t req_response[8]; /* FC only */ 614 uint8_t req_sense_data[32]; 615} ispstatusreq_t; 616 617/* 618 * Status Continuation 619 */ 620typedef struct { 621 isphdr_t req_header; 622 uint8_t req_sense_data[60]; 623} ispstatus_cont_t; 624 625/* 626 * 24XX Type 0 status 627 */ 628typedef struct { 629 isphdr_t req_header; 630 uint32_t req_handle; 631 uint16_t req_completion_status; 632 uint16_t req_oxid; 633 uint32_t req_resid; 634 uint16_t req_reserved0; 635 uint16_t req_state_flags; 636 uint16_t req_retry_delay; /* aka Status Qualifier */ 637 uint16_t req_scsi_status; 638 uint32_t req_fcp_residual; 639 uint32_t req_sense_len; 640 uint32_t req_response_len; 641 uint8_t req_rsp_sense[28]; 642} isp24xx_statusreq_t; 643 644/* 645 * For Qlogic 2X00, the high order byte of SCSI status has 646 * additional meaning. 647 */ 648#define RQCS_CR 0x1000 /* Confirmation Request */ 649#define RQCS_RU 0x0800 /* Residual Under */ 650#define RQCS_RO 0x0400 /* Residual Over */ 651#define RQCS_RESID (RQCS_RU|RQCS_RO) 652#define RQCS_SV 0x0200 /* Sense Length Valid */ 653#define RQCS_RV 0x0100 /* FCP Response Length Valid */ 654 655/* 656 * CT Passthru IOCB 657 */ 658typedef struct { 659 isphdr_t ctp_header; 660 uint32_t ctp_handle; 661 uint16_t ctp_status; 662 uint16_t ctp_nphdl; /* n-port handle */ 663 uint16_t ctp_cmd_cnt; /* Command DSD count */ 664 uint8_t ctp_vpidx; 665 uint8_t ctp_reserved0; 666 uint16_t ctp_time; 667 uint16_t ctp_reserved1; 668 uint16_t ctp_rsp_cnt; /* Response DSD count */ 669 uint16_t ctp_reserved2[5]; 670 uint32_t ctp_rsp_bcnt; /* Response byte count */ 671 uint32_t ctp_cmd_bcnt; /* Command byte count */ 672 ispds64_t ctp_dataseg[2]; 673} isp_ct_pt_t; 674 675/* 676 * MS Passthru IOCB 677 */ 678typedef struct { 679 isphdr_t ms_header; 680 uint32_t ms_handle; 681 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */ 682 uint16_t ms_status; 683 uint16_t ms_flags; 684 uint16_t ms_reserved1; /* low 8 bits */ 685 uint16_t ms_time; 686 uint16_t ms_cmd_cnt; /* Command DSD count */ 687 uint16_t ms_tot_cnt; /* Total DSD Count */ 688 uint8_t ms_type; /* MS type */ 689 uint8_t ms_r_ctl; /* R_CTL */ 690 uint16_t ms_rxid; /* RX_ID */ 691 uint16_t ms_reserved2; 692 uint32_t ms_handle2; 693 uint32_t ms_rsp_bcnt; /* Response byte count */ 694 uint32_t ms_cmd_bcnt; /* Command byte count */ 695 ispds64_t ms_dataseg[2]; 696} isp_ms_t; 697 698/* 699 * Completion Status Codes. 700 */ 701#define RQCS_COMPLETE 0x0000 702#define RQCS_DMA_ERROR 0x0002 703#define RQCS_RESET_OCCURRED 0x0004 704#define RQCS_ABORTED 0x0005 705#define RQCS_TIMEOUT 0x0006 706#define RQCS_DATA_OVERRUN 0x0007 707#define RQCS_DATA_UNDERRUN 0x0015 708#define RQCS_QUEUE_FULL 0x001C 709 710/* 1X00 Only Completion Codes */ 711#define RQCS_INCOMPLETE 0x0001 712#define RQCS_TRANSPORT_ERROR 0x0003 713#define RQCS_COMMAND_OVERRUN 0x0008 714#define RQCS_STATUS_OVERRUN 0x0009 715#define RQCS_BAD_MESSAGE 0x000a 716#define RQCS_NO_MESSAGE_OUT 0x000b 717#define RQCS_EXT_ID_FAILED 0x000c 718#define RQCS_IDE_MSG_FAILED 0x000d 719#define RQCS_ABORT_MSG_FAILED 0x000e 720#define RQCS_REJECT_MSG_FAILED 0x000f 721#define RQCS_NOP_MSG_FAILED 0x0010 722#define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 723#define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 724#define RQCS_ID_MSG_FAILED 0x0013 725#define RQCS_UNEXP_BUS_FREE 0x0014 726#define RQCS_XACT_ERR1 0x0018 727#define RQCS_XACT_ERR2 0x0019 728#define RQCS_XACT_ERR3 0x001A 729#define RQCS_BAD_ENTRY 0x001B 730#define RQCS_PHASE_SKIPPED 0x001D 731#define RQCS_ARQS_FAILED 0x001E 732#define RQCS_WIDE_FAILED 0x001F 733#define RQCS_SYNCXFER_FAILED 0x0020 734#define RQCS_LVD_BUSERR 0x0021 735 736/* 2X00 Only Completion Codes */ 737#define RQCS_PORT_UNAVAILABLE 0x0028 738#define RQCS_PORT_LOGGED_OUT 0x0029 739#define RQCS_PORT_CHANGED 0x002A 740#define RQCS_PORT_BUSY 0x002B 741 742/* 24XX Only Completion Codes */ 743#define RQCS_24XX_DRE 0x0011 /* data reassembly error */ 744#define RQCS_24XX_TABORT 0x0013 /* aborted by target */ 745#define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */ 746#define RQCS_24XX_TMO 0x0030 /* task management overrun */ 747 748 749/* 750 * 1X00 specific State Flags 751 */ 752#define RQSF_GOT_BUS 0x0100 753#define RQSF_GOT_TARGET 0x0200 754#define RQSF_SENT_CDB 0x0400 755#define RQSF_XFRD_DATA 0x0800 756#define RQSF_GOT_STATUS 0x1000 757#define RQSF_GOT_SENSE 0x2000 758#define RQSF_XFER_COMPLETE 0x4000 759 760/* 761 * 2X00 specific State Flags 762 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 763 */ 764#define RQSF_DATA_IN 0x0020 765#define RQSF_DATA_OUT 0x0040 766#define RQSF_STAG 0x0008 767#define RQSF_OTAG 0x0004 768#define RQSF_HTAG 0x0002 769/* 770 * 1X00 Status Flags 771 */ 772#define RQSTF_DISCONNECT 0x0001 773#define RQSTF_SYNCHRONOUS 0x0002 774#define RQSTF_PARITY_ERROR 0x0004 775#define RQSTF_BUS_RESET 0x0008 776#define RQSTF_DEVICE_RESET 0x0010 777#define RQSTF_ABORTED 0x0020 778#define RQSTF_TIMEOUT 0x0040 779#define RQSTF_NEGOTIATION 0x0080 780 781/* 782 * 2X00 specific state flags 783 */ 784/* RQSF_SENT_CDB */ 785/* RQSF_XFRD_DATA */ 786/* RQSF_GOT_STATUS */ 787/* RQSF_XFER_COMPLETE */ 788 789/* 790 * 2X00 specific status flags 791 */ 792/* RQSTF_ABORTED */ 793/* RQSTF_TIMEOUT */ 794#define RQSTF_DMA_ERROR 0x0080 795#define RQSTF_LOGOUT 0x2000 796 797/* 798 * Miscellaneous 799 */ 800#ifndef ISP_EXEC_THROTTLE 801#define ISP_EXEC_THROTTLE 16 802#endif 803 804/* 805 * About Firmware returns an 'attribute' word in mailbox 6. 806 * These attributes are for 2200 and 2300. 807 */ 808#define ISP_FW_ATTR_TMODE 0x0001 809#define ISP_FW_ATTR_SCCLUN 0x0002 810#define ISP_FW_ATTR_FABRIC 0x0004 811#define ISP_FW_ATTR_CLASS2 0x0008 812#define ISP_FW_ATTR_FCTAPE 0x0010 813#define ISP_FW_ATTR_IP 0x0020 814#define ISP_FW_ATTR_VI 0x0040 815#define ISP_FW_ATTR_VI_SOLARIS 0x0080 816#define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */ 817 818/* and these are for the 2400 */ 819#define ISP2400_FW_ATTR_CLASS2 0x0001 820#define ISP2400_FW_ATTR_IP 0x0002 821#define ISP2400_FW_ATTR_MULTIID 0x0004 822#define ISP2400_FW_ATTR_SB2 0x0008 823#define ISP2400_FW_ATTR_T10CRC 0x0010 824#define ISP2400_FW_ATTR_VI 0x0020 825#define ISP2400_FW_ATTR_MQ 0x0040 826#define ISP2400_FW_ATTR_MSIX 0x0080 827#define ISP2400_FW_ATTR_FCOE 0x0800 828#define ISP2400_FW_ATTR_VP0 0x1000 829#define ISP2400_FW_ATTR_EXPFW 0x2000 830#define ISP2400_FW_ATTR_HOTFW 0x4000 831#define ISP2400_FW_ATTR_EXTNDED 0x8000 832#define ISP2400_FW_ATTR_EXTVP 0x00010000 833#define ISP2400_FW_ATTR_VN2VN 0x00040000 834#define ISP2400_FW_ATTR_EXMOFF 0x00080000 835#define ISP2400_FW_ATTR_NPMOFF 0x00100000 836#define ISP2400_FW_ATTR_DIFCHOP 0x00400000 837#define ISP2400_FW_ATTR_SRIOV 0x02000000 838#define ISP2400_FW_ATTR_ASICTMP 0x0200000000 839#define ISP2400_FW_ATTR_ATIOMQ 0x0400000000 840 841/* 842 * These are either manifestly true or are dependent on f/w attributes 843 */ 844#define ISP_CAP_TMODE(isp) \ 845 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE)) 846#define ISP_CAP_SCCFW(isp) \ 847 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN)) 848#define ISP_CAP_2KLOGIN(isp) \ 849 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS)) 850 851/* 852 * This is only true for 24XX cards with this f/w attribute 853 */ 854#define ISP_CAP_MULTI_ID(isp) \ 855 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0) 856#define ISP_GET_VPIDX(isp, tag) \ 857 (ISP_CAP_MULTI_ID(isp) ? tag : 0) 858 859/* 860 * This is true manifestly or is dependent on a f/w attribute 861 * but may or may not actually be *enabled*. In any case, it 862 * is enabled on a per-channel basis. 863 */ 864#define ISP_CAP_FCTAPE(isp) \ 865 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_FCTAPE)) 866 867#define ISP_FCTAPE_ENABLED(isp, chan) \ 868 (IS_24XX(isp)? (FCPARAM(isp, chan)->isp_xfwoptions & ICB2400_OPT2_FCTAPE) != 0 : (FCPARAM(isp, chan)->isp_xfwoptions & ICBXOPT_FCTAPE) != 0) 869 870/* 871 * Reduced Interrupt Operation Response Queue Entries 872 */ 873 874typedef struct { 875 isphdr_t req_header; 876 uint32_t req_handles[15]; 877} isp_rio1_t; 878 879typedef struct { 880 isphdr_t req_header; 881 uint16_t req_handles[30]; 882} isp_rio2_t; 883 884/* 885 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures 886 */ 887 888/* 889 * Initialization Control Block 890 * 891 * Version One (prime) format. 892 */ 893typedef struct { 894 uint8_t icb_version; 895 uint8_t icb_reserved0; 896 uint16_t icb_fwoptions; 897 uint16_t icb_maxfrmlen; 898 uint16_t icb_maxalloc; 899 uint16_t icb_execthrottle; 900 uint8_t icb_retry_count; 901 uint8_t icb_retry_delay; 902 uint8_t icb_portname[8]; 903 uint16_t icb_hardaddr; 904 uint8_t icb_iqdevtype; 905 uint8_t icb_logintime; 906 uint8_t icb_nodename[8]; 907 uint16_t icb_rqstout; 908 uint16_t icb_rspnsin; 909 uint16_t icb_rqstqlen; 910 uint16_t icb_rsltqlen; 911 uint16_t icb_rqstaddr[4]; 912 uint16_t icb_respaddr[4]; 913 uint16_t icb_lunenables; 914 uint8_t icb_ccnt; 915 uint8_t icb_icnt; 916 uint16_t icb_lunetimeout; 917 uint16_t icb_reserved1; 918 uint16_t icb_xfwoptions; 919 uint8_t icb_racctimer; 920 uint8_t icb_idelaytimer; 921 uint16_t icb_zfwoptions; 922 uint16_t icb_reserved2[13]; 923} isp_icb_t; 924 925#define ICB_VERSION1 1 926 927#define ICBOPT_EXTENDED 0x8000 928#define ICBOPT_BOTH_WWNS 0x4000 929#define ICBOPT_FULL_LOGIN 0x2000 930#define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */ 931#define ICBOPT_PREV_ADDRESS 0x0800 932#define ICBOPT_SRCHDOWN 0x0400 933#define ICBOPT_NOLIP 0x0200 934#define ICBOPT_PDBCHANGE_AE 0x0100 935#define ICBOPT_TGT_TYPE 0x0080 936#define ICBOPT_INI_ADISC 0x0040 937#define ICBOPT_INI_DISABLE 0x0020 938#define ICBOPT_TGT_ENABLE 0x0010 939#define ICBOPT_FAST_POST 0x0008 940#define ICBOPT_FULL_DUPLEX 0x0004 941#define ICBOPT_FAIRNESS 0x0002 942#define ICBOPT_HARD_ADDRESS 0x0001 943 944#define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */ 945#define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */ 946#define ICBXOPT_FCTAPE_CONFIRM 0x2000 947#define ICBXOPT_FCTAPE 0x1000 948#define ICBXOPT_CLASS2_ACK0 0x0200 949#define ICBXOPT_CLASS2 0x0100 950#define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */ 951#define ICBXOPT_TOPO_MASK 0x0070 952#define ICBXOPT_LOOP_ONLY 0x0000 953#define ICBXOPT_PTP_ONLY 0x0010 954#define ICBXOPT_LOOP_2_PTP 0x0020 955#define ICBXOPT_PTP_2_LOOP 0x0030 956/* 957 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits. 958 * RIO is not defined for the 23XX cards (just 2200) 959 */ 960#define ICBXOPT_RIO_OFF 0 961#define ICBXOPT_RIO_16BIT 1 962#define ICBXOPT_RIO_32BIT 2 963#define ICBXOPT_RIO_16BIT_IOCB 3 964#define ICBXOPT_RIO_32BIT_IOCB 4 965#define ICBXOPT_ZIO 5 966#define ICBXOPT_TIMER_MASK 0x7 967 968#define ICBZOPT_RATE_MASK 0xC000 969#define ICBZOPT_RATE_ONEGB 0x0000 970#define ICBZOPT_RATE_AUTO 0x8000 971#define ICBZOPT_RATE_TWOGB 0x4000 972#define ICBZOPT_50_OHM 0x2000 973#define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */ 974#define ICBZOPT_RSPSZ_MASK 0x0030 975#define ICBZOPT_RSPSZ_24 0x0000 976#define ICBZOPT_RSPSZ_12 0x0010 977#define ICBZOPT_RSPSZ_24A 0x0020 978#define ICBZOPT_RSPSZ_32 0x0030 979#define ICBZOPT_SOFTID 0x0002 980#define ICBZOPT_ENA_RDXFR_RDY 0x0001 981 982/* 2400 F/W options */ 983#define ICB2400_OPT1_BOTH_WWNS 0x00004000 984#define ICB2400_OPT1_FULL_LOGIN 0x00002000 985#define ICB2400_OPT1_PREV_ADDRESS 0x00000800 986#define ICB2400_OPT1_SRCHDOWN 0x00000400 987#define ICB2400_OPT1_NOLIP 0x00000200 988#define ICB2400_OPT1_INI_DISABLE 0x00000020 989#define ICB2400_OPT1_TGT_ENABLE 0x00000010 990#define ICB2400_OPT1_FULL_DUPLEX 0x00000004 991#define ICB2400_OPT1_FAIRNESS 0x00000002 992#define ICB2400_OPT1_HARD_ADDRESS 0x00000001 993 994#define ICB2400_OPT2_ENA_ATIOMQ 0x08000000 995#define ICB2400_OPT2_ENA_IHA 0x04000000 996#define ICB2400_OPT2_QOS 0x02000000 997#define ICB2400_OPT2_IOCBS 0x01000000 998#define ICB2400_OPT2_ENA_IHR 0x00400000 999#define ICB2400_OPT2_ENA_VMS 0x00200000 1000#define ICB2400_OPT2_ENA_TA 0x00100000 1001#define ICB2400_OPT2_TPRLIC 0x00004000 1002#define ICB2400_OPT2_FCTAPE 0x00001000 1003#define ICB2400_OPT2_FCSP 0x00000800 1004#define ICB2400_OPT2_CLASS2_ACK0 0x00000200 1005#define ICB2400_OPT2_CLASS2 0x00000100 1006#define ICB2400_OPT2_NO_PLAY 0x00000080 1007#define ICB2400_OPT2_TOPO_MASK 0x00000070 1008#define ICB2400_OPT2_LOOP_ONLY 0x00000000 1009#define ICB2400_OPT2_PTP_ONLY 0x00000010 1010#define ICB2400_OPT2_LOOP_2_PTP 0x00000020 1011#define ICB2400_OPT2_TIMER_MASK 0x0000000f 1012#define ICB2400_OPT2_ZIO 0x00000005 1013#define ICB2400_OPT2_ZIO1 0x00000006 1014 1015#define ICB2400_OPT3_NO_CTXDIS 0x40000000 1016#define ICB2400_OPT3_ENA_ETH_RESP 0x08000000 1017#define ICB2400_OPT3_ENA_ETH_ATIO 0x04000000 1018#define ICB2400_OPT3_ENA_MFCF 0x00020000 1019#define ICB2400_OPT3_SKIP_FOURGB 0x00010000 1020#define ICB2400_OPT3_RATE_MASK 0x0000E000 1021#define ICB2400_OPT3_RATE_ONEGB 0x00000000 1022#define ICB2400_OPT3_RATE_TWOGB 0x00002000 1023#define ICB2400_OPT3_RATE_AUTO 0x00004000 1024#define ICB2400_OPT3_RATE_FOURGB 0x00006000 1025#define ICB2400_OPT3_RATE_EIGHTGB 0x00008000 1026#define ICB2400_OPT3_RATE_SIXTEENGB 0x0000A000 1027#define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200 1028#define ICB2400_OPT3_NO_N2N_LOGI 0x00000100 1029#define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080 1030#define ICB2400_OPT3_ENA_OOF 0x00000040 1031/* note that a response size flag of zero is reserved! */ 1032#define ICB2400_OPT3_RSPSZ_MASK 0x00000030 1033#define ICB2400_OPT3_RSPSZ_12 0x00000010 1034#define ICB2400_OPT3_RSPSZ_24 0x00000020 1035#define ICB2400_OPT3_RSPSZ_32 0x00000030 1036#define ICB2400_OPT3_SOFTID 0x00000002 1037 1038#define ICB_MIN_FRMLEN 256 1039#define ICB_MAX_FRMLEN 2112 1040#define ICB_DFLT_FRMLEN 1024 1041#define ICB_DFLT_ALLOC 256 1042#define ICB_DFLT_THROTTLE 16 1043#define ICB_DFLT_RDELAY 5 1044#define ICB_DFLT_RCOUNT 3 1045 1046#define ICB_LOGIN_TOV 30 1047#define ICB_LUN_ENABLE_TOV 15 1048 1049 1050/* 1051 * And somebody at QLogic had a great idea that you could just change 1052 * the structure *and* keep the version number the same as the other cards. 1053 */ 1054typedef struct { 1055 uint16_t icb_version; 1056 uint16_t icb_reserved0; 1057 uint16_t icb_maxfrmlen; 1058 uint16_t icb_execthrottle; 1059 uint16_t icb_xchgcnt; 1060 uint16_t icb_hardaddr; 1061 uint8_t icb_portname[8]; 1062 uint8_t icb_nodename[8]; 1063 uint16_t icb_rspnsin; 1064 uint16_t icb_rqstout; 1065 uint16_t icb_retry_count; 1066 uint16_t icb_priout; 1067 uint16_t icb_rsltqlen; 1068 uint16_t icb_rqstqlen; 1069 uint16_t icb_ldn_nols; 1070 uint16_t icb_prqstqlen; 1071 uint16_t icb_rqstaddr[4]; 1072 uint16_t icb_respaddr[4]; 1073 uint16_t icb_priaddr[4]; 1074 uint16_t icb_msixresp; 1075 uint16_t icb_msixatio; 1076 uint16_t icb_reserved1[2]; 1077 uint16_t icb_atio_in; 1078 uint16_t icb_atioqlen; 1079 uint16_t icb_atioqaddr[4]; 1080 uint16_t icb_idelaytimer; 1081 uint16_t icb_logintime; 1082 uint32_t icb_fwoptions1; 1083 uint32_t icb_fwoptions2; 1084 uint32_t icb_fwoptions3; 1085 uint16_t icb_qos; 1086 uint16_t icb_reserved2[3]; 1087 uint16_t icb_enodemac[3]; 1088 uint16_t icb_disctime; 1089 uint16_t icb_reserved3[4]; 1090} isp_icb_2400_t; 1091 1092#define RQRSP_ADDR0015 0 1093#define RQRSP_ADDR1631 1 1094#define RQRSP_ADDR3247 2 1095#define RQRSP_ADDR4863 3 1096 1097 1098#define ICB_NNM0 7 1099#define ICB_NNM1 6 1100#define ICB_NNM2 5 1101#define ICB_NNM3 4 1102#define ICB_NNM4 3 1103#define ICB_NNM5 2 1104#define ICB_NNM6 1 1105#define ICB_NNM7 0 1106 1107#define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 1108 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \ 1109 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \ 1110 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \ 1111 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \ 1112 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \ 1113 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \ 1114 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \ 1115 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff) 1116 1117#define MAKE_WWN_FROM_NODE_NAME(wwn, array) \ 1118 wwn = ((uint64_t) array[ICB_NNM0]) | \ 1119 ((uint64_t) array[ICB_NNM1] << 8) | \ 1120 ((uint64_t) array[ICB_NNM2] << 16) | \ 1121 ((uint64_t) array[ICB_NNM3] << 24) | \ 1122 ((uint64_t) array[ICB_NNM4] << 32) | \ 1123 ((uint64_t) array[ICB_NNM5] << 40) | \ 1124 ((uint64_t) array[ICB_NNM6] << 48) | \ 1125 ((uint64_t) array[ICB_NNM7] << 56) 1126 1127 1128/* 1129 * For MULTI_ID firmware, this describes a 1130 * virtual port entity for getting status. 1131 */ 1132typedef struct { 1133 uint16_t vp_port_status; 1134 uint8_t vp_port_options; 1135 uint8_t vp_port_loopid; 1136 uint8_t vp_port_portname[8]; 1137 uint8_t vp_port_nodename[8]; 1138 uint16_t vp_port_portid_lo; /* not present when trailing icb */ 1139 uint16_t vp_port_portid_hi; /* not present when trailing icb */ 1140} vp_port_info_t; 1141 1142#define ICB2400_VPOPT_ENA_SNSLOGIN 0x00000040 /* Enable SNS Login and SCR for Virtual Ports */ 1143#define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* Target Mode Disabled */ 1144#define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* Initiator Mode Enabled */ 1145#define ICB2400_VPOPT_ENABLED 0x00000008 /* VP Enabled */ 1146#define ICB2400_VPOPT_NOPLAY 0x00000004 /* ID Not Acquired */ 1147#define ICB2400_VPOPT_PREV_ADDRESS 0x00000002 /* Previously Assigned ID */ 1148#define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 /* Hard Assigned ID */ 1149 1150#define ICB2400_VPOPT_WRITE_SIZE 20 1151 1152/* 1153 * For MULTI_ID firmware, we append this structure 1154 * to the isp_icb_2400_t above, followed by a list 1155 * structures that are *most* of the vp_port_info_t. 1156 */ 1157typedef struct { 1158 uint16_t vp_count; 1159 uint16_t vp_global_options; 1160} isp_icb_2400_vpinfo_t; 1161 1162#define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */ 1163#define ICB2400_VPINFO_PORT_OFF(chan) \ 1164 (ICB2400_VPINFO_OFF + \ 1165 sizeof (isp_icb_2400_vpinfo_t) + (chan * ICB2400_VPOPT_WRITE_SIZE)) 1166 1167#define ICB2400_VPGOPT_FCA 0x01 /* Assume Clean Address bit in FLOGI ACC set (works only in static configurations) */ 1168#define ICB2400_VPGOPT_MID_DISABLE 0x02 /* when set, connection mode2 will work with NPIV-capable switched */ 1169#define ICB2400_VPGOPT_VP0_DECOUPLE 0x04 /* Allow VP0 decoupling if firmware supports it */ 1170#define ICB2400_VPGOPT_SUSP_FDISK 0x10 /* Suspend FDISC for Enabled VPs */ 1171#define ICB2400_VPGOPT_GEN_RIDA 0x20 /* Generate RIDA if FLOGI Fails */ 1172 1173typedef struct { 1174 isphdr_t vp_ctrl_hdr; 1175 uint32_t vp_ctrl_handle; 1176 uint16_t vp_ctrl_index_fail; 1177 uint16_t vp_ctrl_status; 1178 uint16_t vp_ctrl_command; 1179 uint16_t vp_ctrl_vp_count; 1180 uint16_t vp_ctrl_idmap[8]; 1181 uint8_t vp_ctrl_reserved[32]; 1182} vp_ctrl_info_t; 1183 1184#define VP_CTRL_CMD_ENABLE_VP 0 1185#define VP_CTRL_CMD_DISABLE_VP 8 1186#define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 9 1187#define VP_CTRL_CMD_DISABLE_VP_LOGO 0xA 1188 1189/* 1190 * We can use this structure for modifying either one or two VP ports after initialization 1191 */ 1192typedef struct { 1193 isphdr_t vp_mod_hdr; 1194 uint32_t vp_mod_hdl; 1195 uint16_t vp_mod_reserved0; 1196 uint16_t vp_mod_status; 1197 uint8_t vp_mod_cmd; 1198 uint8_t vp_mod_cnt; 1199 uint8_t vp_mod_idx0; 1200 uint8_t vp_mod_idx1; 1201 struct { 1202 uint8_t options; 1203 uint8_t loopid; 1204 uint16_t reserved1; 1205 uint8_t wwpn[8]; 1206 uint8_t wwnn[8]; 1207 } vp_mod_ports[2]; 1208 uint8_t vp_mod_reserved2[8]; 1209} vp_modify_t; 1210 1211#define VP_STS_OK 0x00 1212#define VP_STS_ERR 0x01 1213#define VP_CNT_ERR 0x02 1214#define VP_GEN_ERR 0x03 1215#define VP_IDX_ERR 0x04 1216#define VP_STS_BSY 0x05 1217 1218#define VP_MODIFY 0x00 1219#define VP_MODIFY_ENA 0x01 1220#define VP_MODIFY_OPT 0x02 1221#define VP_RESUME 0x03 1222 1223/* 1224 * Port Data Base Element 1225 */ 1226 1227typedef struct { 1228 uint16_t pdb_options; 1229 uint8_t pdb_mstate; 1230 uint8_t pdb_sstate; 1231 uint8_t pdb_hardaddr_bits[4]; 1232 uint8_t pdb_portid_bits[4]; 1233 uint8_t pdb_nodename[8]; 1234 uint8_t pdb_portname[8]; 1235 uint16_t pdb_execthrottle; 1236 uint16_t pdb_exec_count; 1237 uint8_t pdb_retry_count; 1238 uint8_t pdb_retry_delay; 1239 uint16_t pdb_resalloc; 1240 uint16_t pdb_curalloc; 1241 uint16_t pdb_qhead; 1242 uint16_t pdb_qtail; 1243 uint16_t pdb_tl_next; 1244 uint16_t pdb_tl_last; 1245 uint16_t pdb_features; /* PLOGI, Common Service */ 1246 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 1247 uint16_t pdb_roi; /* PLOGI, Common Service */ 1248 uint8_t pdb_target; 1249 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 1250 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */ 1251 uint16_t pdb_ncseq; /* PLOGI, Class 3 */ 1252 uint16_t pdb_noseq; /* PLOGI, Class 3 */ 1253 uint16_t pdb_labrtflg; 1254 uint16_t pdb_lstopflg; 1255 uint16_t pdb_sqhead; 1256 uint16_t pdb_sqtail; 1257 uint16_t pdb_ptimer; 1258 uint16_t pdb_nxt_seqid; 1259 uint16_t pdb_fcount; 1260 uint16_t pdb_prli_len; 1261 uint16_t pdb_prli_svc0; 1262 uint16_t pdb_prli_svc3; 1263 uint16_t pdb_loopid; 1264 uint16_t pdb_il_ptr; 1265 uint16_t pdb_sl_ptr; 1266} isp_pdb_21xx_t; 1267 1268#define PDB_OPTIONS_XMITTING (1<<11) 1269#define PDB_OPTIONS_LNKXMIT (1<<10) 1270#define PDB_OPTIONS_ABORTED (1<<9) 1271#define PDB_OPTIONS_ADISC (1<<1) 1272 1273#define PDB_STATE_DISCOVERY 0 1274#define PDB_STATE_WDISC_ACK 1 1275#define PDB_STATE_PLOGI 2 1276#define PDB_STATE_PLOGI_ACK 3 1277#define PDB_STATE_PRLI 4 1278#define PDB_STATE_PRLI_ACK 5 1279#define PDB_STATE_LOGGED_IN 6 1280#define PDB_STATE_PORT_UNAVAIL 7 1281#define PDB_STATE_PRLO 8 1282#define PDB_STATE_PRLO_ACK 9 1283#define PDB_STATE_PLOGO 10 1284#define PDB_STATE_PLOG_ACK 11 1285 1286#define SVC3_ROLE_MASK 0x30 1287#define SVC3_ROLE_SHIFT 4 1288 1289#define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 1290#define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2]) 1291 1292/* 1293 * Port Data Base Element- 24XX cards 1294 */ 1295typedef struct { 1296 uint16_t pdb_flags; 1297 uint8_t pdb_curstate; 1298 uint8_t pdb_laststate; 1299 uint8_t pdb_hardaddr_bits[4]; 1300 uint8_t pdb_portid_bits[4]; 1301#define pdb_nxt_seqid_2400 pdb_portid_bits[3] 1302 uint16_t pdb_retry_timer; 1303 uint16_t pdb_handle; 1304 uint16_t pdb_rcv_dsize; 1305 uint16_t pdb_reserved0; 1306 uint16_t pdb_prli_svc0; 1307 uint16_t pdb_prli_svc3; 1308 uint8_t pdb_portname[8]; 1309 uint8_t pdb_nodename[8]; 1310 uint8_t pdb_reserved1[24]; 1311} isp_pdb_24xx_t; 1312 1313#define PDB2400_TID_SUPPORTED 0x4000 1314#define PDB2400_FC_TAPE 0x0080 1315#define PDB2400_CLASS2_ACK0 0x0040 1316#define PDB2400_FCP_CONF 0x0020 1317#define PDB2400_CLASS2 0x0010 1318#define PDB2400_ADDR_VALID 0x0002 1319 1320#define PDB2400_STATE_PLOGI_PEND 0x03 1321#define PDB2400_STATE_PLOGI_DONE 0x04 1322#define PDB2400_STATE_PRLI_PEND 0x05 1323#define PDB2400_STATE_LOGGED_IN 0x06 1324#define PDB2400_STATE_PORT_UNAVAIL 0x07 1325#define PDB2400_STATE_PRLO_PEND 0x09 1326#define PDB2400_STATE_LOGO_PEND 0x0B 1327 1328/* 1329 * Common elements from the above two structures that are actually useful to us. 1330 */ 1331typedef struct { 1332 uint16_t handle; 1333 uint16_t prli_word3; 1334 uint32_t : 8, 1335 portid : 24; 1336 uint8_t portname[8]; 1337 uint8_t nodename[8]; 1338} isp_pdb_t; 1339 1340/* 1341 * Port Database Changed Async Event information for 24XX cards 1342 */ 1343#define PDB24XX_AE_OK 0x00 1344#define PDB24XX_AE_IMPL_LOGO_1 0x01 1345#define PDB24XX_AE_IMPL_LOGO_2 0x02 1346#define PDB24XX_AE_IMPL_LOGO_3 0x03 1347#define PDB24XX_AE_PLOGI_RCVD 0x04 1348#define PDB24XX_AE_PLOGI_RJT 0x05 1349#define PDB24XX_AE_PRLI_RCVD 0x06 1350#define PDB24XX_AE_PRLI_RJT 0x07 1351#define PDB24XX_AE_TPRLO 0x08 1352#define PDB24XX_AE_TPRLO_RJT 0x09 1353#define PDB24XX_AE_PRLO_RCVD 0x0a 1354#define PDB24XX_AE_LOGO_RCVD 0x0b 1355#define PDB24XX_AE_TOPO_CHG 0x0c 1356#define PDB24XX_AE_NPORT_CHG 0x0d 1357#define PDB24XX_AE_FLOGI_RJT 0x0e 1358#define PDB24XX_AE_BAD_FANN 0x0f 1359#define PDB24XX_AE_FLOGI_TIMO 0x10 1360#define PDB24XX_AE_ABX_LOGO 0x11 1361#define PDB24XX_AE_PLOGI_DONE 0x12 1362#define PDB24XX_AE_PRLI_DONJE 0x13 1363#define PDB24XX_AE_OPN_1 0x14 1364#define PDB24XX_AE_OPN_2 0x15 1365#define PDB24XX_AE_TXERR 0x16 1366#define PDB24XX_AE_FORCED_LOGO 0x17 1367#define PDB24XX_AE_DISC_TIMO 0x18 1368 1369/* 1370 * Genericized Port Login/Logout software structure 1371 */ 1372typedef struct { 1373 uint16_t handle; 1374 uint16_t channel; 1375 uint32_t 1376 flags : 8, 1377 portid : 24; 1378} isp_plcmd_t; 1379/* the flags to use are those for PLOGX_FLG_* below */ 1380 1381/* 1382 * ISP24XX- Login/Logout Port IOCB 1383 */ 1384typedef struct { 1385 isphdr_t plogx_header; 1386 uint32_t plogx_handle; 1387 uint16_t plogx_status; 1388 uint16_t plogx_nphdl; 1389 uint16_t plogx_flags; 1390 uint16_t plogx_vphdl; /* low 8 bits */ 1391 uint16_t plogx_portlo; /* low 16 bits */ 1392 uint16_t plogx_rspsz_porthi; 1393 struct { 1394 uint16_t lo16; 1395 uint16_t hi16; 1396 } plogx_ioparm[11]; 1397} isp_plogx_t; 1398 1399#define PLOGX_STATUS_OK 0x00 1400#define PLOGX_STATUS_UNAVAIL 0x28 1401#define PLOGX_STATUS_LOGOUT 0x29 1402#define PLOGX_STATUS_IOCBERR 0x31 1403 1404#define PLOGX_IOCBERR_NOLINK 0x01 1405#define PLOGX_IOCBERR_NOIOCB 0x02 1406#define PLOGX_IOCBERR_NOXGHG 0x03 1407#define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */ 1408#define PLOGX_IOCBERR_NOFABRIC 0x05 1409#define PLOGX_IOCBERR_NOTREADY 0x07 1410#define PLOGX_IOCBERR_NOLOGIN 0x08 /* further info in IOPARM 1 */ 1411#define PLOGX_IOCBERR_NOPCB 0x0a 1412#define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */ 1413#define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */ 1414#define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */ 1415#define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */ 1416#define PLOGX_IOCBERR_NOHANDLE 0x1c 1417#define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */ 1418 1419#define PLOGX_FLG_CMD_MASK 0xf 1420#define PLOGX_FLG_CMD_PLOGI 0 1421#define PLOGX_FLG_CMD_PRLI 1 1422#define PLOGX_FLG_CMD_PDISC 2 1423#define PLOGX_FLG_CMD_LOGO 8 1424#define PLOGX_FLG_CMD_PRLO 9 1425#define PLOGX_FLG_CMD_TPRLO 10 1426 1427#define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */ 1428#define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */ 1429#define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */ 1430#define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */ 1431#define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */ 1432#define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */ 1433#define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */ 1434 1435#define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */ 1436#define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */ 1437 1438/* 1439 * Report ID Acquisistion (24XX multi-id firmware) 1440 */ 1441typedef struct { 1442 isphdr_t ridacq_hdr; 1443 uint32_t ridacq_handle; 1444 union { 1445 struct { 1446 uint8_t ridacq_vp_acquired; 1447 uint8_t ridacq_vp_setup; 1448 uint16_t ridacq_reserved0; 1449 } type0; /* type 0 */ 1450 struct { 1451 uint16_t ridacq_vp_count; 1452 uint8_t ridacq_vp_index; 1453 uint8_t ridacq_vp_status; 1454 } type1; /* type 1 */ 1455 } un; 1456 uint16_t ridacq_vp_port_lo; 1457 uint8_t ridacq_vp_port_hi; 1458 uint8_t ridacq_format; /* 0 or 1 */ 1459 uint16_t ridacq_map[8]; 1460 uint8_t ridacq_reserved1[32]; 1461} isp_ridacq_t; 1462 1463#define RIDACQ_STS_COMPLETE 0 1464#define RIDACQ_STS_UNACQUIRED 1 1465#define RIDACQ_STS_CHANGED 20 1466 1467 1468/* 1469 * Simple Name Server Data Structures 1470 */ 1471#define SNS_GA_NXT 0x100 1472#define SNS_GPN_ID 0x112 1473#define SNS_GNN_ID 0x113 1474#define SNS_GFF_ID 0x11F 1475#define SNS_GID_FT 0x171 1476#define SNS_RFT_ID 0x217 1477typedef struct { 1478 uint16_t snscb_rblen; /* response buffer length (words) */ 1479 uint16_t snscb_reserved0; 1480 uint16_t snscb_addr[4]; /* response buffer address */ 1481 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1482 uint16_t snscb_reserved1; 1483 uint16_t snscb_data[]; /* variable data */ 1484} sns_screq_t; /* Subcommand Request Structure */ 1485 1486typedef struct { 1487 uint16_t snscb_rblen; /* response buffer length (words) */ 1488 uint16_t snscb_reserved0; 1489 uint16_t snscb_addr[4]; /* response buffer address */ 1490 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1491 uint16_t snscb_reserved1; 1492 uint16_t snscb_cmd; 1493 uint16_t snscb_reserved2; 1494 uint32_t snscb_reserved3; 1495 uint32_t snscb_port; 1496} sns_ga_nxt_req_t; 1497#define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t)) 1498 1499typedef struct { 1500 uint16_t snscb_rblen; /* response buffer length (words) */ 1501 uint16_t snscb_reserved0; 1502 uint16_t snscb_addr[4]; /* response buffer address */ 1503 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1504 uint16_t snscb_reserved1; 1505 uint16_t snscb_cmd; 1506 uint16_t snscb_reserved2; 1507 uint32_t snscb_reserved3; 1508 uint32_t snscb_portid; 1509} sns_gxn_id_req_t; 1510#define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t)) 1511 1512typedef struct { 1513 uint16_t snscb_rblen; /* response buffer length (words) */ 1514 uint16_t snscb_reserved0; 1515 uint16_t snscb_addr[4]; /* response buffer address */ 1516 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1517 uint16_t snscb_reserved1; 1518 uint16_t snscb_cmd; 1519 uint16_t snscb_mword_div_2; 1520 uint32_t snscb_reserved3; 1521 uint32_t snscb_fc4_type; 1522} sns_gid_ft_req_t; 1523#define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t)) 1524 1525typedef struct { 1526 uint16_t snscb_rblen; /* response buffer length (words) */ 1527 uint16_t snscb_reserved0; 1528 uint16_t snscb_addr[4]; /* response buffer address */ 1529 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1530 uint16_t snscb_reserved1; 1531 uint16_t snscb_cmd; 1532 uint16_t snscb_reserved2; 1533 uint32_t snscb_reserved3; 1534 uint32_t snscb_port; 1535 uint32_t snscb_fc4_types[8]; 1536} sns_rft_id_req_t; 1537#define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t)) 1538 1539typedef struct { 1540 ct_hdr_t snscb_cthdr; 1541 uint8_t snscb_port_type; 1542 uint8_t snscb_port_id[3]; 1543 uint8_t snscb_portname[8]; 1544 uint16_t snscb_data[]; /* variable data */ 1545} sns_scrsp_t; /* Subcommand Response Structure */ 1546 1547typedef struct { 1548 ct_hdr_t snscb_cthdr; 1549 uint8_t snscb_port_type; 1550 uint8_t snscb_port_id[3]; 1551 uint8_t snscb_portname[8]; 1552 uint8_t snscb_pnlen; /* symbolic port name length */ 1553 uint8_t snscb_pname[255]; /* symbolic port name */ 1554 uint8_t snscb_nodename[8]; 1555 uint8_t snscb_nnlen; /* symbolic node name length */ 1556 uint8_t snscb_nname[255]; /* symbolic node name */ 1557 uint8_t snscb_ipassoc[8]; 1558 uint8_t snscb_ipaddr[16]; 1559 uint8_t snscb_svc_class[4]; 1560 uint8_t snscb_fc4_types[32]; 1561 uint8_t snscb_fpname[8]; 1562 uint8_t snscb_reserved; 1563 uint8_t snscb_hardaddr[3]; 1564} sns_ga_nxt_rsp_t; /* Subcommand Response Structure */ 1565#define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t)) 1566 1567typedef struct { 1568 ct_hdr_t snscb_cthdr; 1569 uint8_t snscb_wwn[8]; 1570} sns_gxn_id_rsp_t; 1571#define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t)) 1572 1573typedef struct { 1574 ct_hdr_t snscb_cthdr; 1575 uint32_t snscb_fc4_features[32]; 1576} sns_gff_id_rsp_t; 1577#define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t)) 1578 1579typedef struct { 1580 ct_hdr_t snscb_cthdr; 1581 struct { 1582 uint8_t control; 1583 uint8_t portid[3]; 1584 } snscb_ports[1]; 1585} sns_gid_ft_rsp_t; 1586#define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2)) 1587#define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t)) 1588 1589/* 1590 * Other Misc Structures 1591 */ 1592 1593/* ELS Pass Through */ 1594typedef struct { 1595 isphdr_t els_hdr; 1596 uint32_t els_handle; 1597 uint16_t els_status; 1598 uint16_t els_nphdl; 1599 uint16_t els_xmit_dsd_count; /* outgoing only */ 1600 uint8_t els_vphdl; 1601 uint8_t els_sof; 1602 uint32_t els_rxid; 1603 uint16_t els_recv_dsd_count; /* outgoing only */ 1604 uint8_t els_opcode; 1605 uint8_t els_reserved1; 1606 uint8_t els_did_lo; 1607 uint8_t els_did_mid; 1608 uint8_t els_did_hi; 1609 uint8_t els_reserved2; 1610 uint16_t els_reserved3; 1611 uint16_t els_ctl_flags; 1612 union { 1613 struct { 1614 uint32_t _els_bytecnt; 1615 uint32_t _els_subcode1; 1616 uint32_t _els_subcode2; 1617 uint8_t _els_reserved4[20]; 1618 } in; 1619 struct { 1620 uint32_t _els_recv_bytecnt; 1621 uint32_t _els_xmit_bytecnt; 1622 uint32_t _els_xmit_dsd_length; 1623 uint16_t _els_xmit_dsd_a1500; 1624 uint16_t _els_xmit_dsd_a3116; 1625 uint16_t _els_xmit_dsd_a4732; 1626 uint16_t _els_xmit_dsd_a6348; 1627 uint32_t _els_recv_dsd_length; 1628 uint16_t _els_recv_dsd_a1500; 1629 uint16_t _els_recv_dsd_a3116; 1630 uint16_t _els_recv_dsd_a4732; 1631 uint16_t _els_recv_dsd_a6348; 1632 } out; 1633 } inout; 1634#define els_bytecnt inout.in._els_bytecnt 1635#define els_subcode1 inout.in._els_subcode1 1636#define els_subcode2 inout.in._els_subcode2 1637#define els_reserved4 inout.in._els_reserved4 1638#define els_recv_bytecnt inout.out._els_recv_bytecnt 1639#define els_xmit_bytecnt inout.out._els_xmit_bytecnt 1640#define els_xmit_dsd_length inout.out._els_xmit_dsd_length 1641#define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500 1642#define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116 1643#define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732 1644#define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348 1645#define els_recv_dsd_length inout.out._els_recv_dsd_length 1646#define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500 1647#define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116 1648#define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732 1649#define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348 1650} els_t; 1651 1652/* 1653 * A handy package structure for running FC-SCSI commands internally 1654 */ 1655typedef struct { 1656 uint16_t handle; 1657 uint16_t lun; 1658 uint32_t 1659 channel : 8, 1660 portid : 24; 1661 uint32_t timeout; 1662 union { 1663 struct { 1664 uint32_t data_length; 1665 uint32_t 1666 no_wait : 1, 1667 do_read : 1; 1668 uint8_t cdb[16]; 1669 void *data_ptr; 1670 } beg; 1671 struct { 1672 uint32_t data_residual; 1673 uint8_t status; 1674 uint8_t pad; 1675 uint16_t sense_length; 1676 uint8_t sense_data[32]; 1677 } end; 1678 } fcd; 1679} isp_xcmd_t; 1680 1681/* 1682 * Target Mode related definitions 1683 */ 1684#define QLTM_SENSELEN 18 /* non-FC cards only */ 1685#define QLTM_SVALID 0x80 1686 1687/* 1688 * Structure for Enable Lun and Modify Lun queue entries 1689 */ 1690typedef struct { 1691 isphdr_t le_header; 1692 uint32_t le_reserved; 1693 uint8_t le_lun; 1694 uint8_t le_rsvd; 1695 uint8_t le_ops; /* Modify LUN only */ 1696 uint8_t le_tgt; /* Not for FC */ 1697 uint32_t le_flags; /* Not for FC */ 1698 uint8_t le_status; 1699 uint8_t le_reserved2; 1700 uint8_t le_cmd_count; 1701 uint8_t le_in_count; 1702 uint8_t le_cdb6len; /* Not for FC */ 1703 uint8_t le_cdb7len; /* Not for FC */ 1704 uint16_t le_timeout; 1705 uint16_t le_reserved3[20]; 1706} lun_entry_t; 1707 1708/* 1709 * le_flags values 1710 */ 1711#define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */ 1712#define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */ 1713#define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */ 1714#define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */ 1715 1716/* 1717 * le_ops values 1718 */ 1719#define LUN_CCINCR 0x01 /* increment command count */ 1720#define LUN_CCDECR 0x02 /* decrement command count */ 1721#define LUN_ININCR 0x40 /* increment immed. notify count */ 1722#define LUN_INDECR 0x80 /* decrement immed. notify count */ 1723 1724/* 1725 * le_status values 1726 */ 1727#define LUN_OK 0x01 /* we be rockin' */ 1728#define LUN_ERR 0x04 /* request completed with error */ 1729#define LUN_INVAL 0x06 /* invalid request */ 1730#define LUN_NOCAP 0x16 /* can't provide requested capability */ 1731#define LUN_ENABLED 0x3E /* LUN already enabled */ 1732 1733/* 1734 * Immediate Notify Entry structure 1735 */ 1736#define IN_MSGLEN 8 /* 8 bytes */ 1737#define IN_RSVDLEN 8 /* 8 words */ 1738typedef struct { 1739 isphdr_t in_header; 1740 uint32_t in_reserved; 1741 uint8_t in_lun; /* lun */ 1742 uint8_t in_iid; /* initiator */ 1743 uint8_t in_reserved2; 1744 uint8_t in_tgt; /* target */ 1745 uint32_t in_flags; 1746 uint8_t in_status; 1747 uint8_t in_rsvd2; 1748 uint8_t in_tag_val; /* tag value */ 1749 uint8_t in_tag_type; /* tag type */ 1750 uint16_t in_seqid; /* sequence id */ 1751 uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 1752 uint16_t in_reserved3[IN_RSVDLEN]; 1753 uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */ 1754} in_entry_t; 1755 1756typedef struct { 1757 isphdr_t in_header; 1758 uint32_t in_reserved; 1759 uint8_t in_lun; /* lun */ 1760 uint8_t in_iid; /* initiator */ 1761 uint16_t in_scclun; 1762 uint32_t in_reserved2; 1763 uint16_t in_status; 1764 uint16_t in_task_flags; 1765 uint16_t in_seqid; /* sequence id */ 1766} in_fcentry_t; 1767 1768typedef struct { 1769 isphdr_t in_header; 1770 uint32_t in_reserved; 1771 uint16_t in_iid; /* initiator */ 1772 uint16_t in_scclun; 1773 uint32_t in_reserved2; 1774 uint16_t in_status; 1775 uint16_t in_task_flags; 1776 uint16_t in_seqid; /* sequence id */ 1777} in_fcentry_e_t; 1778 1779/* 1780 * Values for the in_status field 1781 */ 1782#define IN_REJECT 0x0D /* Message Reject message received */ 1783#define IN_RESET 0x0E /* Bus Reset occurred */ 1784#define IN_NO_RCAP 0x16 /* requested capability not available */ 1785#define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 1786#define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 1787#define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 1788#define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 1789#define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 1790#define IN_PORT_CHANGED 0x2A /* port changed */ 1791#define IN_GLOBAL_LOGO 0x2E /* all ports logged out */ 1792#define IN_NO_NEXUS 0x3B /* Nexus not established */ 1793#define IN_SRR_RCVD 0x45 /* SRR received */ 1794 1795/* 1796 * Values for the in_task_flags field- should only get one at a time! 1797 */ 1798#define TASK_FLAGS_RESERVED_MASK (0xe700) 1799#define TASK_FLAGS_CLEAR_ACA (1<<14) 1800#define TASK_FLAGS_TARGET_RESET (1<<13) 1801#define TASK_FLAGS_LUN_RESET (1<<12) 1802#define TASK_FLAGS_CLEAR_TASK_SET (1<<10) 1803#define TASK_FLAGS_ABORT_TASK_SET (1<<9) 1804 1805/* 1806 * ISP24XX Immediate Notify 1807 */ 1808typedef struct { 1809 isphdr_t in_header; 1810 uint32_t in_reserved; 1811 uint16_t in_nphdl; 1812 uint16_t in_reserved1; 1813 uint16_t in_flags; 1814 uint16_t in_srr_rxid; 1815 uint16_t in_status; 1816 uint8_t in_status_subcode; 1817 uint8_t in_fwhandle; 1818 uint32_t in_rxid; 1819 uint16_t in_srr_reloff_lo; 1820 uint16_t in_srr_reloff_hi; 1821 uint16_t in_srr_iu; 1822 uint16_t in_srr_oxid; 1823 /* 1824 * If bit 2 is set in in_flags, the N-Port and 1825 * handle tags are valid. If the received ELS is 1826 * a LOGO, then these tags contain the N Port ID 1827 * from the LOGO payload. If the received ELS 1828 * request is TPRLO, these tags contain the 1829 * Third Party Originator N Port ID. 1830 */ 1831 uint16_t in_nport_id_hi; 1832#define in_prli_options in_nport_id_hi 1833 uint8_t in_nport_id_lo; 1834 uint8_t in_reserved3; 1835 uint16_t in_np_handle; 1836 uint8_t in_reserved4[12]; 1837 uint8_t in_reserved5; 1838 uint8_t in_vpidx; 1839 uint32_t in_reserved6; 1840 uint16_t in_portid_lo; 1841 uint8_t in_portid_hi; 1842 uint8_t in_reserved7; 1843 uint16_t in_reserved8; 1844 uint16_t in_oxid; 1845} in_fcentry_24xx_t; 1846 1847#define IN24XX_FLAG_PUREX_IOCB 0x1 1848#define IN24XX_FLAG_GLOBAL_LOGOUT 0x2 1849#define IN24XX_FLAG_NPHDL_VALID 0x4 1850#define IN24XX_FLAG_N2N_PRLI 0x8 1851#define IN24XX_FLAG_PN_NN_VALID 0x10 1852 1853#define IN24XX_LIP_RESET 0x0E 1854#define IN24XX_LINK_RESET 0x0F 1855#define IN24XX_PORT_LOGOUT 0x29 1856#define IN24XX_PORT_CHANGED 0x2A 1857#define IN24XX_LINK_FAILED 0x2E 1858#define IN24XX_SRR_RCVD 0x45 1859#define IN24XX_ELS_RCVD 0x46 /* 1860 * login-affectin ELS received- check 1861 * subcode for specific opcode 1862 */ 1863 1864/* 1865 * For f/w > 4.0.25, these offsets in the Immediate Notify contain 1866 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in 1867 * Big Endian format. 1868 */ 1869#define IN24XX_PRLI_WWNN_OFF 0x18 1870#define IN24XX_PRLI_WWPN_OFF 0x28 1871#define IN24XX_PLOGI_WWNN_OFF 0x20 1872#define IN24XX_PLOGI_WWPN_OFF 0x28 1873 1874/* 1875 * For f/w > 4.0.25, this offset in the Immediate Notify contain 1876 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format. 1877 */ 1878#define IN24XX_LOGO_WWPN_OFF 0x28 1879 1880/* 1881 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT 1882 */ 1883#define IN24XX_PORT_LOGOUT_PDISC_TMO 0x00 1884#define IN24XX_PORT_LOGOUT_UXPR_DISC 0x01 1885#define IN24XX_PORT_LOGOUT_OWN_OPN 0x02 1886#define IN24XX_PORT_LOGOUT_OWN_OPN_SFT 0x03 1887#define IN24XX_PORT_LOGOUT_ABTS_TMO 0x04 1888#define IN24XX_PORT_LOGOUT_DISC_RJT 0x05 1889#define IN24XX_PORT_LOGOUT_LOGIN_NEEDED 0x06 1890#define IN24XX_PORT_LOGOUT_BAD_DISC 0x07 1891#define IN24XX_PORT_LOGOUT_LOST_ALPA 0x08 1892#define IN24XX_PORT_LOGOUT_XMIT_FAILURE 0x09 1893 1894/* 1895 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED 1896 */ 1897#define IN24XX_PORT_CHANGED_BADFAN 0x00 1898#define IN24XX_PORT_CHANGED_TOPO_CHANGE 0x01 1899#define IN24XX_PORT_CHANGED_FLOGI_ACC 0x02 1900#define IN24XX_PORT_CHANGED_FLOGI_RJT 0x03 1901#define IN24XX_PORT_CHANGED_TIMEOUT 0x04 1902#define IN24XX_PORT_CHANGED_PORT_CHANGE 0x05 1903 1904/* 1905 * Notify Acknowledge Entry structure 1906 */ 1907#define NA_RSVDLEN 22 1908typedef struct { 1909 isphdr_t na_header; 1910 uint32_t na_reserved; 1911 uint8_t na_lun; /* lun */ 1912 uint8_t na_iid; /* initiator */ 1913 uint8_t na_reserved2; 1914 uint8_t na_tgt; /* target */ 1915 uint32_t na_flags; 1916 uint8_t na_status; 1917 uint8_t na_event; 1918 uint16_t na_seqid; /* sequence id */ 1919 uint16_t na_reserved3[NA_RSVDLEN]; 1920} na_entry_t; 1921 1922/* 1923 * Value for the na_event field 1924 */ 1925#define NA_RST_CLRD 0x80 /* Clear an async event notification */ 1926#define NA_OK 0x01 /* Notify Acknowledge Succeeded */ 1927#define NA_INVALID 0x06 /* Invalid Notify Acknowledge */ 1928 1929#define NA2_RSVDLEN 21 1930typedef struct { 1931 isphdr_t na_header; 1932 uint32_t na_reserved; 1933 uint8_t na_reserved1; 1934 uint8_t na_iid; /* initiator loop id */ 1935 uint16_t na_response; 1936 uint16_t na_flags; 1937 uint16_t na_reserved2; 1938 uint16_t na_status; 1939 uint16_t na_task_flags; 1940 uint16_t na_seqid; /* sequence id */ 1941 uint16_t na_reserved3[NA2_RSVDLEN]; 1942} na_fcentry_t; 1943 1944typedef struct { 1945 isphdr_t na_header; 1946 uint32_t na_reserved; 1947 uint16_t na_iid; /* initiator loop id */ 1948 uint16_t na_response; /* response code */ 1949 uint16_t na_flags; 1950 uint16_t na_reserved2; 1951 uint16_t na_status; 1952 uint16_t na_task_flags; 1953 uint16_t na_seqid; /* sequence id */ 1954 uint16_t na_reserved3[NA2_RSVDLEN]; 1955} na_fcentry_e_t; 1956 1957#define NAFC_RCOUNT 0x80 /* increment resource count */ 1958#define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */ 1959#define NAFC_TVALID 0x10 /* task mangement response code is valid */ 1960 1961/* 1962 * ISP24XX Notify Acknowledge 1963 */ 1964 1965typedef struct { 1966 isphdr_t na_header; 1967 uint32_t na_handle; 1968 uint16_t na_nphdl; 1969 uint16_t na_reserved1; 1970 uint16_t na_flags; 1971 uint16_t na_srr_rxid; 1972 uint16_t na_status; 1973 uint8_t na_status_subcode; 1974 uint8_t na_fwhandle; 1975 uint32_t na_rxid; 1976 uint16_t na_srr_reloff_lo; 1977 uint16_t na_srr_reloff_hi; 1978 uint16_t na_srr_iu; 1979 uint16_t na_srr_flags; 1980 uint8_t na_reserved3[18]; 1981 uint8_t na_reserved4; 1982 uint8_t na_vpidx; 1983 uint8_t na_srr_reject_vunique; 1984 uint8_t na_srr_reject_explanation; 1985 uint8_t na_srr_reject_code; 1986 uint8_t na_reserved5; 1987 uint8_t na_reserved6[6]; 1988 uint16_t na_oxid; 1989} na_fcentry_24xx_t; 1990 1991/* 1992 * Accept Target I/O Entry structure 1993 */ 1994#define ATIO_CDBLEN 26 1995 1996typedef struct { 1997 isphdr_t at_header; 1998 uint16_t at_reserved; 1999 uint16_t at_handle; 2000 uint8_t at_lun; /* lun */ 2001 uint8_t at_iid; /* initiator */ 2002 uint8_t at_cdblen; /* cdb length */ 2003 uint8_t at_tgt; /* target */ 2004 uint32_t at_flags; 2005 uint8_t at_status; /* firmware status */ 2006 uint8_t at_scsi_status; /* scsi status */ 2007 uint8_t at_tag_val; /* tag value */ 2008 uint8_t at_tag_type; /* tag type */ 2009 uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 2010 uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */ 2011} at_entry_t; 2012 2013/* 2014 * at_flags values 2015 */ 2016#define AT_NODISC 0x00008000 /* disconnect disabled */ 2017#define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */ 2018 2019/* 2020 * at_status values 2021 */ 2022#define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 2023#define AT_RESET 0x0E /* SCSI Bus Reset Occurred */ 2024#define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2025#define AT_NOCAP 0x16 /* Requested capability not available */ 2026#define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2027#define AT_CDB 0x3D /* CDB received */ 2028/* 2029 * Macros to create and fetch and test concatenated handle and tag value macros 2030 * (SPI only) 2031 */ 2032#define AT_MAKE_TAGID(tid, aep) \ 2033 tid = aep->at_handle; \ 2034 if (aep->at_flags & AT_TQAE) { \ 2035 tid |= (aep->at_tag_val << 16); \ 2036 tid |= (1 << 24); \ 2037 } 2038 2039#define CT_MAKE_TAGID(tid, ct) \ 2040 tid = ct->ct_fwhandle; \ 2041 if (ct->ct_flags & CT_TQAE) { \ 2042 tid |= (ct->ct_tag_val << 16); \ 2043 tid |= (1 << 24); \ 2044 } 2045 2046#define AT_HAS_TAG(val) ((val) & (1 << 24)) 2047#define AT_GET_TAG(val) (((val) >> 16) & 0xff) 2048#define AT_GET_HANDLE(val) ((val) & 0xffff) 2049 2050#define IN_MAKE_TAGID(tid, inp) \ 2051 tid = inp->in_seqid; \ 2052 tid |= (inp->in_tag_val << 16); \ 2053 tid |= (1 << 24) 2054 2055/* 2056 * Accept Target I/O Entry structure, Type 2 2057 */ 2058#define ATIO2_CDBLEN 16 2059 2060typedef struct { 2061 isphdr_t at_header; 2062 uint32_t at_reserved; 2063 uint8_t at_lun; /* lun or reserved */ 2064 uint8_t at_iid; /* initiator */ 2065 uint16_t at_rxid; /* response ID */ 2066 uint16_t at_flags; 2067 uint16_t at_status; /* firmware status */ 2068 uint8_t at_crn; /* command reference number */ 2069 uint8_t at_taskcodes; 2070 uint8_t at_taskflags; 2071 uint8_t at_execodes; 2072 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2073 uint32_t at_datalen; /* allocated data len */ 2074 uint16_t at_scclun; /* SCC Lun or reserved */ 2075 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2076 uint16_t at_reserved2[6]; 2077 uint16_t at_oxid; 2078} at2_entry_t; 2079 2080typedef struct { 2081 isphdr_t at_header; 2082 uint32_t at_reserved; 2083 uint16_t at_iid; /* initiator */ 2084 uint16_t at_rxid; /* response ID */ 2085 uint16_t at_flags; 2086 uint16_t at_status; /* firmware status */ 2087 uint8_t at_crn; /* command reference number */ 2088 uint8_t at_taskcodes; 2089 uint8_t at_taskflags; 2090 uint8_t at_execodes; 2091 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2092 uint32_t at_datalen; /* allocated data len */ 2093 uint16_t at_scclun; /* SCC Lun or reserved */ 2094 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2095 uint16_t at_reserved2[6]; 2096 uint16_t at_oxid; 2097} at2e_entry_t; 2098 2099#define ATIO2_WWPN_OFFSET 0x2A 2100#define ATIO2_OXID_OFFSET 0x3E 2101 2102#define ATIO2_TC_ATTR_MASK 0x7 2103#define ATIO2_TC_ATTR_SIMPLEQ 0 2104#define ATIO2_TC_ATTR_HEADOFQ 1 2105#define ATIO2_TC_ATTR_ORDERED 2 2106#define ATIO2_TC_ATTR_ACAQ 4 2107#define ATIO2_TC_ATTR_UNTAGGED 5 2108 2109#define ATIO2_EX_WRITE 0x1 2110#define ATIO2_EX_READ 0x2 2111/* 2112 * Macros to create and fetch and test concatenated handle and tag value macros 2113 */ 2114#define AT2_MAKE_TAGID(tid, bus, inst, aep) \ 2115 tid = aep->at_rxid; \ 2116 tid |= (((uint64_t)inst) << 32); \ 2117 tid |= (((uint64_t)bus) << 48) 2118 2119#define CT2_MAKE_TAGID(tid, bus, inst, ct) \ 2120 tid = ct->ct_rxid; \ 2121 tid |= (((uint64_t)inst) << 32); \ 2122 tid |= (((uint64_t)(bus & 0xff)) << 48) 2123 2124#define AT2_HAS_TAG(val) 1 2125#define AT2_GET_TAG(val) ((val) & 0xffffffff) 2126#define AT2_GET_INST(val) (((val) >> 32) & 0xffff) 2127#define AT2_GET_HANDLE AT2_GET_TAG 2128#define AT2_GET_BUS(val) (((val) >> 48) & 0xff) 2129 2130#define FC_HAS_TAG AT2_HAS_TAG 2131#define FC_GET_TAG AT2_GET_TAG 2132#define FC_GET_INST AT2_GET_INST 2133#define FC_GET_HANDLE AT2_GET_HANDLE 2134 2135#define IN_FC_MAKE_TAGID(tid, bus, inst, seqid) \ 2136 tid = seqid; \ 2137 tid |= (((uint64_t)inst) << 32); \ 2138 tid |= (((uint64_t)(bus & 0xff)) << 48) 2139 2140#define FC_TAG_INSERT_INST(tid, inst) \ 2141 tid &= ~0x0000ffff00000000ull; \ 2142 tid |= (((uint64_t)inst) << 32) 2143 2144/* 2145 * 24XX ATIO Definition 2146 * 2147 * This is *quite* different from other entry types. 2148 * First of all, it has its own queue it comes in on. 2149 * 2150 * Secondly, it doesn't have a normal header. 2151 * 2152 * Thirdly, it's just a passthru of the FCP CMND IU 2153 * which is recorded in big endian mode. 2154 */ 2155typedef struct { 2156 uint8_t at_type; 2157 uint8_t at_count; 2158 /* 2159 * Task attribute in high four bits, 2160 * the rest is the FCP CMND IU Length. 2161 * NB: the command can extend past the 2162 * length for a single queue entry. 2163 */ 2164 uint16_t at_ta_len; 2165 uint32_t at_rxid; 2166 fc_hdr_t at_hdr; 2167 fcp_cmnd_iu_t at_cmnd; 2168} at7_entry_t; 2169#define AT7_NORESRC_RXID 0xffffffff 2170 2171 2172/* 2173 * Continue Target I/O Entry structure 2174 * Request from driver. The response from the 2175 * ISP firmware is the same except that the last 18 2176 * bytes are overwritten by suggested sense data if 2177 * the 'autosense valid' bit is set in the status byte. 2178 */ 2179typedef struct { 2180 isphdr_t ct_header; 2181 uint16_t ct_syshandle; 2182 uint16_t ct_fwhandle; /* required by f/w */ 2183 uint8_t ct_lun; /* lun */ 2184 uint8_t ct_iid; /* initiator id */ 2185 uint8_t ct_reserved2; 2186 uint8_t ct_tgt; /* our target id */ 2187 uint32_t ct_flags; 2188 uint8_t ct_status; /* isp status */ 2189 uint8_t ct_scsi_status; /* scsi status */ 2190 uint8_t ct_tag_val; /* tag value */ 2191 uint8_t ct_tag_type; /* tag type */ 2192 uint32_t ct_xfrlen; /* transfer length */ 2193 uint32_t ct_resid; /* residual length */ 2194 uint16_t ct_timeout; 2195 uint16_t ct_seg_count; 2196 ispds_t ct_dataseg[ISP_RQDSEG]; 2197} ct_entry_t; 2198 2199/* 2200 * For some of the dual port SCSI adapters, port (bus #) is reported 2201 * in the MSbit of ct_iid. Bit fields are a bit too awkward here. 2202 * 2203 * Note that this does not apply to FC adapters at all which can and 2204 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices 2205 * that have logged in across a SCSI fabric. 2206 */ 2207#define GET_IID_VAL(x) (x & 0x3f) 2208#define GET_BUS_VAL(x) ((x >> 7) & 0x1) 2209#define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f)) 2210#define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7)) 2211 2212/* 2213 * ct_flags values 2214 */ 2215#define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */ 2216#define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction - *to* initiator */ 2217#define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction - *from* initiator */ 2218#define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */ 2219#define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */ 2220#define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */ 2221#define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */ 2222#define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */ 2223#define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */ 2224#define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */ 2225#define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */ 2226 2227/* 2228 * ct_status values 2229 * - set by the firmware when it returns the CTIO 2230 */ 2231#define CT_OK 0x01 /* completed without error */ 2232#define CT_ABORTED 0x02 /* aborted by host */ 2233#define CT_ERR 0x04 /* see sense data for error */ 2234#define CT_INVAL 0x06 /* request for disabled lun */ 2235#define CT_NOPATH 0x07 /* invalid ITL nexus */ 2236#define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 2237#define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */ 2238#define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 2239#define CT_TIMEOUT 0x0B /* timed out */ 2240#define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 2241#define CT_PARITY 0x0F /* Uncorrectable Parity Error */ 2242#define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */ 2243#define CT_PANIC 0x13 /* Unrecoverable Error */ 2244#define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2245#define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */ 2246#define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2247#define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 2248#define CT_PORTUNAVAIL 0x28 /* port not available */ 2249#define CT_LOGOUT 0x29 /* port logout */ 2250#define CT_PORTCHANGED 0x2A /* port changed */ 2251#define CT_IDE 0x33 /* Initiator Detected Error */ 2252#define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 2253#define CT_SRR 0x45 /* SRR Received */ 2254#define CT_LUN_RESET 0x48 /* Lun Reset Received */ 2255 2256#define CT_HBA_RESET 0xffff /* pseudo error - command destroyed by HBA reset*/ 2257 2258/* 2259 * When the firmware returns a CTIO entry, it may overwrite the last 2260 * part of the structure with sense data. This starts at offset 0x2E 2261 * into the entry, which is in the middle of ct_dataseg[1]. Rather 2262 * than define a new struct for this, I'm just using the sense data 2263 * offset. 2264 */ 2265#define CTIO_SENSE_OFFSET 0x2E 2266 2267/* 2268 * Entry length in u_longs. All entries are the same size so 2269 * any one will do as the numerator. 2270 */ 2271#define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t)) 2272 2273/* 2274 * QLA2100 CTIO (type 2) entry 2275 */ 2276#define MAXRESPLEN 26 2277typedef struct { 2278 isphdr_t ct_header; 2279 uint32_t ct_syshandle; 2280 uint8_t ct_lun; /* lun */ 2281 uint8_t ct_iid; /* initiator id */ 2282 uint16_t ct_rxid; /* response ID */ 2283 uint16_t ct_flags; 2284 uint16_t ct_status; /* isp status */ 2285 uint16_t ct_timeout; 2286 uint16_t ct_seg_count; 2287 uint32_t ct_reloff; /* relative offset */ 2288 uint32_t ct_resid; /* residual length */ 2289 union { 2290 /* 2291 * The three different modes that the target driver 2292 * can set the CTIO{2,3,4} up as. 2293 * 2294 * The first is for sending FCP_DATA_IUs as well as 2295 * (optionally) sending a terminal SCSI status FCP_RSP_IU. 2296 * 2297 * The second is for sending SCSI sense data in an FCP_RSP_IU. 2298 * Note that no FCP_DATA_IUs will be sent. 2299 * 2300 * The third is for sending FCP_RSP_IUs as built specifically 2301 * in system memory as located by the isp_dataseg. 2302 */ 2303 struct { 2304 uint32_t _reserved; 2305 uint16_t _reserved2; 2306 uint16_t ct_scsi_status; 2307 uint32_t ct_xfrlen; 2308 union { 2309 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2310 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2311 ispdslist_t ct_dslist; 2312 } u; 2313 } m0; 2314 struct { 2315 uint16_t _reserved; 2316 uint16_t _reserved2; 2317 uint16_t ct_senselen; 2318 uint16_t ct_scsi_status; 2319 uint16_t ct_resplen; 2320 uint8_t ct_resp[MAXRESPLEN]; 2321 } m1; 2322 struct { 2323 uint32_t _reserved; 2324 uint16_t _reserved2; 2325 uint16_t _reserved3; 2326 uint32_t ct_datalen; 2327 union { 2328 ispds_t ct_fcp_rsp_iudata_32; 2329 ispds64_t ct_fcp_rsp_iudata_64; 2330 } u; 2331 } m2; 2332 } rsp; 2333} ct2_entry_t; 2334 2335typedef struct { 2336 isphdr_t ct_header; 2337 uint32_t ct_syshandle; 2338 uint16_t ct_iid; /* initiator id */ 2339 uint16_t ct_rxid; /* response ID */ 2340 uint16_t ct_flags; 2341 uint16_t ct_status; /* isp status */ 2342 uint16_t ct_timeout; 2343 uint16_t ct_seg_count; 2344 uint32_t ct_reloff; /* relative offset */ 2345 uint32_t ct_resid; /* residual length */ 2346 union { 2347 struct { 2348 uint32_t _reserved; 2349 uint16_t _reserved2; 2350 uint16_t ct_scsi_status; 2351 uint32_t ct_xfrlen; 2352 union { 2353 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2354 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2355 ispdslist_t ct_dslist; 2356 } u; 2357 } m0; 2358 struct { 2359 uint16_t _reserved; 2360 uint16_t _reserved2; 2361 uint16_t ct_senselen; 2362 uint16_t ct_scsi_status; 2363 uint16_t ct_resplen; 2364 uint8_t ct_resp[MAXRESPLEN]; 2365 } m1; 2366 struct { 2367 uint32_t _reserved; 2368 uint16_t _reserved2; 2369 uint16_t _reserved3; 2370 uint32_t ct_datalen; 2371 union { 2372 ispds_t ct_fcp_rsp_iudata_32; 2373 ispds64_t ct_fcp_rsp_iudata_64; 2374 } u; 2375 } m2; 2376 } rsp; 2377} ct2e_entry_t; 2378 2379/* 2380 * ct_flags values for CTIO2 2381 */ 2382#define CT2_FLAG_MODE0 0x0000 2383#define CT2_FLAG_MODE1 0x0001 2384#define CT2_FLAG_MODE2 0x0002 2385#define CT2_FLAG_MMASK 0x0003 2386#define CT2_DATA_IN 0x0040 /* *to* initiator */ 2387#define CT2_DATA_OUT 0x0080 /* *from* initiator */ 2388#define CT2_NO_DATA 0x00C0 2389#define CT2_DATAMASK 0x00C0 2390#define CT2_CCINCR 0x0100 2391#define CT2_FASTPOST 0x0200 2392#define CT2_CONFIRM 0x2000 2393#define CT2_TERMINATE 0x4000 2394#define CT2_SENDSTATUS 0x8000 2395 2396/* 2397 * ct_status values are (mostly) the same as that for ct_entry. 2398 */ 2399 2400/* 2401 * ct_scsi_status values- the low 8 bits are the normal SCSI status 2402 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 2403 * fields. 2404 */ 2405#define CT2_RSPLEN_VALID 0x0100 2406#define CT2_SNSLEN_VALID 0x0200 2407#define CT2_DATA_OVER 0x0400 2408#define CT2_DATA_UNDER 0x0800 2409 2410/* 2411 * ISP24XX CTIO 2412 */ 2413#define MAXRESPLEN_24XX 24 2414typedef struct { 2415 isphdr_t ct_header; 2416 uint32_t ct_syshandle; 2417 uint16_t ct_nphdl; /* status on returned CTIOs */ 2418 uint16_t ct_timeout; 2419 uint16_t ct_seg_count; 2420 uint8_t ct_vpidx; 2421 uint8_t ct_xflags; 2422 uint16_t ct_iid_lo; /* low 16 bits of portid */ 2423 uint8_t ct_iid_hi; /* hi 8 bits of portid */ 2424 uint8_t ct_reserved; 2425 uint32_t ct_rxid; 2426 uint16_t ct_senselen; /* mode 1 only */ 2427 uint16_t ct_flags; 2428 uint32_t ct_resid; /* residual length */ 2429 uint16_t ct_oxid; 2430 uint16_t ct_scsi_status; /* modes 0 && 1 only */ 2431 union { 2432 struct { 2433 uint32_t reloff; 2434 uint32_t reserved0; 2435 uint32_t ct_xfrlen; 2436 uint32_t reserved1; 2437 ispds64_t ds; 2438 } m0; 2439 struct { 2440 uint16_t ct_resplen; 2441 uint16_t reserved; 2442 uint8_t ct_resp[MAXRESPLEN_24XX]; 2443 } m1; 2444 struct { 2445 uint32_t reserved0; 2446 uint32_t reserved1; 2447 uint32_t ct_datalen; 2448 uint32_t reserved2; 2449 ispds64_t ct_fcp_rsp_iudata; 2450 } m2; 2451 } rsp; 2452} ct7_entry_t; 2453 2454/* 2455 * ct_flags values for CTIO7 2456 */ 2457#define CT7_NO_DATA 0x0000 2458#define CT7_DATA_OUT 0x0001 /* *from* initiator */ 2459#define CT7_DATA_IN 0x0002 /* *to* initiator */ 2460#define CT7_DATAMASK 0x3 2461#define CT7_DSD_ENABLE 0x0004 2462#define CT7_CONF_STSFD 0x0010 2463#define CT7_EXPLCT_CONF 0x0020 2464#define CT7_FLAG_MODE0 0x0000 2465#define CT7_FLAG_MODE1 0x0040 2466#define CT7_FLAG_MODE2 0x0080 2467#define CT7_FLAG_MMASK 0x00C0 2468#define CT7_NOACK 0x0100 2469#define CT7_TASK_ATTR_SHIFT 9 2470#define CT7_CONFIRM 0x2000 2471#define CT7_TERMINATE 0x4000 2472#define CT7_SENDSTATUS 0x8000 2473 2474/* 2475 * Type 7 CTIO status codes 2476 */ 2477#define CT7_OK 0x01 /* completed without error */ 2478#define CT7_ABORTED 0x02 /* aborted by host */ 2479#define CT7_ERR 0x04 /* see sense data for error */ 2480#define CT7_INVAL 0x06 /* request for disabled lun */ 2481#define CT7_INVRXID 0x08 /* Invalid RX_ID */ 2482#define CT7_DATA_OVER 0x09 /* Data Overrun */ 2483#define CT7_TIMEOUT 0x0B /* timed out */ 2484#define CT7_RESET 0x0E /* LIP Rset Received */ 2485#define CT7_BUS_ERROR 0x10 /* DMA PCI Error */ 2486#define CT7_REASSY_ERR 0x11 /* DMA reassembly error */ 2487#define CT7_DATA_UNDER 0x15 /* Data Underrun */ 2488#define CT7_PORTUNAVAIL 0x28 /* port not available */ 2489#define CT7_LOGOUT 0x29 /* port logout */ 2490#define CT7_PORTCHANGED 0x2A /* port changed */ 2491#define CT7_SRR 0x45 /* SRR Received */ 2492 2493/* 2494 * Other 24XX related target IOCBs 2495 */ 2496 2497/* 2498 * ABTS Received 2499 */ 2500typedef struct { 2501 isphdr_t abts_header; 2502 uint8_t abts_reserved0[6]; 2503 uint16_t abts_nphdl; 2504 uint16_t abts_reserved1; 2505 uint16_t abts_sof; 2506 uint32_t abts_rxid_abts; 2507 uint16_t abts_did_lo; 2508 uint8_t abts_did_hi; 2509 uint8_t abts_r_ctl; 2510 uint16_t abts_sid_lo; 2511 uint8_t abts_sid_hi; 2512 uint8_t abts_cs_ctl; 2513 uint16_t abts_fs_ctl; 2514 uint8_t abts_f_ctl; 2515 uint8_t abts_type; 2516 uint16_t abts_seq_cnt; 2517 uint8_t abts_df_ctl; 2518 uint8_t abts_seq_id; 2519 uint16_t abts_rx_id; 2520 uint16_t abts_ox_id; 2521 uint32_t abts_param; 2522 uint8_t abts_reserved2[16]; 2523 uint32_t abts_rxid_task; 2524} abts_t; 2525 2526typedef struct { 2527 isphdr_t abts_rsp_header; 2528 uint32_t abts_rsp_handle; 2529 uint16_t abts_rsp_status; 2530 uint16_t abts_rsp_nphdl; 2531 uint16_t abts_rsp_ctl_flags; 2532 uint16_t abts_rsp_sof; 2533 uint32_t abts_rsp_rxid_abts; 2534 uint16_t abts_rsp_did_lo; 2535 uint8_t abts_rsp_did_hi; 2536 uint8_t abts_rsp_r_ctl; 2537 uint16_t abts_rsp_sid_lo; 2538 uint8_t abts_rsp_sid_hi; 2539 uint8_t abts_rsp_cs_ctl; 2540 uint16_t abts_rsp_f_ctl_lo; 2541 uint8_t abts_rsp_f_ctl_hi; 2542 uint8_t abts_rsp_type; 2543 uint16_t abts_rsp_seq_cnt; 2544 uint8_t abts_rsp_df_ctl; 2545 uint8_t abts_rsp_seq_id; 2546 uint16_t abts_rsp_rx_id; 2547 uint16_t abts_rsp_ox_id; 2548 uint32_t abts_rsp_param; 2549 union { 2550 struct { 2551 uint16_t reserved; 2552 uint8_t last_seq_id; 2553 uint8_t seq_id_valid; 2554 uint16_t aborted_rx_id; 2555 uint16_t aborted_ox_id; 2556 uint16_t high_seq_cnt; 2557 uint16_t low_seq_cnt; 2558 uint8_t reserved2[4]; 2559 } ba_acc; 2560 struct { 2561 uint8_t vendor_unique; 2562 uint8_t explanation; 2563 uint8_t reason; 2564 uint8_t reserved; 2565 uint8_t reserved2[12]; 2566 } ba_rjt; 2567 struct { 2568 uint8_t reserved[8]; 2569 uint32_t subcode1; 2570 uint32_t subcode2; 2571 } rsp; 2572 uint8_t reserved[16]; 2573 } abts_rsp_payload; 2574 uint32_t abts_rsp_rxid_task; 2575} abts_rsp_t; 2576 2577/* terminate this ABTS exchange */ 2578#define ISP24XX_ABTS_RSP_TERMINATE 0x01 2579 2580#define ISP24XX_ABTS_RSP_COMPLETE 0x00 2581#define ISP24XX_ABTS_RSP_RESET 0x04 2582#define ISP24XX_ABTS_RSP_ABORTED 0x05 2583#define ISP24XX_ABTS_RSP_TIMEOUT 0x06 2584#define ISP24XX_ABTS_RSP_INVXID 0x08 2585#define ISP24XX_ABTS_RSP_LOGOUT 0x29 2586#define ISP24XX_ABTS_RSP_SUBCODE 0x31 2587 2588#define ISP24XX_NO_TASK 0xffffffff 2589 2590/* 2591 * Miscellaneous 2592 * 2593 * These are the limits of the number of dma segments we 2594 * can deal with based not on the size of the segment counter 2595 * (which is 16 bits), but on the size of the number of 2596 * queue entries field (which is 8 bits). We assume no 2597 * segments in the first queue entry, so we can either 2598 * have 7 dma segments per continuation entry or 5 2599 * (for 64 bit dma).. multiplying out by 254.... 2600 */ 2601#define ISP_NSEG_MAX 1778 2602#define ISP_NSEG64_MAX 1270 2603 2604#endif /* _ISPMBOX_H */ 2605