ispmbox.h revision 203444
1/* $FreeBSD: head/sys/dev/isp/ispmbox.h 203444 2010-02-03 21:09:32Z mjacob $ */ 2/*- 3 * Copyright (c) 1997-2009 by Matthew Jacob 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30/* 31 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 32 */ 33#ifndef _ISPMBOX_H 34#define _ISPMBOX_H 35 36/* 37 * Mailbox Command Opcodes 38 */ 39#define MBOX_NO_OP 0x0000 40#define MBOX_LOAD_RAM 0x0001 41#define MBOX_EXEC_FIRMWARE 0x0002 42#define MBOX_DUMP_RAM 0x0003 43#define MBOX_WRITE_RAM_WORD 0x0004 44#define MBOX_READ_RAM_WORD 0x0005 45#define MBOX_MAILBOX_REG_TEST 0x0006 46#define MBOX_VERIFY_CHECKSUM 0x0007 47#define MBOX_ABOUT_FIRMWARE 0x0008 48#define MBOX_LOAD_RISC_RAM_2100 0x0009 49 /* a */ 50#define MBOX_LOAD_RISC_RAM 0x000b 51 /* c */ 52#define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d 53#define MBOX_CHECK_FIRMWARE 0x000e 54#define MBOX_READ_RAM_WORD_EXTENDED 0x000f 55#define MBOX_INIT_REQ_QUEUE 0x0010 56#define MBOX_INIT_RES_QUEUE 0x0011 57#define MBOX_EXECUTE_IOCB 0x0012 58#define MBOX_WAKE_UP 0x0013 59#define MBOX_STOP_FIRMWARE 0x0014 60#define MBOX_ABORT 0x0015 61#define MBOX_ABORT_DEVICE 0x0016 62#define MBOX_ABORT_TARGET 0x0017 63#define MBOX_BUS_RESET 0x0018 64#define MBOX_STOP_QUEUE 0x0019 65#define MBOX_START_QUEUE 0x001a 66#define MBOX_SINGLE_STEP_QUEUE 0x001b 67#define MBOX_ABORT_QUEUE 0x001c 68#define MBOX_GET_DEV_QUEUE_STATUS 0x001d 69 /* 1e */ 70#define MBOX_GET_FIRMWARE_STATUS 0x001f 71#define MBOX_GET_INIT_SCSI_ID 0x0020 72#define MBOX_GET_SELECT_TIMEOUT 0x0021 73#define MBOX_GET_RETRY_COUNT 0x0022 74#define MBOX_GET_TAG_AGE_LIMIT 0x0023 75#define MBOX_GET_CLOCK_RATE 0x0024 76#define MBOX_GET_ACT_NEG_STATE 0x0025 77#define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 78#define MBOX_GET_SBUS_PARAMS 0x0027 79#define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 80#define MBOX_GET_TARGET_PARAMS 0x0028 81#define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 82#define MBOX_GET_RESET_DELAY_PARAMS 0x002a 83 /* 2b */ 84 /* 2c */ 85 /* 2d */ 86 /* 2e */ 87 /* 2f */ 88#define MBOX_SET_INIT_SCSI_ID 0x0030 89#define MBOX_SET_SELECT_TIMEOUT 0x0031 90#define MBOX_SET_RETRY_COUNT 0x0032 91#define MBOX_SET_TAG_AGE_LIMIT 0x0033 92#define MBOX_SET_CLOCK_RATE 0x0034 93#define MBOX_SET_ACT_NEG_STATE 0x0035 94#define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 95#define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 96#define MBOX_SET_PCI_PARAMETERS 0x0037 97#define MBOX_SET_TARGET_PARAMS 0x0038 98#define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 99#define MBOX_SET_RESET_DELAY_PARAMS 0x003a 100 /* 3b */ 101 /* 3c */ 102 /* 3d */ 103 /* 3e */ 104 /* 3f */ 105#define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 106#define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 107#define MBOX_EXEC_BIOS_IOCB 0x0042 108#define MBOX_SET_FW_FEATURES 0x004a 109#define MBOX_GET_FW_FEATURES 0x004b 110#define FW_FEATURE_FAST_POST 0x1 111#define FW_FEATURE_LVD_NOTIFY 0x2 112#define FW_FEATURE_RIO_32BIT 0x4 113#define FW_FEATURE_RIO_16BIT 0x8 114 115#define MBOX_INIT_REQ_QUEUE_A64 0x0052 116#define MBOX_INIT_RES_QUEUE_A64 0x0053 117 118#define MBOX_ENABLE_TARGET_MODE 0x0055 119#define ENABLE_TARGET_FLAG 0x8000 120#define ENABLE_TQING_FLAG 0x0004 121#define ENABLE_MANDATORY_DISC 0x0002 122#define MBOX_GET_TARGET_STATUS 0x0056 123 124/* These are for the ISP2X00 FC cards */ 125#define MBOX_GET_LOOP_ID 0x0020 126/* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */ 127#define ISP24XX_INORDER 0x0100 128#define ISP24XX_NPIV_SAN 0x0400 129#define ISP24XX_VSAN_SAN 0x1000 130#define ISP24XX_FC_SP_SAN 0x2000 131 132#define MBOX_GET_FIRMWARE_OPTIONS 0x0028 133#define MBOX_SET_FIRMWARE_OPTIONS 0x0038 134#define MBOX_GET_RESOURCE_COUNT 0x0042 135#define MBOX_REQUEST_OFFLINE_MODE 0x0043 136#define MBOX_ENHANCED_GET_PDB 0x0047 137#define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */ 138#define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */ 139#define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */ 140#define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 141#define MBOX_INIT_FIRMWARE 0x0060 142#define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 143#define MBOX_INIT_LIP 0x0062 144#define MBOX_GET_FC_AL_POSITION_MAP 0x0063 145#define MBOX_GET_PORT_DB 0x0064 146#define MBOX_CLEAR_ACA 0x0065 147#define MBOX_TARGET_RESET 0x0066 148#define MBOX_CLEAR_TASK_SET 0x0067 149#define MBOX_ABORT_TASK_SET 0x0068 150#define MBOX_GET_FW_STATE 0x0069 151#define MBOX_GET_PORT_NAME 0x006A 152#define MBOX_GET_LINK_STATUS 0x006B 153#define MBOX_INIT_LIP_RESET 0x006C 154#define MBOX_SEND_SNS 0x006E 155#define MBOX_FABRIC_LOGIN 0x006F 156#define MBOX_SEND_CHANGE_REQUEST 0x0070 157#define MBOX_FABRIC_LOGOUT 0x0071 158#define MBOX_INIT_LIP_LOGIN 0x0072 159#define MBOX_LUN_RESET 0x007E 160 161#define MBOX_DRIVER_HEARTBEAT 0x005B 162#define MBOX_FW_HEARTBEAT 0x005C 163 164#define MBOX_GET_SET_DATA_RATE 0x005D /* 24XX/23XX only */ 165#define MBGSD_GET_RATE 0 166#define MBGSD_SET_RATE 1 167#define MBGSD_SET_RATE_NOW 2 /* 24XX only */ 168#define MBGSD_ONEGB 0 169#define MBGSD_TWOGB 1 170#define MBGSD_AUTO 2 171#define MBGSD_FOURGB 3 /* 24XX only */ 172#define MBGSD_EIGHTGB 4 /* 25XX only */ 173 174 175#define ISP2100_SET_PCI_PARAM 0x00ff 176 177#define MBOX_BUSY 0x04 178 179/* 180 * Mailbox Command Complete Status Codes 181 */ 182#define MBOX_COMMAND_COMPLETE 0x4000 183#define MBOX_INVALID_COMMAND 0x4001 184#define MBOX_HOST_INTERFACE_ERROR 0x4002 185#define MBOX_TEST_FAILED 0x4003 186#define MBOX_COMMAND_ERROR 0x4005 187#define MBOX_COMMAND_PARAM_ERROR 0x4006 188#define MBOX_PORT_ID_USED 0x4007 189#define MBOX_LOOP_ID_USED 0x4008 190#define MBOX_ALL_IDS_USED 0x4009 191#define MBOX_NOT_LOGGED_IN 0x400A 192/* pseudo mailbox completion codes */ 193#define MBOX_REGS_BUSY 0x6000 /* registers in use */ 194#define MBOX_TIMEOUT 0x6001 /* command timed out */ 195 196#define MBLOGALL 0x000f 197#define MBLOGNONE 0x0000 198#define MBLOGMASK(x) ((x) & 0xf) 199 200/* 201 * Asynchronous event status codes 202 */ 203#define ASYNC_BUS_RESET 0x8001 204#define ASYNC_SYSTEM_ERROR 0x8002 205#define ASYNC_RQS_XFER_ERR 0x8003 206#define ASYNC_RSP_XFER_ERR 0x8004 207#define ASYNC_QWAKEUP 0x8005 208#define ASYNC_TIMEOUT_RESET 0x8006 209#define ASYNC_DEVICE_RESET 0x8007 210#define ASYNC_EXTMSG_UNDERRUN 0x800A 211#define ASYNC_SCAM_INT 0x800B 212#define ASYNC_HUNG_SCSI 0x800C 213#define ASYNC_KILLED_BUS 0x800D 214#define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 215#define ASYNC_LIP_OCCURRED 0x8010 216#define ASYNC_LOOP_UP 0x8011 217#define ASYNC_LOOP_DOWN 0x8012 218#define ASYNC_LOOP_RESET 0x8013 219#define ASYNC_PDB_CHANGED 0x8014 220#define ASYNC_CHANGE_NOTIFY 0x8015 221#define ASYNC_LIP_F8 0x8016 222#define ASYNC_LIP_ERROR 0x8017 223#define ASYNC_SECURITY_UPDATE 0x801B 224#define ASYNC_CMD_CMPLT 0x8020 225#define ASYNC_CTIO_DONE 0x8021 226#define ASYNC_IP_XMIT_DONE 0x8022 227#define ASYNC_IP_RECV_DONE 0x8023 228#define ASYNC_IP_BROADCAST 0x8024 229#define ASYNC_IP_RCVQ_LOW 0x8025 230#define ASYNC_IP_RCVQ_EMPTY 0x8026 231#define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 232#define ASYNC_PTPMODE 0x8030 233#define ASYNC_RIO1 0x8031 234#define ASYNC_RIO2 0x8032 235#define ASYNC_RIO3 0x8033 236#define ASYNC_RIO4 0x8034 237#define ASYNC_RIO5 0x8035 238#define ASYNC_CONNMODE 0x8036 239#define ISP_CONN_LOOP 1 240#define ISP_CONN_PTP 2 241#define ISP_CONN_BADLIP 3 242#define ISP_CONN_FATAL 4 243#define ISP_CONN_LOOPBACK 5 244#define ASYNC_RIO_RESP 0x8040 245#define ASYNC_RIO_COMP 0x8042 246#define ASYNC_RCV_ERR 0x8048 247 248/* 249 * Firmware Options. There are a lot of them. 250 * 251 * IFCOPTN - ISP Fibre Channel Option Word N 252 */ 253#define IFCOPT1_EQFQASYNC (1 << 13) /* enable QFULL notification */ 254#define IFCOPT1_EAABSRCVD (1 << 12) 255#define IFCOPT1_RJTASYNC (1 << 11) /* enable 8018 notification */ 256#define IFCOPT1_ENAPURE (1 << 10) 257#define IFCOPT1_ENA8017 (1 << 7) 258#define IFCOPT1_DISGPIO67 (1 << 6) 259#define IFCOPT1_LIPLOSSIMM (1 << 5) 260#define IFCOPT1_DISF7SWTCH (1 << 4) 261#define IFCOPT1_CTIO_RETRY (1 << 3) 262#define IFCOPT1_LIPASYNC (1 << 1) 263#define IFCOPT1_LIPF8 (1 << 0) 264 265#define IFCOPT2_LOOPBACK (1 << 1) 266#define IFCOPT2_ATIO3_ONLY (1 << 0) 267 268#define IFCOPT3_NOPRLI (1 << 4) /* disable automatic sending of PRLI on local loops */ 269#define IFCOPT3_RNDASYNC (1 << 1) 270/* 271 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 272 * mailbox command to enable this. 273 */ 274#define ASYNC_QFULL_SENT 0x8049 275 276/* 277 * Needs to be enabled 278 */ 279#define ASYNC_AUTO_PLOGI_RJT 0x8018 280/* 281 * 24XX only 282 */ 283#define ASYNC_RJT_SENT 0x8049 284 285/* 286 * All IOCB Queue entries are this size 287 */ 288#define QENTRY_LEN 64 289 290/* 291 * Command Structure Definitions 292 */ 293 294typedef struct { 295 uint32_t ds_base; 296 uint32_t ds_count; 297} ispds_t; 298 299typedef struct { 300 uint32_t ds_base; 301 uint32_t ds_basehi; 302 uint32_t ds_count; 303} ispds64_t; 304 305#define DSTYPE_32BIT 0 306#define DSTYPE_64BIT 1 307typedef struct { 308 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 309 uint32_t ds_segment; /* unused */ 310 uint32_t ds_base; /* 32 bit address of DSD list */ 311} ispdslist_t; 312 313 314typedef struct { 315 uint8_t rqs_entry_type; 316 uint8_t rqs_entry_count; 317 uint8_t rqs_seqno; 318 uint8_t rqs_flags; 319} isphdr_t; 320 321/* RQS Flag definitions */ 322#define RQSFLAG_CONTINUATION 0x01 323#define RQSFLAG_FULL 0x02 324#define RQSFLAG_BADHEADER 0x04 325#define RQSFLAG_BADPACKET 0x08 326#define RQSFLAG_BADCOUNT 0x10 327#define RQSFLAG_BADORDER 0x20 328#define RQSFLAG_MASK 0x3f 329 330/* RQS entry_type definitions */ 331#define RQSTYPE_REQUEST 0x01 332#define RQSTYPE_DATASEG 0x02 333#define RQSTYPE_RESPONSE 0x03 334#define RQSTYPE_MARKER 0x04 335#define RQSTYPE_CMDONLY 0x05 336#define RQSTYPE_ATIO 0x06 /* Target Mode */ 337#define RQSTYPE_CTIO 0x07 /* Target Mode */ 338#define RQSTYPE_SCAM 0x08 339#define RQSTYPE_A64 0x09 340#define RQSTYPE_A64_CONT 0x0a 341#define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 342#define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 343#define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 344#define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 345#define RQSTYPE_CTIO1 0x0f /* Target Mode */ 346#define RQSTYPE_STATUS_CONT 0x10 347#define RQSTYPE_T2RQS 0x11 348#define RQSTYPE_CTIO7 0x12 349#define RQSTYPE_IP_XMIT 0x13 350#define RQSTYPE_TSK_MGMT 0x14 351#define RQSTYPE_T4RQS 0x15 352#define RQSTYPE_ATIO2 0x16 /* Target Mode */ 353#define RQSTYPE_CTIO2 0x17 /* Target Mode */ 354#define RQSTYPE_T7RQS 0x18 355#define RQSTYPE_T3RQS 0x19 356#define RQSTYPE_IP_XMIT_64 0x1b 357#define RQSTYPE_CTIO4 0x1e /* Target Mode */ 358#define RQSTYPE_CTIO3 0x1f /* Target Mode */ 359#define RQSTYPE_RIO1 0x21 360#define RQSTYPE_RIO2 0x22 361#define RQSTYPE_IP_RECV 0x23 362#define RQSTYPE_IP_RECV_CONT 0x24 363#define RQSTYPE_CT_PASSTHRU 0x29 364#define RQSTYPE_MS_PASSTHRU 0x29 365#define RQSTYPE_VP_CTRL 0x30 /* 24XX only */ 366#define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */ 367#define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */ 368#define RQSTYPE_ABORT_IO 0x33 369#define RQSTYPE_T6RQS 0x48 370#define RQSTYPE_LOGIN 0x52 371#define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */ 372#define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */ 373 374 375#define ISP_RQDSEG 4 376typedef struct { 377 isphdr_t req_header; 378 uint32_t req_handle; 379 uint8_t req_lun_trn; 380 uint8_t req_target; 381 uint16_t req_cdblen; 382 uint16_t req_flags; 383 uint16_t req_reserved; 384 uint16_t req_time; 385 uint16_t req_seg_count; 386 uint8_t req_cdb[12]; 387 ispds_t req_dataseg[ISP_RQDSEG]; 388} ispreq_t; 389#define ISP_RQDSEG_A64 2 390 391typedef struct { 392 isphdr_t mrk_header; 393 uint32_t mrk_handle; 394 uint8_t mrk_reserved0; 395 uint8_t mrk_target; 396 uint16_t mrk_modifier; 397 uint16_t mrk_flags; 398 uint16_t mrk_lun; 399 uint8_t mrk_reserved1[48]; 400} isp_marker_t; 401 402typedef struct { 403 isphdr_t mrk_header; 404 uint32_t mrk_handle; 405 uint16_t mrk_nphdl; 406 uint8_t mrk_modifier; 407 uint8_t mrk_reserved0; 408 uint8_t mrk_reserved1; 409 uint8_t mrk_vphdl; 410 uint16_t mrk_reserved2; 411 uint8_t mrk_lun[8]; 412 uint8_t mrk_reserved3[40]; 413} isp_marker_24xx_t; 414 415 416#define SYNC_DEVICE 0 417#define SYNC_TARGET 1 418#define SYNC_ALL 2 419#define SYNC_LIP 3 420 421#define ISP_RQDSEG_T2 3 422typedef struct { 423 isphdr_t req_header; 424 uint32_t req_handle; 425 uint8_t req_lun_trn; 426 uint8_t req_target; 427 uint16_t req_scclun; 428 uint16_t req_flags; 429 uint16_t req_reserved; 430 uint16_t req_time; 431 uint16_t req_seg_count; 432 uint8_t req_cdb[16]; 433 uint32_t req_totalcnt; 434 ispds_t req_dataseg[ISP_RQDSEG_T2]; 435} ispreqt2_t; 436 437typedef struct { 438 isphdr_t req_header; 439 uint32_t req_handle; 440 uint16_t req_target; 441 uint16_t req_scclun; 442 uint16_t req_flags; 443 uint16_t req_reserved; 444 uint16_t req_time; 445 uint16_t req_seg_count; 446 uint8_t req_cdb[16]; 447 uint32_t req_totalcnt; 448 ispds_t req_dataseg[ISP_RQDSEG_T2]; 449} ispreqt2e_t; 450 451#define ISP_RQDSEG_T3 2 452typedef struct { 453 isphdr_t req_header; 454 uint32_t req_handle; 455 uint8_t req_lun_trn; 456 uint8_t req_target; 457 uint16_t req_scclun; 458 uint16_t req_flags; 459 uint16_t req_reserved; 460 uint16_t req_time; 461 uint16_t req_seg_count; 462 uint8_t req_cdb[16]; 463 uint32_t req_totalcnt; 464 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 465} ispreqt3_t; 466#define ispreq64_t ispreqt3_t /* same as.... */ 467 468typedef struct { 469 isphdr_t req_header; 470 uint32_t req_handle; 471 uint16_t req_target; 472 uint16_t req_scclun; 473 uint16_t req_flags; 474 uint16_t req_reserved; 475 uint16_t req_time; 476 uint16_t req_seg_count; 477 uint8_t req_cdb[16]; 478 uint32_t req_totalcnt; 479 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 480} ispreqt3e_t; 481 482/* req_flag values */ 483#define REQFLAG_NODISCON 0x0001 484#define REQFLAG_HTAG 0x0002 485#define REQFLAG_OTAG 0x0004 486#define REQFLAG_STAG 0x0008 487#define REQFLAG_TARGET_RTN 0x0010 488 489#define REQFLAG_NODATA 0x0000 490#define REQFLAG_DATA_IN 0x0020 491#define REQFLAG_DATA_OUT 0x0040 492#define REQFLAG_DATA_UNKNOWN 0x0060 493 494#define REQFLAG_DISARQ 0x0100 495#define REQFLAG_FRC_ASYNC 0x0200 496#define REQFLAG_FRC_SYNC 0x0400 497#define REQFLAG_FRC_WIDE 0x0800 498#define REQFLAG_NOPARITY 0x1000 499#define REQFLAG_STOPQ 0x2000 500#define REQFLAG_XTRASNS 0x4000 501#define REQFLAG_PRIORITY 0x8000 502 503typedef struct { 504 isphdr_t req_header; 505 uint32_t req_handle; 506 uint8_t req_lun_trn; 507 uint8_t req_target; 508 uint16_t req_cdblen; 509 uint16_t req_flags; 510 uint16_t req_reserved; 511 uint16_t req_time; 512 uint16_t req_seg_count; 513 uint8_t req_cdb[44]; 514} ispextreq_t; 515 516/* 24XX only */ 517typedef struct { 518 uint16_t fcd_length; 519 uint16_t fcd_a1500; 520 uint16_t fcd_a3116; 521 uint16_t fcd_a4732; 522 uint16_t fcd_a6348; 523} fcp_cmnd_ds_t; 524 525typedef struct { 526 isphdr_t req_header; 527 uint32_t req_handle; 528 uint16_t req_nphdl; 529 uint16_t req_time; 530 uint16_t req_seg_count; 531 uint16_t req_fc_rsp_dsd_length; 532 uint8_t req_lun[8]; 533 uint16_t req_flags; 534 uint16_t req_fc_cmnd_dsd_length; 535 uint16_t req_fc_cmnd_dsd_a1500; 536 uint16_t req_fc_cmnd_dsd_a3116; 537 uint16_t req_fc_cmnd_dsd_a4732; 538 uint16_t req_fc_cmnd_dsd_a6348; 539 uint16_t req_fc_rsp_dsd_a1500; 540 uint16_t req_fc_rsp_dsd_a3116; 541 uint16_t req_fc_rsp_dsd_a4732; 542 uint16_t req_fc_rsp_dsd_a6348; 543 uint32_t req_totalcnt; 544 uint16_t req_tidlo; 545 uint8_t req_tidhi; 546 uint8_t req_vpidx; 547 ispds64_t req_dataseg; 548} ispreqt6_t; 549 550typedef struct { 551 isphdr_t req_header; 552 uint32_t req_handle; 553 uint16_t req_nphdl; 554 uint16_t req_time; 555 uint16_t req_seg_count; 556 uint16_t req_reserved; 557 uint8_t req_lun[8]; 558 uint8_t req_alen_datadir; 559 uint8_t req_task_management; 560 uint8_t req_task_attribute; 561 uint8_t req_crn; 562 uint8_t req_cdb[16]; 563 uint32_t req_dl; 564 uint16_t req_tidlo; 565 uint8_t req_tidhi; 566 uint8_t req_vpidx; 567 ispds64_t req_dataseg; 568} ispreqt7_t; 569 570/* Task Management Request Function */ 571typedef struct { 572 isphdr_t tmf_header; 573 uint32_t tmf_handle; 574 uint16_t tmf_nphdl; 575 uint8_t tmf_reserved0[2]; 576 uint16_t tmf_delay; 577 uint16_t tmf_timeout; 578 uint8_t tmf_lun[8]; 579 uint32_t tmf_flags; 580 uint8_t tmf_reserved1[20]; 581 uint16_t tmf_tidlo; 582 uint8_t tmf_tidhi; 583 uint8_t tmf_vpidx; 584 uint8_t tmf_reserved2[12]; 585} isp24xx_tmf_t; 586 587#define ISP24XX_TMF_NOSEND 0x80000000 588 589#define ISP24XX_TMF_LUN_RESET 0x00000010 590#define ISP24XX_TMF_ABORT_TASK_SET 0x00000008 591#define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004 592#define ISP24XX_TMF_TARGET_RESET 0x00000002 593#define ISP24XX_TMF_CLEAR_ACA 0x00000001 594 595/* I/O Abort Structure */ 596typedef struct { 597 isphdr_t abrt_header; 598 uint32_t abrt_handle; 599 uint16_t abrt_nphdl; 600 uint16_t abrt_options; 601 uint32_t abrt_cmd_handle; 602 uint8_t abrt_reserved[32]; 603 uint16_t abrt_tidlo; 604 uint8_t abrt_tidhi; 605 uint8_t abrt_vpidx; 606 uint8_t abrt_reserved1[12]; 607} isp24xx_abrt_t; 608 609#define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */ 610#define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */ 611#define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */ 612 613#define ISP_CDSEG 7 614typedef struct { 615 isphdr_t req_header; 616 uint32_t req_reserved; 617 ispds_t req_dataseg[ISP_CDSEG]; 618} ispcontreq_t; 619 620#define ISP_CDSEG64 5 621typedef struct { 622 isphdr_t req_header; 623 ispds64_t req_dataseg[ISP_CDSEG64]; 624} ispcontreq64_t; 625 626typedef struct { 627 isphdr_t req_header; 628 uint32_t req_handle; 629 uint16_t req_scsi_status; 630 uint16_t req_completion_status; 631 uint16_t req_state_flags; 632 uint16_t req_status_flags; 633 uint16_t req_time; 634#define req_response_len req_time /* FC only */ 635 uint16_t req_sense_len; 636 uint32_t req_resid; 637 uint8_t req_response[8]; /* FC only */ 638 uint8_t req_sense_data[32]; 639} ispstatusreq_t; 640 641/* 642 * Status Continuation 643 */ 644typedef struct { 645 isphdr_t req_header; 646 uint8_t req_sense_data[60]; 647} ispstatus_cont_t; 648 649/* 650 * 24XX Type 0 status 651 */ 652typedef struct { 653 isphdr_t req_header; 654 uint32_t req_handle; 655 uint16_t req_completion_status; 656 uint16_t req_oxid; 657 uint32_t req_resid; 658 uint16_t req_reserved0; 659 uint16_t req_state_flags; 660 uint16_t req_reserved1; 661 uint16_t req_scsi_status; 662 uint32_t req_fcp_residual; 663 uint32_t req_sense_len; 664 uint32_t req_response_len; 665 uint8_t req_rsp_sense[28]; 666} isp24xx_statusreq_t; 667 668/* 669 * For Qlogic 2X00, the high order byte of SCSI status has 670 * additional meaning. 671 */ 672#define RQCS_RU 0x800 /* Residual Under */ 673#define RQCS_RO 0x400 /* Residual Over */ 674#define RQCS_RESID (RQCS_RU|RQCS_RO) 675#define RQCS_SV 0x200 /* Sense Length Valid */ 676#define RQCS_RV 0x100 /* FCP Response Length Valid */ 677 678/* 679 * CT Passthru IOCB 680 */ 681typedef struct { 682 isphdr_t ctp_header; 683 uint32_t ctp_handle; 684 uint16_t ctp_status; 685 uint16_t ctp_nphdl; /* n-port handle */ 686 uint16_t ctp_cmd_cnt; /* Command DSD count */ 687 uint8_t ctp_vpidx; 688 uint8_t ctp_reserved0; 689 uint16_t ctp_time; 690 uint16_t ctp_reserved1; 691 uint16_t ctp_rsp_cnt; /* Response DSD count */ 692 uint16_t ctp_reserved2[5]; 693 uint32_t ctp_rsp_bcnt; /* Response byte count */ 694 uint32_t ctp_cmd_bcnt; /* Command byte count */ 695 ispds64_t ctp_dataseg[2]; 696} isp_ct_pt_t; 697 698/* 699 * MS Passthru IOCB 700 */ 701typedef struct { 702 isphdr_t ms_header; 703 uint32_t ms_handle; 704 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */ 705 uint16_t ms_status; 706 uint16_t ms_flags; 707 uint16_t ms_reserved1; /* low 8 bits */ 708 uint16_t ms_time; 709 uint16_t ms_cmd_cnt; /* Command DSD count */ 710 uint16_t ms_tot_cnt; /* Total DSD Count */ 711 uint8_t ms_type; /* MS type */ 712 uint8_t ms_r_ctl; /* R_CTL */ 713 uint16_t ms_rxid; /* RX_ID */ 714 uint16_t ms_reserved2; 715 uint32_t ms_handle2; 716 uint32_t ms_rsp_bcnt; /* Response byte count */ 717 uint32_t ms_cmd_bcnt; /* Command byte count */ 718 ispds64_t ms_dataseg[2]; 719} isp_ms_t; 720 721/* 722 * Completion Status Codes. 723 */ 724#define RQCS_COMPLETE 0x0000 725#define RQCS_DMA_ERROR 0x0002 726#define RQCS_RESET_OCCURRED 0x0004 727#define RQCS_ABORTED 0x0005 728#define RQCS_TIMEOUT 0x0006 729#define RQCS_DATA_OVERRUN 0x0007 730#define RQCS_DATA_UNDERRUN 0x0015 731#define RQCS_QUEUE_FULL 0x001C 732 733/* 1X00 Only Completion Codes */ 734#define RQCS_INCOMPLETE 0x0001 735#define RQCS_TRANSPORT_ERROR 0x0003 736#define RQCS_COMMAND_OVERRUN 0x0008 737#define RQCS_STATUS_OVERRUN 0x0009 738#define RQCS_BAD_MESSAGE 0x000a 739#define RQCS_NO_MESSAGE_OUT 0x000b 740#define RQCS_EXT_ID_FAILED 0x000c 741#define RQCS_IDE_MSG_FAILED 0x000d 742#define RQCS_ABORT_MSG_FAILED 0x000e 743#define RQCS_REJECT_MSG_FAILED 0x000f 744#define RQCS_NOP_MSG_FAILED 0x0010 745#define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 746#define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 747#define RQCS_ID_MSG_FAILED 0x0013 748#define RQCS_UNEXP_BUS_FREE 0x0014 749#define RQCS_XACT_ERR1 0x0018 750#define RQCS_XACT_ERR2 0x0019 751#define RQCS_XACT_ERR3 0x001A 752#define RQCS_BAD_ENTRY 0x001B 753#define RQCS_PHASE_SKIPPED 0x001D 754#define RQCS_ARQS_FAILED 0x001E 755#define RQCS_WIDE_FAILED 0x001F 756#define RQCS_SYNCXFER_FAILED 0x0020 757#define RQCS_LVD_BUSERR 0x0021 758 759/* 2X00 Only Completion Codes */ 760#define RQCS_PORT_UNAVAILABLE 0x0028 761#define RQCS_PORT_LOGGED_OUT 0x0029 762#define RQCS_PORT_CHANGED 0x002A 763#define RQCS_PORT_BUSY 0x002B 764 765/* 24XX Only Completion Codes */ 766#define RQCS_24XX_DRE 0x0011 /* data reassembly error */ 767#define RQCS_24XX_TABORT 0x0013 /* aborted by target */ 768#define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */ 769#define RQCS_24XX_TMO 0x0030 /* task management overrun */ 770 771 772/* 773 * 1X00 specific State Flags 774 */ 775#define RQSF_GOT_BUS 0x0100 776#define RQSF_GOT_TARGET 0x0200 777#define RQSF_SENT_CDB 0x0400 778#define RQSF_XFRD_DATA 0x0800 779#define RQSF_GOT_STATUS 0x1000 780#define RQSF_GOT_SENSE 0x2000 781#define RQSF_XFER_COMPLETE 0x4000 782 783/* 784 * 2X00 specific State Flags 785 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 786 */ 787#define RQSF_DATA_IN 0x0020 788#define RQSF_DATA_OUT 0x0040 789#define RQSF_STAG 0x0008 790#define RQSF_OTAG 0x0004 791#define RQSF_HTAG 0x0002 792/* 793 * 1X00 Status Flags 794 */ 795#define RQSTF_DISCONNECT 0x0001 796#define RQSTF_SYNCHRONOUS 0x0002 797#define RQSTF_PARITY_ERROR 0x0004 798#define RQSTF_BUS_RESET 0x0008 799#define RQSTF_DEVICE_RESET 0x0010 800#define RQSTF_ABORTED 0x0020 801#define RQSTF_TIMEOUT 0x0040 802#define RQSTF_NEGOTIATION 0x0080 803 804/* 805 * 2X00 specific state flags 806 */ 807/* RQSF_SENT_CDB */ 808/* RQSF_XFRD_DATA */ 809/* RQSF_GOT_STATUS */ 810/* RQSF_XFER_COMPLETE */ 811 812/* 813 * 2X00 specific status flags 814 */ 815/* RQSTF_ABORTED */ 816/* RQSTF_TIMEOUT */ 817#define RQSTF_DMA_ERROR 0x0080 818#define RQSTF_LOGOUT 0x2000 819 820/* 821 * Miscellaneous 822 */ 823#ifndef ISP_EXEC_THROTTLE 824#define ISP_EXEC_THROTTLE 16 825#endif 826 827/* 828 * About Firmware returns an 'attribute' word in mailbox 6. 829 * These attributes are for 2200 and 2300. 830 */ 831#define ISP_FW_ATTR_TMODE 0x0001 832#define ISP_FW_ATTR_SCCLUN 0x0002 833#define ISP_FW_ATTR_FABRIC 0x0004 834#define ISP_FW_ATTR_CLASS2 0x0008 835#define ISP_FW_ATTR_FCTAPE 0x0010 836#define ISP_FW_ATTR_IP 0x0020 837#define ISP_FW_ATTR_VI 0x0040 838#define ISP_FW_ATTR_VI_SOLARIS 0x0080 839#define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */ 840 841/* and these are for the 2400 */ 842#define ISP2400_FW_ATTR_CLASS2 0x0001 843#define ISP2400_FW_ATTR_IP 0x0002 844#define ISP2400_FW_ATTR_MULTIID 0x0004 845#define ISP2400_FW_ATTR_SB2 0x0008 846#define ISP2400_FW_ATTR_T10CRC 0x0010 847#define ISP2400_FW_ATTR_VI 0x0020 848#define ISP2400_FW_ATTR_EXPFW 0x2000 849 850#define ISP_CAP_TMODE(isp) \ 851 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE)) 852#define ISP_CAP_SCCFW(isp) \ 853 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN)) 854#define ISP_CAP_2KLOGIN(isp) \ 855 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS)) 856#define ISP_CAP_MULTI_ID(isp) \ 857 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0) 858 859#define ISP_GET_VPIDX(isp, tag) \ 860 (ISP_CAP_MULTI_ID(isp) ? tag : 0) 861 862/* 863 * Reduced Interrupt Operation Response Queue Entreis 864 */ 865 866typedef struct { 867 isphdr_t req_header; 868 uint32_t req_handles[15]; 869} isp_rio1_t; 870 871typedef struct { 872 isphdr_t req_header; 873 uint16_t req_handles[30]; 874} isp_rio2_t; 875 876/* 877 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures 878 */ 879 880/* 881 * Initialization Control Block 882 * 883 * Version One (prime) format. 884 */ 885typedef struct { 886 uint8_t icb_version; 887 uint8_t icb_reserved0; 888 uint16_t icb_fwoptions; 889 uint16_t icb_maxfrmlen; 890 uint16_t icb_maxalloc; 891 uint16_t icb_execthrottle; 892 uint8_t icb_retry_count; 893 uint8_t icb_retry_delay; 894 uint8_t icb_portname[8]; 895 uint16_t icb_hardaddr; 896 uint8_t icb_iqdevtype; 897 uint8_t icb_logintime; 898 uint8_t icb_nodename[8]; 899 uint16_t icb_rqstout; 900 uint16_t icb_rspnsin; 901 uint16_t icb_rqstqlen; 902 uint16_t icb_rsltqlen; 903 uint16_t icb_rqstaddr[4]; 904 uint16_t icb_respaddr[4]; 905 uint16_t icb_lunenables; 906 uint8_t icb_ccnt; 907 uint8_t icb_icnt; 908 uint16_t icb_lunetimeout; 909 uint16_t icb_reserved1; 910 uint16_t icb_xfwoptions; 911 uint8_t icb_racctimer; 912 uint8_t icb_idelaytimer; 913 uint16_t icb_zfwoptions; 914 uint16_t icb_reserved2[13]; 915} isp_icb_t; 916 917#define ICB_VERSION1 1 918 919#define ICBOPT_EXTENDED 0x8000 920#define ICBOPT_BOTH_WWNS 0x4000 921#define ICBOPT_FULL_LOGIN 0x2000 922#define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */ 923#define ICBOPT_PREVLOOP 0x0800 924#define ICBOPT_SRCHDOWN 0x0400 925#define ICBOPT_NOLIP 0x0200 926#define ICBOPT_PDBCHANGE_AE 0x0100 927#define ICBOPT_INI_TGTTYPE 0x0080 928#define ICBOPT_INI_ADISC 0x0040 929#define ICBOPT_INI_DISABLE 0x0020 930#define ICBOPT_TGT_ENABLE 0x0010 931#define ICBOPT_FAST_POST 0x0008 932#define ICBOPT_FULL_DUPLEX 0x0004 933#define ICBOPT_FAIRNESS 0x0002 934#define ICBOPT_HARD_ADDRESS 0x0001 935 936#define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */ 937#define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */ 938#define ICBXOPT_FCTAPE_CONFIRM 0x2000 939#define ICBXOPT_FCTAPE 0x1000 940#define ICBXOPT_CLASS2_ACK0 0x0200 941#define ICBXOPT_CLASS2 0x0100 942#define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */ 943#define ICBXOPT_TOPO_MASK 0x0070 944#define ICBXOPT_LOOP_ONLY 0x0000 945#define ICBXOPT_PTP_ONLY 0x0010 946#define ICBXOPT_LOOP_2_PTP 0x0020 947#define ICBXOPT_PTP_2_LOOP 0x0030 948/* 949 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits. 950 * RIO is not defined for the 23XX cards (just 2200) 951 */ 952#define ICBXOPT_RIO_OFF 0 953#define ICBXOPT_RIO_16BIT 1 954#define ICBXOPT_RIO_32BIT 2 955#define ICBXOPT_RIO_16BIT_IOCB 3 956#define ICBXOPT_RIO_32BIT_IOCB 4 957#define ICBXOPT_ZIO 5 958#define ICBXOPT_TIMER_MASK 0x7 959 960#define ICBZOPT_RATE_MASK 0xC000 961#define ICBZOPT_RATE_ONEGB 0x0000 962#define ICBZOPT_RATE_AUTO 0x8000 963#define ICBZOPT_RATE_TWOGB 0x4000 964#define ICBZOPT_50_OHM 0x2000 965#define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */ 966#define ICBZOPT_RSPSZ_MASK 0x0030 967#define ICBZOPT_RSPSZ_24 0x0000 968#define ICBZOPT_RSPSZ_12 0x0010 969#define ICBZOPT_RSPSZ_24A 0x0020 970#define ICBZOPT_RSPSZ_32 0x0030 971#define ICBZOPT_SOFTID 0x0002 972#define ICBZOPT_ENA_RDXFR_RDY 0x0001 973 974/* 2400 F/W options */ 975#define ICB2400_OPT1_BOTH_WWNS 0x00004000 976#define ICB2400_OPT1_FULL_LOGIN 0x00002000 977#define ICB2400_OPT1_PREVLOOP 0x00000800 978#define ICB2400_OPT1_SRCHDOWN 0x00000400 979#define ICB2400_OPT1_NOLIP 0x00000200 980#define ICB2400_OPT1_INI_DISABLE 0x00000020 981#define ICB2400_OPT1_TGT_ENABLE 0x00000010 982#define ICB2400_OPT1_FULL_DUPLEX 0x00000004 983#define ICB2400_OPT1_FAIRNESS 0x00000002 984#define ICB2400_OPT1_HARD_ADDRESS 0x00000001 985 986#define ICB2400_OPT2_FCTAPE 0x00001000 987#define ICB2400_OPT2_CLASS2_ACK0 0x00000200 988#define ICB2400_OPT2_CLASS2 0x00000100 989#define ICB2400_OPT2_NO_PLAY 0x00000080 990#define ICB2400_OPT2_TOPO_MASK 0x00000070 991#define ICB2400_OPT2_LOOP_ONLY 0x00000000 992#define ICB2400_OPT2_PTP_ONLY 0x00000010 993#define ICB2400_OPT2_LOOP_2_PTP 0x00000020 994#define ICB2400_OPT2_PTP_2_LOOP 0x00000030 995#define ICB2400_OPT2_TIMER_MASK 0x00000007 996#define ICB2400_OPT2_ZIO 0x00000005 997#define ICB2400_OPT2_ZIO1 0x00000006 998 999#define ICB2400_OPT3_75_OHM 0x00010000 1000#define ICB2400_OPT3_RATE_MASK 0x0000E000 1001#define ICB2400_OPT3_RATE_ONEGB 0x00000000 1002#define ICB2400_OPT3_RATE_TWOGB 0x00002000 1003#define ICB2400_OPT3_RATE_AUTO 0x00004000 1004#define ICB2400_OPT3_RATE_FOURGB 0x00006000 1005#define ICB2400_OPT3_RATE_EIGHTGB 0x00008000 1006#define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200 1007#define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080 1008#define ICB2400_OPT3_ENA_OOF 0x00000040 1009/* note that a response size flag of zero is reserved! */ 1010#define ICB2400_OPT3_RSPSZ_MASK 0x00000030 1011#define ICB2400_OPT3_RSPSZ_12 0x00000010 1012#define ICB2400_OPT3_RSPSZ_24 0x00000020 1013#define ICB2400_OPT3_RSPSZ_32 0x00000030 1014#define ICB2400_OPT3_SOFTID 0x00000002 1015 1016#define ICB_MIN_FRMLEN 256 1017#define ICB_MAX_FRMLEN 2112 1018#define ICB_DFLT_FRMLEN 1024 1019#define ICB_DFLT_ALLOC 256 1020#define ICB_DFLT_THROTTLE 16 1021#define ICB_DFLT_RDELAY 5 1022#define ICB_DFLT_RCOUNT 3 1023 1024#define ICB_LOGIN_TOV 30 1025#define ICB_LUN_ENABLE_TOV 180 1026 1027 1028/* 1029 * And somebody at QLogic had a great idea that you could just change 1030 * the structure *and* keep the version number the same as the other cards. 1031 */ 1032typedef struct { 1033 uint16_t icb_version; 1034 uint16_t icb_reserved0; 1035 uint16_t icb_maxfrmlen; 1036 uint16_t icb_execthrottle; 1037 uint16_t icb_xchgcnt; 1038 uint16_t icb_hardaddr; 1039 uint8_t icb_portname[8]; 1040 uint8_t icb_nodename[8]; 1041 uint16_t icb_rspnsin; 1042 uint16_t icb_rqstout; 1043 uint16_t icb_retry_count; 1044 uint16_t icb_priout; 1045 uint16_t icb_rsltqlen; 1046 uint16_t icb_rqstqlen; 1047 uint16_t icb_ldn_nols; 1048 uint16_t icb_prqstqlen; 1049 uint16_t icb_rqstaddr[4]; 1050 uint16_t icb_respaddr[4]; 1051 uint16_t icb_priaddr[4]; 1052 uint16_t icb_reserved1[4]; 1053 uint16_t icb_atio_in; 1054 uint16_t icb_atioqlen; 1055 uint16_t icb_atioqaddr[4]; 1056 uint16_t icb_idelaytimer; 1057 uint16_t icb_logintime; 1058 uint32_t icb_fwoptions1; 1059 uint32_t icb_fwoptions2; 1060 uint32_t icb_fwoptions3; 1061 uint16_t icb_reserved2[12]; 1062} isp_icb_2400_t; 1063 1064#define RQRSP_ADDR0015 0 1065#define RQRSP_ADDR1631 1 1066#define RQRSP_ADDR3247 2 1067#define RQRSP_ADDR4863 3 1068 1069 1070#define ICB_NNM0 7 1071#define ICB_NNM1 6 1072#define ICB_NNM2 5 1073#define ICB_NNM3 4 1074#define ICB_NNM4 3 1075#define ICB_NNM5 2 1076#define ICB_NNM6 1 1077#define ICB_NNM7 0 1078 1079#define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 1080 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \ 1081 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \ 1082 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \ 1083 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \ 1084 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \ 1085 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \ 1086 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \ 1087 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff) 1088 1089#define MAKE_WWN_FROM_NODE_NAME(wwn, array) \ 1090 wwn = ((uint64_t) array[ICB_NNM0]) | \ 1091 ((uint64_t) array[ICB_NNM1] << 8) | \ 1092 ((uint64_t) array[ICB_NNM2] << 16) | \ 1093 ((uint64_t) array[ICB_NNM3] << 24) | \ 1094 ((uint64_t) array[ICB_NNM4] << 32) | \ 1095 ((uint64_t) array[ICB_NNM5] << 40) | \ 1096 ((uint64_t) array[ICB_NNM6] << 48) | \ 1097 ((uint64_t) array[ICB_NNM7] << 56) 1098 1099 1100/* 1101 * For MULTI_ID firmware, this describes a 1102 * virtual port entity for getting status. 1103 */ 1104typedef struct { 1105 uint16_t vp_port_status; 1106 uint8_t vp_port_options; 1107 uint8_t vp_port_loopid; 1108 uint8_t vp_port_portname[8]; 1109 uint8_t vp_port_nodename[8]; 1110 uint16_t vp_port_portid_lo; /* not present when trailing icb */ 1111 uint16_t vp_port_portid_hi; /* not present when trailing icb */ 1112} vp_port_info_t; 1113 1114#define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* disable target mode */ 1115#define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* enable initiator mode */ 1116#define ICB2400_VPOPT_ENABLED 0x00000008 1117#define ICB2400_VPOPT_NOPLAY 0x00000004 1118#define ICB2400_VPOPT_PREVLOOP 0x00000002 1119#define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 1120 1121#define ICB2400_VPOPT_WRITE_SIZE 20 1122 1123/* 1124 * For MULTI_ID firmware, we append this structure 1125 * to the isp_icb_2400_t above, followed by a list 1126 * structures that are *most* of the vp_port_info_t. 1127 */ 1128typedef struct { 1129 uint16_t vp_count; 1130 uint16_t vp_global_options; 1131} isp_icb_2400_vpinfo_t; 1132 1133#define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */ 1134#define ICB2400_VPINFO_PORT_OFF(chan) \ 1135 ICB2400_VPINFO_OFF + \ 1136 sizeof (isp_icb_2400_vpinfo_t) + ((chan - 1) * ICB2400_VPOPT_WRITE_SIZE) 1137 1138#define ICB2400_VPGOPT_MID_DISABLE 0x02 1139 1140typedef struct { 1141 isphdr_t vp_ctrl_hdr; 1142 uint32_t vp_ctrl_handle; 1143 uint16_t vp_ctrl_index_fail; 1144 uint16_t vp_ctrl_status; 1145 uint16_t vp_ctrl_command; 1146 uint16_t vp_ctrl_vp_count; 1147 uint16_t vp_ctrl_idmap[8]; 1148 uint8_t vp_ctrl_reserved[32]; 1149} vp_ctrl_info_t; 1150 1151#define VP_CTRL_CMD_ENABLE_VP 0 1152#define VP_CTRL_CMD_DISABLE_VP 8 1153#define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 9 1154#define VP_CTRL_CMD_DISABLE_VP_LOGO 0xA 1155 1156/* 1157 * We can use this structure for modifying either one or two VP ports after initialization 1158 */ 1159typedef struct { 1160 isphdr_t vp_mod_hdr; 1161 uint32_t vp_mod_hdl; 1162 uint16_t vp_mod_reserved0; 1163 uint16_t vp_mod_status; 1164 uint8_t vp_mod_cmd; 1165 uint8_t vp_mod_cnt; 1166 uint8_t vp_mod_idx0; 1167 uint8_t vp_mod_idx1; 1168 struct { 1169 uint8_t options; 1170 uint8_t loopid; 1171 uint16_t reserved1; 1172 uint8_t wwpn[8]; 1173 uint8_t wwnn[8]; 1174 } vp_mod_ports[2]; 1175 uint8_t vp_mod_reserved2[8]; 1176} vp_modify_t; 1177 1178#define VP_STS_OK 0x00 1179#define VP_STS_ERR 0x01 1180#define VP_CNT_ERR 0x02 1181#define VP_GEN_ERR 0x03 1182#define VP_IDX_ERR 0x04 1183#define VP_STS_BSY 0x05 1184 1185#define VP_MODIFY_VP 0x00 1186#define VP_MODIFY_ENA 0x01 1187 1188/* 1189 * Port Data Base Element 1190 */ 1191 1192typedef struct { 1193 uint16_t pdb_options; 1194 uint8_t pdb_mstate; 1195 uint8_t pdb_sstate; 1196 uint8_t pdb_hardaddr_bits[4]; 1197 uint8_t pdb_portid_bits[4]; 1198 uint8_t pdb_nodename[8]; 1199 uint8_t pdb_portname[8]; 1200 uint16_t pdb_execthrottle; 1201 uint16_t pdb_exec_count; 1202 uint8_t pdb_retry_count; 1203 uint8_t pdb_retry_delay; 1204 uint16_t pdb_resalloc; 1205 uint16_t pdb_curalloc; 1206 uint16_t pdb_qhead; 1207 uint16_t pdb_qtail; 1208 uint16_t pdb_tl_next; 1209 uint16_t pdb_tl_last; 1210 uint16_t pdb_features; /* PLOGI, Common Service */ 1211 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 1212 uint16_t pdb_roi; /* PLOGI, Common Service */ 1213 uint8_t pdb_target; 1214 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 1215 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */ 1216 uint16_t pdb_ncseq; /* PLOGI, Class 3 */ 1217 uint16_t pdb_noseq; /* PLOGI, Class 3 */ 1218 uint16_t pdb_labrtflg; 1219 uint16_t pdb_lstopflg; 1220 uint16_t pdb_sqhead; 1221 uint16_t pdb_sqtail; 1222 uint16_t pdb_ptimer; 1223 uint16_t pdb_nxt_seqid; 1224 uint16_t pdb_fcount; 1225 uint16_t pdb_prli_len; 1226 uint16_t pdb_prli_svc0; 1227 uint16_t pdb_prli_svc3; 1228 uint16_t pdb_loopid; 1229 uint16_t pdb_il_ptr; 1230 uint16_t pdb_sl_ptr; 1231} isp_pdb_21xx_t; 1232 1233#define PDB_OPTIONS_XMITTING (1<<11) 1234#define PDB_OPTIONS_LNKXMIT (1<<10) 1235#define PDB_OPTIONS_ABORTED (1<<9) 1236#define PDB_OPTIONS_ADISC (1<<1) 1237 1238#define PDB_STATE_DISCOVERY 0 1239#define PDB_STATE_WDISC_ACK 1 1240#define PDB_STATE_PLOGI 2 1241#define PDB_STATE_PLOGI_ACK 3 1242#define PDB_STATE_PRLI 4 1243#define PDB_STATE_PRLI_ACK 5 1244#define PDB_STATE_LOGGED_IN 6 1245#define PDB_STATE_PORT_UNAVAIL 7 1246#define PDB_STATE_PRLO 8 1247#define PDB_STATE_PRLO_ACK 9 1248#define PDB_STATE_PLOGO 10 1249#define PDB_STATE_PLOG_ACK 11 1250 1251#define SVC3_TGT_ROLE 0x10 1252#define SVC3_INI_ROLE 0x20 1253#define SVC3_ROLE_MASK 0x30 1254#define SVC3_ROLE_SHIFT 4 1255 1256#define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 1257#define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2]) 1258 1259/* 1260 * Port Data Base Element- 24XX cards 1261 */ 1262typedef struct { 1263 uint16_t pdb_flags; 1264 uint8_t pdb_curstate; 1265 uint8_t pdb_laststate; 1266 uint8_t pdb_hardaddr_bits[4]; 1267 uint8_t pdb_portid_bits[4]; 1268#define pdb_nxt_seqid_2400 pdb_portid_bits[3] 1269 uint16_t pdb_retry_timer; 1270 uint16_t pdb_handle; 1271 uint16_t pdb_rcv_dsize; 1272 uint16_t pdb_reserved0; 1273 uint16_t pdb_prli_svc0; 1274 uint16_t pdb_prli_svc3; 1275 uint8_t pdb_portname[8]; 1276 uint8_t pdb_nodename[8]; 1277 uint8_t pdb_reserved1[24]; 1278} isp_pdb_24xx_t; 1279 1280#define PDB2400_TID_SUPPORTED 0x4000 1281#define PDB2400_FC_TAPE 0x0080 1282#define PDB2400_CLASS2_ACK0 0x0040 1283#define PDB2400_FCP_CONF 0x0020 1284#define PDB2400_CLASS2 0x0010 1285#define PDB2400_ADDR_VALID 0x0002 1286 1287#define PDB2400_STATE_PLOGI_PEND 0x03 1288#define PDB2400_STATE_PLOGI_DONE 0x04 1289#define PDB2400_STATE_PRLI_PEND 0x05 1290#define PDB2400_STATE_LOGGED_IN 0x06 1291#define PDB2400_STATE_PORT_UNAVAIL 0x07 1292#define PDB2400_STATE_PRLO_PEND 0x09 1293#define PDB2400_STATE_LOGO_PEND 0x0B 1294 1295/* 1296 * Common elements from the above two structures that are actually useful to us. 1297 */ 1298typedef struct { 1299 uint16_t handle; 1300 uint16_t reserved; 1301 uint32_t s3_role : 8, 1302 portid : 24; 1303 uint8_t portname[8]; 1304 uint8_t nodename[8]; 1305} isp_pdb_t; 1306 1307/* 1308 * Port Database Changed Async Event information for 24XX cards 1309 */ 1310#define PDB24XX_AE_OK 0x00 1311#define PDB24XX_AE_IMPL_LOGO_1 0x01 1312#define PDB24XX_AE_IMPL_LOGO_2 0x02 1313#define PDB24XX_AE_IMPL_LOGO_3 0x03 1314#define PDB24XX_AE_PLOGI_RCVD 0x04 1315#define PDB24XX_AE_PLOGI_RJT 0x05 1316#define PDB24XX_AE_PRLI_RCVD 0x06 1317#define PDB24XX_AE_PRLI_RJT 0x07 1318#define PDB24XX_AE_TPRLO 0x08 1319#define PDB24XX_AE_TPRLO_RJT 0x09 1320#define PDB24XX_AE_PRLO_RCVD 0x0a 1321#define PDB24XX_AE_LOGO_RCVD 0x0b 1322#define PDB24XX_AE_TOPO_CHG 0x0c 1323#define PDB24XX_AE_NPORT_CHG 0x0d 1324#define PDB24XX_AE_FLOGI_RJT 0x0e 1325#define PDB24XX_AE_BAD_FANN 0x0f 1326#define PDB24XX_AE_FLOGI_TIMO 0x10 1327#define PDB24XX_AE_ABX_LOGO 0x11 1328#define PDB24XX_AE_PLOGI_DONE 0x12 1329#define PDB24XX_AE_PRLI_DONJE 0x13 1330#define PDB24XX_AE_OPN_1 0x14 1331#define PDB24XX_AE_OPN_2 0x15 1332#define PDB24XX_AE_TXERR 0x16 1333#define PDB24XX_AE_FORCED_LOGO 0x17 1334#define PDB24XX_AE_DISC_TIMO 0x18 1335 1336/* 1337 * Genericized Port Login/Logout software structure 1338 */ 1339typedef struct { 1340 uint16_t handle; 1341 uint16_t channel; 1342 uint32_t 1343 flags : 8, 1344 portid : 24; 1345} isp_plcmd_t; 1346/* the flags to use are those for PLOGX_FLG_* below */ 1347 1348/* 1349 * ISP24XX- Login/Logout Port IOCB 1350 */ 1351typedef struct { 1352 isphdr_t plogx_header; 1353 uint32_t plogx_handle; 1354 uint16_t plogx_status; 1355 uint16_t plogx_nphdl; 1356 uint16_t plogx_flags; 1357 uint16_t plogx_vphdl; /* low 8 bits */ 1358 uint16_t plogx_portlo; /* low 16 bits */ 1359 uint16_t plogx_rspsz_porthi; 1360 struct { 1361 uint16_t lo16; 1362 uint16_t hi16; 1363 } plogx_ioparm[11]; 1364} isp_plogx_t; 1365 1366#define PLOGX_STATUS_OK 0x00 1367#define PLOGX_STATUS_UNAVAIL 0x28 1368#define PLOGX_STATUS_LOGOUT 0x29 1369#define PLOGX_STATUS_IOCBERR 0x31 1370 1371#define PLOGX_IOCBERR_NOLINK 0x01 1372#define PLOGX_IOCBERR_NOIOCB 0x02 1373#define PLOGX_IOCBERR_NOXGHG 0x03 1374#define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */ 1375#define PLOGX_IOCBERR_NOFABRIC 0x05 1376#define PLOGX_IOCBERR_NOTREADY 0x07 1377#define PLOGX_IOCBERR_NOLOGIN 0x08 /* further info in IOPARM 1 */ 1378#define PLOGX_IOCBERR_NOPCB 0x0a 1379#define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */ 1380#define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */ 1381#define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */ 1382#define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */ 1383#define PLOGX_IOCBERR_NOHANDLE 0x1c 1384#define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */ 1385 1386#define PLOGX_FLG_CMD_MASK 0xf 1387#define PLOGX_FLG_CMD_PLOGI 0 1388#define PLOGX_FLG_CMD_PRLI 1 1389#define PLOGX_FLG_CMD_PDISC 2 1390#define PLOGX_FLG_CMD_LOGO 8 1391#define PLOGX_FLG_CMD_PRLO 9 1392#define PLOGX_FLG_CMD_TPRLO 10 1393 1394#define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */ 1395#define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */ 1396#define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */ 1397#define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */ 1398#define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */ 1399#define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */ 1400#define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */ 1401 1402#define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */ 1403#define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */ 1404 1405/* 1406 * Report ID Acquisistion (24XX multi-id firmware) 1407 */ 1408typedef struct { 1409 isphdr_t ridacq_hdr; 1410 uint32_t ridacq_handle; 1411 union { 1412 struct { 1413 uint8_t ridacq_vp_acquired; 1414 uint8_t ridacq_vp_setup; 1415 uint16_t ridacq_reserved0; 1416 } type0; /* type 0 */ 1417 struct { 1418 uint16_t ridacq_vp_count; 1419 uint8_t ridacq_vp_index; 1420 uint8_t ridacq_vp_status; 1421 } type1; /* type 1 */ 1422 } un; 1423 uint16_t ridacq_vp_port_lo; 1424 uint8_t ridacq_vp_port_hi; 1425 uint8_t ridacq_format; /* 0 or 1 */ 1426 uint16_t ridacq_map[8]; 1427 uint8_t ridacq_reserved1[32]; 1428} isp_ridacq_t; 1429 1430#define RIDACQ_STS_COMPLETE 0 1431#define RIDACQ_STS_UNACQUIRED 1 1432#define RIDACQ_STS_CHANGED 20 1433 1434 1435/* 1436 * Simple Name Server Data Structures 1437 */ 1438#define SNS_GA_NXT 0x100 1439#define SNS_GPN_ID 0x112 1440#define SNS_GNN_ID 0x113 1441#define SNS_GFF_ID 0x11F 1442#define SNS_GID_FT 0x171 1443#define SNS_RFT_ID 0x217 1444typedef struct { 1445 uint16_t snscb_rblen; /* response buffer length (words) */ 1446 uint16_t snscb_reserved0; 1447 uint16_t snscb_addr[4]; /* response buffer address */ 1448 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1449 uint16_t snscb_reserved1; 1450 uint16_t snscb_data[1]; /* variable data */ 1451} sns_screq_t; /* Subcommand Request Structure */ 1452 1453typedef struct { 1454 uint16_t snscb_rblen; /* response buffer length (words) */ 1455 uint16_t snscb_reserved0; 1456 uint16_t snscb_addr[4]; /* response buffer address */ 1457 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1458 uint16_t snscb_reserved1; 1459 uint16_t snscb_cmd; 1460 uint16_t snscb_reserved2; 1461 uint32_t snscb_reserved3; 1462 uint32_t snscb_port; 1463} sns_ga_nxt_req_t; 1464#define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t)) 1465 1466typedef struct { 1467 uint16_t snscb_rblen; /* response buffer length (words) */ 1468 uint16_t snscb_reserved0; 1469 uint16_t snscb_addr[4]; /* response buffer address */ 1470 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1471 uint16_t snscb_reserved1; 1472 uint16_t snscb_cmd; 1473 uint16_t snscb_reserved2; 1474 uint32_t snscb_reserved3; 1475 uint32_t snscb_portid; 1476} sns_gxn_id_req_t; 1477#define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t)) 1478 1479typedef struct { 1480 uint16_t snscb_rblen; /* response buffer length (words) */ 1481 uint16_t snscb_reserved0; 1482 uint16_t snscb_addr[4]; /* response buffer address */ 1483 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1484 uint16_t snscb_reserved1; 1485 uint16_t snscb_cmd; 1486 uint16_t snscb_mword_div_2; 1487 uint32_t snscb_reserved3; 1488 uint32_t snscb_fc4_type; 1489} sns_gid_ft_req_t; 1490#define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t)) 1491 1492typedef struct { 1493 uint16_t snscb_rblen; /* response buffer length (words) */ 1494 uint16_t snscb_reserved0; 1495 uint16_t snscb_addr[4]; /* response buffer address */ 1496 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1497 uint16_t snscb_reserved1; 1498 uint16_t snscb_cmd; 1499 uint16_t snscb_reserved2; 1500 uint32_t snscb_reserved3; 1501 uint32_t snscb_port; 1502 uint32_t snscb_fc4_types[8]; 1503} sns_rft_id_req_t; 1504#define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t)) 1505 1506typedef struct { 1507 ct_hdr_t snscb_cthdr; 1508 uint8_t snscb_port_type; 1509 uint8_t snscb_port_id[3]; 1510 uint8_t snscb_portname[8]; 1511 uint16_t snscb_data[1]; /* variable data */ 1512} sns_scrsp_t; /* Subcommand Response Structure */ 1513 1514typedef struct { 1515 ct_hdr_t snscb_cthdr; 1516 uint8_t snscb_port_type; 1517 uint8_t snscb_port_id[3]; 1518 uint8_t snscb_portname[8]; 1519 uint8_t snscb_pnlen; /* symbolic port name length */ 1520 uint8_t snscb_pname[255]; /* symbolic port name */ 1521 uint8_t snscb_nodename[8]; 1522 uint8_t snscb_nnlen; /* symbolic node name length */ 1523 uint8_t snscb_nname[255]; /* symbolic node name */ 1524 uint8_t snscb_ipassoc[8]; 1525 uint8_t snscb_ipaddr[16]; 1526 uint8_t snscb_svc_class[4]; 1527 uint8_t snscb_fc4_types[32]; 1528 uint8_t snscb_fpname[8]; 1529 uint8_t snscb_reserved; 1530 uint8_t snscb_hardaddr[3]; 1531} sns_ga_nxt_rsp_t; /* Subcommand Response Structure */ 1532#define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t)) 1533 1534typedef struct { 1535 ct_hdr_t snscb_cthdr; 1536 uint8_t snscb_wwn[8]; 1537} sns_gxn_id_rsp_t; 1538#define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t)) 1539 1540typedef struct { 1541 ct_hdr_t snscb_cthdr; 1542 uint32_t snscb_fc4_features[32]; 1543} sns_gff_id_rsp_t; 1544#define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t)) 1545 1546typedef struct { 1547 ct_hdr_t snscb_cthdr; 1548 struct { 1549 uint8_t control; 1550 uint8_t portid[3]; 1551 } snscb_ports[1]; 1552} sns_gid_ft_rsp_t; 1553#define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2)) 1554#define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t)) 1555 1556/* 1557 * Other Misc Structures 1558 */ 1559 1560/* ELS Pass Through */ 1561typedef struct { 1562 isphdr_t els_hdr; 1563 uint32_t els_handle; 1564 uint16_t els_status; 1565 uint16_t els_nphdl; 1566 uint16_t els_xmit_dsd_count; /* outgoing only */ 1567 uint8_t els_vphdl; 1568 uint8_t els_sof; 1569 uint32_t els_rxid; 1570 uint16_t els_recv_dsd_count; /* outgoing only */ 1571 uint8_t els_opcode; 1572 uint8_t els_reserved1; 1573 uint8_t els_did_lo; 1574 uint8_t els_did_mid; 1575 uint8_t els_did_hi; 1576 uint8_t els_reserved2; 1577 uint16_t els_reserved3; 1578 uint16_t els_ctl_flags; 1579 union { 1580 struct { 1581 uint32_t _els_bytecnt; 1582 uint32_t _els_subcode1; 1583 uint32_t _els_subcode2; 1584 uint8_t _els_reserved4[20]; 1585 } in; 1586 struct { 1587 uint32_t _els_recv_bytecnt; 1588 uint32_t _els_xmit_bytecnt; 1589 uint32_t _els_xmit_dsd_length; 1590 uint16_t _els_xmit_dsd_a1500; 1591 uint16_t _els_xmit_dsd_a3116; 1592 uint16_t _els_xmit_dsd_a4732; 1593 uint16_t _els_xmit_dsd_a6348; 1594 uint32_t _els_recv_dsd_length; 1595 uint16_t _els_recv_dsd_a1500; 1596 uint16_t _els_recv_dsd_a3116; 1597 uint16_t _els_recv_dsd_a4732; 1598 uint16_t _els_recv_dsd_a6348; 1599 } out; 1600 } inout; 1601#define els_bytecnt inout.in._els_bytecnt 1602#define els_subcode1 inout.in._els_subcode1 1603#define els_subcode2 inout.in._els_subcode2 1604#define els_reserved4 inout.in._els_reserved4 1605#define els_recv_bytecnt inout.out._els_recv_bytecnt 1606#define els_xmit_bytecnt inout.out._els_xmit_bytecnt 1607#define els_xmit_dsd_length inout.out._els_xmit_dsd_length 1608#define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500 1609#define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116 1610#define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732 1611#define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348 1612#define els_recv_dsd_length inout.out._els_recv_dsd_length 1613#define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500 1614#define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116 1615#define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732 1616#define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348 1617} els_t; 1618 1619/* 1620 * A handy package structure for running FC-SCSI commands internally 1621 */ 1622typedef struct { 1623 uint16_t handle; 1624 uint16_t lun; 1625 uint32_t 1626 channel : 8, 1627 portid : 24; 1628 uint32_t timeout; 1629 union { 1630 struct { 1631 uint32_t data_length; 1632 uint32_t 1633 no_wait : 1, 1634 do_read : 1; 1635 uint8_t cdb[16]; 1636 void *data_ptr; 1637 } beg; 1638 struct { 1639 uint32_t data_residual; 1640 uint8_t status; 1641 uint8_t pad; 1642 uint16_t sense_length; 1643 uint8_t sense_data[32]; 1644 } end; 1645 } fcd; 1646} isp_xcmd_t; 1647 1648/* 1649 * Target Mode related definitions 1650 */ 1651#define QLTM_SENSELEN 18 /* non-FC cards only */ 1652#define QLTM_SVALID 0x80 1653 1654/* 1655 * Structure for Enable Lun and Modify Lun queue entries 1656 */ 1657typedef struct { 1658 isphdr_t le_header; 1659 uint32_t le_reserved; 1660 uint8_t le_lun; 1661 uint8_t le_rsvd; 1662 uint8_t le_ops; /* Modify LUN only */ 1663 uint8_t le_tgt; /* Not for FC */ 1664 uint32_t le_flags; /* Not for FC */ 1665 uint8_t le_status; 1666 uint8_t le_reserved2; 1667 uint8_t le_cmd_count; 1668 uint8_t le_in_count; 1669 uint8_t le_cdb6len; /* Not for FC */ 1670 uint8_t le_cdb7len; /* Not for FC */ 1671 uint16_t le_timeout; 1672 uint16_t le_reserved3[20]; 1673} lun_entry_t; 1674 1675/* 1676 * le_flags values 1677 */ 1678#define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */ 1679#define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */ 1680#define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */ 1681#define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */ 1682 1683/* 1684 * le_ops values 1685 */ 1686#define LUN_CCINCR 0x01 /* increment command count */ 1687#define LUN_CCDECR 0x02 /* decrement command count */ 1688#define LUN_ININCR 0x40 /* increment immed. notify count */ 1689#define LUN_INDECR 0x80 /* decrement immed. notify count */ 1690 1691/* 1692 * le_status values 1693 */ 1694#define LUN_OK 0x01 /* we be rockin' */ 1695#define LUN_ERR 0x04 /* request completed with error */ 1696#define LUN_INVAL 0x06 /* invalid request */ 1697#define LUN_NOCAP 0x16 /* can't provide requested capability */ 1698#define LUN_ENABLED 0x3E /* LUN already enabled */ 1699 1700/* 1701 * Immediate Notify Entry structure 1702 */ 1703#define IN_MSGLEN 8 /* 8 bytes */ 1704#define IN_RSVDLEN 8 /* 8 words */ 1705typedef struct { 1706 isphdr_t in_header; 1707 uint32_t in_reserved; 1708 uint8_t in_lun; /* lun */ 1709 uint8_t in_iid; /* initiator */ 1710 uint8_t in_reserved2; 1711 uint8_t in_tgt; /* target */ 1712 uint32_t in_flags; 1713 uint8_t in_status; 1714 uint8_t in_rsvd2; 1715 uint8_t in_tag_val; /* tag value */ 1716 uint8_t in_tag_type; /* tag type */ 1717 uint16_t in_seqid; /* sequence id */ 1718 uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 1719 uint16_t in_reserved3[IN_RSVDLEN]; 1720 uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */ 1721} in_entry_t; 1722 1723typedef struct { 1724 isphdr_t in_header; 1725 uint32_t in_reserved; 1726 uint8_t in_lun; /* lun */ 1727 uint8_t in_iid; /* initiator */ 1728 uint16_t in_scclun; 1729 uint32_t in_reserved2; 1730 uint16_t in_status; 1731 uint16_t in_task_flags; 1732 uint16_t in_seqid; /* sequence id */ 1733} in_fcentry_t; 1734 1735typedef struct { 1736 isphdr_t in_header; 1737 uint32_t in_reserved; 1738 uint16_t in_iid; /* initiator */ 1739 uint16_t in_scclun; 1740 uint32_t in_reserved2; 1741 uint16_t in_status; 1742 uint16_t in_task_flags; 1743 uint16_t in_seqid; /* sequence id */ 1744} in_fcentry_e_t; 1745 1746/* 1747 * Values for the in_status field 1748 */ 1749#define IN_REJECT 0x0D /* Message Reject message received */ 1750#define IN_RESET 0x0E /* Bus Reset occurred */ 1751#define IN_NO_RCAP 0x16 /* requested capability not available */ 1752#define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 1753#define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 1754#define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 1755#define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 1756#define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 1757#define IN_PORT_CHANGED 0x2A /* port changed */ 1758#define IN_GLOBAL_LOGO 0x2E /* all ports logged out */ 1759#define IN_NO_NEXUS 0x3B /* Nexus not established */ 1760 1761/* 1762 * Values for the in_task_flags field- should only get one at a time! 1763 */ 1764#define TASK_FLAGS_RESERVED_MASK (0xe700) 1765#define TASK_FLAGS_CLEAR_ACA (1<<14) 1766#define TASK_FLAGS_TARGET_RESET (1<<13) 1767#define TASK_FLAGS_LUN_RESET (1<<12) 1768#define TASK_FLAGS_CLEAR_TASK_SET (1<<10) 1769#define TASK_FLAGS_ABORT_TASK_SET (1<<9) 1770 1771/* 1772 * ISP24XX Immediate Notify 1773 */ 1774typedef struct { 1775 isphdr_t in_header; 1776 uint32_t in_reserved; 1777 uint16_t in_nphdl; 1778 uint16_t in_reserved1; 1779 uint16_t in_flags; 1780 uint16_t in_srr_rxid; 1781 uint16_t in_status; 1782 uint8_t in_status_subcode; 1783 uint8_t in_reserved2; 1784 uint32_t in_rxid; 1785 uint16_t in_srr_reloff_lo; 1786 uint16_t in_srr_reloff_hi; 1787 uint16_t in_srr_iu; 1788 uint16_t in_srr_oxid; 1789 /* 1790 * If bit 2 is set in in_flags, the following 1791 * two tags are valid. If the received ELS is 1792 * a LOGO, then these tags contain the N Port ID 1793 * from the LOGO payload. If the received ELS 1794 * request is TPRLO, these tags contain the 1795 * Third Party Originator N Port ID. 1796 */ 1797 uint16_t in_nport_id_hi; 1798 uint8_t in_nport_id_lo; 1799 uint8_t in_reserved3; 1800 /* 1801 * If bit 2 is set in in_flags, the following 1802 * tag is valid. If the received ELS is a LOGO, 1803 * then this tag contains the n-port handle 1804 * from the LOGO payload. If the received ELS 1805 * request is TPRLO, this tag contain the 1806 * n-port handle for the Third Party Originator. 1807 */ 1808 uint16_t in_np_handle; 1809 uint8_t in_reserved4[12]; 1810 uint8_t in_reserved5; 1811 uint8_t in_vpidx; 1812 uint32_t in_reserved6; 1813 uint16_t in_portid_lo; 1814 uint8_t in_portid_hi; 1815 uint8_t in_reserved7; 1816 uint16_t in_reserved8; 1817 uint16_t in_oxid; 1818} in_fcentry_24xx_t; 1819 1820#define IN24XX_FLAG_PUREX_IOCB 0x1 1821#define IN24XX_FLAG_GLOBAL_LOGOUT 0x2 1822#define IN24XX_FLAG_NPHDL_VALID 0x4 1823 1824#define IN24XX_LIP_RESET 0x0E 1825#define IN24XX_LINK_RESET 0x0F 1826#define IN24XX_PORT_LOGOUT 0x29 1827#define IN24XX_PORT_CHANGED 0x2A 1828#define IN24XX_LINK_FAILED 0x2E 1829#define IN24XX_SRR_RCVD 0x45 1830#define IN24XX_ELS_RCVD 0x46 /* 1831 * login-affectin ELS received- check 1832 * subcode for specific opcode 1833 */ 1834 1835/* 1836 * For f/w > 4.0.25, these offsets in the Immediate Notify contain 1837 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in 1838 * Big Endian format. 1839 */ 1840#define IN24XX_PLOGI_WWNN_OFF 0x20 1841#define IN24XX_PLOGI_WWPN_OFF 0x28 1842 1843/* 1844 * For f/w > 4.0.25, this offset in the Immediate Notify contain 1845 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format. 1846 */ 1847#define IN24XX_LOGO_WWPN_OFF 0x28 1848 1849/* 1850 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT 1851 */ 1852#define IN24XX_PORT_LOGOUT_PDISC_TMO 0x00 1853#define IN24XX_PORT_LOGOUT_UXPR_DISC 0x01 1854#define IN24XX_PORT_LOGOUT_OWN_OPN 0x02 1855#define IN24XX_PORT_LOGOUT_OWN_OPN_SFT 0x03 1856#define IN24XX_PORT_LOGOUT_ABTS_TMO 0x04 1857#define IN24XX_PORT_LOGOUT_DISC_RJT 0x05 1858#define IN24XX_PORT_LOGOUT_LOGIN_NEEDED 0x06 1859#define IN24XX_PORT_LOGOUT_BAD_DISC 0x07 1860#define IN24XX_PORT_LOGOUT_LOST_ALPA 0x08 1861#define IN24XX_PORT_LOGOUT_XMIT_FAILURE 0x09 1862 1863/* 1864 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED 1865 */ 1866#define IN24XX_PORT_CHANGED_BADFAN 0x00 1867#define IN24XX_PORT_CHANGED_TOPO_CHANGE 0x01 1868#define IN24XX_PORT_CHANGED_FLOGI_ACC 0x02 1869#define IN24XX_PORT_CHANGED_FLOGI_RJT 0x03 1870#define IN24XX_PORT_CHANGED_TIMEOUT 0x04 1871#define IN24XX_PORT_CHANGED_PORT_CHANGE 0x05 1872 1873/* 1874 * Notify Acknowledge Entry structure 1875 */ 1876#define NA_RSVDLEN 22 1877typedef struct { 1878 isphdr_t na_header; 1879 uint32_t na_reserved; 1880 uint8_t na_lun; /* lun */ 1881 uint8_t na_iid; /* initiator */ 1882 uint8_t na_reserved2; 1883 uint8_t na_tgt; /* target */ 1884 uint32_t na_flags; 1885 uint8_t na_status; 1886 uint8_t na_event; 1887 uint16_t na_seqid; /* sequence id */ 1888 uint16_t na_reserved3[NA_RSVDLEN]; 1889} na_entry_t; 1890 1891/* 1892 * Value for the na_event field 1893 */ 1894#define NA_RST_CLRD 0x80 /* Clear an async event notification */ 1895#define NA_OK 0x01 /* Notify Acknowledge Succeeded */ 1896#define NA_INVALID 0x06 /* Invalid Notify Acknowledge */ 1897 1898#define NA2_RSVDLEN 21 1899typedef struct { 1900 isphdr_t na_header; 1901 uint32_t na_reserved; 1902 uint8_t na_reserved1; 1903 uint8_t na_iid; /* initiator loop id */ 1904 uint16_t na_response; 1905 uint16_t na_flags; 1906 uint16_t na_reserved2; 1907 uint16_t na_status; 1908 uint16_t na_task_flags; 1909 uint16_t na_seqid; /* sequence id */ 1910 uint16_t na_reserved3[NA2_RSVDLEN]; 1911} na_fcentry_t; 1912 1913typedef struct { 1914 isphdr_t na_header; 1915 uint32_t na_reserved; 1916 uint16_t na_iid; /* initiator loop id */ 1917 uint16_t na_response; /* response code */ 1918 uint16_t na_flags; 1919 uint16_t na_reserved2; 1920 uint16_t na_status; 1921 uint16_t na_task_flags; 1922 uint16_t na_seqid; /* sequence id */ 1923 uint16_t na_reserved3[NA2_RSVDLEN]; 1924} na_fcentry_e_t; 1925 1926#define NAFC_RCOUNT 0x80 /* increment resource count */ 1927#define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */ 1928#define NAFC_TVALID 0x10 /* task mangement response code is valid */ 1929 1930/* 1931 * ISP24XX Notify Acknowledge 1932 */ 1933 1934typedef struct { 1935 isphdr_t na_header; 1936 uint32_t na_handle; 1937 uint16_t na_nphdl; 1938 uint16_t na_reserved1; 1939 uint16_t na_flags; 1940 uint16_t na_srr_rxid; 1941 uint16_t na_status; 1942 uint8_t na_status_subcode; 1943 uint8_t na_reserved2; 1944 uint32_t na_rxid; 1945 uint16_t na_srr_reloff_lo; 1946 uint16_t na_srr_reloff_hi; 1947 uint16_t na_srr_iu; 1948 uint16_t na_srr_flags; 1949 uint8_t na_reserved3[18]; 1950 uint8_t na_reserved4; 1951 uint8_t na_vpidx; 1952 uint8_t na_srr_reject_vunique; 1953 uint8_t na_srr_reject_explanation; 1954 uint8_t na_srr_reject_code; 1955 uint8_t na_reserved5; 1956 uint8_t na_reserved6[6]; 1957 uint16_t na_oxid; 1958} na_fcentry_24xx_t; 1959 1960/* 1961 * Accept Target I/O Entry structure 1962 */ 1963#define ATIO_CDBLEN 26 1964 1965typedef struct { 1966 isphdr_t at_header; 1967 uint16_t at_reserved; 1968 uint16_t at_handle; 1969 uint8_t at_lun; /* lun */ 1970 uint8_t at_iid; /* initiator */ 1971 uint8_t at_cdblen; /* cdb length */ 1972 uint8_t at_tgt; /* target */ 1973 uint32_t at_flags; 1974 uint8_t at_status; /* firmware status */ 1975 uint8_t at_scsi_status; /* scsi status */ 1976 uint8_t at_tag_val; /* tag value */ 1977 uint8_t at_tag_type; /* tag type */ 1978 uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 1979 uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */ 1980} at_entry_t; 1981 1982/* 1983 * at_flags values 1984 */ 1985#define AT_NODISC 0x00008000 /* disconnect disabled */ 1986#define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */ 1987 1988/* 1989 * at_status values 1990 */ 1991#define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 1992#define AT_RESET 0x0E /* SCSI Bus Reset Occurred */ 1993#define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 1994#define AT_NOCAP 0x16 /* Requested capability not available */ 1995#define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 1996#define AT_CDB 0x3D /* CDB received */ 1997/* 1998 * Macros to create and fetch and test concatenated handle and tag value macros 1999 * (SPI only) 2000 */ 2001#define AT_MAKE_TAGID(tid, aep) \ 2002 tid = aep->at_handle; \ 2003 if (aep->at_flags & AT_TQAE) { \ 2004 tid |= (aep->at_tag_val << 16); \ 2005 tid |= (1 << 24); \ 2006 } 2007 2008#define CT_MAKE_TAGID(tid, ct) \ 2009 tid = ct->ct_fwhandle; \ 2010 if (ct->ct_flags & CT_TQAE) { \ 2011 tid |= (ct->ct_tag_val << 16); \ 2012 tid |= (1 << 24); \ 2013 } 2014 2015#define AT_HAS_TAG(val) ((val) & (1 << 24)) 2016#define AT_GET_TAG(val) (((val) >> 16) & 0xff) 2017#define AT_GET_HANDLE(val) ((val) & 0xffff) 2018 2019#define IN_MAKE_TAGID(tid, inp) \ 2020 tid = inp->in_seqid; \ 2021 tid |= (inp->in_tag_val << 16); \ 2022 tid |= (1 << 24) 2023 2024/* 2025 * Accept Target I/O Entry structure, Type 2 2026 */ 2027#define ATIO2_CDBLEN 16 2028 2029typedef struct { 2030 isphdr_t at_header; 2031 uint32_t at_reserved; 2032 uint8_t at_lun; /* lun or reserved */ 2033 uint8_t at_iid; /* initiator */ 2034 uint16_t at_rxid; /* response ID */ 2035 uint16_t at_flags; 2036 uint16_t at_status; /* firmware status */ 2037 uint8_t at_crn; /* command reference number */ 2038 uint8_t at_taskcodes; 2039 uint8_t at_taskflags; 2040 uint8_t at_execodes; 2041 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2042 uint32_t at_datalen; /* allocated data len */ 2043 uint16_t at_scclun; /* SCC Lun or reserved */ 2044 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2045 uint16_t at_reserved2[6]; 2046 uint16_t at_oxid; 2047} at2_entry_t; 2048 2049typedef struct { 2050 isphdr_t at_header; 2051 uint32_t at_reserved; 2052 uint16_t at_iid; /* initiator */ 2053 uint16_t at_rxid; /* response ID */ 2054 uint16_t at_flags; 2055 uint16_t at_status; /* firmware status */ 2056 uint8_t at_crn; /* command reference number */ 2057 uint8_t at_taskcodes; 2058 uint8_t at_taskflags; 2059 uint8_t at_execodes; 2060 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2061 uint32_t at_datalen; /* allocated data len */ 2062 uint16_t at_scclun; /* SCC Lun or reserved */ 2063 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2064 uint16_t at_reserved2[6]; 2065 uint16_t at_oxid; 2066} at2e_entry_t; 2067 2068#define ATIO2_WWPN_OFFSET 0x2A 2069#define ATIO2_OXID_OFFSET 0x3E 2070 2071#define ATIO2_TC_ATTR_MASK 0x7 2072#define ATIO2_TC_ATTR_SIMPLEQ 0 2073#define ATIO2_TC_ATTR_HEADOFQ 1 2074#define ATIO2_TC_ATTR_ORDERED 2 2075#define ATIO2_TC_ATTR_ACAQ 4 2076#define ATIO2_TC_ATTR_UNTAGGED 5 2077 2078#define ATIO2_EX_WRITE 0x1 2079#define ATIO2_EX_READ 0x2 2080/* 2081 * Macros to create and fetch and test concatenated handle and tag value macros 2082 */ 2083#define AT2_MAKE_TAGID(tid, bus, inst, aep) \ 2084 tid = aep->at_rxid; \ 2085 tid |= (((uint64_t)inst) << 32); \ 2086 tid |= (((uint64_t)bus) << 48) 2087 2088#define CT2_MAKE_TAGID(tid, bus, inst, ct) \ 2089 tid = ct->ct_rxid; \ 2090 tid |= (((uint64_t)inst) << 32); \ 2091 tid |= (((uint64_t)(bus & 0xff)) << 48) 2092 2093#define AT2_HAS_TAG(val) 1 2094#define AT2_GET_TAG(val) ((val) & 0xffffffff) 2095#define AT2_GET_INST(val) (((val) >> 32) & 0xffff) 2096#define AT2_GET_HANDLE AT2_GET_TAG 2097#define AT2_GET_BUS(val) (((val) >> 48) & 0xff) 2098 2099#define FC_HAS_TAG AT2_HAS_TAG 2100#define FC_GET_TAG AT2_GET_TAG 2101#define FC_GET_INST AT2_GET_INST 2102#define FC_GET_HANDLE AT2_GET_HANDLE 2103 2104#define IN_FC_MAKE_TAGID(tid, bus, inst, seqid) \ 2105 tid = seqid; \ 2106 tid |= (((uint64_t)inst) << 32); \ 2107 tid |= (((uint64_t)(bus & 0xff)) << 48) 2108 2109#define FC_TAG_INSERT_INST(tid, inst) \ 2110 tid &= ~0x0000ffff00000000ull; \ 2111 tid |= (((uint64_t)inst) << 32) 2112 2113/* 2114 * 24XX ATIO Definition 2115 * 2116 * This is *quite* different from other entry types. 2117 * First of all, it has its own queue it comes in on. 2118 * 2119 * Secondly, it doesn't have a normal header. 2120 * 2121 * Thirdly, it's just a passthru of the FCP CMND IU 2122 * which is recorded in big endian mode. 2123 */ 2124typedef struct { 2125 uint8_t at_type; 2126 uint8_t at_count; 2127 /* 2128 * Task attribute in high four bits, 2129 * the rest is the FCP CMND IU Length. 2130 * NB: the command can extend past the 2131 * length for a single queue entry. 2132 */ 2133 uint16_t at_ta_len; 2134 uint32_t at_rxid; 2135 fc_hdr_t at_hdr; 2136 fcp_cmnd_iu_t at_cmnd; 2137} at7_entry_t; 2138#define AT7_NORESRC_RXID 0xffffffff 2139 2140 2141/* 2142 * Continue Target I/O Entry structure 2143 * Request from driver. The response from the 2144 * ISP firmware is the same except that the last 18 2145 * bytes are overwritten by suggested sense data if 2146 * the 'autosense valid' bit is set in the status byte. 2147 */ 2148typedef struct { 2149 isphdr_t ct_header; 2150 uint16_t ct_syshandle; 2151 uint16_t ct_fwhandle; /* required by f/w */ 2152 uint8_t ct_lun; /* lun */ 2153 uint8_t ct_iid; /* initiator id */ 2154 uint8_t ct_reserved2; 2155 uint8_t ct_tgt; /* our target id */ 2156 uint32_t ct_flags; 2157 uint8_t ct_status; /* isp status */ 2158 uint8_t ct_scsi_status; /* scsi status */ 2159 uint8_t ct_tag_val; /* tag value */ 2160 uint8_t ct_tag_type; /* tag type */ 2161 uint32_t ct_xfrlen; /* transfer length */ 2162 int32_t ct_resid; /* residual length */ 2163 uint16_t ct_timeout; 2164 uint16_t ct_seg_count; 2165 ispds_t ct_dataseg[ISP_RQDSEG]; 2166} ct_entry_t; 2167 2168/* 2169 * For some of the dual port SCSI adapters, port (bus #) is reported 2170 * in the MSbit of ct_iid. Bit fields are a bit too awkward here. 2171 * 2172 * Note that this does not apply to FC adapters at all which can and 2173 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices 2174 * that have logged in across a SCSI fabric. 2175 */ 2176#define GET_IID_VAL(x) (x & 0x3f) 2177#define GET_BUS_VAL(x) ((x >> 7) & 0x1) 2178#define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f)) 2179#define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7)) 2180 2181/* 2182 * ct_flags values 2183 */ 2184#define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */ 2185#define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction */ 2186#define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction */ 2187#define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */ 2188#define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */ 2189#define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */ 2190#define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */ 2191#define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */ 2192#define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */ 2193#define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */ 2194#define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */ 2195 2196/* 2197 * ct_status values 2198 * - set by the firmware when it returns the CTIO 2199 */ 2200#define CT_OK 0x01 /* completed without error */ 2201#define CT_ABORTED 0x02 /* aborted by host */ 2202#define CT_ERR 0x04 /* see sense data for error */ 2203#define CT_INVAL 0x06 /* request for disabled lun */ 2204#define CT_NOPATH 0x07 /* invalid ITL nexus */ 2205#define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 2206#define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */ 2207#define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 2208#define CT_TIMEOUT 0x0B /* timed out */ 2209#define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 2210#define CT_PARITY 0x0F /* Uncorrectable Parity Error */ 2211#define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */ 2212#define CT_PANIC 0x13 /* Unrecoverable Error */ 2213#define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2214#define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */ 2215#define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2216#define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 2217#define CT_PORTUNAVAIL 0x28 /* port not available */ 2218#define CT_LOGOUT 0x29 /* port logout */ 2219#define CT_PORTCHANGED 0x2A /* port changed */ 2220#define CT_IDE 0x33 /* Initiator Detected Error */ 2221#define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 2222#define CT_SRR 0x45 /* SRR Received */ 2223#define CT_LUN_RESET 0x48 /* Lun Reset Received */ 2224 2225#define CT_HBA_RESET 0xffff /* pseudo error - command destroyed by HBA reset*/ 2226 2227/* 2228 * When the firmware returns a CTIO entry, it may overwrite the last 2229 * part of the structure with sense data. This starts at offset 0x2E 2230 * into the entry, which is in the middle of ct_dataseg[1]. Rather 2231 * than define a new struct for this, I'm just using the sense data 2232 * offset. 2233 */ 2234#define CTIO_SENSE_OFFSET 0x2E 2235 2236/* 2237 * Entry length in u_longs. All entries are the same size so 2238 * any one will do as the numerator. 2239 */ 2240#define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t)) 2241 2242/* 2243 * QLA2100 CTIO (type 2) entry 2244 */ 2245#define MAXRESPLEN 26 2246typedef struct { 2247 isphdr_t ct_header; 2248 uint32_t ct_syshandle; 2249 uint8_t ct_lun; /* lun */ 2250 uint8_t ct_iid; /* initiator id */ 2251 uint16_t ct_rxid; /* response ID */ 2252 uint16_t ct_flags; 2253 uint16_t ct_status; /* isp status */ 2254 uint16_t ct_timeout; 2255 uint16_t ct_seg_count; 2256 uint32_t ct_reloff; /* relative offset */ 2257 int32_t ct_resid; /* residual length */ 2258 union { 2259 /* 2260 * The three different modes that the target driver 2261 * can set the CTIO{2,3,4} up as. 2262 * 2263 * The first is for sending FCP_DATA_IUs as well as 2264 * (optionally) sending a terminal SCSI status FCP_RSP_IU. 2265 * 2266 * The second is for sending SCSI sense data in an FCP_RSP_IU. 2267 * Note that no FCP_DATA_IUs will be sent. 2268 * 2269 * The third is for sending FCP_RSP_IUs as built specifically 2270 * in system memory as located by the isp_dataseg. 2271 */ 2272 struct { 2273 uint32_t _reserved; 2274 uint16_t _reserved2; 2275 uint16_t ct_scsi_status; 2276 uint32_t ct_xfrlen; 2277 union { 2278 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2279 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2280 ispdslist_t ct_dslist; 2281 } u; 2282 } m0; 2283 struct { 2284 uint16_t _reserved; 2285 uint16_t _reserved2; 2286 uint16_t ct_senselen; 2287 uint16_t ct_scsi_status; 2288 uint16_t ct_resplen; 2289 uint8_t ct_resp[MAXRESPLEN]; 2290 } m1; 2291 struct { 2292 uint32_t _reserved; 2293 uint16_t _reserved2; 2294 uint16_t _reserved3; 2295 uint32_t ct_datalen; 2296 ispds_t ct_fcp_rsp_iudata; 2297 } m2; 2298 } rsp; 2299} ct2_entry_t; 2300 2301typedef struct { 2302 isphdr_t ct_header; 2303 uint32_t ct_syshandle; 2304 uint16_t ct_iid; /* initiator id */ 2305 uint16_t ct_rxid; /* response ID */ 2306 uint16_t ct_flags; 2307 uint16_t ct_status; /* isp status */ 2308 uint16_t ct_timeout; 2309 uint16_t ct_seg_count; 2310 uint32_t ct_reloff; /* relative offset */ 2311 int32_t ct_resid; /* residual length */ 2312 union { 2313 struct { 2314 uint32_t _reserved; 2315 uint16_t _reserved2; 2316 uint16_t ct_scsi_status; 2317 uint32_t ct_xfrlen; 2318 union { 2319 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2320 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2321 ispdslist_t ct_dslist; 2322 } u; 2323 } m0; 2324 struct { 2325 uint16_t _reserved; 2326 uint16_t _reserved2; 2327 uint16_t ct_senselen; 2328 uint16_t ct_scsi_status; 2329 uint16_t ct_resplen; 2330 uint8_t ct_resp[MAXRESPLEN]; 2331 } m1; 2332 struct { 2333 uint32_t _reserved; 2334 uint16_t _reserved2; 2335 uint16_t _reserved3; 2336 uint32_t ct_datalen; 2337 ispds_t ct_fcp_rsp_iudata; 2338 } m2; 2339 } rsp; 2340} ct2e_entry_t; 2341 2342/* 2343 * ct_flags values for CTIO2 2344 */ 2345#define CT2_FLAG_MODE0 0x0000 2346#define CT2_FLAG_MODE1 0x0001 2347#define CT2_FLAG_MODE2 0x0002 2348#define CT2_FLAG_MMASK 0x0003 2349#define CT2_DATA_IN 0x0040 2350#define CT2_DATA_OUT 0x0080 2351#define CT2_NO_DATA 0x00C0 2352#define CT2_DATAMASK 0x00C0 2353#define CT2_CCINCR 0x0100 2354#define CT2_FASTPOST 0x0200 2355#define CT2_CONFIRM 0x2000 2356#define CT2_TERMINATE 0x4000 2357#define CT2_SENDSTATUS 0x8000 2358 2359/* 2360 * ct_status values are (mostly) the same as that for ct_entry. 2361 */ 2362 2363/* 2364 * ct_scsi_status values- the low 8 bits are the normal SCSI status 2365 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 2366 * fields. 2367 */ 2368#define CT2_RSPLEN_VALID 0x0100 2369#define CT2_SNSLEN_VALID 0x0200 2370#define CT2_DATA_OVER 0x0400 2371#define CT2_DATA_UNDER 0x0800 2372 2373/* 2374 * ISP24XX CTIO 2375 */ 2376#define MAXRESPLEN_24XX 24 2377typedef struct { 2378 isphdr_t ct_header; 2379 uint32_t ct_syshandle; 2380 uint16_t ct_nphdl; /* status on returned CTIOs */ 2381 uint16_t ct_timeout; 2382 uint16_t ct_seg_count; 2383 uint8_t ct_vpidx; 2384 uint8_t ct_xflags; 2385 uint16_t ct_iid_lo; /* low 16 bits of portid */ 2386 uint8_t ct_iid_hi; /* hi 8 bits of portid */ 2387 uint8_t ct_reserved; 2388 uint32_t ct_rxid; 2389 uint16_t ct_senselen; /* mode 1 only */ 2390 uint16_t ct_flags; 2391 int32_t ct_resid; /* residual length */ 2392 uint16_t ct_oxid; 2393 uint16_t ct_scsi_status; /* modes 0 && 1 only */ 2394 union { 2395 struct { 2396 uint32_t reloff; 2397 uint32_t reserved0; 2398 uint32_t ct_xfrlen; 2399 uint32_t reserved1; 2400 ispds64_t ds; 2401 } m0; 2402 struct { 2403 uint16_t ct_resplen; 2404 uint16_t reserved; 2405 uint8_t ct_resp[MAXRESPLEN_24XX]; 2406 } m1; 2407 struct { 2408 uint32_t reserved0; 2409 uint32_t ct_datalen; 2410 uint32_t reserved1; 2411 ispds64_t ct_fcp_rsp_iudata; 2412 } m2; 2413 } rsp; 2414} ct7_entry_t; 2415 2416/* 2417 * ct_flags values for CTIO7 2418 */ 2419#define CT7_DATA_IN 0x0002 2420#define CT7_DATA_OUT 0x0001 2421#define CT7_NO_DATA 0x0000 2422#define CT7_DATAMASK 0x003 2423#define CT7_DSD_ENABLE 0x0004 2424#define CT7_CONF_STSFD 0x0010 2425#define CT7_EXPLCT_CONF 0x0020 2426#define CT7_FLAG_MODE0 0x0000 2427#define CT7_FLAG_MODE1 0x0040 2428#define CT7_FLAG_MODE2 0x0080 2429#define CT7_FLAG_MMASK 0x00C0 2430#define CT7_NOACK 0x0100 2431#define CT7_TASK_ATTR_SHIFT 9 2432#define CT7_CONFIRM 0x2000 2433#define CT7_TERMINATE 0x4000 2434#define CT7_SENDSTATUS 0x8000 2435 2436/* 2437 * Type 7 CTIO status codes 2438 */ 2439#define CT7_OK 0x01 /* completed without error */ 2440#define CT7_ABORTED 0x02 /* aborted by host */ 2441#define CT7_ERR 0x04 /* see sense data for error */ 2442#define CT7_INVAL 0x06 /* request for disabled lun */ 2443#define CT7_INVRXID 0x08 /* Invalid RX_ID */ 2444#define CT7_DATA_OVER 0x09 /* Data Overrun */ 2445#define CT7_TIMEOUT 0x0B /* timed out */ 2446#define CT7_RESET 0x0E /* LIP Rset Received */ 2447#define CT7_BUS_ERROR 0x10 /* DMA PCI Error */ 2448#define CT7_REASSY_ERR 0x11 /* DMA reassembly error */ 2449#define CT7_DATA_UNDER 0x15 /* Data Underrun */ 2450#define CT7_PORTUNAVAIL 0x28 /* port not available */ 2451#define CT7_LOGOUT 0x29 /* port logout */ 2452#define CT7_PORTCHANGED 0x2A /* port changed */ 2453#define CT7_SRR 0x45 /* SRR Received */ 2454 2455/* 2456 * Other 24XX related target IOCBs 2457 */ 2458 2459/* 2460 * ABTS Received 2461 */ 2462typedef struct { 2463 isphdr_t abts_header; 2464 uint8_t abts_reserved0[6]; 2465 uint16_t abts_nphdl; 2466 uint16_t abts_reserved1; 2467 uint16_t abts_sof; 2468 uint32_t abts_rxid_abts; 2469 uint16_t abts_did_lo; 2470 uint8_t abts_did_hi; 2471 uint8_t abts_r_ctl; 2472 uint16_t abts_sid_lo; 2473 uint8_t abts_sid_hi; 2474 uint8_t abts_cs_ctl; 2475 uint16_t abts_fs_ctl; 2476 uint8_t abts_f_ctl; 2477 uint8_t abts_type; 2478 uint16_t abts_seq_cnt; 2479 uint8_t abts_df_ctl; 2480 uint8_t abts_seq_id; 2481 uint16_t abts_rx_id; 2482 uint16_t abts_ox_id; 2483 uint32_t abts_param; 2484 uint8_t abts_reserved2[16]; 2485 uint32_t abts_rxid_task; 2486} abts_t; 2487 2488typedef struct { 2489 isphdr_t abts_rsp_header; 2490 uint32_t abts_rsp_handle; 2491 uint16_t abts_rsp_status; 2492 uint16_t abts_rsp_nphdl; 2493 uint16_t abts_rsp_ctl_flags; 2494 uint16_t abts_rsp_sof; 2495 uint32_t abts_rsp_rxid_abts; 2496 uint16_t abts_rsp_did_lo; 2497 uint8_t abts_rsp_did_hi; 2498 uint8_t abts_rsp_r_ctl; 2499 uint16_t abts_rsp_sid_lo; 2500 uint8_t abts_rsp_sid_hi; 2501 uint8_t abts_rsp_cs_ctl; 2502 uint16_t abts_rsp_f_ctl_lo; 2503 uint8_t abts_rsp_f_ctl_hi; 2504 uint8_t abts_rsp_type; 2505 uint16_t abts_rsp_seq_cnt; 2506 uint8_t abts_rsp_df_ctl; 2507 uint8_t abts_rsp_seq_id; 2508 uint16_t abts_rsp_rx_id; 2509 uint16_t abts_rsp_ox_id; 2510 uint32_t abts_rsp_param; 2511 union { 2512 struct { 2513 uint16_t reserved; 2514 uint8_t last_seq_id; 2515 uint8_t seq_id_valid; 2516 uint16_t aborted_rx_id; 2517 uint16_t aborted_ox_id; 2518 uint16_t high_seq_cnt; 2519 uint16_t low_seq_cnt; 2520 uint8_t reserved2[4]; 2521 } ba_acc; 2522 struct { 2523 uint8_t vendor_unique; 2524 uint8_t explanation; 2525 uint8_t reason; 2526 uint8_t reserved; 2527 uint8_t reserved2[12]; 2528 } ba_rjt; 2529 struct { 2530 uint8_t reserved[8]; 2531 uint32_t subcode1; 2532 uint32_t subcode2; 2533 } rsp; 2534 uint8_t reserved[16]; 2535 } abts_rsp_payload; 2536 uint32_t abts_rsp_rxid_task; 2537} abts_rsp_t; 2538 2539/* terminate this ABTS exchange */ 2540#define ISP24XX_ABTS_RSP_TERMINATE 0x01 2541 2542#define ISP24XX_ABTS_RSP_COMPLETE 0x00 2543#define ISP24XX_ABTS_RSP_RESET 0x04 2544#define ISP24XX_ABTS_RSP_ABORTED 0x05 2545#define ISP24XX_ABTS_RSP_TIMEOUT 0x06 2546#define ISP24XX_ABTS_RSP_INVXID 0x08 2547#define ISP24XX_ABTS_RSP_LOGOUT 0x29 2548#define ISP24XX_ABTS_RSP_SUBCODE 0x31 2549 2550#define ISP24XX_NO_TASK 0xffffffff 2551 2552/* 2553 * Miscellaneous 2554 * 2555 * These are the limits of the number of dma segments we 2556 * can deal with based not on the size of the segment counter 2557 * (which is 16 bits), but on the size of the number of 2558 * queue entries field (which is 8 bits). We assume no 2559 * segments in the first queue entry, so we can either 2560 * have 7 dma segments per continuation entry or 5 2561 * (for 64 bit dma).. multiplying out by 254.... 2562 */ 2563#define ISP_NSEG_MAX 1778 2564#define ISP_NSEG64_MAX 1270 2565 2566#endif /* _ISPMBOX_H */ 2567