ispmbox.h revision 197372
1/* $FreeBSD: head/sys/dev/isp/ispmbox.h 197372 2009-09-21 01:38:22Z mjacob $ */
2/*-
3 *  Copyright (c) 1997-2009 by Matthew Jacob
4 *  All rights reserved.
5 *
6 *  Redistribution and use in source and binary forms, with or without
7 *  modification, are permitted provided that the following conditions
8 *  are met:
9 *
10 *  1. Redistributions of source code must retain the above copyright
11 *     notice, this list of conditions and the following disclaimer.
12 *  2. Redistributions in binary form must reproduce the above copyright
13 *     notice, this list of conditions and the following disclaimer in the
14 *     documentation and/or other materials provided with the distribution.
15 *
16 *  THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 *  ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
20 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 *  SUCH DAMAGE.
27 *
28 */
29/*
30 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters.
31 */
32#ifndef	_ISPMBOX_H
33#define	_ISPMBOX_H
34
35/*
36 * Mailbox Command Opcodes
37 */
38#define MBOX_NO_OP			0x0000
39#define MBOX_LOAD_RAM			0x0001
40#define MBOX_EXEC_FIRMWARE		0x0002
41#define MBOX_DUMP_RAM			0x0003
42#define MBOX_WRITE_RAM_WORD		0x0004
43#define MBOX_READ_RAM_WORD		0x0005
44#define MBOX_MAILBOX_REG_TEST		0x0006
45#define MBOX_VERIFY_CHECKSUM		0x0007
46#define MBOX_ABOUT_FIRMWARE		0x0008
47#define	MBOX_LOAD_RISC_RAM_2100		0x0009
48					/*   a */
49#define	MBOX_LOAD_RISC_RAM		0x000b
50					/*   c */
51#define MBOX_WRITE_RAM_WORD_EXTENDED	0x000d
52#define MBOX_CHECK_FIRMWARE		0x000e
53#define	MBOX_READ_RAM_WORD_EXTENDED	0x000f
54#define MBOX_INIT_REQ_QUEUE		0x0010
55#define MBOX_INIT_RES_QUEUE		0x0011
56#define MBOX_EXECUTE_IOCB		0x0012
57#define MBOX_WAKE_UP			0x0013
58#define MBOX_STOP_FIRMWARE		0x0014
59#define MBOX_ABORT			0x0015
60#define MBOX_ABORT_DEVICE		0x0016
61#define MBOX_ABORT_TARGET		0x0017
62#define MBOX_BUS_RESET			0x0018
63#define MBOX_STOP_QUEUE			0x0019
64#define MBOX_START_QUEUE		0x001a
65#define MBOX_SINGLE_STEP_QUEUE		0x001b
66#define MBOX_ABORT_QUEUE		0x001c
67#define MBOX_GET_DEV_QUEUE_STATUS	0x001d
68					/*  1e */
69#define MBOX_GET_FIRMWARE_STATUS	0x001f
70#define MBOX_GET_INIT_SCSI_ID		0x0020
71#define MBOX_GET_SELECT_TIMEOUT		0x0021
72#define MBOX_GET_RETRY_COUNT		0x0022
73#define MBOX_GET_TAG_AGE_LIMIT		0x0023
74#define MBOX_GET_CLOCK_RATE		0x0024
75#define MBOX_GET_ACT_NEG_STATE		0x0025
76#define MBOX_GET_ASYNC_DATA_SETUP_TIME	0x0026
77#define MBOX_GET_SBUS_PARAMS		0x0027
78#define		MBOX_GET_PCI_PARAMS	MBOX_GET_SBUS_PARAMS
79#define MBOX_GET_TARGET_PARAMS		0x0028
80#define MBOX_GET_DEV_QUEUE_PARAMS	0x0029
81#define	MBOX_GET_RESET_DELAY_PARAMS	0x002a
82					/*  2b */
83					/*  2c */
84					/*  2d */
85					/*  2e */
86					/*  2f */
87#define MBOX_SET_INIT_SCSI_ID		0x0030
88#define MBOX_SET_SELECT_TIMEOUT		0x0031
89#define MBOX_SET_RETRY_COUNT		0x0032
90#define MBOX_SET_TAG_AGE_LIMIT		0x0033
91#define MBOX_SET_CLOCK_RATE		0x0034
92#define MBOX_SET_ACT_NEG_STATE		0x0035
93#define MBOX_SET_ASYNC_DATA_SETUP_TIME	0x0036
94#define MBOX_SET_SBUS_CONTROL_PARAMS	0x0037
95#define		MBOX_SET_PCI_PARAMETERS	0x0037
96#define MBOX_SET_TARGET_PARAMS		0x0038
97#define MBOX_SET_DEV_QUEUE_PARAMS	0x0039
98#define	MBOX_SET_RESET_DELAY_PARAMS	0x003a
99					/*  3b */
100					/*  3c */
101					/*  3d */
102					/*  3e */
103					/*  3f */
104#define	MBOX_RETURN_BIOS_BLOCK_ADDR	0x0040
105#define	MBOX_WRITE_FOUR_RAM_WORDS	0x0041
106#define	MBOX_EXEC_BIOS_IOCB		0x0042
107#define	MBOX_SET_FW_FEATURES		0x004a
108#define	MBOX_GET_FW_FEATURES		0x004b
109#define		FW_FEATURE_FAST_POST	0x1
110#define		FW_FEATURE_LVD_NOTIFY	0x2
111#define		FW_FEATURE_RIO_32BIT	0x4
112#define		FW_FEATURE_RIO_16BIT	0x8
113
114#define	MBOX_INIT_REQ_QUEUE_A64		0x0052
115#define	MBOX_INIT_RES_QUEUE_A64		0x0053
116
117#define	MBOX_ENABLE_TARGET_MODE		0x0055
118#define		ENABLE_TARGET_FLAG	0x8000
119#define		ENABLE_TQING_FLAG	0x0004
120#define		ENABLE_MANDATORY_DISC	0x0002
121#define	MBOX_GET_TARGET_STATUS		0x0056
122
123/* These are for the ISP2X00 FC cards */
124#define	MBOX_GET_LOOP_ID		0x0020
125/* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */
126#define		ISP24XX_INORDER		0x0100
127#define		ISP24XX_NPIV_SAN	0x0400
128#define		ISP24XX_VSAN_SAN	0x1000
129#define		ISP24XX_FC_SP_SAN	0x2000
130
131#define	MBOX_GET_FIRMWARE_OPTIONS	0x0028
132#define	MBOX_SET_FIRMWARE_OPTIONS	0x0038
133#define	MBOX_GET_RESOURCE_COUNT		0x0042
134#define	MBOX_REQUEST_OFFLINE_MODE	0x0043
135#define	MBOX_ENHANCED_GET_PDB		0x0047
136#define	MBOX_INIT_FIRMWARE_MULTI_ID	0x0048	/* 2400 only */
137#define	MBOX_GET_VP_DATABASE		0x0049	/* 2400 only */
138#define	MBOX_GET_VP_DATABASE_ENTRY	0x004a	/* 2400 only */
139#define	MBOX_EXEC_COMMAND_IOCB_A64	0x0054
140#define	MBOX_INIT_FIRMWARE		0x0060
141#define	MBOX_GET_INIT_CONTROL_BLOCK	0x0061
142#define	MBOX_INIT_LIP			0x0062
143#define	MBOX_GET_FC_AL_POSITION_MAP	0x0063
144#define	MBOX_GET_PORT_DB		0x0064
145#define	MBOX_CLEAR_ACA			0x0065
146#define	MBOX_TARGET_RESET		0x0066
147#define	MBOX_CLEAR_TASK_SET		0x0067
148#define	MBOX_ABORT_TASK_SET		0x0068
149#define	MBOX_GET_FW_STATE		0x0069
150#define	MBOX_GET_PORT_NAME		0x006A
151#define	MBOX_GET_LINK_STATUS		0x006B
152#define	MBOX_INIT_LIP_RESET		0x006C
153#define	MBOX_SEND_SNS			0x006E
154#define	MBOX_FABRIC_LOGIN		0x006F
155#define	MBOX_SEND_CHANGE_REQUEST	0x0070
156#define	MBOX_FABRIC_LOGOUT		0x0071
157#define	MBOX_INIT_LIP_LOGIN		0x0072
158#define	MBOX_LUN_RESET			0x007E
159
160#define	MBOX_DRIVER_HEARTBEAT		0x005B
161#define	MBOX_FW_HEARTBEAT		0x005C
162
163#define	MBOX_GET_SET_DATA_RATE		0x005D	/* 24XX/23XX only */
164#define		MBGSD_GET_RATE		0
165#define		MBGSD_SET_RATE		1
166#define		MBGSD_SET_RATE_NOW	2	/* 24XX only */
167#define		MBGSD_ONEGB	0
168#define		MBGSD_TWOGB	1
169#define		MBGSD_AUTO	2
170#define		MBGSD_FOURGB	3		/* 24XX only */
171#define		MBGSD_EIGHTGB	4		/* 25XX only */
172
173
174#define	ISP2100_SET_PCI_PARAM		0x00ff
175
176#define	MBOX_BUSY			0x04
177
178/*
179 * Mailbox Command Complete Status Codes
180 */
181#define	MBOX_COMMAND_COMPLETE		0x4000
182#define	MBOX_INVALID_COMMAND		0x4001
183#define	MBOX_HOST_INTERFACE_ERROR	0x4002
184#define	MBOX_TEST_FAILED		0x4003
185#define	MBOX_COMMAND_ERROR		0x4005
186#define	MBOX_COMMAND_PARAM_ERROR	0x4006
187#define	MBOX_PORT_ID_USED		0x4007
188#define	MBOX_LOOP_ID_USED		0x4008
189#define	MBOX_ALL_IDS_USED		0x4009
190#define	MBOX_NOT_LOGGED_IN		0x400A
191/* pseudo mailbox completion codes */
192#define	MBOX_REGS_BUSY			0x6000	/* registers in use */
193#define	MBOX_TIMEOUT			0x6001	/* command timed out */
194
195#define	MBLOGALL			0x000f
196#define	MBLOGNONE			0x0000
197#define	MBLOGMASK(x)			((x) & 0xf)
198
199/*
200 * Asynchronous event status codes
201 */
202#define	ASYNC_BUS_RESET			0x8001
203#define	ASYNC_SYSTEM_ERROR		0x8002
204#define	ASYNC_RQS_XFER_ERR		0x8003
205#define	ASYNC_RSP_XFER_ERR		0x8004
206#define	ASYNC_QWAKEUP			0x8005
207#define	ASYNC_TIMEOUT_RESET		0x8006
208#define	ASYNC_DEVICE_RESET		0x8007
209#define	ASYNC_EXTMSG_UNDERRUN		0x800A
210#define	ASYNC_SCAM_INT			0x800B
211#define	ASYNC_HUNG_SCSI			0x800C
212#define	ASYNC_KILLED_BUS		0x800D
213#define	ASYNC_BUS_TRANSIT		0x800E	/* LVD -> HVD, eg. */
214#define	ASYNC_LIP_OCCURRED		0x8010
215#define	ASYNC_LOOP_UP			0x8011
216#define	ASYNC_LOOP_DOWN			0x8012
217#define	ASYNC_LOOP_RESET		0x8013
218#define	ASYNC_PDB_CHANGED		0x8014
219#define	ASYNC_CHANGE_NOTIFY		0x8015
220#define	ASYNC_LIP_F8			0x8016
221#define	ASYNC_LIP_ERROR			0x8017
222#define	ASYNC_SECURITY_UPDATE		0x801B
223#define	ASYNC_CMD_CMPLT			0x8020
224#define	ASYNC_CTIO_DONE			0x8021
225#define	ASYNC_IP_XMIT_DONE		0x8022
226#define	ASYNC_IP_RECV_DONE		0x8023
227#define	ASYNC_IP_BROADCAST		0x8024
228#define	ASYNC_IP_RCVQ_LOW		0x8025
229#define	ASYNC_IP_RCVQ_EMPTY		0x8026
230#define	ASYNC_IP_RECV_DONE_ALIGNED	0x8027
231#define	ASYNC_PTPMODE			0x8030
232#define	ASYNC_RIO1			0x8031
233#define	ASYNC_RIO2			0x8032
234#define	ASYNC_RIO3			0x8033
235#define	ASYNC_RIO4			0x8034
236#define	ASYNC_RIO5			0x8035
237#define	ASYNC_CONNMODE			0x8036
238#define		ISP_CONN_LOOP		1
239#define		ISP_CONN_PTP		2
240#define		ISP_CONN_BADLIP		3
241#define		ISP_CONN_FATAL		4
242#define		ISP_CONN_LOOPBACK	5
243#define	ASYNC_RIO_RESP			0x8040
244#define	ASYNC_RIO_COMP			0x8042
245#define	ASYNC_RCV_ERR			0x8048
246
247/*
248 * Firmware Options. There are a lot of them.
249 *
250 * IFCOPTN - ISP Fibre Channel Option Word N
251 */
252#define	IFCOPT1_EQFQASYNC	(1 << 13)	/* enable QFULL notification */
253#define	IFCOPT1_EAABSRCVD	(1 << 12)
254#define	IFCOPT1_RJTASYNC	(1 << 11)	/* enable 8018 notification */
255#define	IFCOPT1_ENAPURE		(1 << 10)
256#define	IFCOPT1_ENA8017		(1 << 7)
257#define	IFCOPT1_DISGPIO67	(1 << 6)
258#define	IFCOPT1_LIPLOSSIMM	(1 << 5)
259#define	IFCOPT1_DISF7SWTCH	(1 << 4)
260#define	IFCOPT1_CTIO_RETRY	(1 << 3)
261#define	IFCOPT1_LIPASYNC	(1 << 1)
262#define	IFCOPT1_LIPF8		(1 << 0)
263
264#define	IFCOPT2_LOOPBACK	(1 << 1)
265#define	IFCOPT2_ATIO3_ONLY	(1 << 0)
266
267#define	IFCOPT3_NOPRLI		(1 << 4)	/* disable automatic sending of PRLI on local loops */
268#define	IFCOPT3_RNDASYNC	(1 << 1)
269/*
270 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options
271 * mailbox command to enable this.
272 */
273#define	ASYNC_QFULL_SENT		0x8049
274
275/*
276 * Needs to be enabled
277 */
278#define	ASYNC_AUTO_PLOGI_RJT		0x8018
279/*
280 * 24XX only
281 */
282#define	ASYNC_RJT_SENT			0x8049
283
284/*
285 * All IOCB Queue entries are this size
286 */
287#define	QENTRY_LEN			64
288
289/*
290 * Special Internal Handle for IOCBs
291 */
292#define	ISP_SPCL_HANDLE			0xa5dead5a
293
294/*
295 * Command Structure Definitions
296 */
297
298typedef struct {
299	uint32_t	ds_base;
300	uint32_t	ds_count;
301} ispds_t;
302
303typedef struct {
304	uint32_t	ds_base;
305	uint32_t	ds_basehi;
306	uint32_t	ds_count;
307} ispds64_t;
308
309#define	DSTYPE_32BIT	0
310#define	DSTYPE_64BIT	1
311typedef struct {
312	uint16_t	ds_type;	/* 0-> ispds_t, 1-> ispds64_t */
313	uint32_t	ds_segment;	/* unused */
314	uint32_t	ds_base;	/* 32 bit address of DSD list */
315} ispdslist_t;
316
317
318typedef struct {
319	uint8_t		rqs_entry_type;
320	uint8_t		rqs_entry_count;
321	uint8_t		rqs_seqno;
322	uint8_t		rqs_flags;
323} isphdr_t;
324
325/* RQS Flag definitions */
326#define	RQSFLAG_CONTINUATION	0x01
327#define	RQSFLAG_FULL		0x02
328#define	RQSFLAG_BADHEADER	0x04
329#define	RQSFLAG_BADPACKET	0x08
330#define	RQSFLAG_BADCOUNT	0x10
331#define	RQSFLAG_BADORDER	0x20
332#define	RQSFLAG_MASK		0x3f
333
334/* RQS entry_type definitions */
335#define	RQSTYPE_REQUEST		0x01
336#define	RQSTYPE_DATASEG		0x02
337#define	RQSTYPE_RESPONSE	0x03
338#define	RQSTYPE_MARKER		0x04
339#define	RQSTYPE_CMDONLY		0x05
340#define	RQSTYPE_ATIO		0x06	/* Target Mode */
341#define	RQSTYPE_CTIO		0x07	/* Target Mode */
342#define	RQSTYPE_SCAM		0x08
343#define	RQSTYPE_A64		0x09
344#define	RQSTYPE_A64_CONT	0x0a
345#define	RQSTYPE_ENABLE_LUN	0x0b	/* Target Mode */
346#define	RQSTYPE_MODIFY_LUN	0x0c	/* Target Mode */
347#define	RQSTYPE_NOTIFY		0x0d	/* Target Mode */
348#define	RQSTYPE_NOTIFY_ACK	0x0e	/* Target Mode */
349#define	RQSTYPE_CTIO1		0x0f	/* Target Mode */
350#define	RQSTYPE_STATUS_CONT	0x10
351#define	RQSTYPE_T2RQS		0x11
352#define	RQSTYPE_CTIO7		0x12
353#define	RQSTYPE_IP_XMIT		0x13
354#define	RQSTYPE_TSK_MGMT	0x14
355#define	RQSTYPE_T4RQS		0x15
356#define	RQSTYPE_ATIO2		0x16	/* Target Mode */
357#define	RQSTYPE_CTIO2		0x17	/* Target Mode */
358#define	RQSTYPE_T7RQS		0x18
359#define	RQSTYPE_T3RQS		0x19
360#define	RQSTYPE_IP_XMIT_64	0x1b
361#define	RQSTYPE_CTIO4		0x1e	/* Target Mode */
362#define	RQSTYPE_CTIO3		0x1f	/* Target Mode */
363#define	RQSTYPE_RIO1		0x21
364#define	RQSTYPE_RIO2		0x22
365#define	RQSTYPE_IP_RECV		0x23
366#define	RQSTYPE_IP_RECV_CONT	0x24
367#define	RQSTYPE_CT_PASSTHRU	0x29
368#define	RQSTYPE_MS_PASSTHRU	0x29
369#define	RQSTYPE_VP_CTRL		0x30	/* 24XX only */
370#define	RQSTYPE_VP_MODIFY	0x31	/* 24XX only */
371#define	RQSTYPE_RPT_ID_ACQ	0x32	/* 24XX only */
372#define	RQSTYPE_ABORT_IO	0x33
373#define	RQSTYPE_T6RQS		0x48
374#define	RQSTYPE_LOGIN		0x52
375#define	RQSTYPE_ABTS_RCVD	0x54	/* 24XX only */
376#define	RQSTYPE_ABTS_RSP	0x55	/* 24XX only */
377
378
379#define	ISP_RQDSEG	4
380typedef struct {
381	isphdr_t	req_header;
382	uint32_t	req_handle;
383	uint8_t		req_lun_trn;
384	uint8_t		req_target;
385	uint16_t	req_cdblen;
386	uint16_t	req_flags;
387	uint16_t	req_reserved;
388	uint16_t	req_time;
389	uint16_t	req_seg_count;
390	uint8_t		req_cdb[12];
391	ispds_t		req_dataseg[ISP_RQDSEG];
392} ispreq_t;
393#define	ISP_RQDSEG_A64	2
394
395typedef struct {
396	isphdr_t	mrk_header;
397	uint32_t	mrk_handle;
398	uint8_t		mrk_reserved0;
399	uint8_t		mrk_target;
400	uint16_t	mrk_modifier;
401	uint16_t	mrk_flags;
402	uint16_t	mrk_lun;
403	uint8_t		mrk_reserved1[48];
404} isp_marker_t;
405
406typedef struct {
407	isphdr_t	mrk_header;
408	uint32_t	mrk_handle;
409	uint16_t	mrk_nphdl;
410	uint8_t		mrk_modifier;
411	uint8_t		mrk_reserved0;
412	uint8_t		mrk_reserved1;
413	uint8_t		mrk_vphdl;
414	uint16_t	mrk_reserved2;
415	uint8_t		mrk_lun[8];
416	uint8_t		mrk_reserved3[40];
417} isp_marker_24xx_t;
418
419
420#define SYNC_DEVICE	0
421#define SYNC_TARGET	1
422#define SYNC_ALL	2
423#define SYNC_LIP	3
424
425#define	ISP_RQDSEG_T2		3
426typedef struct {
427	isphdr_t	req_header;
428	uint32_t	req_handle;
429	uint8_t		req_lun_trn;
430	uint8_t		req_target;
431	uint16_t	req_scclun;
432	uint16_t	req_flags;
433	uint16_t	req_reserved;
434	uint16_t	req_time;
435	uint16_t	req_seg_count;
436	uint8_t		req_cdb[16];
437	uint32_t	req_totalcnt;
438	ispds_t		req_dataseg[ISP_RQDSEG_T2];
439} ispreqt2_t;
440
441typedef struct {
442	isphdr_t	req_header;
443	uint32_t	req_handle;
444	uint16_t	req_target;
445	uint16_t	req_scclun;
446	uint16_t	req_flags;
447	uint16_t	req_reserved;
448	uint16_t	req_time;
449	uint16_t	req_seg_count;
450	uint8_t		req_cdb[16];
451	uint32_t	req_totalcnt;
452	ispds_t		req_dataseg[ISP_RQDSEG_T2];
453} ispreqt2e_t;
454
455#define	ISP_RQDSEG_T3		2
456typedef struct {
457	isphdr_t	req_header;
458	uint32_t	req_handle;
459	uint8_t		req_lun_trn;
460	uint8_t		req_target;
461	uint16_t	req_scclun;
462	uint16_t	req_flags;
463	uint16_t	req_reserved;
464	uint16_t	req_time;
465	uint16_t	req_seg_count;
466	uint8_t		req_cdb[16];
467	uint32_t	req_totalcnt;
468	ispds64_t	req_dataseg[ISP_RQDSEG_T3];
469} ispreqt3_t;
470#define	ispreq64_t	ispreqt3_t	/* same as.... */
471
472typedef struct {
473	isphdr_t	req_header;
474	uint32_t	req_handle;
475	uint16_t	req_target;
476	uint16_t	req_scclun;
477	uint16_t	req_flags;
478	uint16_t	req_reserved;
479	uint16_t	req_time;
480	uint16_t	req_seg_count;
481	uint8_t		req_cdb[16];
482	uint32_t	req_totalcnt;
483	ispds64_t	req_dataseg[ISP_RQDSEG_T3];
484} ispreqt3e_t;
485
486/* req_flag values */
487#define	REQFLAG_NODISCON	0x0001
488#define	REQFLAG_HTAG		0x0002
489#define	REQFLAG_OTAG		0x0004
490#define	REQFLAG_STAG		0x0008
491#define	REQFLAG_TARGET_RTN	0x0010
492
493#define	REQFLAG_NODATA		0x0000
494#define	REQFLAG_DATA_IN		0x0020
495#define	REQFLAG_DATA_OUT	0x0040
496#define	REQFLAG_DATA_UNKNOWN	0x0060
497
498#define	REQFLAG_DISARQ		0x0100
499#define	REQFLAG_FRC_ASYNC	0x0200
500#define	REQFLAG_FRC_SYNC	0x0400
501#define	REQFLAG_FRC_WIDE	0x0800
502#define	REQFLAG_NOPARITY	0x1000
503#define	REQFLAG_STOPQ		0x2000
504#define	REQFLAG_XTRASNS		0x4000
505#define	REQFLAG_PRIORITY	0x8000
506
507typedef struct {
508	isphdr_t	req_header;
509	uint32_t	req_handle;
510	uint8_t		req_lun_trn;
511	uint8_t		req_target;
512	uint16_t	req_cdblen;
513	uint16_t	req_flags;
514	uint16_t	req_reserved;
515	uint16_t	req_time;
516	uint16_t	req_seg_count;
517	uint8_t		req_cdb[44];
518} ispextreq_t;
519
520/* 24XX only */
521typedef struct {
522	uint16_t	fcd_length;
523	uint16_t	fcd_a1500;
524	uint16_t	fcd_a3116;
525	uint16_t	fcd_a4732;
526	uint16_t	fcd_a6348;
527} fcp_cmnd_ds_t;
528
529typedef struct {
530	isphdr_t	req_header;
531	uint32_t	req_handle;
532	uint16_t	req_nphdl;
533	uint16_t	req_time;
534	uint16_t	req_seg_count;
535	uint16_t	req_fc_rsp_dsd_length;
536	uint8_t		req_lun[8];
537	uint16_t	req_flags;
538	uint16_t	req_fc_cmnd_dsd_length;
539	uint16_t	req_fc_cmnd_dsd_a1500;
540	uint16_t	req_fc_cmnd_dsd_a3116;
541	uint16_t	req_fc_cmnd_dsd_a4732;
542	uint16_t	req_fc_cmnd_dsd_a6348;
543	uint16_t	req_fc_rsp_dsd_a1500;
544	uint16_t	req_fc_rsp_dsd_a3116;
545	uint16_t	req_fc_rsp_dsd_a4732;
546	uint16_t	req_fc_rsp_dsd_a6348;
547	uint32_t	req_totalcnt;
548	uint16_t	req_tidlo;
549	uint8_t		req_tidhi;
550	uint8_t		req_vpidx;
551	ispds64_t	req_dataseg;
552} ispreqt6_t;
553
554typedef struct {
555	isphdr_t	req_header;
556	uint32_t	req_handle;
557	uint16_t	req_nphdl;
558	uint16_t	req_time;
559	uint16_t	req_seg_count;
560	uint16_t	req_reserved;
561	uint8_t		req_lun[8];
562	uint8_t		req_alen_datadir;
563	uint8_t		req_task_management;
564	uint8_t		req_task_attribute;
565	uint8_t		req_crn;
566	uint8_t		req_cdb[16];
567	uint32_t	req_dl;
568	uint16_t	req_tidlo;
569	uint8_t		req_tidhi;
570	uint8_t		req_vpidx;
571	ispds64_t	req_dataseg;
572} ispreqt7_t;
573
574/* Task Management Request Function */
575typedef struct {
576	isphdr_t	tmf_header;
577	uint32_t	tmf_handle;
578	uint16_t	tmf_nphdl;
579	uint8_t		tmf_reserved0[2];
580	uint16_t	tmf_delay;
581	uint16_t	tmf_timeout;
582	uint8_t		tmf_lun[8];
583	uint32_t	tmf_flags;
584	uint8_t		tmf_reserved1[20];
585	uint16_t	tmf_tidlo;
586	uint8_t		tmf_tidhi;
587	uint8_t		tmf_vpidx;
588	uint8_t		tmf_reserved2[12];
589} isp24xx_tmf_t;
590
591#define	ISP24XX_TMF_NOSEND		0x80000000
592
593#define	ISP24XX_TMF_LUN_RESET		0x00000010
594#define	ISP24XX_TMF_ABORT_TASK_SET	0x00000008
595#define	ISP24XX_TMF_CLEAR_TASK_SET	0x00000004
596#define	ISP24XX_TMF_TARGET_RESET	0x00000002
597#define	ISP24XX_TMF_CLEAR_ACA		0x00000001
598
599/* I/O Abort Structure */
600typedef struct {
601	isphdr_t	abrt_header;
602	uint32_t	abrt_handle;
603	uint16_t	abrt_nphdl;
604	uint16_t	abrt_options;
605	uint32_t	abrt_cmd_handle;
606	uint8_t		abrt_reserved[32];
607	uint16_t	abrt_tidlo;
608	uint8_t		abrt_tidhi;
609	uint8_t		abrt_vpidx;
610	uint8_t		abrt_reserved1[12];
611} isp24xx_abrt_t;
612
613#define	ISP24XX_ABRT_NOSEND	0x01	/* don't actually send ABTS */
614#define	ISP24XX_ABRT_OKAY	0x00	/* in nphdl on return */
615#define	ISP24XX_ABRT_ENXIO	0x31	/* in nphdl on return */
616
617#define	ISP_CDSEG	7
618typedef struct {
619	isphdr_t	req_header;
620	uint32_t	req_reserved;
621	ispds_t		req_dataseg[ISP_CDSEG];
622} ispcontreq_t;
623
624#define	ISP_CDSEG64	5
625typedef struct {
626	isphdr_t	req_header;
627	ispds64_t	req_dataseg[ISP_CDSEG64];
628} ispcontreq64_t;
629
630typedef struct {
631	isphdr_t	req_header;
632	uint32_t	req_handle;
633	uint16_t	req_scsi_status;
634	uint16_t	req_completion_status;
635	uint16_t	req_state_flags;
636	uint16_t	req_status_flags;
637	uint16_t	req_time;
638#define	req_response_len	req_time	/* FC only */
639	uint16_t	req_sense_len;
640	uint32_t	req_resid;
641	uint8_t		req_response[8];	/* FC only */
642	uint8_t		req_sense_data[32];
643} ispstatusreq_t;
644
645/*
646 * Status Continuation
647 */
648typedef struct {
649	isphdr_t	req_header;
650	uint8_t		req_sense_data[60];
651} ispstatus_cont_t;
652
653/*
654 * 24XX Type 0 status
655 */
656typedef struct {
657	isphdr_t	req_header;
658	uint32_t	req_handle;
659	uint16_t	req_completion_status;
660	uint16_t	req_oxid;
661	uint32_t	req_resid;
662	uint16_t	req_reserved0;
663	uint16_t	req_state_flags;
664	uint16_t	req_reserved1;
665	uint16_t	req_scsi_status;
666	uint32_t	req_fcp_residual;
667	uint32_t	req_sense_len;
668	uint32_t	req_response_len;
669	uint8_t		req_rsp_sense[28];
670} isp24xx_statusreq_t;
671
672/*
673 * For Qlogic 2X00, the high order byte of SCSI status has
674 * additional meaning.
675 */
676#define	RQCS_RU	0x800	/* Residual Under */
677#define	RQCS_RO	0x400	/* Residual Over */
678#define	RQCS_RESID	(RQCS_RU|RQCS_RO)
679#define	RQCS_SV	0x200	/* Sense Length Valid */
680#define	RQCS_RV	0x100	/* FCP Response Length Valid */
681
682/*
683 * CT Passthru IOCB
684 */
685typedef struct {
686	isphdr_t	ctp_header;
687	uint32_t	ctp_handle;
688	uint16_t	ctp_status;
689	uint16_t	ctp_nphdl;	/* n-port handle */
690	uint16_t	ctp_cmd_cnt;	/* Command DSD count */
691	uint8_t		ctp_vpidx;
692	uint8_t		ctp_reserved0;
693	uint16_t	ctp_time;
694	uint16_t	ctp_reserved1;
695	uint16_t	ctp_rsp_cnt;	/* Response DSD count */
696	uint16_t	ctp_reserved2[5];
697	uint32_t	ctp_rsp_bcnt;	/* Response byte count */
698	uint32_t	ctp_cmd_bcnt;	/* Command byte count */
699	ispds64_t	ctp_dataseg[2];
700} isp_ct_pt_t;
701
702/*
703 * MS Passthru IOCB
704 */
705typedef struct {
706	isphdr_t	ms_header;
707	uint32_t	ms_handle;
708	uint16_t	ms_nphdl;	/* handle in high byte for !2k f/w */
709	uint16_t	ms_status;
710	uint16_t	ms_flags;
711	uint16_t	ms_reserved1;	/* low 8 bits */
712	uint16_t	ms_time;
713	uint16_t	ms_cmd_cnt;	/* Command DSD count */
714	uint16_t	ms_tot_cnt;	/* Total DSD Count */
715	uint8_t		ms_type;	/* MS type */
716	uint8_t		ms_r_ctl;	/* R_CTL */
717	uint16_t	ms_rxid;	/* RX_ID */
718	uint16_t	ms_reserved2;
719	uint32_t	ms_handle2;
720	uint32_t	ms_rsp_bcnt;	/* Response byte count */
721	uint32_t	ms_cmd_bcnt;	/* Command byte count */
722	ispds64_t	ms_dataseg[2];
723} isp_ms_t;
724
725/*
726 * Completion Status Codes.
727 */
728#define RQCS_COMPLETE			0x0000
729#define RQCS_DMA_ERROR			0x0002
730#define RQCS_RESET_OCCURRED		0x0004
731#define RQCS_ABORTED			0x0005
732#define RQCS_TIMEOUT			0x0006
733#define RQCS_DATA_OVERRUN		0x0007
734#define RQCS_DATA_UNDERRUN		0x0015
735#define	RQCS_QUEUE_FULL			0x001C
736
737/* 1X00 Only Completion Codes */
738#define RQCS_INCOMPLETE			0x0001
739#define RQCS_TRANSPORT_ERROR		0x0003
740#define RQCS_COMMAND_OVERRUN		0x0008
741#define RQCS_STATUS_OVERRUN		0x0009
742#define RQCS_BAD_MESSAGE		0x000a
743#define RQCS_NO_MESSAGE_OUT		0x000b
744#define RQCS_EXT_ID_FAILED		0x000c
745#define RQCS_IDE_MSG_FAILED		0x000d
746#define RQCS_ABORT_MSG_FAILED		0x000e
747#define RQCS_REJECT_MSG_FAILED		0x000f
748#define RQCS_NOP_MSG_FAILED		0x0010
749#define RQCS_PARITY_ERROR_MSG_FAILED	0x0011
750#define RQCS_DEVICE_RESET_MSG_FAILED	0x0012
751#define RQCS_ID_MSG_FAILED		0x0013
752#define RQCS_UNEXP_BUS_FREE		0x0014
753#define	RQCS_XACT_ERR1			0x0018
754#define	RQCS_XACT_ERR2			0x0019
755#define	RQCS_XACT_ERR3			0x001A
756#define	RQCS_BAD_ENTRY			0x001B
757#define	RQCS_PHASE_SKIPPED		0x001D
758#define	RQCS_ARQS_FAILED		0x001E
759#define	RQCS_WIDE_FAILED		0x001F
760#define	RQCS_SYNCXFER_FAILED		0x0020
761#define	RQCS_LVD_BUSERR			0x0021
762
763/* 2X00 Only Completion Codes */
764#define	RQCS_PORT_UNAVAILABLE		0x0028
765#define	RQCS_PORT_LOGGED_OUT		0x0029
766#define	RQCS_PORT_CHANGED		0x002A
767#define	RQCS_PORT_BUSY			0x002B
768
769/* 24XX Only Completion Codes */
770#define	RQCS_24XX_DRE			0x0011	/* data reassembly error */
771#define	RQCS_24XX_TABORT		0x0013	/* aborted by target */
772#define	RQCS_24XX_ENOMEM		0x002C	/* f/w resource unavailable */
773#define	RQCS_24XX_TMO			0x0030	/* task management overrun */
774
775
776/*
777 * 1X00 specific State Flags
778 */
779#define RQSF_GOT_BUS			0x0100
780#define RQSF_GOT_TARGET			0x0200
781#define RQSF_SENT_CDB			0x0400
782#define RQSF_XFRD_DATA			0x0800
783#define RQSF_GOT_STATUS			0x1000
784#define RQSF_GOT_SENSE			0x2000
785#define	RQSF_XFER_COMPLETE		0x4000
786
787/*
788 * 2X00 specific State Flags
789 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available)
790 */
791#define	RQSF_DATA_IN			0x0020
792#define	RQSF_DATA_OUT			0x0040
793#define	RQSF_STAG			0x0008
794#define	RQSF_OTAG			0x0004
795#define	RQSF_HTAG			0x0002
796/*
797 * 1X00 Status Flags
798 */
799#define RQSTF_DISCONNECT		0x0001
800#define RQSTF_SYNCHRONOUS		0x0002
801#define RQSTF_PARITY_ERROR		0x0004
802#define RQSTF_BUS_RESET			0x0008
803#define RQSTF_DEVICE_RESET		0x0010
804#define RQSTF_ABORTED			0x0020
805#define RQSTF_TIMEOUT			0x0040
806#define RQSTF_NEGOTIATION		0x0080
807
808/*
809 * 2X00 specific state flags
810 */
811/* RQSF_SENT_CDB	*/
812/* RQSF_XFRD_DATA	*/
813/* RQSF_GOT_STATUS	*/
814/* RQSF_XFER_COMPLETE	*/
815
816/*
817 * 2X00 specific status flags
818 */
819/* RQSTF_ABORTED */
820/* RQSTF_TIMEOUT */
821#define	RQSTF_DMA_ERROR			0x0080
822#define	RQSTF_LOGOUT			0x2000
823
824/*
825 * Miscellaneous
826 */
827#ifndef	ISP_EXEC_THROTTLE
828#define	ISP_EXEC_THROTTLE	16
829#endif
830
831/*
832 * About Firmware returns an 'attribute' word in mailbox 6.
833 * These attributes are for 2200 and 2300.
834 */
835#define	ISP_FW_ATTR_TMODE	0x0001
836#define	ISP_FW_ATTR_SCCLUN	0x0002
837#define	ISP_FW_ATTR_FABRIC	0x0004
838#define	ISP_FW_ATTR_CLASS2	0x0008
839#define	ISP_FW_ATTR_FCTAPE	0x0010
840#define	ISP_FW_ATTR_IP		0x0020
841#define	ISP_FW_ATTR_VI		0x0040
842#define	ISP_FW_ATTR_VI_SOLARIS	0x0080
843#define	ISP_FW_ATTR_2KLOGINS	0x0100	/* just a guess... */
844
845/* and these are for the 2400 */
846#define	ISP2400_FW_ATTR_CLASS2	0x0001
847#define	ISP2400_FW_ATTR_IP	0x0002
848#define	ISP2400_FW_ATTR_MULTIID	0x0004
849#define	ISP2400_FW_ATTR_SB2	0x0008
850#define	ISP2400_FW_ATTR_T10CRC	0x0010
851#define	ISP2400_FW_ATTR_VI	0x0020
852#define	ISP2400_FW_ATTR_EXPFW	0x2000
853
854#define	ISP_CAP_TMODE(isp)	\
855	(IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE))
856#define	ISP_CAP_SCCFW(isp)	\
857	(IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN))
858#define	ISP_CAP_2KLOGIN(isp)	\
859	(IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS))
860#define	ISP_CAP_MULTI_ID(isp)	\
861	(IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0)
862
863#define	ISP_GET_VPIDX(isp, tag) \
864	(ISP_CAP_MULTI_ID(isp) ? tag : 0)
865
866/*
867 * Reduced Interrupt Operation Response Queue Entreis
868 */
869
870typedef struct {
871	isphdr_t	req_header;
872	uint32_t	req_handles[15];
873} isp_rio1_t;
874
875typedef struct {
876	isphdr_t	req_header;
877	uint16_t	req_handles[30];
878} isp_rio2_t;
879
880/*
881 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures
882 */
883
884/*
885 * Initialization Control Block
886 *
887 * Version One (prime) format.
888 */
889typedef struct {
890	uint8_t		icb_version;
891	uint8_t		icb_reserved0;
892	uint16_t	icb_fwoptions;
893	uint16_t	icb_maxfrmlen;
894	uint16_t	icb_maxalloc;
895	uint16_t	icb_execthrottle;
896	uint8_t		icb_retry_count;
897	uint8_t		icb_retry_delay;
898	uint8_t		icb_portname[8];
899	uint16_t	icb_hardaddr;
900	uint8_t		icb_iqdevtype;
901	uint8_t		icb_logintime;
902	uint8_t		icb_nodename[8];
903	uint16_t	icb_rqstout;
904	uint16_t	icb_rspnsin;
905	uint16_t	icb_rqstqlen;
906	uint16_t	icb_rsltqlen;
907	uint16_t	icb_rqstaddr[4];
908	uint16_t	icb_respaddr[4];
909	uint16_t	icb_lunenables;
910	uint8_t		icb_ccnt;
911	uint8_t		icb_icnt;
912	uint16_t	icb_lunetimeout;
913	uint16_t	icb_reserved1;
914	uint16_t	icb_xfwoptions;
915	uint8_t		icb_racctimer;
916	uint8_t		icb_idelaytimer;
917	uint16_t	icb_zfwoptions;
918	uint16_t	icb_reserved2[13];
919} isp_icb_t;
920
921#define	ICB_VERSION1	1
922
923#define	ICBOPT_EXTENDED		0x8000
924#define	ICBOPT_BOTH_WWNS	0x4000
925#define	ICBOPT_FULL_LOGIN	0x2000
926#define	ICBOPT_STOP_ON_QFULL	0x1000	/* 2200/2100 only */
927#define	ICBOPT_PREVLOOP		0x0800
928#define	ICBOPT_SRCHDOWN		0x0400
929#define	ICBOPT_NOLIP		0x0200
930#define	ICBOPT_PDBCHANGE_AE	0x0100
931#define	ICBOPT_INI_TGTTYPE	0x0080
932#define	ICBOPT_INI_ADISC	0x0040
933#define	ICBOPT_INI_DISABLE	0x0020
934#define	ICBOPT_TGT_ENABLE	0x0010
935#define	ICBOPT_FAST_POST	0x0008
936#define	ICBOPT_FULL_DUPLEX	0x0004
937#define	ICBOPT_FAIRNESS		0x0002
938#define	ICBOPT_HARD_ADDRESS	0x0001
939
940#define	ICBXOPT_NO_LOGOUT	0x8000	/* no logout on link failure */
941#define	ICBXOPT_FCTAPE_CCQ	0x4000	/* FC-Tape Command Queueing */
942#define	ICBXOPT_FCTAPE_CONFIRM	0x2000
943#define	ICBXOPT_FCTAPE		0x1000
944#define	ICBXOPT_CLASS2_ACK0	0x0200
945#define	ICBXOPT_CLASS2		0x0100
946#define	ICBXOPT_NO_PLAY		0x0080	/* don't play if can't get hard addr */
947#define	ICBXOPT_TOPO_MASK	0x0070
948#define	ICBXOPT_LOOP_ONLY	0x0000
949#define	ICBXOPT_PTP_ONLY	0x0010
950#define	ICBXOPT_LOOP_2_PTP	0x0020
951#define	ICBXOPT_PTP_2_LOOP	0x0030
952/*
953 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits.
954 * RIO is not defined for the 23XX cards (just 2200)
955 */
956#define	ICBXOPT_RIO_OFF		0
957#define	ICBXOPT_RIO_16BIT	1
958#define	ICBXOPT_RIO_32BIT	2
959#define	ICBXOPT_RIO_16BIT_IOCB	3
960#define	ICBXOPT_RIO_32BIT_IOCB	4
961#define	ICBXOPT_ZIO		5
962#define	ICBXOPT_TIMER_MASK	0x7
963
964#define	ICBZOPT_RATE_MASK	0xC000
965#define	ICBZOPT_RATE_ONEGB	0x0000
966#define	ICBZOPT_RATE_AUTO	0x8000
967#define	ICBZOPT_RATE_TWOGB	0x4000
968#define	ICBZOPT_50_OHM		0x2000
969#define	ICBZOPT_ENA_OOF		0x0040	/* out of order frame handling */
970#define	ICBZOPT_RSPSZ_MASK	0x0030
971#define	ICBZOPT_RSPSZ_24	0x0000
972#define	ICBZOPT_RSPSZ_12	0x0010
973#define	ICBZOPT_RSPSZ_24A	0x0020
974#define	ICBZOPT_RSPSZ_32	0x0030
975#define	ICBZOPT_SOFTID		0x0002
976#define	ICBZOPT_ENA_RDXFR_RDY	0x0001
977
978/* 2400 F/W options */
979#define	ICB2400_OPT1_BOTH_WWNS		0x00004000
980#define	ICB2400_OPT1_FULL_LOGIN		0x00002000
981#define	ICB2400_OPT1_PREVLOOP		0x00000800
982#define	ICB2400_OPT1_SRCHDOWN		0x00000400
983#define	ICB2400_OPT1_NOLIP		0x00000200
984#define	ICB2400_OPT1_INI_DISABLE	0x00000020
985#define	ICB2400_OPT1_TGT_ENABLE		0x00000010
986#define	ICB2400_OPT1_FULL_DUPLEX	0x00000004
987#define	ICB2400_OPT1_FAIRNESS		0x00000002
988#define	ICB2400_OPT1_HARD_ADDRESS	0x00000001
989
990#define	ICB2400_OPT2_FCTAPE		0x00001000
991#define	ICB2400_OPT2_CLASS2_ACK0	0x00000200
992#define	ICB2400_OPT2_CLASS2		0x00000100
993#define	ICB2400_OPT2_NO_PLAY		0x00000080
994#define	ICB2400_OPT2_TOPO_MASK		0x00000070
995#define	ICB2400_OPT2_LOOP_ONLY		0x00000000
996#define	ICB2400_OPT2_PTP_ONLY		0x00000010
997#define	ICB2400_OPT2_LOOP_2_PTP		0x00000020
998#define	ICB2400_OPT2_PTP_2_LOOP		0x00000030
999#define	ICB2400_OPT2_TIMER_MASK		0x00000007
1000#define	ICB2400_OPT2_ZIO		0x00000005
1001#define	ICB2400_OPT2_ZIO1		0x00000006
1002
1003#define	ICB2400_OPT3_75_OHM		0x00010000
1004#define	ICB2400_OPT3_RATE_MASK		0x0000E000
1005#define	ICB2400_OPT3_RATE_ONEGB		0x00000000
1006#define	ICB2400_OPT3_RATE_TWOGB		0x00002000
1007#define ICB2400_OPT3_RATE_AUTO		0x00004000
1008#define	ICB2400_OPT3_RATE_FOURGB	0x00006000
1009#define	ICB2400_OPT3_RATE_EIGHTGB	0x00008000
1010#define	ICB2400_OPT3_ENA_OOF_XFRDY	0x00000200
1011#define	ICB2400_OPT3_NO_LOCAL_PLOGI	0x00000080
1012#define	ICB2400_OPT3_ENA_OOF		0x00000040
1013/* note that a response size flag of zero is reserved! */
1014#define	ICB2400_OPT3_RSPSZ_MASK		0x00000030
1015#define	ICB2400_OPT3_RSPSZ_12		0x00000010
1016#define	ICB2400_OPT3_RSPSZ_24		0x00000020
1017#define	ICB2400_OPT3_RSPSZ_32		0x00000030
1018#define	ICB2400_OPT3_SOFTID		0x00000002
1019
1020#define	ICB_MIN_FRMLEN		256
1021#define	ICB_MAX_FRMLEN		2112
1022#define	ICB_DFLT_FRMLEN		1024
1023#define	ICB_DFLT_ALLOC		256
1024#define	ICB_DFLT_THROTTLE	16
1025#define	ICB_DFLT_RDELAY		5
1026#define	ICB_DFLT_RCOUNT		3
1027
1028#define	ICB_LOGIN_TOV		30
1029#define	ICB_LUN_ENABLE_TOV	180
1030
1031
1032/*
1033 * And somebody at QLogic had a great idea that you could just change
1034 * the structure *and* keep the version number the same as the other cards.
1035 */
1036typedef struct {
1037	uint16_t	icb_version;
1038	uint16_t	icb_reserved0;
1039	uint16_t	icb_maxfrmlen;
1040	uint16_t	icb_execthrottle;
1041	uint16_t	icb_xchgcnt;
1042	uint16_t	icb_hardaddr;
1043	uint8_t		icb_portname[8];
1044	uint8_t		icb_nodename[8];
1045	uint16_t	icb_rspnsin;
1046	uint16_t	icb_rqstout;
1047	uint16_t	icb_retry_count;
1048	uint16_t	icb_priout;
1049	uint16_t	icb_rsltqlen;
1050	uint16_t	icb_rqstqlen;
1051	uint16_t	icb_ldn_nols;
1052	uint16_t	icb_prqstqlen;
1053	uint16_t	icb_rqstaddr[4];
1054	uint16_t	icb_respaddr[4];
1055	uint16_t	icb_priaddr[4];
1056	uint16_t	icb_reserved1[4];
1057	uint16_t	icb_atio_in;
1058	uint16_t	icb_atioqlen;
1059	uint16_t	icb_atioqaddr[4];
1060	uint16_t	icb_idelaytimer;
1061	uint16_t	icb_logintime;
1062	uint32_t	icb_fwoptions1;
1063	uint32_t	icb_fwoptions2;
1064	uint32_t	icb_fwoptions3;
1065	uint16_t	icb_reserved2[12];
1066} isp_icb_2400_t;
1067
1068#define	RQRSP_ADDR0015	0
1069#define	RQRSP_ADDR1631	1
1070#define	RQRSP_ADDR3247	2
1071#define	RQRSP_ADDR4863	3
1072
1073
1074#define	ICB_NNM0	7
1075#define	ICB_NNM1	6
1076#define	ICB_NNM2	5
1077#define	ICB_NNM3	4
1078#define	ICB_NNM4	3
1079#define	ICB_NNM5	2
1080#define	ICB_NNM6	1
1081#define	ICB_NNM7	0
1082
1083#define	MAKE_NODE_NAME_FROM_WWN(array, wwn)	\
1084	array[ICB_NNM0] = (uint8_t) ((wwn >>  0) & 0xff), \
1085	array[ICB_NNM1] = (uint8_t) ((wwn >>  8) & 0xff), \
1086	array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \
1087	array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \
1088	array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \
1089	array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \
1090	array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \
1091	array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff)
1092
1093#define	MAKE_WWN_FROM_NODE_NAME(wwn, array)	\
1094	wwn =	((uint64_t) array[ICB_NNM0]) | \
1095		((uint64_t) array[ICB_NNM1] <<  8) | \
1096		((uint64_t) array[ICB_NNM2] << 16) | \
1097		((uint64_t) array[ICB_NNM3] << 24) | \
1098		((uint64_t) array[ICB_NNM4] << 32) | \
1099		((uint64_t) array[ICB_NNM5] << 40) | \
1100		((uint64_t) array[ICB_NNM6] << 48) | \
1101		((uint64_t) array[ICB_NNM7] << 56)
1102
1103
1104/*
1105 * For MULTI_ID firmware, this describes a
1106 * virtual port entity for getting status.
1107 */
1108typedef struct {
1109	uint16_t	vp_port_status;
1110	uint8_t		vp_port_options;
1111	uint8_t		vp_port_loopid;
1112	uint8_t		vp_port_portname[8];
1113	uint8_t		vp_port_nodename[8];
1114	uint16_t	vp_port_portid_lo;	/* not present when trailing icb */
1115	uint16_t	vp_port_portid_hi;	/* not present when trailing icb */
1116} vp_port_info_t;
1117
1118#define	ICB2400_VPOPT_TGT_DISABLE	0x00000020	/* disable target mode */
1119#define	ICB2400_VPOPT_INI_ENABLE	0x00000010	/* enable initiator mode */
1120#define	ICB2400_VPOPT_ENABLED		0x00000008
1121#define	ICB2400_VPOPT_NOPLAY		0x00000004
1122#define	ICB2400_VPOPT_PREVLOOP		0x00000002
1123#define	ICB2400_VPOPT_HARD_ADDRESS	0x00000001
1124
1125#define	ICB2400_VPOPT_WRITE_SIZE	20
1126
1127/*
1128 * For MULTI_ID firmware, we append this structure
1129 * to the isp_icb_2400_t above, followed by a list
1130 * structures that are *most* of the vp_port_info_t.
1131 */
1132typedef struct {
1133	uint16_t	vp_count;
1134	uint16_t	vp_global_options;
1135} isp_icb_2400_vpinfo_t;
1136
1137#define	ICB2400_VPINFO_OFF	0x80	/* offset from start of ICB */
1138#define	ICB2400_VPINFO_PORT_OFF(chan)		\
1139    ICB2400_VPINFO_OFF + 			\
1140    sizeof (isp_icb_2400_vpinfo_t) + ((chan - 1) * ICB2400_VPOPT_WRITE_SIZE)
1141
1142#define	ICB2400_VPGOPT_MID_DISABLE	0x02
1143
1144typedef struct {
1145	isphdr_t	vp_ctrl_hdr;
1146	uint32_t	vp_ctrl_handle;
1147	uint16_t	vp_ctrl_index_fail;
1148	uint16_t	vp_ctrl_status;
1149	uint16_t	vp_ctrl_command;
1150	uint16_t	vp_ctrl_vp_count;
1151	uint16_t	vp_ctrl_idmap[8];
1152	uint8_t		vp_ctrl_reserved[32];
1153} vp_ctrl_info_t;
1154
1155#define	VP_CTRL_CMD_ENABLE_VP			0
1156#define	VP_CTRL_CMD_DISABLE_VP			8
1157#define	VP_CTRL_CMD_DISABLE_VP_REINIT_LINK	9
1158#define	VP_CTRL_CMD_DISABLE_VP_LOGO		0xA
1159
1160/*
1161 * We can use this structure for modifying either one or two VP ports after initialization
1162 */
1163typedef struct {
1164	isphdr_t	vp_mod_hdr;
1165	uint32_t	vp_mod_hdl;
1166	uint16_t	vp_mod_reserved0;
1167	uint16_t	vp_mod_status;
1168	uint8_t		vp_mod_cmd;
1169	uint8_t		vp_mod_cnt;
1170	uint8_t		vp_mod_idx0;
1171	uint8_t		vp_mod_idx1;
1172	struct {
1173		uint8_t		options;
1174		uint8_t		loopid;
1175		uint16_t	reserved1;
1176		uint8_t		wwpn[8];
1177		uint8_t		wwnn[8];
1178	} vp_mod_ports[2];
1179	uint8_t		vp_mod_reserved2[8];
1180} vp_modify_t;
1181
1182#define	VP_STS_OK	0x00
1183#define	VP_STS_ERR	0x01
1184#define	VP_CNT_ERR	0x02
1185#define	VP_GEN_ERR	0x03
1186#define	VP_IDX_ERR	0x04
1187#define	VP_STS_BSY	0x05
1188
1189#define	VP_MODIFY_VP	0x00
1190#define	VP_MODIFY_ENA	0x01
1191
1192/*
1193 * Port Data Base Element
1194 */
1195
1196typedef struct {
1197	uint16_t	pdb_options;
1198	uint8_t		pdb_mstate;
1199	uint8_t		pdb_sstate;
1200	uint8_t		pdb_hardaddr_bits[4];
1201	uint8_t		pdb_portid_bits[4];
1202	uint8_t		pdb_nodename[8];
1203	uint8_t		pdb_portname[8];
1204	uint16_t	pdb_execthrottle;
1205	uint16_t	pdb_exec_count;
1206	uint8_t		pdb_retry_count;
1207	uint8_t		pdb_retry_delay;
1208	uint16_t	pdb_resalloc;
1209	uint16_t	pdb_curalloc;
1210	uint16_t	pdb_qhead;
1211	uint16_t	pdb_qtail;
1212	uint16_t	pdb_tl_next;
1213	uint16_t	pdb_tl_last;
1214	uint16_t	pdb_features;	/* PLOGI, Common Service */
1215	uint16_t	pdb_pconcurrnt;	/* PLOGI, Common Service */
1216	uint16_t	pdb_roi;	/* PLOGI, Common Service */
1217	uint8_t		pdb_target;
1218	uint8_t		pdb_initiator;	/* PLOGI, Class 3 Control Flags */
1219	uint16_t	pdb_rdsiz;	/* PLOGI, Class 3 */
1220	uint16_t	pdb_ncseq;	/* PLOGI, Class 3 */
1221	uint16_t	pdb_noseq;	/* PLOGI, Class 3 */
1222	uint16_t	pdb_labrtflg;
1223	uint16_t	pdb_lstopflg;
1224	uint16_t	pdb_sqhead;
1225	uint16_t	pdb_sqtail;
1226	uint16_t	pdb_ptimer;
1227	uint16_t	pdb_nxt_seqid;
1228	uint16_t	pdb_fcount;
1229	uint16_t	pdb_prli_len;
1230	uint16_t	pdb_prli_svc0;
1231	uint16_t	pdb_prli_svc3;
1232	uint16_t	pdb_loopid;
1233	uint16_t	pdb_il_ptr;
1234	uint16_t	pdb_sl_ptr;
1235} isp_pdb_21xx_t;
1236
1237#define	PDB_OPTIONS_XMITTING	(1<<11)
1238#define	PDB_OPTIONS_LNKXMIT	(1<<10)
1239#define	PDB_OPTIONS_ABORTED	(1<<9)
1240#define	PDB_OPTIONS_ADISC	(1<<1)
1241
1242#define	PDB_STATE_DISCOVERY	0
1243#define	PDB_STATE_WDISC_ACK	1
1244#define	PDB_STATE_PLOGI		2
1245#define	PDB_STATE_PLOGI_ACK	3
1246#define	PDB_STATE_PRLI		4
1247#define	PDB_STATE_PRLI_ACK	5
1248#define	PDB_STATE_LOGGED_IN	6
1249#define	PDB_STATE_PORT_UNAVAIL	7
1250#define	PDB_STATE_PRLO		8
1251#define	PDB_STATE_PRLO_ACK	9
1252#define	PDB_STATE_PLOGO		10
1253#define	PDB_STATE_PLOG_ACK	11
1254
1255#define		SVC3_TGT_ROLE		0x10
1256#define 	SVC3_INI_ROLE		0x20
1257#define			SVC3_ROLE_MASK	0x30
1258#define			SVC3_ROLE_SHIFT	4
1259
1260#define	BITS2WORD(x)		((x)[0] << 16 | (x)[3] << 8 | (x)[2])
1261#define	BITS2WORD_24XX(x)	((x)[0] << 16 | (x)[1] << 8 | (x)[2])
1262
1263/*
1264 * Port Data Base Element- 24XX cards
1265 */
1266typedef struct {
1267	uint16_t	pdb_flags;
1268	uint8_t		pdb_curstate;
1269	uint8_t		pdb_laststate;
1270	uint8_t		pdb_hardaddr_bits[4];
1271	uint8_t		pdb_portid_bits[4];
1272#define		pdb_nxt_seqid_2400	pdb_portid_bits[3]
1273	uint16_t	pdb_retry_timer;
1274	uint16_t	pdb_handle;
1275	uint16_t	pdb_rcv_dsize;
1276	uint16_t	pdb_reserved0;
1277	uint16_t	pdb_prli_svc0;
1278	uint16_t	pdb_prli_svc3;
1279	uint8_t		pdb_portname[8];
1280	uint8_t		pdb_nodename[8];
1281	uint8_t		pdb_reserved1[24];
1282} isp_pdb_24xx_t;
1283
1284#define	PDB2400_TID_SUPPORTED	0x4000
1285#define	PDB2400_FC_TAPE		0x0080
1286#define	PDB2400_CLASS2_ACK0	0x0040
1287#define	PDB2400_FCP_CONF	0x0020
1288#define	PDB2400_CLASS2		0x0010
1289#define	PDB2400_ADDR_VALID	0x0002
1290
1291#define	PDB2400_STATE_PLOGI_PEND	0x03
1292#define	PDB2400_STATE_PLOGI_DONE	0x04
1293#define	PDB2400_STATE_PRLI_PEND		0x05
1294#define	PDB2400_STATE_LOGGED_IN		0x06
1295#define	PDB2400_STATE_PORT_UNAVAIL	0x07
1296#define	PDB2400_STATE_PRLO_PEND		0x09
1297#define	PDB2400_STATE_LOGO_PEND		0x0B
1298
1299/*
1300 * Common elements from the above two structures that are actually useful to us.
1301 */
1302typedef struct {
1303	uint16_t	handle;
1304	uint16_t	reserved;
1305	uint32_t	s3_role	: 8,
1306			portid	: 24;
1307	uint8_t		portname[8];
1308	uint8_t		nodename[8];
1309} isp_pdb_t;
1310
1311/*
1312 * Port Database Changed Async Event information for 24XX cards
1313 */
1314#define	PDB24XX_AE_OK		0x00
1315#define	PDB24XX_AE_IMPL_LOGO_1	0x01
1316#define	PDB24XX_AE_IMPL_LOGO_2	0x02
1317#define	PDB24XX_AE_IMPL_LOGO_3	0x03
1318#define	PDB24XX_AE_PLOGI_RCVD	0x04
1319#define	PDB24XX_AE_PLOGI_RJT	0x05
1320#define	PDB24XX_AE_PRLI_RCVD	0x06
1321#define	PDB24XX_AE_PRLI_RJT	0x07
1322#define	PDB24XX_AE_TPRLO	0x08
1323#define	PDB24XX_AE_TPRLO_RJT	0x09
1324#define	PDB24XX_AE_PRLO_RCVD	0x0a
1325#define	PDB24XX_AE_LOGO_RCVD	0x0b
1326#define	PDB24XX_AE_TOPO_CHG	0x0c
1327#define	PDB24XX_AE_NPORT_CHG	0x0d
1328#define	PDB24XX_AE_FLOGI_RJT	0x0e
1329#define	PDB24XX_AE_BAD_FANN	0x0f
1330#define	PDB24XX_AE_FLOGI_TIMO	0x10
1331#define	PDB24XX_AE_ABX_LOGO	0x11
1332#define	PDB24XX_AE_PLOGI_DONE	0x12
1333#define	PDB24XX_AE_PRLI_DONJE	0x13
1334#define	PDB24XX_AE_OPN_1	0x14
1335#define	PDB24XX_AE_OPN_2	0x15
1336#define	PDB24XX_AE_TXERR	0x16
1337#define	PDB24XX_AE_FORCED_LOGO	0x17
1338#define	PDB24XX_AE_DISC_TIMO	0x18
1339
1340/*
1341 * Genericized Port Login/Logout software structure
1342 */
1343typedef struct {
1344	uint16_t	handle;
1345	uint16_t	channel;
1346	uint32_t
1347		flags	: 8,
1348		portid	: 24;
1349} isp_plcmd_t;
1350/* the flags to use are those for PLOGX_FLG_* below */
1351
1352/*
1353 * ISP24XX- Login/Logout Port IOCB
1354 */
1355typedef struct {
1356	isphdr_t	plogx_header;
1357	uint32_t	plogx_handle;
1358	uint16_t	plogx_status;
1359	uint16_t	plogx_nphdl;
1360	uint16_t	plogx_flags;
1361	uint16_t	plogx_vphdl;		/* low 8 bits */
1362	uint16_t	plogx_portlo;		/* low 16 bits */
1363	uint16_t	plogx_rspsz_porthi;
1364	struct {
1365		uint16_t	lo16;
1366		uint16_t	hi16;
1367	} plogx_ioparm[11];
1368} isp_plogx_t;
1369
1370#define	PLOGX_STATUS_OK		0x00
1371#define	PLOGX_STATUS_UNAVAIL	0x28
1372#define	PLOGX_STATUS_LOGOUT	0x29
1373#define	PLOGX_STATUS_IOCBERR	0x31
1374
1375#define	PLOGX_IOCBERR_NOLINK	0x01
1376#define	PLOGX_IOCBERR_NOIOCB	0x02
1377#define	PLOGX_IOCBERR_NOXGHG	0x03
1378#define	PLOGX_IOCBERR_FAILED	0x04	/* further info in IOPARM 1 */
1379#define	PLOGX_IOCBERR_NOFABRIC	0x05
1380#define	PLOGX_IOCBERR_NOTREADY	0x07
1381#define	PLOGX_IOCBERR_NOLOGIN	0x08	/* further info in IOPARM 1 */
1382#define	PLOGX_IOCBERR_NOPCB	0x0a
1383#define	PLOGX_IOCBERR_REJECT	0x18	/* further info in IOPARM 1 */
1384#define	PLOGX_IOCBERR_EINVAL	0x19	/* further info in IOPARM 1 */
1385#define	PLOGX_IOCBERR_PORTUSED	0x1a	/* further info in IOPARM 1 */
1386#define	PLOGX_IOCBERR_HNDLUSED	0x1b	/* further info in IOPARM 1 */
1387#define	PLOGX_IOCBERR_NOHANDLE	0x1c
1388#define	PLOGX_IOCBERR_NOFLOGI	0x1f	/* further info in IOPARM 1 */
1389
1390#define	PLOGX_FLG_CMD_MASK	0xf
1391#define	PLOGX_FLG_CMD_PLOGI	0
1392#define	PLOGX_FLG_CMD_PRLI	1
1393#define	PLOGX_FLG_CMD_PDISC	2
1394#define	PLOGX_FLG_CMD_LOGO	8
1395#define	PLOGX_FLG_CMD_PRLO	9
1396#define	PLOGX_FLG_CMD_TPRLO	10
1397
1398#define	PLOGX_FLG_COND_PLOGI		0x10	/* if with PLOGI */
1399#define	PLOGX_FLG_IMPLICIT		0x10	/* if with LOGO, PRLO, TPRLO */
1400#define	PLOGX_FLG_SKIP_PRLI		0x20	/* if with PLOGI */
1401#define	PLOGX_FLG_IMPLICIT_LOGO_ALL	0x20	/* if with LOGO */
1402#define	PLOGX_FLG_EXPLICIT_LOGO		0x40	/* if with LOGO */
1403#define	PLOGX_FLG_COMMON_FEATURES	0x80	/* if with PLOGI */
1404#define	PLOGX_FLG_FREE_NPHDL		0x80	/* if with with LOGO */
1405
1406#define	PLOGX_FLG_CLASS2		0x100	/* if with PLOGI */
1407#define	PLOGX_FLG_FCP2_OVERRIDE		0x200	/* if with PRLOG, PRLI */
1408
1409/*
1410 * Report ID Acquisistion (24XX multi-id firmware)
1411 */
1412typedef struct {
1413	isphdr_t	ridacq_hdr;
1414	uint32_t	ridacq_handle;
1415	union {
1416		struct {
1417			uint8_t		ridacq_vp_acquired;
1418			uint8_t		ridacq_vp_setup;
1419			uint16_t	ridacq_reserved0;
1420		} type0;	/* type 0 */
1421		struct {
1422			uint16_t	ridacq_vp_count;
1423			uint8_t		ridacq_vp_index;
1424			uint8_t		ridacq_vp_status;
1425		} type1;	/* type 1 */
1426	} un;
1427	uint16_t	ridacq_vp_port_lo;
1428	uint8_t		ridacq_vp_port_hi;
1429	uint8_t		ridacq_format;		/* 0 or 1 */
1430	uint16_t	ridacq_map[8];
1431	uint8_t		ridacq_reserved1[32];
1432} isp_ridacq_t;
1433
1434#define	RIDACQ_STS_COMPLETE	0
1435#define	RIDACQ_STS_UNACQUIRED	1
1436#define	RIDACQ_STS_CHANGED	20
1437
1438
1439/*
1440 * Simple Name Server Data Structures
1441 */
1442#define	SNS_GA_NXT	0x100
1443#define	SNS_GPN_ID	0x112
1444#define	SNS_GNN_ID	0x113
1445#define	SNS_GFF_ID	0x11F
1446#define	SNS_GID_FT	0x171
1447#define	SNS_RFT_ID	0x217
1448typedef struct {
1449	uint16_t	snscb_rblen;	/* response buffer length (words) */
1450	uint16_t	snscb_reserved0;
1451	uint16_t	snscb_addr[4];	/* response buffer address */
1452	uint16_t	snscb_sblen;	/* subcommand buffer length (words) */
1453	uint16_t	snscb_reserved1;
1454	uint16_t	snscb_data[1];	/* variable data */
1455} sns_screq_t;	/* Subcommand Request Structure */
1456
1457typedef struct {
1458	uint16_t	snscb_rblen;	/* response buffer length (words) */
1459	uint16_t	snscb_reserved0;
1460	uint16_t	snscb_addr[4];	/* response buffer address */
1461	uint16_t	snscb_sblen;	/* subcommand buffer length (words) */
1462	uint16_t	snscb_reserved1;
1463	uint16_t	snscb_cmd;
1464	uint16_t	snscb_reserved2;
1465	uint32_t	snscb_reserved3;
1466	uint32_t	snscb_port;
1467} sns_ga_nxt_req_t;
1468#define	SNS_GA_NXT_REQ_SIZE	(sizeof (sns_ga_nxt_req_t))
1469
1470typedef struct {
1471	uint16_t	snscb_rblen;	/* response buffer length (words) */
1472	uint16_t	snscb_reserved0;
1473	uint16_t	snscb_addr[4];	/* response buffer address */
1474	uint16_t	snscb_sblen;	/* subcommand buffer length (words) */
1475	uint16_t	snscb_reserved1;
1476	uint16_t	snscb_cmd;
1477	uint16_t	snscb_reserved2;
1478	uint32_t	snscb_reserved3;
1479	uint32_t	snscb_portid;
1480} sns_gxn_id_req_t;
1481#define	SNS_GXN_ID_REQ_SIZE	(sizeof (sns_gxn_id_req_t))
1482
1483typedef struct {
1484	uint16_t	snscb_rblen;	/* response buffer length (words) */
1485	uint16_t	snscb_reserved0;
1486	uint16_t	snscb_addr[4];	/* response buffer address */
1487	uint16_t	snscb_sblen;	/* subcommand buffer length (words) */
1488	uint16_t	snscb_reserved1;
1489	uint16_t	snscb_cmd;
1490	uint16_t	snscb_mword_div_2;
1491	uint32_t	snscb_reserved3;
1492	uint32_t	snscb_fc4_type;
1493} sns_gid_ft_req_t;
1494#define	SNS_GID_FT_REQ_SIZE	(sizeof (sns_gid_ft_req_t))
1495
1496typedef struct {
1497	uint16_t	snscb_rblen;	/* response buffer length (words) */
1498	uint16_t	snscb_reserved0;
1499	uint16_t	snscb_addr[4];	/* response buffer address */
1500	uint16_t	snscb_sblen;	/* subcommand buffer length (words) */
1501	uint16_t	snscb_reserved1;
1502	uint16_t	snscb_cmd;
1503	uint16_t	snscb_reserved2;
1504	uint32_t	snscb_reserved3;
1505	uint32_t	snscb_port;
1506	uint32_t	snscb_fc4_types[8];
1507} sns_rft_id_req_t;
1508#define	SNS_RFT_ID_REQ_SIZE	(sizeof (sns_rft_id_req_t))
1509
1510typedef struct {
1511	ct_hdr_t	snscb_cthdr;
1512	uint8_t		snscb_port_type;
1513	uint8_t		snscb_port_id[3];
1514	uint8_t		snscb_portname[8];
1515	uint16_t	snscb_data[1];	/* variable data */
1516} sns_scrsp_t;	/* Subcommand Response Structure */
1517
1518typedef struct {
1519	ct_hdr_t	snscb_cthdr;
1520	uint8_t		snscb_port_type;
1521	uint8_t		snscb_port_id[3];
1522	uint8_t		snscb_portname[8];
1523	uint8_t		snscb_pnlen;		/* symbolic port name length */
1524	uint8_t		snscb_pname[255];	/* symbolic port name */
1525	uint8_t		snscb_nodename[8];
1526	uint8_t		snscb_nnlen;		/* symbolic node name length */
1527	uint8_t		snscb_nname[255];	/* symbolic node name */
1528	uint8_t		snscb_ipassoc[8];
1529	uint8_t		snscb_ipaddr[16];
1530	uint8_t		snscb_svc_class[4];
1531	uint8_t		snscb_fc4_types[32];
1532	uint8_t		snscb_fpname[8];
1533	uint8_t		snscb_reserved;
1534	uint8_t		snscb_hardaddr[3];
1535} sns_ga_nxt_rsp_t;	/* Subcommand Response Structure */
1536#define	SNS_GA_NXT_RESP_SIZE	(sizeof (sns_ga_nxt_rsp_t))
1537
1538typedef struct {
1539	ct_hdr_t	snscb_cthdr;
1540	uint8_t		snscb_wwn[8];
1541} sns_gxn_id_rsp_t;
1542#define	SNS_GXN_ID_RESP_SIZE	(sizeof (sns_gxn_id_rsp_t))
1543
1544typedef struct {
1545	ct_hdr_t	snscb_cthdr;
1546	uint32_t	snscb_fc4_features[32];
1547} sns_gff_id_rsp_t;
1548#define	SNS_GFF_ID_RESP_SIZE	(sizeof (sns_gff_id_rsp_t))
1549
1550typedef struct {
1551	ct_hdr_t	snscb_cthdr;
1552	struct {
1553		uint8_t		control;
1554		uint8_t		portid[3];
1555	} snscb_ports[1];
1556} sns_gid_ft_rsp_t;
1557#define	SNS_GID_FT_RESP_SIZE(x)	((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2))
1558#define	SNS_RFT_ID_RESP_SIZE	(sizeof (ct_hdr_t))
1559
1560/*
1561 * Other Misc Structures
1562 */
1563
1564/* ELS Pass Through */
1565typedef struct {
1566	isphdr_t	els_hdr;
1567	uint32_t	els_handle;
1568	uint16_t	els_status;
1569	uint16_t	els_nphdl;
1570	uint16_t	els_xmit_dsd_count;	/* outgoing only */
1571	uint8_t		els_vphdl;
1572	uint8_t		els_sof;
1573	uint32_t	els_rxid;
1574	uint16_t	els_recv_dsd_count;	/* outgoing only */
1575	uint8_t		els_opcode;
1576	uint8_t		els_reserved1;
1577	uint8_t		els_did_lo;
1578	uint8_t		els_did_mid;
1579	uint8_t		els_did_hi;
1580	uint8_t		els_reserved2;
1581	uint16_t	els_reserved3;
1582	uint16_t	els_ctl_flags;
1583	union {
1584		struct {
1585			uint32_t	_els_bytecnt;
1586			uint32_t	_els_subcode1;
1587			uint32_t	_els_subcode2;
1588			uint8_t		_els_reserved4[20];
1589		} in;
1590		struct {
1591			uint32_t	_els_recv_bytecnt;
1592			uint32_t	_els_xmit_bytecnt;
1593			uint32_t	_els_xmit_dsd_length;
1594			uint16_t	_els_xmit_dsd_a1500;
1595			uint16_t	_els_xmit_dsd_a3116;
1596			uint16_t	_els_xmit_dsd_a4732;
1597			uint16_t	_els_xmit_dsd_a6348;
1598			uint32_t	_els_recv_dsd_length;
1599			uint16_t	_els_recv_dsd_a1500;
1600			uint16_t	_els_recv_dsd_a3116;
1601			uint16_t	_els_recv_dsd_a4732;
1602			uint16_t	_els_recv_dsd_a6348;
1603		} out;
1604	} inout;
1605#define	els_bytecnt		inout.in._els_bytecnt
1606#define	els_subcode1		inout.in._els_subcode1
1607#define	els_subcode2		inout.in._els_subcode2
1608#define	els_reserved4		inout.in._els_reserved4
1609#define	els_recv_bytecnt	inout.out._els_recv_bytecnt
1610#define	els_xmit_bytecnt	inout.out._els_xmit_bytecnt
1611#define	els_xmit_dsd_length	inout.out._els_xmit_dsd_length
1612#define	els_xmit_dsd_a1500	inout.out._els_xmit_dsd_a1500
1613#define	els_xmit_dsd_a3116	inout.out._els_xmit_dsd_a3116
1614#define	els_xmit_dsd_a4732	inout.out._els_xmit_dsd_a4732
1615#define	els_xmit_dsd_a6348	inout.out._els_xmit_dsd_a6348
1616#define	els_recv_dsd_length	inout.out._els_recv_dsd_length
1617#define	els_recv_dsd_a1500	inout.out._els_recv_dsd_a1500
1618#define	els_recv_dsd_a3116	inout.out._els_recv_dsd_a3116
1619#define	els_recv_dsd_a4732	inout.out._els_recv_dsd_a4732
1620#define	els_recv_dsd_a6348	inout.out._els_recv_dsd_a6348
1621} els_t;
1622
1623/*
1624 * A handy package structure for running FC-SCSI commands internally
1625 */
1626typedef struct {
1627	uint16_t	handle;
1628	uint16_t	lun;
1629	uint32_t
1630		channel : 8,
1631		portid	: 24;
1632	uint32_t	timeout;
1633	union {
1634		struct {
1635			uint32_t data_length;
1636			uint32_t
1637				no_wait : 1,
1638				do_read : 1;
1639			uint8_t cdb[16];
1640			void *data_ptr;
1641		} beg;
1642		struct {
1643			uint32_t data_residual;
1644			uint8_t status;
1645			uint8_t pad;
1646			uint16_t sense_length;
1647			uint8_t sense_data[32];
1648		} end;
1649	} fcd;
1650} isp_xcmd_t;
1651
1652/*
1653 * Target Mode related definitions
1654 */
1655#define	QLTM_SENSELEN	18	/* non-FC cards only */
1656#define QLTM_SVALID	0x80
1657
1658/*
1659 * Structure for Enable Lun and Modify Lun queue entries
1660 */
1661typedef struct {
1662	isphdr_t	le_header;
1663	uint32_t	le_reserved;
1664	uint8_t		le_lun;
1665	uint8_t		le_rsvd;
1666	uint8_t		le_ops;		/* Modify LUN only */
1667	uint8_t		le_tgt;		/* Not for FC */
1668	uint32_t	le_flags;	/* Not for FC */
1669	uint8_t		le_status;
1670	uint8_t		le_reserved2;
1671	uint8_t		le_cmd_count;
1672	uint8_t		le_in_count;
1673	uint8_t		le_cdb6len;	/* Not for FC */
1674	uint8_t		le_cdb7len;	/* Not for FC */
1675	uint16_t	le_timeout;
1676	uint16_t	le_reserved3[20];
1677} lun_entry_t;
1678
1679/*
1680 * le_flags values
1681 */
1682#define LUN_TQAE	0x00000002	/* bit1  Tagged Queue Action Enable */
1683#define LUN_DSSM	0x01000000	/* bit24 Disable Sending SDP Message */
1684#define	LUN_DISAD	0x02000000	/* bit25 Disable autodisconnect */
1685#define LUN_DM		0x40000000	/* bit30 Disconnects Mandatory */
1686
1687/*
1688 * le_ops values
1689 */
1690#define LUN_CCINCR	0x01	/* increment command count */
1691#define LUN_CCDECR	0x02	/* decrement command count */
1692#define LUN_ININCR	0x40	/* increment immed. notify count */
1693#define LUN_INDECR	0x80	/* decrement immed. notify count */
1694
1695/*
1696 * le_status values
1697 */
1698#define	LUN_OK		0x01	/* we be rockin' */
1699#define LUN_ERR		0x04	/* request completed with error */
1700#define LUN_INVAL	0x06	/* invalid request */
1701#define LUN_NOCAP	0x16	/* can't provide requested capability */
1702#define LUN_ENABLED	0x3E	/* LUN already enabled */
1703
1704/*
1705 * Immediate Notify Entry structure
1706 */
1707#define IN_MSGLEN	8	/* 8 bytes */
1708#define IN_RSVDLEN	8	/* 8 words */
1709typedef struct {
1710	isphdr_t	in_header;
1711	uint32_t	in_reserved;
1712	uint8_t		in_lun;		/* lun */
1713	uint8_t		in_iid;		/* initiator */
1714	uint8_t		in_reserved2;
1715	uint8_t		in_tgt;		/* target */
1716	uint32_t	in_flags;
1717	uint8_t		in_status;
1718	uint8_t		in_rsvd2;
1719	uint8_t		in_tag_val;	/* tag value */
1720	uint8_t		in_tag_type;	/* tag type */
1721	uint16_t	in_seqid;	/* sequence id */
1722	uint8_t		in_msg[IN_MSGLEN];	/* SCSI message bytes */
1723	uint16_t	in_reserved3[IN_RSVDLEN];
1724	uint8_t		in_sense[QLTM_SENSELEN];/* suggested sense data */
1725} in_entry_t;
1726
1727typedef struct {
1728	isphdr_t	in_header;
1729	uint32_t	in_reserved;
1730	uint8_t		in_lun;		/* lun */
1731	uint8_t		in_iid;		/* initiator */
1732	uint16_t	in_scclun;
1733	uint32_t	in_reserved2;
1734	uint16_t	in_status;
1735	uint16_t	in_task_flags;
1736	uint16_t	in_seqid;	/* sequence id */
1737} in_fcentry_t;
1738
1739typedef struct {
1740	isphdr_t	in_header;
1741	uint32_t	in_reserved;
1742	uint16_t	in_iid;		/* initiator */
1743	uint16_t	in_scclun;
1744	uint32_t	in_reserved2;
1745	uint16_t	in_status;
1746	uint16_t	in_task_flags;
1747	uint16_t	in_seqid;	/* sequence id */
1748} in_fcentry_e_t;
1749
1750/*
1751 * Values for the in_status field
1752 */
1753#define	IN_REJECT	0x0D	/* Message Reject message received */
1754#define IN_RESET	0x0E	/* Bus Reset occurred */
1755#define IN_NO_RCAP	0x16	/* requested capability not available */
1756#define IN_IDE_RECEIVED	0x33	/* Initiator Detected Error msg received */
1757#define IN_RSRC_UNAVAIL	0x34	/* resource unavailable */
1758#define IN_MSG_RECEIVED	0x36	/* SCSI message received */
1759#define	IN_ABORT_TASK	0x20	/* task named in RX_ID is being aborted (FC) */
1760#define	IN_PORT_LOGOUT	0x29	/* port has logged out (FC) */
1761#define	IN_PORT_CHANGED	0x2A	/* port changed */
1762#define	IN_GLOBAL_LOGO	0x2E	/* all ports logged out */
1763#define	IN_NO_NEXUS	0x3B	/* Nexus not established */
1764
1765/*
1766 * Values for the in_task_flags field- should only get one at a time!
1767 */
1768#define	TASK_FLAGS_RESERVED_MASK	(0xe700)
1769#define	TASK_FLAGS_CLEAR_ACA		(1<<14)
1770#define	TASK_FLAGS_TARGET_RESET		(1<<13)
1771#define	TASK_FLAGS_LUN_RESET		(1<<12)
1772#define	TASK_FLAGS_CLEAR_TASK_SET	(1<<10)
1773#define	TASK_FLAGS_ABORT_TASK_SET	(1<<9)
1774
1775/*
1776 * ISP24XX Immediate Notify
1777 */
1778typedef struct {
1779	isphdr_t	in_header;
1780	uint32_t	in_reserved;
1781	uint16_t	in_nphdl;
1782	uint16_t	in_reserved1;
1783	uint16_t	in_flags;
1784	uint16_t	in_srr_rxid;
1785	uint16_t	in_status;
1786	uint8_t		in_status_subcode;
1787	uint8_t		in_reserved2;
1788	uint32_t	in_rxid;
1789	uint16_t	in_srr_reloff_lo;
1790	uint16_t	in_srr_reloff_hi;
1791	uint16_t	in_srr_iu;
1792	uint16_t	in_srr_oxid;
1793	/*
1794	 * If bit 2 is set in in_flags, the following
1795	 * two tags are valid. If the received ELS is
1796	 * a LOGO, then these tags contain the N Port ID
1797	 * from the LOGO payload. If the received ELS
1798	 * request is TPRLO, these tags contain the
1799	 * Third Party Originator N Port ID.
1800	 */
1801	uint16_t	in_nport_id_hi;
1802	uint8_t		in_nport_id_lo;
1803	uint8_t		in_reserved3;
1804	/*
1805	 * If bit 2 is set in in_flags, the following
1806	 * tag is valid. If the received ELS is a LOGO,
1807	 * then this tag contains the n-port handle
1808	 * from the LOGO payload. If the received ELS
1809	 * request is TPRLO, this tag contain the
1810	 * n-port handle for the Third Party Originator.
1811	 */
1812	uint16_t	in_np_handle;
1813	uint8_t		in_reserved4[12];
1814	uint8_t		in_reserved5;
1815	uint8_t		in_vpidx;
1816	uint32_t	in_reserved6;
1817	uint16_t	in_portid_lo;
1818	uint8_t		in_portid_hi;
1819	uint8_t		in_reserved7;
1820	uint16_t	in_reserved8;
1821	uint16_t	in_oxid;
1822} in_fcentry_24xx_t;
1823
1824#define	IN24XX_FLAG_PUREX_IOCB		0x1
1825#define	IN24XX_FLAG_GLOBAL_LOGOUT	0x2
1826#define	IN24XX_FLAG_NPHDL_VALID		0x4
1827
1828#define	IN24XX_LIP_RESET	0x0E
1829#define	IN24XX_LINK_RESET	0x0F
1830#define	IN24XX_PORT_LOGOUT	0x29
1831#define	IN24XX_PORT_CHANGED	0x2A
1832#define	IN24XX_LINK_FAILED	0x2E
1833#define	IN24XX_SRR_RCVD		0x45
1834#define	IN24XX_ELS_RCVD		0x46	/*
1835					 * login-affectin ELS received- check
1836					 * subcode for specific opcode
1837					 */
1838
1839/*
1840 * For f/w > 4.0.25, these offsets in the Immediate Notify contain
1841 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in
1842 * Big Endian format.
1843 */
1844#define	IN24XX_PLOGI_WWNN_OFF	0x20
1845#define	IN24XX_PLOGI_WWPN_OFF	0x28
1846
1847/*
1848 * For f/w > 4.0.25, this offset in the Immediate Notify contain
1849 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format.
1850 */
1851#define	IN24XX_LOGO_WWPN_OFF	0x28
1852
1853/*
1854 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT
1855 */
1856#define	IN24XX_PORT_LOGOUT_PDISC_TMO	0x00
1857#define	IN24XX_PORT_LOGOUT_UXPR_DISC	0x01
1858#define	IN24XX_PORT_LOGOUT_OWN_OPN	0x02
1859#define	IN24XX_PORT_LOGOUT_OWN_OPN_SFT	0x03
1860#define	IN24XX_PORT_LOGOUT_ABTS_TMO	0x04
1861#define	IN24XX_PORT_LOGOUT_DISC_RJT	0x05
1862#define	IN24XX_PORT_LOGOUT_LOGIN_NEEDED	0x06
1863#define	IN24XX_PORT_LOGOUT_BAD_DISC	0x07
1864#define	IN24XX_PORT_LOGOUT_LOST_ALPA	0x08
1865#define	IN24XX_PORT_LOGOUT_XMIT_FAILURE	0x09
1866
1867/*
1868 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED
1869 */
1870#define	IN24XX_PORT_CHANGED_BADFAN	0x00
1871#define	IN24XX_PORT_CHANGED_TOPO_CHANGE	0x01
1872#define	IN24XX_PORT_CHANGED_FLOGI_ACC	0x02
1873#define	IN24XX_PORT_CHANGED_FLOGI_RJT	0x03
1874#define	IN24XX_PORT_CHANGED_TIMEOUT	0x04
1875#define	IN24XX_PORT_CHANGED_PORT_CHANGE	0x05
1876
1877/*
1878 * Notify Acknowledge Entry structure
1879 */
1880#define NA_RSVDLEN	22
1881typedef struct {
1882	isphdr_t	na_header;
1883	uint32_t	na_reserved;
1884	uint8_t		na_lun;		/* lun */
1885	uint8_t		na_iid;		/* initiator */
1886	uint8_t		na_reserved2;
1887	uint8_t		na_tgt;		/* target */
1888	uint32_t	na_flags;
1889	uint8_t		na_status;
1890	uint8_t		na_event;
1891	uint16_t	na_seqid;	/* sequence id */
1892	uint16_t	na_reserved3[NA_RSVDLEN];
1893} na_entry_t;
1894
1895/*
1896 * Value for the na_event field
1897 */
1898#define NA_RST_CLRD	0x80	/* Clear an async event notification */
1899#define	NA_OK		0x01	/* Notify Acknowledge Succeeded */
1900#define	NA_INVALID	0x06	/* Invalid Notify Acknowledge */
1901
1902#define	NA2_RSVDLEN	21
1903typedef struct {
1904	isphdr_t	na_header;
1905	uint32_t	na_reserved;
1906	uint8_t		na_reserved1;
1907	uint8_t		na_iid;		/* initiator loop id */
1908	uint16_t	na_response;
1909	uint16_t	na_flags;
1910	uint16_t	na_reserved2;
1911	uint16_t	na_status;
1912	uint16_t	na_task_flags;
1913	uint16_t	na_seqid;	/* sequence id */
1914	uint16_t	na_reserved3[NA2_RSVDLEN];
1915} na_fcentry_t;
1916
1917typedef struct {
1918	isphdr_t	na_header;
1919	uint32_t	na_reserved;
1920	uint16_t	na_iid;		/* initiator loop id */
1921	uint16_t	na_response;	/* response code */
1922	uint16_t	na_flags;
1923	uint16_t	na_reserved2;
1924	uint16_t	na_status;
1925	uint16_t	na_task_flags;
1926	uint16_t	na_seqid;	/* sequence id */
1927	uint16_t	na_reserved3[NA2_RSVDLEN];
1928} na_fcentry_e_t;
1929
1930#define	NAFC_RCOUNT	0x80	/* increment resource count */
1931#define NAFC_RST_CLRD	0x20	/* Clear LIP Reset */
1932#define	NAFC_TVALID	0x10	/* task mangement response code is valid */
1933
1934/*
1935 * ISP24XX Notify Acknowledge
1936 */
1937
1938typedef struct {
1939	isphdr_t	na_header;
1940	uint32_t	na_handle;
1941	uint16_t	na_nphdl;
1942	uint16_t	na_reserved1;
1943	uint16_t	na_flags;
1944	uint16_t	na_srr_rxid;
1945	uint16_t	na_status;
1946	uint8_t		na_status_subcode;
1947	uint8_t		na_reserved2;
1948	uint32_t	na_rxid;
1949	uint16_t	na_srr_reloff_lo;
1950	uint16_t	na_srr_reloff_hi;
1951	uint16_t	na_srr_iu;
1952	uint16_t	na_srr_flags;
1953	uint8_t		na_reserved3[18];
1954	uint8_t		na_reserved4;
1955	uint8_t		na_vpidx;
1956	uint8_t		na_srr_reject_vunique;
1957	uint8_t		na_srr_reject_explanation;
1958	uint8_t		na_srr_reject_code;
1959	uint8_t		na_reserved5;
1960	uint8_t		na_reserved6[6];
1961	uint16_t	na_oxid;
1962} na_fcentry_24xx_t;
1963
1964/*
1965 * Accept Target I/O Entry structure
1966 */
1967#define ATIO_CDBLEN	26
1968
1969typedef struct {
1970	isphdr_t	at_header;
1971	uint16_t	at_reserved;
1972	uint16_t	at_handle;
1973	uint8_t		at_lun;		/* lun */
1974	uint8_t		at_iid;		/* initiator */
1975	uint8_t		at_cdblen; 	/* cdb length */
1976	uint8_t		at_tgt;		/* target */
1977	uint32_t	at_flags;
1978	uint8_t		at_status;	/* firmware status */
1979	uint8_t		at_scsi_status;	/* scsi status */
1980	uint8_t		at_tag_val;	/* tag value */
1981	uint8_t		at_tag_type;	/* tag type */
1982	uint8_t		at_cdb[ATIO_CDBLEN];	/* received CDB */
1983	uint8_t		at_sense[QLTM_SENSELEN];/* suggested sense data */
1984} at_entry_t;
1985
1986/*
1987 * at_flags values
1988 */
1989#define AT_NODISC	0x00008000	/* disconnect disabled */
1990#define AT_TQAE		0x00000002	/* Tagged Queue Action enabled */
1991
1992/*
1993 * at_status values
1994 */
1995#define AT_PATH_INVALID	0x07	/* ATIO sent to firmware for disabled lun */
1996#define	AT_RESET	0x0E	/* SCSI Bus Reset Occurred */
1997#define AT_PHASE_ERROR	0x14	/* Bus phase sequence error */
1998#define AT_NOCAP	0x16	/* Requested capability not available */
1999#define AT_BDR_MSG	0x17	/* Bus Device Reset msg received */
2000#define AT_CDB		0x3D	/* CDB received */
2001/*
2002 * Macros to create and fetch and test concatenated handle and tag value macros
2003 * (SPI only)
2004 */
2005#define	AT_MAKE_TAGID(tid, aep)						\
2006	tid = aep->at_handle;						\
2007	if (aep->at_flags & AT_TQAE) {					\
2008		tid |= (aep->at_tag_val << 16);				\
2009		tid |= (1 << 24);					\
2010	}
2011
2012#define	CT_MAKE_TAGID(tid, ct)						\
2013	tid = ct->ct_fwhandle;						\
2014	if (ct->ct_flags & CT_TQAE) {					\
2015		tid |= (ct->ct_tag_val << 16);				\
2016		tid |= (1 << 24);					\
2017	}
2018
2019#define	AT_HAS_TAG(val)		((val) & (1 << 24))
2020#define	AT_GET_TAG(val)		(((val) >> 16) & 0xff)
2021#define	AT_GET_HANDLE(val)	((val) & 0xffff)
2022
2023#define	IN_MAKE_TAGID(tid, inp)						\
2024	tid = inp->in_seqid;						\
2025	tid |= (inp->in_tag_val << 16);					\
2026	tid |= (1 << 24)
2027
2028/*
2029 * Accept Target I/O Entry structure, Type 2
2030 */
2031#define ATIO2_CDBLEN	16
2032
2033typedef struct {
2034	isphdr_t	at_header;
2035	uint32_t	at_reserved;
2036	uint8_t		at_lun;		/* lun or reserved */
2037	uint8_t		at_iid;		/* initiator */
2038	uint16_t	at_rxid; 	/* response ID */
2039	uint16_t	at_flags;
2040	uint16_t	at_status;	/* firmware status */
2041	uint8_t		at_crn;		/* command reference number */
2042	uint8_t		at_taskcodes;
2043	uint8_t		at_taskflags;
2044	uint8_t		at_execodes;
2045	uint8_t		at_cdb[ATIO2_CDBLEN];	/* received CDB */
2046	uint32_t	at_datalen;		/* allocated data len */
2047	uint16_t	at_scclun;		/* SCC Lun or reserved */
2048	uint16_t	at_wwpn[4];		/* WWPN of initiator */
2049	uint16_t	at_reserved2[6];
2050	uint16_t	at_oxid;
2051} at2_entry_t;
2052
2053typedef struct {
2054	isphdr_t	at_header;
2055	uint32_t	at_reserved;
2056	uint16_t	at_iid;		/* initiator */
2057	uint16_t	at_rxid; 	/* response ID */
2058	uint16_t	at_flags;
2059	uint16_t	at_status;	/* firmware status */
2060	uint8_t		at_crn;		/* command reference number */
2061	uint8_t		at_taskcodes;
2062	uint8_t		at_taskflags;
2063	uint8_t		at_execodes;
2064	uint8_t		at_cdb[ATIO2_CDBLEN];	/* received CDB */
2065	uint32_t	at_datalen;		/* allocated data len */
2066	uint16_t	at_scclun;		/* SCC Lun or reserved */
2067	uint16_t	at_wwpn[4];		/* WWPN of initiator */
2068	uint16_t	at_reserved2[6];
2069	uint16_t	at_oxid;
2070} at2e_entry_t;
2071
2072#define	ATIO2_WWPN_OFFSET	0x2A
2073#define	ATIO2_OXID_OFFSET	0x3E
2074
2075#define	ATIO2_TC_ATTR_MASK	0x7
2076#define	ATIO2_TC_ATTR_SIMPLEQ	0
2077#define	ATIO2_TC_ATTR_HEADOFQ	1
2078#define	ATIO2_TC_ATTR_ORDERED	2
2079#define	ATIO2_TC_ATTR_ACAQ	4
2080#define	ATIO2_TC_ATTR_UNTAGGED	5
2081
2082#define	ATIO2_EX_WRITE		0x1
2083#define	ATIO2_EX_READ		0x2
2084/*
2085 * Macros to create and fetch and test concatenated handle and tag value macros
2086 */
2087#define	AT2_MAKE_TAGID(tid, bus, inst, aep)				\
2088	tid = aep->at_rxid;						\
2089	tid |= (((uint64_t)inst) << 32);				\
2090	tid |= (((uint64_t)bus) << 48)
2091
2092#define	CT2_MAKE_TAGID(tid, bus, inst, ct)				\
2093	tid = ct->ct_rxid;						\
2094	tid |= (((uint64_t)inst) << 32);				\
2095	tid |= (((uint64_t)(bus & 0xff)) << 48)
2096
2097#define	AT2_HAS_TAG(val)	1
2098#define	AT2_GET_TAG(val)	((val) & 0xffffffff)
2099#define	AT2_GET_INST(val)	(((val) >> 32) & 0xffff)
2100#define	AT2_GET_HANDLE		AT2_GET_TAG
2101#define	AT2_GET_BUS(val)	(((val) >> 48) & 0xff)
2102
2103#define	FC_HAS_TAG	AT2_HAS_TAG
2104#define	FC_GET_TAG	AT2_GET_TAG
2105#define	FC_GET_INST	AT2_GET_INST
2106#define	FC_GET_HANDLE	AT2_GET_HANDLE
2107
2108#define	IN_FC_MAKE_TAGID(tid, bus, inst, seqid)				\
2109	tid = seqid;							\
2110	tid |= (((uint64_t)inst) << 32);				\
2111	tid |= (((uint64_t)(bus & 0xff)) << 48)
2112
2113#define	FC_TAG_INSERT_INST(tid, inst)					\
2114	tid &= ~0x0000ffff00000000ull;					\
2115	tid |= (((uint64_t)inst) << 32)
2116
2117/*
2118 * 24XX ATIO Definition
2119 *
2120 * This is *quite* different from other entry types.
2121 * First of all, it has its own queue it comes in on.
2122 *
2123 * Secondly, it doesn't have a normal header.
2124 *
2125 * Thirdly, it's just a passthru of the FCP CMND IU
2126 * which is recorded in big endian mode.
2127 */
2128typedef struct {
2129	uint8_t		at_type;
2130	uint8_t		at_count;
2131	/*
2132	 * Task attribute in high four bits,
2133	 * the rest is the FCP CMND IU Length.
2134	 * NB: the command can extend past the
2135	 * length for a single queue entry.
2136	 */
2137	uint16_t	at_ta_len;
2138	uint32_t	at_rxid;
2139	fc_hdr_t	at_hdr;
2140	fcp_cmnd_iu_t	at_cmnd;
2141} at7_entry_t;
2142#define	AT7_NORESRC_RXID	0xffffffff
2143
2144
2145/*
2146 * Continue Target I/O Entry structure
2147 * Request from driver. The response from the
2148 * ISP firmware is the same except that the last 18
2149 * bytes are overwritten by suggested sense data if
2150 * the 'autosense valid' bit is set in the status byte.
2151 */
2152typedef struct {
2153	isphdr_t	ct_header;
2154	uint16_t	ct_syshandle;
2155	uint16_t	ct_fwhandle;	/* required by f/w */
2156	uint8_t		ct_lun;	/* lun */
2157	uint8_t		ct_iid;	/* initiator id */
2158	uint8_t		ct_reserved2;
2159	uint8_t		ct_tgt;	/* our target id */
2160	uint32_t	ct_flags;
2161	uint8_t 	ct_status;	/* isp status */
2162	uint8_t 	ct_scsi_status;	/* scsi status */
2163	uint8_t 	ct_tag_val;	/* tag value */
2164	uint8_t 	ct_tag_type;	/* tag type */
2165	uint32_t	ct_xfrlen;	/* transfer length */
2166	int32_t		ct_resid;	/* residual length */
2167	uint16_t	ct_timeout;
2168	uint16_t	ct_seg_count;
2169	ispds_t		ct_dataseg[ISP_RQDSEG];
2170} ct_entry_t;
2171
2172/*
2173 * For some of the dual port SCSI adapters, port (bus #) is reported
2174 * in the MSbit of ct_iid. Bit fields are a bit too awkward here.
2175 *
2176 * Note that this does not apply to FC adapters at all which can and
2177 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices
2178 * that have logged in across a SCSI fabric.
2179 */
2180#define	GET_IID_VAL(x)		(x & 0x3f)
2181#define	GET_BUS_VAL(x)		((x >> 7) & 0x1)
2182#define	SET_IID_VAL(y, x)	y = ((y & ~0x3f) | (x & 0x3f))
2183#define	SET_BUS_VAL(y, x)	y = ((y & 0x3f) | ((x & 0x1) << 7))
2184
2185/*
2186 * ct_flags values
2187 */
2188#define CT_TQAE		0x00000002	/* bit  1, Tagged Queue Action enable */
2189#define CT_DATA_IN	0x00000040	/* bits 6&7, Data direction */
2190#define CT_DATA_OUT	0x00000080	/* bits 6&7, Data direction */
2191#define CT_NO_DATA	0x000000C0	/* bits 6&7, Data direction */
2192#define	CT_CCINCR	0x00000100	/* bit 8, autoincrement atio count */
2193#define CT_DATAMASK	0x000000C0	/* bits 6&7, Data direction */
2194#define	CT_INISYNCWIDE	0x00004000	/* bit 14, Do Sync/Wide Negotiation */
2195#define CT_NODISC	0x00008000	/* bit 15, Disconnects disabled */
2196#define CT_DSDP		0x01000000	/* bit 24, Disable Save Data Pointers */
2197#define CT_SENDRDP	0x04000000	/* bit 26, Send Restore Pointers msg */
2198#define CT_SENDSTATUS	0x80000000	/* bit 31, Send SCSI status byte */
2199
2200/*
2201 * ct_status values
2202 * - set by the firmware when it returns the CTIO
2203 */
2204#define CT_OK		0x01	/* completed without error */
2205#define CT_ABORTED	0x02	/* aborted by host */
2206#define CT_ERR		0x04	/* see sense data for error */
2207#define CT_INVAL	0x06	/* request for disabled lun */
2208#define CT_NOPATH	0x07	/* invalid ITL nexus */
2209#define	CT_INVRXID	0x08	/* (FC only) Invalid RX_ID */
2210#define	CT_DATA_OVER	0x09	/* (FC only) Data Overrun */
2211#define CT_RSELTMO	0x0A	/* reselection timeout after 2 tries */
2212#define CT_TIMEOUT	0x0B	/* timed out */
2213#define CT_RESET	0x0E	/* SCSI Bus Reset occurred */
2214#define	CT_PARITY	0x0F	/* Uncorrectable Parity Error */
2215#define	CT_BUS_ERROR	0x10	/* (FC Only) DMA PCI Error */
2216#define	CT_PANIC	0x13	/* Unrecoverable Error */
2217#define CT_PHASE_ERROR	0x14	/* Bus phase sequence error */
2218#define	CT_DATA_UNDER	0x15	/* (FC only) Data Underrun */
2219#define CT_BDR_MSG	0x17	/* Bus Device Reset msg received */
2220#define CT_TERMINATED	0x19	/* due to Terminate Transfer mbox cmd */
2221#define	CT_PORTUNAVAIL	0x28	/* port not available */
2222#define	CT_LOGOUT	0x29	/* port logout */
2223#define	CT_PORTCHANGED	0x2A	/* port changed */
2224#define	CT_IDE		0x33	/* Initiator Detected Error */
2225#define CT_NOACK	0x35	/* Outstanding Immed. Notify. entry */
2226#define	CT_SRR		0x45	/* SRR Received */
2227#define	CT_LUN_RESET	0x48	/* Lun Reset Received */
2228
2229#define	CT_HBA_RESET	0xffff	/* pseudo error - command destroyed by HBA reset*/
2230
2231/*
2232 * When the firmware returns a CTIO entry, it may overwrite the last
2233 * part of the structure with sense data. This starts at offset 0x2E
2234 * into the entry, which is in the middle of ct_dataseg[1]. Rather
2235 * than define a new struct for this, I'm just using the sense data
2236 * offset.
2237 */
2238#define CTIO_SENSE_OFFSET	0x2E
2239
2240/*
2241 * Entry length in u_longs. All entries are the same size so
2242 * any one will do as the numerator.
2243 */
2244#define UINT32_ENTRY_SIZE	(sizeof(at_entry_t)/sizeof(uint32_t))
2245
2246/*
2247 * QLA2100 CTIO (type 2) entry
2248 */
2249#define	MAXRESPLEN	26
2250typedef struct {
2251	isphdr_t	ct_header;
2252	uint32_t	ct_syshandle;
2253	uint8_t		ct_lun;		/* lun */
2254	uint8_t		ct_iid;		/* initiator id */
2255	uint16_t	ct_rxid;	/* response ID */
2256	uint16_t	ct_flags;
2257	uint16_t 	ct_status;	/* isp status */
2258	uint16_t	ct_timeout;
2259	uint16_t	ct_seg_count;
2260	uint32_t	ct_reloff;	/* relative offset */
2261	int32_t		ct_resid;	/* residual length */
2262	union {
2263		/*
2264		 * The three different modes that the target driver
2265		 * can set the CTIO{2,3,4} up as.
2266		 *
2267		 * The first is for sending FCP_DATA_IUs as well as
2268		 * (optionally) sending a terminal SCSI status FCP_RSP_IU.
2269		 *
2270		 * The second is for sending SCSI sense data in an FCP_RSP_IU.
2271		 * Note that no FCP_DATA_IUs will be sent.
2272		 *
2273		 * The third is for sending FCP_RSP_IUs as built specifically
2274		 * in system memory as located by the isp_dataseg.
2275		 */
2276		struct {
2277			uint32_t _reserved;
2278			uint16_t _reserved2;
2279			uint16_t ct_scsi_status;
2280			uint32_t ct_xfrlen;
2281			union {
2282				ispds_t ct_dataseg[ISP_RQDSEG_T2];
2283				ispds64_t ct_dataseg64[ISP_RQDSEG_T3];
2284				ispdslist_t ct_dslist;
2285			} u;
2286		} m0;
2287		struct {
2288			uint16_t _reserved;
2289			uint16_t _reserved2;
2290			uint16_t ct_senselen;
2291			uint16_t ct_scsi_status;
2292			uint16_t ct_resplen;
2293			uint8_t  ct_resp[MAXRESPLEN];
2294		} m1;
2295		struct {
2296			uint32_t _reserved;
2297			uint16_t _reserved2;
2298			uint16_t _reserved3;
2299			uint32_t ct_datalen;
2300			ispds_t ct_fcp_rsp_iudata;
2301		} m2;
2302	} rsp;
2303} ct2_entry_t;
2304
2305typedef struct {
2306	isphdr_t	ct_header;
2307	uint32_t	ct_syshandle;
2308	uint16_t	ct_iid;		/* initiator id */
2309	uint16_t	ct_rxid;	/* response ID */
2310	uint16_t	ct_flags;
2311	uint16_t 	ct_status;	/* isp status */
2312	uint16_t	ct_timeout;
2313	uint16_t	ct_seg_count;
2314	uint32_t	ct_reloff;	/* relative offset */
2315	int32_t		ct_resid;	/* residual length */
2316	union {
2317		struct {
2318			uint32_t _reserved;
2319			uint16_t _reserved2;
2320			uint16_t ct_scsi_status;
2321			uint32_t ct_xfrlen;
2322			union {
2323				ispds_t ct_dataseg[ISP_RQDSEG_T2];
2324				ispds64_t ct_dataseg64[ISP_RQDSEG_T3];
2325				ispdslist_t ct_dslist;
2326			} u;
2327		} m0;
2328		struct {
2329			uint16_t _reserved;
2330			uint16_t _reserved2;
2331			uint16_t ct_senselen;
2332			uint16_t ct_scsi_status;
2333			uint16_t ct_resplen;
2334			uint8_t  ct_resp[MAXRESPLEN];
2335		} m1;
2336		struct {
2337			uint32_t _reserved;
2338			uint16_t _reserved2;
2339			uint16_t _reserved3;
2340			uint32_t ct_datalen;
2341			ispds_t ct_fcp_rsp_iudata;
2342		} m2;
2343	} rsp;
2344} ct2e_entry_t;
2345
2346/*
2347 * ct_flags values for CTIO2
2348 */
2349#define	CT2_FLAG_MODE0	0x0000
2350#define	CT2_FLAG_MODE1	0x0001
2351#define	CT2_FLAG_MODE2	0x0002
2352#define		CT2_FLAG_MMASK	0x0003
2353#define CT2_DATA_IN	0x0040
2354#define CT2_DATA_OUT	0x0080
2355#define CT2_NO_DATA	0x00C0
2356#define 	CT2_DATAMASK	0x00C0
2357#define	CT2_CCINCR	0x0100
2358#define	CT2_FASTPOST	0x0200
2359#define	CT2_CONFIRM	0x2000
2360#define	CT2_TERMINATE	0x4000
2361#define CT2_SENDSTATUS	0x8000
2362
2363/*
2364 * ct_status values are (mostly) the same as that for ct_entry.
2365 */
2366
2367/*
2368 * ct_scsi_status values- the low 8 bits are the normal SCSI status
2369 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU
2370 * fields.
2371 */
2372#define	CT2_RSPLEN_VALID	0x0100
2373#define	CT2_SNSLEN_VALID	0x0200
2374#define	CT2_DATA_OVER		0x0400
2375#define	CT2_DATA_UNDER		0x0800
2376
2377/*
2378 * ISP24XX CTIO
2379 */
2380#define	MAXRESPLEN_24XX	24
2381typedef struct {
2382	isphdr_t	ct_header;
2383	uint32_t	ct_syshandle;
2384	uint16_t	ct_nphdl;	/* status on returned CTIOs */
2385	uint16_t	ct_timeout;
2386	uint16_t	ct_seg_count;
2387	uint8_t		ct_vpidx;
2388	uint8_t		ct_xflags;
2389	uint16_t	ct_iid_lo;	/* low 16 bits of portid */
2390	uint8_t		ct_iid_hi;	/* hi 8 bits of portid */
2391	uint8_t		ct_reserved;
2392	uint32_t	ct_rxid;
2393	uint16_t	ct_senselen;	/* mode 1 only */
2394	uint16_t	ct_flags;
2395	int32_t		ct_resid;	/* residual length */
2396	uint16_t	ct_oxid;
2397	uint16_t	ct_scsi_status;	/* modes 0 && 1 only */
2398	union {
2399		struct {
2400			uint32_t	reloff;
2401			uint32_t	reserved0;
2402			uint32_t	ct_xfrlen;
2403			uint32_t	reserved1;
2404			ispds64_t	ds;
2405		} m0;
2406		struct {
2407			uint16_t ct_resplen;
2408			uint16_t reserved;
2409			uint8_t  ct_resp[MAXRESPLEN_24XX];
2410		} m1;
2411		struct {
2412			uint32_t reserved0;
2413			uint32_t ct_datalen;
2414			uint32_t reserved1;
2415			ispds64_t ct_fcp_rsp_iudata;
2416		} m2;
2417	} rsp;
2418} ct7_entry_t;
2419
2420/*
2421 * ct_flags values for CTIO7
2422 */
2423#define CT7_DATA_IN	0x0002
2424#define CT7_DATA_OUT	0x0001
2425#define CT7_NO_DATA	0x0000
2426#define 	CT7_DATAMASK	0x003
2427#define	CT7_DSD_ENABLE	0x0004
2428#define	CT7_CONF_STSFD	0x0010
2429#define	CT7_EXPLCT_CONF	0x0020
2430#define	CT7_FLAG_MODE0	0x0000
2431#define	CT7_FLAG_MODE1	0x0040
2432#define	CT7_FLAG_MODE2	0x0080
2433#define		CT7_FLAG_MMASK	0x00C0
2434#define	CT7_NOACK	0x0100
2435#define	CT7_TASK_ATTR_SHIFT	9
2436#define	CT7_CONFIRM	0x2000
2437#define	CT7_TERMINATE	0x4000
2438#define CT7_SENDSTATUS	0x8000
2439
2440/*
2441 * Type 7 CTIO status codes
2442 */
2443#define CT7_OK		0x01	/* completed without error */
2444#define CT7_ABORTED	0x02	/* aborted by host */
2445#define CT7_ERR		0x04	/* see sense data for error */
2446#define CT7_INVAL	0x06	/* request for disabled lun */
2447#define	CT7_INVRXID	0x08	/* Invalid RX_ID */
2448#define	CT7_DATA_OVER	0x09	/* Data Overrun */
2449#define CT7_TIMEOUT	0x0B	/* timed out */
2450#define CT7_RESET	0x0E	/* LIP Rset Received */
2451#define	CT7_BUS_ERROR	0x10	/* DMA PCI Error */
2452#define	CT7_REASSY_ERR	0x11	/* DMA reassembly error */
2453#define	CT7_DATA_UNDER	0x15	/* Data Underrun */
2454#define	CT7_PORTUNAVAIL	0x28	/* port not available */
2455#define	CT7_LOGOUT	0x29	/* port logout */
2456#define	CT7_PORTCHANGED	0x2A	/* port changed */
2457#define	CT7_SRR		0x45	/* SRR Received */
2458
2459/*
2460 * Other 24XX related target IOCBs
2461 */
2462
2463/*
2464 * ABTS Received
2465 */
2466typedef struct {
2467	isphdr_t	abts_header;
2468	uint8_t		abts_reserved0[6];
2469	uint16_t	abts_nphdl;
2470	uint16_t	abts_reserved1;
2471	uint16_t	abts_sof;
2472	uint32_t	abts_rxid_abts;
2473	uint16_t	abts_did_lo;
2474	uint8_t		abts_did_hi;
2475	uint8_t		abts_r_ctl;
2476	uint16_t	abts_sid_lo;
2477	uint8_t		abts_sid_hi;
2478	uint8_t		abts_cs_ctl;
2479	uint16_t	abts_fs_ctl;
2480	uint8_t		abts_f_ctl;
2481	uint8_t		abts_type;
2482	uint16_t	abts_seq_cnt;
2483	uint8_t		abts_df_ctl;
2484	uint8_t		abts_seq_id;
2485	uint16_t	abts_rx_id;
2486	uint16_t	abts_ox_id;
2487	uint32_t	abts_param;
2488	uint8_t		abts_reserved2[16];
2489	uint32_t	abts_rxid_task;
2490} abts_t;
2491
2492typedef struct {
2493	isphdr_t	abts_rsp_header;
2494	uint32_t	abts_rsp_handle;
2495	uint16_t	abts_rsp_status;
2496	uint16_t	abts_rsp_nphdl;
2497	uint16_t	abts_rsp_ctl_flags;
2498	uint16_t	abts_rsp_sof;
2499	uint32_t	abts_rsp_rxid_abts;
2500	uint16_t	abts_rsp_did_lo;
2501	uint8_t		abts_rsp_did_hi;
2502	uint8_t		abts_rsp_r_ctl;
2503	uint16_t	abts_rsp_sid_lo;
2504	uint8_t		abts_rsp_sid_hi;
2505	uint8_t		abts_rsp_cs_ctl;
2506	uint16_t	abts_rsp_f_ctl_lo;
2507	uint8_t		abts_rsp_f_ctl_hi;
2508	uint8_t		abts_rsp_type;
2509	uint16_t	abts_rsp_seq_cnt;
2510	uint8_t		abts_rsp_df_ctl;
2511	uint8_t		abts_rsp_seq_id;
2512	uint16_t	abts_rsp_rx_id;
2513	uint16_t	abts_rsp_ox_id;
2514	uint32_t	abts_rsp_param;
2515	union {
2516		struct {
2517			uint16_t reserved;
2518			uint8_t	last_seq_id;
2519			uint8_t seq_id_valid;
2520			uint16_t aborted_rx_id;
2521			uint16_t aborted_ox_id;
2522			uint16_t high_seq_cnt;
2523			uint16_t low_seq_cnt;
2524			uint8_t reserved2[4];
2525		} ba_acc;
2526		struct {
2527			uint8_t vendor_unique;
2528			uint8_t	explanation;
2529			uint8_t reason;
2530			uint8_t reserved;
2531			uint8_t reserved2[12];
2532		} ba_rjt;
2533		struct {
2534			uint8_t reserved[8];
2535			uint32_t subcode1;
2536			uint32_t subcode2;
2537		} rsp;
2538		uint8_t reserved[16];
2539	} abts_rsp_payload;
2540	uint32_t	abts_rsp_rxid_task;
2541} abts_rsp_t;
2542
2543/* terminate this ABTS exchange */
2544#define	ISP24XX_ABTS_RSP_TERMINATE	0x01
2545
2546#define	ISP24XX_ABTS_RSP_COMPLETE	0x00
2547#define	ISP24XX_ABTS_RSP_RESET		0x04
2548#define	ISP24XX_ABTS_RSP_ABORTED	0x05
2549#define	ISP24XX_ABTS_RSP_TIMEOUT	0x06
2550#define	ISP24XX_ABTS_RSP_INVXID		0x08
2551#define	ISP24XX_ABTS_RSP_LOGOUT		0x29
2552#define	ISP24XX_ABTS_RSP_SUBCODE	0x31
2553
2554#define	ISP24XX_NO_TASK			0xffffffff
2555
2556/*
2557 * Miscellaneous
2558 *
2559 * These are the limits of the number of dma segments we
2560 * can deal with based not on the size of the segment counter
2561 * (which is 16 bits), but on the size of the number of
2562 * queue entries field (which is 8 bits). We assume no
2563 * segments in the first queue entry, so we can either
2564 * have 7 dma segments per continuation entry or 5
2565 * (for 64 bit dma).. multiplying out by 254....
2566 */
2567#define	ISP_NSEG_MAX	1778
2568#define	ISP_NSEG64_MAX	1270
2569
2570#endif	/* _ISPMBOX_H */
2571