ispmbox.h revision 165308
1/* $FreeBSD: head/sys/dev/isp/ispmbox.h 165308 2006-12-17 16:59:19Z mjacob $ */ 2/*- 3 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 4 * 5 * Copyright (c) 1997-2006 by Matthew Jacob 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 */ 30#ifndef _ISPMBOX_H 31#define _ISPMBOX_H 32 33/* 34 * Mailbox Command Opcodes 35 */ 36#define MBOX_NO_OP 0x0000 37#define MBOX_LOAD_RAM 0x0001 38#define MBOX_EXEC_FIRMWARE 0x0002 39#define MBOX_DUMP_RAM 0x0003 40#define MBOX_WRITE_RAM_WORD 0x0004 41#define MBOX_READ_RAM_WORD 0x0005 42#define MBOX_MAILBOX_REG_TEST 0x0006 43#define MBOX_VERIFY_CHECKSUM 0x0007 44#define MBOX_ABOUT_FIRMWARE 0x0008 45#define MBOX_LOAD_RISC_RAM_2100 0x0009 46 /* a */ 47#define MBOX_LOAD_RISC_RAM 0x000b 48 /* c */ 49#define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d 50#define MBOX_CHECK_FIRMWARE 0x000e 51#define MBOX_READ_RAM_WORD_EXTENDED 0x000f 52#define MBOX_INIT_REQ_QUEUE 0x0010 53#define MBOX_INIT_RES_QUEUE 0x0011 54#define MBOX_EXECUTE_IOCB 0x0012 55#define MBOX_WAKE_UP 0x0013 56#define MBOX_STOP_FIRMWARE 0x0014 57#define MBOX_ABORT 0x0015 58#define MBOX_ABORT_DEVICE 0x0016 59#define MBOX_ABORT_TARGET 0x0017 60#define MBOX_BUS_RESET 0x0018 61#define MBOX_STOP_QUEUE 0x0019 62#define MBOX_START_QUEUE 0x001a 63#define MBOX_SINGLE_STEP_QUEUE 0x001b 64#define MBOX_ABORT_QUEUE 0x001c 65#define MBOX_GET_DEV_QUEUE_STATUS 0x001d 66 /* 1e */ 67#define MBOX_GET_FIRMWARE_STATUS 0x001f 68#define MBOX_GET_INIT_SCSI_ID 0x0020 69#define MBOX_GET_SELECT_TIMEOUT 0x0021 70#define MBOX_GET_RETRY_COUNT 0x0022 71#define MBOX_GET_TAG_AGE_LIMIT 0x0023 72#define MBOX_GET_CLOCK_RATE 0x0024 73#define MBOX_GET_ACT_NEG_STATE 0x0025 74#define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 75#define MBOX_GET_SBUS_PARAMS 0x0027 76#define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 77#define MBOX_GET_TARGET_PARAMS 0x0028 78#define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 79#define MBOX_GET_RESET_DELAY_PARAMS 0x002a 80 /* 2b */ 81 /* 2c */ 82 /* 2d */ 83 /* 2e */ 84 /* 2f */ 85#define MBOX_SET_INIT_SCSI_ID 0x0030 86#define MBOX_SET_SELECT_TIMEOUT 0x0031 87#define MBOX_SET_RETRY_COUNT 0x0032 88#define MBOX_SET_TAG_AGE_LIMIT 0x0033 89#define MBOX_SET_CLOCK_RATE 0x0034 90#define MBOX_SET_ACT_NEG_STATE 0x0035 91#define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 92#define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 93#define MBOX_SET_PCI_PARAMETERS 0x0037 94#define MBOX_SET_TARGET_PARAMS 0x0038 95#define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 96#define MBOX_SET_RESET_DELAY_PARAMS 0x003a 97 /* 3b */ 98 /* 3c */ 99 /* 3d */ 100 /* 3e */ 101 /* 3f */ 102#define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 103#define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 104#define MBOX_EXEC_BIOS_IOCB 0x0042 105#define MBOX_SET_FW_FEATURES 0x004a 106#define MBOX_GET_FW_FEATURES 0x004b 107#define FW_FEATURE_FAST_POST 0x1 108#define FW_FEATURE_LVD_NOTIFY 0x2 109#define FW_FEATURE_RIO_32BIT 0x4 110#define FW_FEATURE_RIO_16BIT 0x8 111 112#define MBOX_INIT_REQ_QUEUE_A64 0x0052 113#define MBOX_INIT_RES_QUEUE_A64 0x0053 114 115#define MBOX_ENABLE_TARGET_MODE 0x0055 116#define ENABLE_TARGET_FLAG 0x8000 117#define ENABLE_TQING_FLAG 0x0004 118#define ENABLE_MANDATORY_DISC 0x0002 119#define MBOX_GET_TARGET_STATUS 0x0056 120 121/* These are for the ISP2X00 FC cards */ 122#define MBOX_GET_LOOP_ID 0x0020 123#define MBOX_GET_FIRMWARE_OPTIONS 0x0028 124#define MBOX_SET_FIRMWARE_OPTIONS 0x0038 125#define MBOX_GET_RESOURCE_COUNT 0x0042 126#define MBOX_REQUEST_OFFLINE_MODE 0x0043 127#define MBOX_ENHANCED_GET_PDB 0x0047 128#define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 129#define MBOX_INIT_FIRMWARE 0x0060 130#define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 131#define MBOX_INIT_LIP 0x0062 132#define MBOX_GET_FC_AL_POSITION_MAP 0x0063 133#define MBOX_GET_PORT_DB 0x0064 134#define MBOX_CLEAR_ACA 0x0065 135#define MBOX_TARGET_RESET 0x0066 136#define MBOX_CLEAR_TASK_SET 0x0067 137#define MBOX_ABORT_TASK_SET 0x0068 138#define MBOX_GET_FW_STATE 0x0069 139#define MBOX_GET_PORT_NAME 0x006A 140#define MBOX_GET_LINK_STATUS 0x006B 141#define MBOX_INIT_LIP_RESET 0x006C 142#define MBOX_SEND_SNS 0x006E 143#define MBOX_FABRIC_LOGIN 0x006F 144#define MBOX_SEND_CHANGE_REQUEST 0x0070 145#define MBOX_FABRIC_LOGOUT 0x0071 146#define MBOX_INIT_LIP_LOGIN 0x0072 147#define MBOX_LUN_RESET 0x007E 148 149#define MBOX_DRIVER_HEARTBEAT 0x005B 150#define MBOX_FW_HEARTBEAT 0x005C 151 152#define MBOX_GET_SET_DATA_RATE 0x005D /* 24XX/23XX only */ 153#define MBGSD_GET_RATE 0 154#define MBGSD_SET_RATE 1 155#define MBGSD_SET_RATE_NOW 2 /* 24XX only */ 156#define MBGSD_ONEGB 0 157#define MBGSD_TWOGB 1 158#define MBGSD_AUTO 2 159#define MBGSD_FOURGB 3 /* 24XX only */ 160 161 162#define ISP2100_SET_PCI_PARAM 0x00ff 163 164#define MBOX_BUSY 0x04 165 166/* 167 * Mailbox Command Complete Status Codes 168 */ 169#define MBOX_COMMAND_COMPLETE 0x4000 170#define MBOX_INVALID_COMMAND 0x4001 171#define MBOX_HOST_INTERFACE_ERROR 0x4002 172#define MBOX_TEST_FAILED 0x4003 173#define MBOX_COMMAND_ERROR 0x4005 174#define MBOX_COMMAND_PARAM_ERROR 0x4006 175#define MBOX_PORT_ID_USED 0x4007 176#define MBOX_LOOP_ID_USED 0x4008 177#define MBOX_ALL_IDS_USED 0x4009 178#define MBOX_NOT_LOGGED_IN 0x400A 179/* pseudo mailbox completion codes */ 180#define MBOX_REGS_BUSY 0x6000 /* registers in use */ 181#define MBOX_TIMEOUT 0x6001 /* command timed out */ 182 183#define MBLOGALL 0x000f 184#define MBLOGNONE 0x0000 185#define MBLOGMASK(x) ((x) & 0xf) 186 187/* 188 * Asynchronous event status codes 189 */ 190#define ASYNC_BUS_RESET 0x8001 191#define ASYNC_SYSTEM_ERROR 0x8002 192#define ASYNC_RQS_XFER_ERR 0x8003 193#define ASYNC_RSP_XFER_ERR 0x8004 194#define ASYNC_QWAKEUP 0x8005 195#define ASYNC_TIMEOUT_RESET 0x8006 196#define ASYNC_DEVICE_RESET 0x8007 197#define ASYNC_EXTMSG_UNDERRUN 0x800A 198#define ASYNC_SCAM_INT 0x800B 199#define ASYNC_HUNG_SCSI 0x800C 200#define ASYNC_KILLED_BUS 0x800D 201#define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 202#define ASYNC_LIP_OCCURRED 0x8010 203#define ASYNC_LOOP_UP 0x8011 204#define ASYNC_LOOP_DOWN 0x8012 205#define ASYNC_LOOP_RESET 0x8013 206#define ASYNC_PDB_CHANGED 0x8014 207#define ASYNC_CHANGE_NOTIFY 0x8015 208#define ASYNC_LIP_F8 0x8016 209#define ASYNC_LIP_ERROR 0x8017 210#define ASYNC_SECURITY_UPDATE 0x801B 211#define ASYNC_CMD_CMPLT 0x8020 212#define ASYNC_CTIO_DONE 0x8021 213#define ASYNC_IP_XMIT_DONE 0x8022 214#define ASYNC_IP_RECV_DONE 0x8023 215#define ASYNC_IP_BROADCAST 0x8024 216#define ASYNC_IP_RCVQ_LOW 0x8025 217#define ASYNC_IP_RCVQ_EMPTY 0x8026 218#define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 219#define ASYNC_PTPMODE 0x8030 220#define ASYNC_RIO1 0x8031 221#define ASYNC_RIO2 0x8032 222#define ASYNC_RIO3 0x8033 223#define ASYNC_RIO4 0x8034 224#define ASYNC_RIO5 0x8035 225#define ASYNC_CONNMODE 0x8036 226#define ISP_CONN_LOOP 1 227#define ISP_CONN_PTP 2 228#define ISP_CONN_BADLIP 3 229#define ISP_CONN_FATAL 4 230#define ISP_CONN_LOOPBACK 5 231#define ASYNC_RIO_RESP 0x8040 232#define ASYNC_RIO_COMP 0x8042 233#define ASYNC_RCV_ERR 0x8048 234 235/* 236 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 237 * mailbox command to enable this. 238 */ 239#define ASYNC_QFULL_SENT 0x8049 240 241/* 242 * 24XX only 243 */ 244#define ASYNC_RJT_SENT 0x8049 245 246/* 247 * All IOCB Queue entries are this size 248 */ 249#define QENTRY_LEN 64 250 251/* 252 * Command Structure Definitions 253 */ 254 255typedef struct { 256 uint32_t ds_base; 257 uint32_t ds_count; 258} ispds_t; 259 260typedef struct { 261 uint32_t ds_base; 262 uint32_t ds_basehi; 263 uint32_t ds_count; 264} ispds64_t; 265 266#define DSTYPE_32BIT 0 267#define DSTYPE_64BIT 1 268typedef struct { 269 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 270 uint32_t ds_segment; /* unused */ 271 uint32_t ds_base; /* 32 bit address of DSD list */ 272} ispdslist_t; 273 274 275/* 276 * These elements get swizzled around for SBus instances. 277 */ 278#define ISP_SWAP8(a, b) { \ 279 uint8_t tmp; \ 280 tmp = a; \ 281 a = b; \ 282 b = tmp; \ 283} 284typedef struct { 285 uint8_t rqs_entry_type; 286 uint8_t rqs_entry_count; 287 uint8_t rqs_seqno; 288 uint8_t rqs_flags; 289} isphdr_t; 290 291/* RQS Flag definitions */ 292#define RQSFLAG_CONTINUATION 0x01 293#define RQSFLAG_FULL 0x02 294#define RQSFLAG_BADHEADER 0x04 295#define RQSFLAG_BADPACKET 0x08 296#define RQSFLAG_MASK 0x0f 297 298/* RQS entry_type definitions */ 299#define RQSTYPE_REQUEST 0x01 300#define RQSTYPE_DATASEG 0x02 301#define RQSTYPE_RESPONSE 0x03 302#define RQSTYPE_MARKER 0x04 303#define RQSTYPE_CMDONLY 0x05 304#define RQSTYPE_ATIO 0x06 /* Target Mode */ 305#define RQSTYPE_CTIO 0x07 /* Target Mode */ 306#define RQSTYPE_SCAM 0x08 307#define RQSTYPE_A64 0x09 308#define RQSTYPE_A64_CONT 0x0a 309#define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 310#define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 311#define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 312#define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 313#define RQSTYPE_CTIO1 0x0f /* Target Mode */ 314#define RQSTYPE_STATUS_CONT 0x10 315#define RQSTYPE_T2RQS 0x11 316#define RQSTYPE_CTIO7 0x12 317#define RQSTYPE_IP_XMIT 0x13 318#define RQSTYPE_TSK_MGMT 0x14 319#define RQSTYPE_T4RQS 0x15 320#define RQSTYPE_ATIO2 0x16 /* Target Mode */ 321#define RQSTYPE_CTIO2 0x17 /* Target Mode */ 322#define RQSTYPE_T7RQS 0x18 323#define RQSTYPE_T3RQS 0x19 324#define RQSTYPE_IP_XMIT_64 0x1b 325#define RQSTYPE_CTIO4 0x1e /* Target Mode */ 326#define RQSTYPE_CTIO3 0x1f /* Target Mode */ 327#define RQSTYPE_RIO1 0x21 328#define RQSTYPE_RIO2 0x22 329#define RQSTYPE_IP_RECV 0x23 330#define RQSTYPE_IP_RECV_CONT 0x24 331#define RQSTYPE_CT_PASSTHRU 0x29 332#define RQSTYPE_MS_PASSTHRU 0x29 333#define RQSTYPE_ABORT_IO 0x33 334#define RQSTYPE_T6RQS 0x48 335#define RQSTYPE_LOGIN 0x52 336#define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */ 337#define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */ 338 339 340#define ISP_RQDSEG 4 341typedef struct { 342 isphdr_t req_header; 343 uint32_t req_handle; 344 uint8_t req_lun_trn; 345 uint8_t req_target; 346 uint16_t req_cdblen; 347 uint16_t req_flags; 348 uint16_t req_reserved; 349 uint16_t req_time; 350 uint16_t req_seg_count; 351 uint8_t req_cdb[12]; 352 ispds_t req_dataseg[ISP_RQDSEG]; 353} ispreq_t; 354#define ISP_RQDSEG_A64 2 355 356typedef struct { 357 isphdr_t mrk_header; 358 uint32_t mrk_handle; 359 uint8_t mrk_reserved0; 360 uint8_t mrk_target; 361 uint16_t mrk_modifier; 362 uint16_t mrk_flags; 363 uint16_t mrk_lun; 364 uint8_t mrk_reserved1[48]; 365} isp_marker_t; 366 367typedef struct { 368 isphdr_t mrk_header; 369 uint32_t mrk_handle; 370 uint16_t mrk_nphdl; 371 uint8_t mrk_modifier; 372 uint8_t mrk_reserved0; 373 uint8_t mrk_reserved1; 374 uint8_t mrk_vphdl; 375 uint16_t mrk_reserved2; 376 uint8_t mrk_lun[8]; 377 uint8_t mrk_reserved3[40]; 378} isp_marker_24xx_t; 379 380 381#define SYNC_DEVICE 0 382#define SYNC_TARGET 1 383#define SYNC_ALL 2 384#define SYNC_LIP 3 385 386#define ISP_RQDSEG_T2 3 387typedef struct { 388 isphdr_t req_header; 389 uint32_t req_handle; 390 uint8_t req_lun_trn; 391 uint8_t req_target; 392 uint16_t req_scclun; 393 uint16_t req_flags; 394 uint16_t req_reserved; 395 uint16_t req_time; 396 uint16_t req_seg_count; 397 uint8_t req_cdb[16]; 398 uint32_t req_totalcnt; 399 ispds_t req_dataseg[ISP_RQDSEG_T2]; 400} ispreqt2_t; 401 402typedef struct { 403 isphdr_t req_header; 404 uint32_t req_handle; 405 uint16_t req_target; 406 uint16_t req_scclun; 407 uint16_t req_flags; 408 uint16_t req_reserved; 409 uint16_t req_time; 410 uint16_t req_seg_count; 411 uint8_t req_cdb[16]; 412 uint32_t req_totalcnt; 413 ispds_t req_dataseg[ISP_RQDSEG_T2]; 414} ispreqt2e_t; 415 416#define ISP_RQDSEG_T3 2 417typedef struct { 418 isphdr_t req_header; 419 uint32_t req_handle; 420 uint8_t req_lun_trn; 421 uint8_t req_target; 422 uint16_t req_scclun; 423 uint16_t req_flags; 424 uint16_t req_reserved; 425 uint16_t req_time; 426 uint16_t req_seg_count; 427 uint8_t req_cdb[16]; 428 uint32_t req_totalcnt; 429 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 430} ispreqt3_t; 431#define ispreq64_t ispreqt3_t /* same as.... */ 432 433typedef struct { 434 isphdr_t req_header; 435 uint32_t req_handle; 436 uint16_t req_target; 437 uint16_t req_scclun; 438 uint16_t req_flags; 439 uint16_t req_reserved; 440 uint16_t req_time; 441 uint16_t req_seg_count; 442 uint8_t req_cdb[16]; 443 uint32_t req_totalcnt; 444 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 445} ispreqt3e_t; 446 447/* req_flag values */ 448#define REQFLAG_NODISCON 0x0001 449#define REQFLAG_HTAG 0x0002 450#define REQFLAG_OTAG 0x0004 451#define REQFLAG_STAG 0x0008 452#define REQFLAG_TARGET_RTN 0x0010 453 454#define REQFLAG_NODATA 0x0000 455#define REQFLAG_DATA_IN 0x0020 456#define REQFLAG_DATA_OUT 0x0040 457#define REQFLAG_DATA_UNKNOWN 0x0060 458 459#define REQFLAG_DISARQ 0x0100 460#define REQFLAG_FRC_ASYNC 0x0200 461#define REQFLAG_FRC_SYNC 0x0400 462#define REQFLAG_FRC_WIDE 0x0800 463#define REQFLAG_NOPARITY 0x1000 464#define REQFLAG_STOPQ 0x2000 465#define REQFLAG_XTRASNS 0x4000 466#define REQFLAG_PRIORITY 0x8000 467 468typedef struct { 469 isphdr_t req_header; 470 uint32_t req_handle; 471 uint8_t req_lun_trn; 472 uint8_t req_target; 473 uint16_t req_cdblen; 474 uint16_t req_flags; 475 uint16_t req_reserved; 476 uint16_t req_time; 477 uint16_t req_seg_count; 478 uint8_t req_cdb[44]; 479} ispextreq_t; 480 481/* 24XX only */ 482typedef struct { 483 uint16_t fcd_length; 484 uint16_t fcd_a1500; 485 uint16_t fcd_a3116; 486 uint16_t fcd_a4732; 487 uint16_t fcd_a6348; 488} fcp_cmnd_ds_t; 489 490typedef struct { 491 isphdr_t req_header; 492 uint32_t req_handle; 493 uint16_t req_nphdl; 494 uint16_t req_time; 495 uint16_t req_seg_count; 496 uint16_t req_fc_rsp_dsd_length; 497 uint8_t req_lun[8]; 498 uint16_t req_flags; 499 uint16_t req_fc_cmnd_dsd_length; 500 uint16_t req_fc_cmnd_dsd_a1500; 501 uint16_t req_fc_cmnd_dsd_a3116; 502 uint16_t req_fc_cmnd_dsd_a4732; 503 uint16_t req_fc_cmnd_dsd_a6348; 504 uint16_t req_fc_rsp_dsd_a1500; 505 uint16_t req_fc_rsp_dsd_a3116; 506 uint16_t req_fc_rsp_dsd_a4732; 507 uint16_t req_fc_rsp_dsd_a6348; 508 uint32_t req_totalcnt; 509 uint16_t req_tidlo; 510 uint8_t req_tidhi; 511 uint8_t req_vpidx; 512 ispds64_t req_dataseg; 513} ispreqt6_t; 514 515typedef struct { 516 isphdr_t req_header; 517 uint32_t req_handle; 518 uint16_t req_nphdl; 519 uint16_t req_time; 520 uint16_t req_seg_count; 521 uint16_t req_reserved; 522 uint8_t req_lun[8]; 523 uint8_t req_alen_datadir; 524 uint8_t req_task_management; 525 uint8_t req_task_attribute; 526 uint8_t req_crn; 527 uint8_t req_cdb[16]; 528 uint32_t req_dl; 529 uint16_t req_tidlo; 530 uint8_t req_tidhi; 531 uint8_t req_vpidx; 532 ispds64_t req_dataseg; 533} ispreqt7_t; 534 535/* I/O Abort Structure */ 536typedef struct { 537 isphdr_t abrt_header; 538 uint32_t abrt_handle; 539 uint16_t abrt_nphdl; 540 uint16_t abrt_options; 541 uint32_t abrt_cmd_handle; 542 uint8_t abrt_reserved[32]; 543 uint16_t abrt_tidlo; 544 uint8_t abrt_tidhi; 545 uint8_t abrt_vpidx; 546 uint8_t abrt_reserved1[12]; 547} isp24xx_abrt_t; 548#define ISP24XX_ABRT_NO_ABTS 0x01 /* don't actually send an ABTS */ 549#define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */ 550 551#define ISP_CDSEG 7 552typedef struct { 553 isphdr_t req_header; 554 uint32_t req_reserved; 555 ispds_t req_dataseg[ISP_CDSEG]; 556} ispcontreq_t; 557 558#define ISP_CDSEG64 5 559typedef struct { 560 isphdr_t req_header; 561 ispds64_t req_dataseg[ISP_CDSEG64]; 562} ispcontreq64_t; 563 564typedef struct { 565 isphdr_t req_header; 566 uint32_t req_handle; 567 uint16_t req_scsi_status; 568 uint16_t req_completion_status; 569 uint16_t req_state_flags; 570 uint16_t req_status_flags; 571 uint16_t req_time; 572#define req_response_len req_time /* FC only */ 573 uint16_t req_sense_len; 574 uint32_t req_resid; 575 uint8_t req_response[8]; /* FC only */ 576 uint8_t req_sense_data[32]; 577} ispstatusreq_t; 578 579/* 580 * Status Continuation 581 */ 582typedef struct { 583 isphdr_t req_header; 584 uint8_t req_sense_data[60]; 585} ispstatus_cont_t; 586 587/* 588 * 24XX Type 0 status 589 */ 590typedef struct { 591 isphdr_t req_header; 592 uint32_t req_handle; 593 uint16_t req_completion_status; 594 uint16_t req_oxid; 595 uint32_t req_resid; 596 uint16_t req_reserved0; 597 uint16_t req_state_flags; 598 uint16_t req_reserved1; 599 uint16_t req_scsi_status; 600 uint32_t req_fcp_residual; 601 uint32_t req_sense_len; 602 uint32_t req_response_len; 603 uint8_t req_rsp_sense[28]; 604} isp24xx_statusreq_t; 605 606/* 607 * For Qlogic 2X00, the high order byte of SCSI status has 608 * additional meaning. 609 */ 610#define RQCS_RU 0x800 /* Residual Under */ 611#define RQCS_RO 0x400 /* Residual Over */ 612#define RQCS_RESID (RQCS_RU|RQCS_RO) 613#define RQCS_SV 0x200 /* Sense Length Valid */ 614#define RQCS_RV 0x100 /* FCP Response Length Valid */ 615 616/* 617 * CT Passthru IOCB 618 */ 619typedef struct { 620 isphdr_t ctp_header; 621 uint32_t ctp_handle; 622 uint16_t ctp_status; 623 uint16_t ctp_nphdl; /* n-port handle */ 624 uint16_t ctp_cmd_cnt; /* Command DSD count */ 625 uint16_t ctp_vpidx; /* low 8 bits */ 626 uint16_t ctp_time; 627 uint16_t ctp_reserved0; 628 uint16_t ctp_rsp_cnt; /* Response DSD count */ 629 uint16_t ctp_reserved1[5]; 630 uint32_t ctp_rsp_bcnt; /* Response byte count */ 631 uint32_t ctp_cmd_bcnt; /* Command byte count */ 632 ispds64_t ctp_dataseg[2]; 633} isp_ct_pt_t; 634 635/* 636 * MS Passthru IOCB 637 */ 638typedef struct { 639 isphdr_t ms_header; 640 uint32_t ms_handle; 641 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */ 642 uint16_t ms_status; 643 uint16_t ms_flags; 644 uint16_t ms_reserved1; /* low 8 bits */ 645 uint16_t ms_time; 646 uint16_t ms_cmd_cnt; /* Command DSD count */; 647 uint16_t ms_tot_cnt; /* Total DSD Count */ 648 uint8_t ms_type; /* MS type */ 649 uint8_t ms_r_ctl; /* R_CTL */ 650 uint16_t ms_rxid; /* RX_ID */ 651 uint16_t ms_reserved2; 652 uint32_t ms_handle2; 653 uint32_t ms_rsp_bcnt; /* Response byte count */ 654 uint32_t ms_cmd_bcnt; /* Command byte count */ 655 ispds64_t ms_dataseg[2]; 656} isp_ms_t; 657 658/* 659 * Completion Status Codes. 660 */ 661#define RQCS_COMPLETE 0x0000 662#define RQCS_DMA_ERROR 0x0002 663#define RQCS_RESET_OCCURRED 0x0004 664#define RQCS_ABORTED 0x0005 665#define RQCS_TIMEOUT 0x0006 666#define RQCS_DATA_OVERRUN 0x0007 667#define RQCS_DATA_UNDERRUN 0x0015 668#define RQCS_QUEUE_FULL 0x001C 669 670/* 1X00 Only Completion Codes */ 671#define RQCS_INCOMPLETE 0x0001 672#define RQCS_TRANSPORT_ERROR 0x0003 673#define RQCS_COMMAND_OVERRUN 0x0008 674#define RQCS_STATUS_OVERRUN 0x0009 675#define RQCS_BAD_MESSAGE 0x000a 676#define RQCS_NO_MESSAGE_OUT 0x000b 677#define RQCS_EXT_ID_FAILED 0x000c 678#define RQCS_IDE_MSG_FAILED 0x000d 679#define RQCS_ABORT_MSG_FAILED 0x000e 680#define RQCS_REJECT_MSG_FAILED 0x000f 681#define RQCS_NOP_MSG_FAILED 0x0010 682#define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 683#define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 684#define RQCS_ID_MSG_FAILED 0x0013 685#define RQCS_UNEXP_BUS_FREE 0x0014 686#define RQCS_XACT_ERR1 0x0018 687#define RQCS_XACT_ERR2 0x0019 688#define RQCS_XACT_ERR3 0x001A 689#define RQCS_BAD_ENTRY 0x001B 690#define RQCS_PHASE_SKIPPED 0x001D 691#define RQCS_ARQS_FAILED 0x001E 692#define RQCS_WIDE_FAILED 0x001F 693#define RQCS_SYNCXFER_FAILED 0x0020 694#define RQCS_LVD_BUSERR 0x0021 695 696/* 2X00 Only Completion Codes */ 697#define RQCS_PORT_UNAVAILABLE 0x0028 698#define RQCS_PORT_LOGGED_OUT 0x0029 699#define RQCS_PORT_CHANGED 0x002A 700#define RQCS_PORT_BUSY 0x002B 701 702/* 24XX Only Completion Codes */ 703#define RQCS_24XX_DRE 0x0011 /* data reassembly error */ 704#define RQCS_24XX_TABORT 0x0013 /* aborted by target */ 705#define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */ 706#define RQCS_24XX_TMO 0x0030 /* task management overrun */ 707 708 709/* 710 * 1X00 specific State Flags 711 */ 712#define RQSF_GOT_BUS 0x0100 713#define RQSF_GOT_TARGET 0x0200 714#define RQSF_SENT_CDB 0x0400 715#define RQSF_XFRD_DATA 0x0800 716#define RQSF_GOT_STATUS 0x1000 717#define RQSF_GOT_SENSE 0x2000 718#define RQSF_XFER_COMPLETE 0x4000 719 720/* 721 * 2X00 specific State Flags 722 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 723 */ 724#define RQSF_DATA_IN 0x0020 725#define RQSF_DATA_OUT 0x0040 726#define RQSF_STAG 0x0008 727#define RQSF_OTAG 0x0004 728#define RQSF_HTAG 0x0002 729/* 730 * 1X00 Status Flags 731 */ 732#define RQSTF_DISCONNECT 0x0001 733#define RQSTF_SYNCHRONOUS 0x0002 734#define RQSTF_PARITY_ERROR 0x0004 735#define RQSTF_BUS_RESET 0x0008 736#define RQSTF_DEVICE_RESET 0x0010 737#define RQSTF_ABORTED 0x0020 738#define RQSTF_TIMEOUT 0x0040 739#define RQSTF_NEGOTIATION 0x0080 740 741/* 742 * 2X00 specific state flags 743 */ 744/* RQSF_SENT_CDB */ 745/* RQSF_XFRD_DATA */ 746/* RQSF_GOT_STATUS */ 747/* RQSF_XFER_COMPLETE */ 748 749/* 750 * 2X00 specific status flags 751 */ 752/* RQSTF_ABORTED */ 753/* RQSTF_TIMEOUT */ 754#define RQSTF_DMA_ERROR 0x0080 755#define RQSTF_LOGOUT 0x2000 756 757/* 758 * Miscellaneous 759 */ 760#ifndef ISP_EXEC_THROTTLE 761#define ISP_EXEC_THROTTLE 16 762#endif 763 764/* 765 * About Firmware returns an 'attribute' word in mailbox 6. 766 * These attributes are for 2200 and 2300. 767 */ 768#define ISP_FW_ATTR_TMODE 0x01 769#define ISP_FW_ATTR_SCCLUN 0x02 770#define ISP_FW_ATTR_FABRIC 0x04 771#define ISP_FW_ATTR_CLASS2 0x08 772#define ISP_FW_ATTR_FCTAPE 0x10 773#define ISP_FW_ATTR_IP 0x20 774#define ISP_FW_ATTR_VI 0x40 775#define ISP_FW_ATTR_VI_SOLARIS 0x80 776#define ISP_FW_ATTR_2KLOGINS 0x100 /* XXX: just a guess */ 777 778/* and these are for the 2400 */ 779#define ISP2400_FW_ATTR_CLASS2 (1 << 0) 780#define ISP2400_FW_ATTR_IP (1 << 1) 781#define ISP2400_FW_ATTR_MULTIID (1 << 2) 782#define ISP2400_FW_ATTR_SB2 (1 << 3) 783#define ISP2400_FW_ATTR_T10CRC (1 << 4) 784#define ISP2400_FW_ATTR_VI (1 << 5) 785#define ISP2400_FW_ATTR_EXPFW (1 << 13) 786 787/* 788 * Reduced Interrupt Operation Response Queue Entreis 789 */ 790 791typedef struct { 792 isphdr_t req_header; 793 uint32_t req_handles[15]; 794} isp_rio1_t; 795 796typedef struct { 797 isphdr_t req_header; 798 uint16_t req_handles[30]; 799} isp_rio2_t; 800 801/* 802 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures 803 */ 804 805/* 806 * Initialization Control Block 807 * 808 * Version One (prime) format. 809 */ 810typedef struct { 811 uint8_t icb_version; 812 uint8_t icb_reserved0; 813 uint16_t icb_fwoptions; 814 uint16_t icb_maxfrmlen; 815 uint16_t icb_maxalloc; 816 uint16_t icb_execthrottle; 817 uint8_t icb_retry_count; 818 uint8_t icb_retry_delay; 819 uint8_t icb_portname[8]; 820 uint16_t icb_hardaddr; 821 uint8_t icb_iqdevtype; 822 uint8_t icb_logintime; 823 uint8_t icb_nodename[8]; 824 uint16_t icb_rqstout; 825 uint16_t icb_rspnsin; 826 uint16_t icb_rqstqlen; 827 uint16_t icb_rsltqlen; 828 uint16_t icb_rqstaddr[4]; 829 uint16_t icb_respaddr[4]; 830 uint16_t icb_lunenables; 831 uint8_t icb_ccnt; 832 uint8_t icb_icnt; 833 uint16_t icb_lunetimeout; 834 uint16_t icb_reserved1; 835 uint16_t icb_xfwoptions; 836 uint8_t icb_racctimer; 837 uint8_t icb_idelaytimer; 838 uint16_t icb_zfwoptions; 839 uint16_t icb_reserved2[13]; 840} isp_icb_t; 841 842#define ICB_VERSION1 1 843 844#define ICBOPT_EXTENDED 0x8000 845#define ICBOPT_BOTH_WWNS 0x4000 846#define ICBOPT_FULL_LOGIN 0x2000 847#define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */ 848#define ICBOPT_PREVLOOP 0x0800 849#define ICBOPT_SRCHDOWN 0x0400 850#define ICBOPT_NOLIP 0x0200 851#define ICBOPT_PDBCHANGE_AE 0x0100 852#define ICBOPT_INI_TGTTYPE 0x0080 853#define ICBOPT_INI_ADISC 0x0040 854#define ICBOPT_INI_DISABLE 0x0020 855#define ICBOPT_TGT_ENABLE 0x0010 856#define ICBOPT_FAST_POST 0x0008 857#define ICBOPT_FULL_DUPLEX 0x0004 858#define ICBOPT_FAIRNESS 0x0002 859#define ICBOPT_HARD_ADDRESS 0x0001 860 861#define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */ 862#define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */ 863#define ICBXOPT_FCTAPE_CONFIRM 0x2000 864#define ICBXOPT_FCTAPE 0x1000 865#define ICBXOPT_CLASS2_ACK0 0x0200 866#define ICBXOPT_CLASS2 0x0100 867#define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */ 868#define ICBXOPT_TOPO_MASK 0x0070 869#define ICBXOPT_LOOP_ONLY 0x0000 870#define ICBXOPT_PTP_ONLY 0x0010 871#define ICBXOPT_LOOP_2_PTP 0x0020 872#define ICBXOPT_PTP_2_LOOP 0x0030 873/* 874 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits. 875 * RIO is not defined for the 23XX cards (just 2200) 876 */ 877#define ICBXOPT_RIO_OFF 0 878#define ICBXOPT_RIO_16BIT 1 879#define ICBXOPT_RIO_32BIT 2 880#define ICBXOPT_RIO_16BIT_IOCB 3 881#define ICBXOPT_RIO_32BIT_IOCB 4 882#define ICBXOPT_ZIO 5 883#define ICBXOPT_TIMER_MASK 0x7 884 885#define ICBZOPT_RATE_MASK 0xC000 886#define ICBZOPT_RATE_ONEGB 0x0000 887#define ICBZOPT_RATE_AUTO 0x8000 888#define ICBZOPT_RATE_TWOGB 0x4000 889#define ICBZOPT_50_OHM 0x2000 890#define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */ 891#define ICBZOPT_RSPSZ_MASK 0x0030 892#define ICBZOPT_RSPSZ_24 0x0000 893#define ICBZOPT_RSPSZ_12 0x0010 894#define ICBZOPT_RSPSZ_24A 0x0020 895#define ICBZOPT_RSPSZ_32 0x0030 896#define ICBZOPT_SOFTID 0x0002 897#define ICBZOPT_ENA_RDXFR_RDY 0x0001 898 899/* 2400 F/W options */ 900#define ICB2400_OPT1_BOTH_WWNS 0x00004000 901#define ICB2400_OPT1_FULL_LOGIN 0x00002000 902#define ICB2400_OPT1_PREVLOOP 0x00000800 903#define ICB2400_OPT1_SRCHDOWN 0x00000400 904#define ICB2400_OPT1_NOLIP 0x00000200 905#define ICB2400_OPT1_INI_DISABLE 0x00000020 906#define ICB2400_OPT1_TGT_ENABLE 0x00000010 907#define ICB2400_OPT1_FULL_DUPLEX 0x00000004 908#define ICB2400_OPT1_FAIRNESS 0x00000002 909#define ICB2400_OPT1_HARD_ADDRESS 0x00000001 910 911#define ICB2400_OPT2_FCTAPE 0x00001000 912#define ICB2400_OPT2_CLASS2_ACK0 0x00000200 913#define ICB2400_OPT2_CLASS2 0x00000100 914#define ICB2400_OPT2_NO_PLAY 0x00000080 915#define ICB2400_OPT2_TOPO_MASK 0x00000070 916#define ICB2400_OPT2_LOOP_ONLY 0x00000000 917#define ICB2400_OPT2_PTP_ONLY 0x00000010 918#define ICB2400_OPT2_LOOP_2_PTP 0x00000020 919#define ICB2400_OPT2_PTP_2_LOOP 0x00000030 920#define ICB2400_OPT2_TIMER_MASK 0x00000007 921#define ICB2400_OPT2_ZIO 0x00000005 922#define ICB2400_OPT2_ZIO1 0x00000006 923 924#define ICB2400_OPT3_75_OHM 0x00010000 925#define ICB2400_OPT3_RATE_MASK 0x0000E000 926#define ICB2400_OPT3_RATE_ONEGB 0x00000000 927#define ICB2400_OPT3_RATE_TWOGB 0x00002000 928#define ICB2400_OPT3_RATE_AUTO 0x00004000 929#define ICB2400_OPT3_RATE_FOURGB 0x00006000 930#define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200 931#define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080 932#define ICB2400_OPT3_ENA_OOF 0x00000040 933/* note that a response size flag of zero is reserved! */ 934#define ICB2400_OPT3_RSPSZ_MASK 0x00000030 935#define ICB2400_OPT3_RSPSZ_12 0x00000010 936#define ICB2400_OPT3_RSPSZ_24 0x00000020 937#define ICB2400_OPT3_RSPSZ_32 0x00000030 938#define ICB2400_OPT3_SOFTID 0x00000002 939 940#define ICB_MIN_FRMLEN 256 941#define ICB_MAX_FRMLEN 2112 942#define ICB_DFLT_FRMLEN 1024 943#define ICB_DFLT_ALLOC 256 944#define ICB_DFLT_THROTTLE 16 945#define ICB_DFLT_RDELAY 5 946#define ICB_DFLT_RCOUNT 3 947 948#define ICB_LOGIN_TOV 30 949#define ICB_LUN_ENABLE_TOV 180 950 951 952/* 953 * And somebody at QLogic had a great idea that you could just change 954 * the structure *and* keep the version number the same as the other cards. 955 */ 956typedef struct { 957 uint16_t icb_version; 958 uint16_t icb_reserved0; 959 uint16_t icb_maxfrmlen; 960 uint16_t icb_execthrottle; 961 uint16_t icb_xchgcnt; 962 uint16_t icb_hardaddr; 963 uint8_t icb_portname[8]; 964 uint8_t icb_nodename[8]; 965 uint16_t icb_rspnsin; 966 uint16_t icb_rqstout; 967 uint16_t icb_retry_count; 968 uint16_t icb_priout; 969 uint16_t icb_rsltqlen; 970 uint16_t icb_rqstqlen; 971 uint16_t icb_ldn_nols; 972 uint16_t icb_prqstqlen; 973 uint16_t icb_rqstaddr[4]; 974 uint16_t icb_respaddr[4]; 975 uint16_t icb_priaddr[4]; 976 uint16_t icb_reserved1[4]; 977 uint16_t icb_atio_in; 978 uint16_t icb_atioqlen; 979 uint16_t icb_atioqaddr[4]; 980 uint16_t icb_idelaytimer; 981 uint16_t icb_logintime; 982 uint32_t icb_fwoptions1; 983 uint32_t icb_fwoptions2; 984 uint32_t icb_fwoptions3; 985 uint16_t icb_reserved2[12]; 986} isp_icb_2400_t; 987 988#define RQRSP_ADDR0015 0 989#define RQRSP_ADDR1631 1 990#define RQRSP_ADDR3247 2 991#define RQRSP_ADDR4863 3 992 993 994#define ICB_NNM0 7 995#define ICB_NNM1 6 996#define ICB_NNM2 5 997#define ICB_NNM3 4 998#define ICB_NNM4 3 999#define ICB_NNM5 2 1000#define ICB_NNM6 1 1001#define ICB_NNM7 0 1002 1003#define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 1004 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \ 1005 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \ 1006 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \ 1007 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \ 1008 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \ 1009 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \ 1010 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \ 1011 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff) 1012 1013#define MAKE_WWN_FROM_NODE_NAME(wwn, array) \ 1014 wwn = ((uint64_t) array[ICB_NNM0]) | \ 1015 ((uint64_t) array[ICB_NNM1] << 8) | \ 1016 ((uint64_t) array[ICB_NNM2] << 16) | \ 1017 ((uint64_t) array[ICB_NNM3] << 24) | \ 1018 ((uint64_t) array[ICB_NNM4] << 32) | \ 1019 ((uint64_t) array[ICB_NNM5] << 40) | \ 1020 ((uint64_t) array[ICB_NNM6] << 48) | \ 1021 ((uint64_t) array[ICB_NNM7] << 56) 1022 1023/* 1024 * Port Data Base Element 1025 */ 1026 1027typedef struct { 1028 uint16_t pdb_options; 1029 uint8_t pdb_mstate; 1030 uint8_t pdb_sstate; 1031 uint8_t pdb_hardaddr_bits[4]; 1032 uint8_t pdb_portid_bits[4]; 1033 uint8_t pdb_nodename[8]; 1034 uint8_t pdb_portname[8]; 1035 uint16_t pdb_execthrottle; 1036 uint16_t pdb_exec_count; 1037 uint8_t pdb_retry_count; 1038 uint8_t pdb_retry_delay; 1039 uint16_t pdb_resalloc; 1040 uint16_t pdb_curalloc; 1041 uint16_t pdb_qhead; 1042 uint16_t pdb_qtail; 1043 uint16_t pdb_tl_next; 1044 uint16_t pdb_tl_last; 1045 uint16_t pdb_features; /* PLOGI, Common Service */ 1046 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 1047 uint16_t pdb_roi; /* PLOGI, Common Service */ 1048 uint8_t pdb_target; 1049 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 1050 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */ 1051 uint16_t pdb_ncseq; /* PLOGI, Class 3 */ 1052 uint16_t pdb_noseq; /* PLOGI, Class 3 */ 1053 uint16_t pdb_labrtflg; 1054 uint16_t pdb_lstopflg; 1055 uint16_t pdb_sqhead; 1056 uint16_t pdb_sqtail; 1057 uint16_t pdb_ptimer; 1058 uint16_t pdb_nxt_seqid; 1059 uint16_t pdb_fcount; 1060 uint16_t pdb_prli_len; 1061 uint16_t pdb_prli_svc0; 1062 uint16_t pdb_prli_svc3; 1063 uint16_t pdb_loopid; 1064 uint16_t pdb_il_ptr; 1065 uint16_t pdb_sl_ptr; 1066} isp_pdb_21xx_t; 1067 1068#define PDB_OPTIONS_XMITTING (1<<11) 1069#define PDB_OPTIONS_LNKXMIT (1<<10) 1070#define PDB_OPTIONS_ABORTED (1<<9) 1071#define PDB_OPTIONS_ADISC (1<<1) 1072 1073#define PDB_STATE_DISCOVERY 0 1074#define PDB_STATE_WDISC_ACK 1 1075#define PDB_STATE_PLOGI 2 1076#define PDB_STATE_PLOGI_ACK 3 1077#define PDB_STATE_PRLI 4 1078#define PDB_STATE_PRLI_ACK 5 1079#define PDB_STATE_LOGGED_IN 6 1080#define PDB_STATE_PORT_UNAVAIL 7 1081#define PDB_STATE_PRLO 8 1082#define PDB_STATE_PRLO_ACK 9 1083#define PDB_STATE_PLOGO 10 1084#define PDB_STATE_PLOG_ACK 11 1085 1086#define SVC3_TGT_ROLE 0x10 1087#define SVC3_INI_ROLE 0x20 1088#define SVC3_ROLE_MASK 0x30 1089#define SVC3_ROLE_SHIFT 4 1090 1091#define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 1092#define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2]) 1093 1094/* 1095 * Port Data Base Element- 24XX cards 1096 */ 1097typedef struct { 1098 uint16_t pdb_flags; 1099 uint8_t pdb_curstate; 1100 uint8_t pdb_laststate; 1101 uint8_t pdb_hardaddr_bits[4]; 1102 uint8_t pdb_portid_bits[4]; 1103#define pdb_nxt_seqid_2400 pdb_portid_bits[3] 1104 uint16_t pdb_retry_timer; 1105 uint16_t pdb_handle; 1106 uint16_t pdb_rcv_dsize; 1107 uint16_t pdb_reserved0; 1108 uint16_t pdb_prli_svc0; 1109 uint16_t pdb_prli_svc3; 1110 uint8_t pdb_portname[8]; 1111 uint8_t pdb_nodename[8]; 1112 uint8_t pdb_reserved1[24]; 1113} isp_pdb_24xx_t; 1114 1115#define PDB2400_TID_SUPPORTED 0x4000 1116#define PDB2400_FC_TAPE 0x0080 1117#define PDB2400_CLASS2_ACK0 0x0040 1118#define PDB2400_FCP_CONF 0x0020 1119#define PDB2400_CLASS2 0x0010 1120#define PDB2400_ADDR_VALID 0x0002 1121 1122/* 1123 * Common elements from the above two structures that are actually useful to us. 1124 */ 1125typedef struct { 1126 uint16_t handle; 1127 uint16_t reserved; 1128 uint32_t s3_role : 8, 1129 portid : 24; 1130 uint8_t portname[8]; 1131 uint8_t nodename[8]; 1132} isp_pdb_t; 1133 1134/* 1135 * Genericized Port Login/Logout software structure 1136 */ 1137typedef struct { 1138 uint16_t handle; 1139 uint32_t 1140 flags : 8, 1141 portid : 24; 1142} isp_plcmd_t; 1143/* the flags to use are those for PLOGX_FLG_* below */ 1144 1145/* 1146 * ISP24XX- Login/Logout Port IOCB 1147 */ 1148typedef struct { 1149 isphdr_t plogx_header; 1150 uint32_t plogx_handle; 1151 uint16_t plogx_status; 1152 uint16_t plogx_nphdl; 1153 uint16_t plogx_flags; 1154 uint16_t plogx_vphdl; /* low 8 bits */ 1155 uint16_t plogx_portlo; /* low 16 bits */ 1156 uint16_t plogx_rspsz_porthi; 1157 struct { 1158 uint16_t lo16; 1159 uint16_t hi16; 1160 } plogx_ioparm[11]; 1161} isp_plogx_t; 1162 1163#define PLOGX_STATUS_OK 0x00 1164#define PLOGX_STATUS_UNAVAIL 0x28 1165#define PLOGX_STATUS_LOGOUT 0x29 1166#define PLOGX_STATUS_IOCBERR 0x31 1167 1168#define PLOGX_IOCBERR_NOLINK 0x01 1169#define PLOGX_IOCBERR_NOIOCB 0x02 1170#define PLOGX_IOCBERR_NOXGHG 0x03 1171#define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */ 1172#define PLOGX_IOCBERR_NOFABRIC 0x05 1173#define PLOGX_IOCBERR_NOTREADY 0x07 1174#define PLOGX_IOCBERR_NOLOGIN 0x08 /* further info in IOPARM 1 */ 1175#define PLOGX_IOCBERR_NOPCB 0x0a 1176#define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */ 1177#define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */ 1178#define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */ 1179#define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */ 1180#define PLOGX_IOCBERR_NOHANDLE 0x1c 1181#define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */ 1182 1183#define PLOGX_FLG_CMD_MASK 0xf 1184#define PLOGX_FLG_CMD_PLOGI 0 1185#define PLOGX_FLG_CMD_PRLI 1 1186#define PLOGX_FLG_CMD_PDISC 2 1187#define PLOGX_FLG_CMD_LOGO 8 1188#define PLOGX_FLG_CMD_PRLO 9 1189#define PLOGX_FLG_CMD_TPRLO 10 1190 1191#define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */ 1192#define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */ 1193#define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */ 1194#define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */ 1195#define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */ 1196#define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */ 1197#define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */ 1198 1199#define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */ 1200#define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */ 1201 1202/* 1203 * Simple Name Server Data Structures 1204 */ 1205#define SNS_GA_NXT 0x100 1206#define SNS_GPN_ID 0x112 1207#define SNS_GNN_ID 0x113 1208#define SNS_GFF_ID 0x11F 1209#define SNS_GID_FT 0x171 1210#define SNS_RFT_ID 0x217 1211typedef struct { 1212 uint16_t snscb_rblen; /* response buffer length (words) */ 1213 uint16_t snscb_reserved0; 1214 uint16_t snscb_addr[4]; /* response buffer address */ 1215 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1216 uint16_t snscb_reserved1; 1217 uint16_t snscb_data[1]; /* variable data */ 1218} sns_screq_t; /* Subcommand Request Structure */ 1219 1220typedef struct { 1221 uint16_t snscb_rblen; /* response buffer length (words) */ 1222 uint16_t snscb_reserved0; 1223 uint16_t snscb_addr[4]; /* response buffer address */ 1224 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1225 uint16_t snscb_reserved1; 1226 uint16_t snscb_cmd; 1227 uint16_t snscb_reserved2; 1228 uint32_t snscb_reserved3; 1229 uint32_t snscb_port; 1230} sns_ga_nxt_req_t; 1231#define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t)) 1232 1233typedef struct { 1234 uint16_t snscb_rblen; /* response buffer length (words) */ 1235 uint16_t snscb_reserved0; 1236 uint16_t snscb_addr[4]; /* response buffer address */ 1237 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1238 uint16_t snscb_reserved1; 1239 uint16_t snscb_cmd; 1240 uint16_t snscb_reserved2; 1241 uint32_t snscb_reserved3; 1242 uint32_t snscb_portid; 1243} sns_gxn_id_req_t; 1244#define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t)) 1245 1246typedef struct { 1247 uint16_t snscb_rblen; /* response buffer length (words) */ 1248 uint16_t snscb_reserved0; 1249 uint16_t snscb_addr[4]; /* response buffer address */ 1250 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1251 uint16_t snscb_reserved1; 1252 uint16_t snscb_cmd; 1253 uint16_t snscb_mword_div_2; 1254 uint32_t snscb_reserved3; 1255 uint32_t snscb_fc4_type; 1256} sns_gid_ft_req_t; 1257#define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t)) 1258 1259typedef struct { 1260 uint16_t snscb_rblen; /* response buffer length (words) */ 1261 uint16_t snscb_reserved0; 1262 uint16_t snscb_addr[4]; /* response buffer address */ 1263 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1264 uint16_t snscb_reserved1; 1265 uint16_t snscb_cmd; 1266 uint16_t snscb_reserved2; 1267 uint32_t snscb_reserved3; 1268 uint32_t snscb_port; 1269 uint32_t snscb_fc4_types[8]; 1270} sns_rft_id_req_t; 1271#define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t)) 1272 1273typedef struct { 1274 ct_hdr_t snscb_cthdr; 1275 uint8_t snscb_port_type; 1276 uint8_t snscb_port_id[3]; 1277 uint8_t snscb_portname[8]; 1278 uint16_t snscb_data[1]; /* variable data */ 1279} sns_scrsp_t; /* Subcommand Response Structure */ 1280 1281typedef struct { 1282 ct_hdr_t snscb_cthdr; 1283 uint8_t snscb_port_type; 1284 uint8_t snscb_port_id[3]; 1285 uint8_t snscb_portname[8]; 1286 uint8_t snscb_pnlen; /* symbolic port name length */ 1287 uint8_t snscb_pname[255]; /* symbolic port name */ 1288 uint8_t snscb_nodename[8]; 1289 uint8_t snscb_nnlen; /* symbolic node name length */ 1290 uint8_t snscb_nname[255]; /* symbolic node name */ 1291 uint8_t snscb_ipassoc[8]; 1292 uint8_t snscb_ipaddr[16]; 1293 uint8_t snscb_svc_class[4]; 1294 uint8_t snscb_fc4_types[32]; 1295 uint8_t snscb_fpname[8]; 1296 uint8_t snscb_reserved; 1297 uint8_t snscb_hardaddr[3]; 1298} sns_ga_nxt_rsp_t; /* Subcommand Response Structure */ 1299#define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t)) 1300 1301typedef struct { 1302 ct_hdr_t snscb_cthdr; 1303 uint8_t snscb_wwn[8]; 1304} sns_gxn_id_rsp_t; 1305#define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t)) 1306 1307typedef struct { 1308 ct_hdr_t snscb_cthdr; 1309 uint32_t snscb_fc4_features[32]; 1310} sns_gff_id_rsp_t; 1311#define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t)) 1312 1313typedef struct { 1314 ct_hdr_t snscb_cthdr; 1315 struct { 1316 uint8_t control; 1317 uint8_t portid[3]; 1318 } snscb_ports[1]; 1319} sns_gid_ft_rsp_t; 1320#define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2)) 1321#define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t)) 1322 1323/* 1324 * Other Misc Structures 1325 */ 1326 1327/* ELS Pass Through */ 1328typedef struct { 1329 isphdr_t els_hdr; 1330 uint32_t els_handle; 1331 uint16_t els_status; 1332 uint16_t els_nphdl; 1333 uint16_t els_xmit_dsd_count; /* outgoing only */ 1334 uint8_t els_vphdl; 1335 uint8_t els_sof; 1336 uint32_t els_rxid; 1337 uint16_t els_recv_dsd_count; /* outgoing only */ 1338 uint8_t els_opcode; 1339 uint8_t els_reserved1; 1340 uint8_t els_did_lo; 1341 uint8_t els_did_mid; 1342 uint8_t els_did_hi; 1343 uint8_t els_reserved2; 1344 uint16_t els_reserved3; 1345 uint16_t els_ctl_flags; 1346 union { 1347 struct { 1348 uint32_t _els_bytecnt; 1349 uint32_t _els_subcode1; 1350 uint32_t _els_subcode2; 1351 uint8_t _els_reserved4[20]; 1352 } in; 1353 struct { 1354 uint32_t _els_recv_bytecnt; 1355 uint32_t _els_xmit_bytecnt; 1356 uint32_t _els_xmit_dsd_length; 1357 uint16_t _els_xmit_dsd_a1500; 1358 uint16_t _els_xmit_dsd_a3116; 1359 uint16_t _els_xmit_dsd_a4732; 1360 uint16_t _els_xmit_dsd_a6348; 1361 uint32_t _els_recv_dsd_length; 1362 uint16_t _els_recv_dsd_a1500; 1363 uint16_t _els_recv_dsd_a3116; 1364 uint16_t _els_recv_dsd_a4732; 1365 uint16_t _els_recv_dsd_a6348; 1366 } out; 1367 } inout; 1368#define els_bytecnt inout.in._els_bytecnt 1369#define els_subcode1 inout.in._els_subcode1 1370#define els_subcode2 inout.in._els_subcode2 1371#define els_reserved4 inout.in._els_reserved4 1372#define els_recv_bytecnt inout.out._els_recv_bytecnt 1373#define els_xmit_bytecnt inout.out._els_xmit_bytecnt 1374#define els_xmit_dsd_length inout.out._els_xmit_dsd_length 1375#define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500 1376#define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116 1377#define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732 1378#define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348 1379#define els_recv_dsd_length inout.out._els_recv_dsd_length 1380#define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500 1381#define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116 1382#define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732 1383#define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348 1384} els_t; 1385 1386/* 1387 * A handy package structure for running FC-SCSI commands via RUN IOCB A64. 1388 */ 1389typedef struct { 1390 uint16_t handle; 1391 uint16_t lun; 1392 uint32_t portid; 1393 uint32_t timeout; 1394 union { 1395 struct { 1396 uint32_t data_length; 1397 uint8_t do_read; 1398 uint8_t pad[3]; 1399 uint8_t cdb[16]; 1400 void *data_ptr; 1401 } beg; 1402 struct { 1403 uint32_t data_residual; 1404 uint8_t status; 1405 uint8_t pad; 1406 uint16_t sense_length; 1407 uint8_t sense_data[32]; 1408 } end; 1409 } fcd; 1410} isp_xcmd_t; 1411#endif /* _ISPMBOX_H */ 1412