isp_freebsd.h revision 316400
1/* $FreeBSD: stable/11/sys/dev/isp/isp_freebsd.h 316400 2017-04-02 10:53:03Z mav $ */ 2/*- 3 * Qlogic ISP SCSI Host Adapter FreeBSD Wrapper Definitions 4 * 5 * Copyright (c) 1997-2008 by Matthew Jacob 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29#ifndef _ISP_FREEBSD_H 30#define _ISP_FREEBSD_H 31 32#include <sys/param.h> 33#include <sys/systm.h> 34#include <sys/endian.h> 35#include <sys/jail.h> 36#include <sys/lock.h> 37#include <sys/kernel.h> 38#include <sys/queue.h> 39#include <sys/malloc.h> 40#include <sys/mutex.h> 41#include <sys/condvar.h> 42#include <sys/rman.h> 43#include <sys/sysctl.h> 44 45#include <sys/proc.h> 46#include <sys/bus.h> 47#include <sys/taskqueue.h> 48 49#include <machine/bus.h> 50#include <machine/cpu.h> 51#include <machine/stdarg.h> 52 53#include <cam/cam.h> 54#include <cam/cam_debug.h> 55#include <cam/cam_ccb.h> 56#include <cam/cam_sim.h> 57#include <cam/cam_xpt.h> 58#include <cam/cam_xpt_sim.h> 59#include <cam/cam_debug.h> 60#include <cam/scsi/scsi_all.h> 61#include <cam/scsi/scsi_message.h> 62 63#include "opt_ddb.h" 64#include "opt_isp.h" 65 66#define ISP_PLATFORM_VERSION_MAJOR 7 67#define ISP_PLATFORM_VERSION_MINOR 10 68 69/* 70 * Efficiency- get rid of SBus code && tests unless we need them. 71 */ 72#ifdef __sparc64__ 73#define ISP_SBUS_SUPPORTED 1 74#else 75#define ISP_SBUS_SUPPORTED 0 76#endif 77 78#define ISP_IFLAGS INTR_TYPE_CAM | INTR_ENTROPY | INTR_MPSAFE 79 80#define N_XCMDS 64 81#define XCMD_SIZE 512 82struct ispsoftc; 83typedef union isp_ecmd { 84 union isp_ecmd * next; 85 uint8_t data[XCMD_SIZE]; 86} isp_ecmd_t; 87isp_ecmd_t * isp_get_ecmd(struct ispsoftc *); 88void isp_put_ecmd(struct ispsoftc *, isp_ecmd_t *); 89 90#ifdef ISP_TARGET_MODE 91#define ATPDPSIZE 4096 92#define ATPDPHASHSIZE 32 93#define ATPDPHASH(x) ((((x) >> 24) ^ ((x) >> 16) ^ ((x) >> 8) ^ (x)) & \ 94 ((ATPDPHASHSIZE) - 1)) 95 96#include <dev/isp/isp_target.h> 97typedef struct atio_private_data { 98 LIST_ENTRY(atio_private_data) next; 99 uint32_t orig_datalen; 100 uint32_t bytes_xfered; 101 uint32_t bytes_in_transit; 102 uint32_t tag; /* typically f/w RX_ID */ 103 lun_id_t lun; 104 uint32_t nphdl; 105 uint32_t sid; 106 uint32_t did; 107 uint16_t rxid; /* wire rxid */ 108 uint16_t oxid; /* wire oxid */ 109 uint16_t word3; /* PRLI word3 params */ 110 uint16_t ctcnt; /* number of CTIOs currently active */ 111 uint8_t seqno; /* CTIO sequence number */ 112 uint32_t 113 srr_notify_rcvd : 1, 114 cdb0 : 8, 115 sendst : 1, 116 dead : 1, 117 tattr : 3, 118 state : 3; 119 void * ests; 120 /* 121 * The current SRR notify copy 122 */ 123 uint8_t srr[64]; /* sb QENTRY_LEN, but order of definitions is wrong */ 124 void * srr_ccb; 125 uint32_t nsrr; 126} atio_private_data_t; 127#define ATPD_STATE_FREE 0 128#define ATPD_STATE_ATIO 1 129#define ATPD_STATE_CAM 2 130#define ATPD_STATE_CTIO 3 131#define ATPD_STATE_LAST_CTIO 4 132#define ATPD_STATE_PDON 5 133 134#define ATPD_CCB_OUTSTANDING 16 135 136#define ATPD_SEQ_MASK 0x7f 137#define ATPD_SEQ_NOTIFY_CAM 0x80 138#define ATPD_SET_SEQNO(hdrp, atp) ((isphdr_t *)hdrp)->rqs_seqno &= ~ATPD_SEQ_MASK, ((isphdr_t *)hdrp)->rqs_seqno |= (atp)->seqno 139#define ATPD_GET_SEQNO(hdrp) (((isphdr_t *)hdrp)->rqs_seqno & ATPD_SEQ_MASK) 140#define ATPD_GET_NCAM(hdrp) ((((isphdr_t *)hdrp)->rqs_seqno & ATPD_SEQ_NOTIFY_CAM) != 0) 141 142typedef struct inot_private_data inot_private_data_t; 143struct inot_private_data { 144 STAILQ_ENTRY(inot_private_data) next; 145 isp_notify_t nt; 146 uint8_t data[64]; /* sb QENTRY_LEN, but order of definitions is wrong */ 147 uint32_t tag_id, seq_id; 148}; 149typedef struct isp_timed_notify_ack { 150 void *isp; 151 void *not; 152 uint8_t data[64]; /* sb QENTRY_LEN, but order of definitions is wrong */ 153 struct callout timer; 154} isp_tna_t; 155 156STAILQ_HEAD(ntpdlist, inot_private_data); 157typedef struct tstate { 158 SLIST_ENTRY(tstate) next; 159 lun_id_t ts_lun; 160 struct ccb_hdr_slist atios; 161 struct ccb_hdr_slist inots; 162 struct ntpdlist restart_queue; 163} tstate_t; 164 165#define LUN_HASH_SIZE 32 166#define LUN_HASH_FUNC(lun) ((lun) & (LUN_HASH_SIZE - 1)) 167 168#endif 169 170/* 171 * Per command info. 172 */ 173struct isp_pcmd { 174 struct isp_pcmd * next; 175 bus_dmamap_t dmap; /* dma map for this command */ 176 struct ispsoftc * isp; /* containing isp */ 177 struct callout wdog; /* watchdog timer */ 178 uint32_t datalen; /* data length for this command (target mode only) */ 179 uint8_t totslen; /* sense length on status response */ 180 uint8_t cumslen; /* sense length on status response */ 181 uint8_t crn; /* command reference number */ 182}; 183#define ISP_PCMD(ccb) (ccb)->ccb_h.spriv_ptr1 184#define PISP_PCMD(ccb) ((struct isp_pcmd *)ISP_PCMD(ccb)) 185 186/* 187 * Per nexus info. 188 */ 189struct isp_nexus { 190 uint64_t lun; /* LUN for target */ 191 uint32_t tgt; /* TGT for target */ 192 uint8_t crnseed; /* next command reference number */ 193 struct isp_nexus *next; 194}; 195#define NEXUS_HASH_WIDTH 32 196#define INITIAL_NEXUS_COUNT MAX_FC_TARG 197#define NEXUS_HASH(tgt, lun) ((tgt + lun) % NEXUS_HASH_WIDTH) 198 199/* 200 * Per channel information 201 */ 202SLIST_HEAD(tslist, tstate); 203TAILQ_HEAD(isp_ccbq, ccb_hdr); 204LIST_HEAD(atpdlist, atio_private_data); 205 206struct isp_fc { 207 struct cam_sim *sim; 208 struct cam_path *path; 209 struct ispsoftc *isp; 210 struct proc *kproc; 211 bus_dmamap_t scmap; 212 uint64_t def_wwpn; 213 uint64_t def_wwnn; 214 time_t loop_down_time; 215 int loop_down_limit; 216 int gone_device_time; 217 /* 218 * Per target/lun info- just to keep a per-ITL nexus crn count 219 */ 220 struct isp_nexus *nexus_hash[NEXUS_HASH_WIDTH]; 221 struct isp_nexus *nexus_free_list; 222 uint32_t 223 simqfrozen : 3, 224 default_id : 8, 225 def_role : 2, /* default role */ 226 loop_seen_once : 1, 227 fcbsy : 1, 228 ready : 1; 229 struct callout gdt; /* gone device timer */ 230 struct task gtask; 231#ifdef ISP_TARGET_MODE 232 struct tslist lun_hash[LUN_HASH_SIZE]; 233 struct isp_ccbq waitq; /* waiting CCBs */ 234 struct ntpdlist ntfree; 235 inot_private_data_t ntpool[ATPDPSIZE]; 236 struct atpdlist atfree; 237 struct atpdlist atused[ATPDPHASHSIZE]; 238 atio_private_data_t atpool[ATPDPSIZE]; 239#if defined(DEBUG) 240 unsigned int inject_lost_data_frame; 241#endif 242#endif 243 int num_threads; 244}; 245 246struct isp_spi { 247 struct cam_sim *sim; 248 struct cam_path *path; 249 uint32_t 250 simqfrozen : 3, 251 iid : 4; 252#ifdef ISP_TARGET_MODE 253 struct tslist lun_hash[LUN_HASH_SIZE]; 254 struct isp_ccbq waitq; /* waiting CCBs */ 255 struct ntpdlist ntfree; 256 inot_private_data_t ntpool[ATPDPSIZE]; 257 struct atpdlist atfree; 258 struct atpdlist atused[ATPDPHASHSIZE]; 259 atio_private_data_t atpool[ATPDPSIZE]; 260#endif 261 int num_threads; 262}; 263 264struct isposinfo { 265 /* 266 * Linkage, locking, and identity 267 */ 268 struct mtx lock; 269 device_t dev; 270 struct cdev * cdev; 271 struct cam_devq * devq; 272 273 /* 274 * Firmware pointer 275 */ 276 const struct firmware * fw; 277 278 /* 279 * DMA related stuff 280 */ 281 struct resource * regs; 282 struct resource * regs2; 283 bus_dma_tag_t dmat; 284 bus_dma_tag_t reqdmat; 285 bus_dma_tag_t respdmat; 286 bus_dma_tag_t atiodmat; 287 bus_dma_tag_t iocbdmat; 288 bus_dma_tag_t scdmat; 289 bus_dmamap_t reqmap; 290 bus_dmamap_t respmap; 291 bus_dmamap_t atiomap; 292 bus_dmamap_t iocbmap; 293 294 /* 295 * Command and transaction related related stuff 296 */ 297 struct isp_pcmd * pcmd_pool; 298 struct isp_pcmd * pcmd_free; 299 300 int sixtyfourbit; /* sixtyfour bit platform */ 301 int mbox_sleeping; 302 int mbox_sleep_ok; 303 int mboxbsy; 304 int mboxcmd_done; 305 306 struct callout tmo; /* general timer */ 307 308 /* 309 * misc- needs to be sorted better XXXXXX 310 */ 311 int framesize; 312 int exec_throttle; 313 int cont_max; 314 315 bus_addr_t ecmd_dma; 316 isp_ecmd_t * ecmd_base; 317 isp_ecmd_t * ecmd_free; 318 319 /* 320 * Per-type private storage... 321 */ 322 union { 323 struct isp_fc *fc; 324 struct isp_spi *spi; 325 void *ptr; 326 } pc; 327 328 int is_exiting; 329}; 330#define ISP_FC_PC(isp, chan) (&(isp)->isp_osinfo.pc.fc[(chan)]) 331#define ISP_SPI_PC(isp, chan) (&(isp)->isp_osinfo.pc.spi[(chan)]) 332#define ISP_GET_PC(isp, chan, tag, rslt) \ 333 if (IS_SCSI(isp)) { \ 334 rslt = ISP_SPI_PC(isp, chan)-> tag; \ 335 } else { \ 336 rslt = ISP_FC_PC(isp, chan)-> tag; \ 337 } 338#define ISP_GET_PC_ADDR(isp, chan, tag, rp) \ 339 if (IS_SCSI(isp)) { \ 340 rp = &ISP_SPI_PC(isp, chan)-> tag; \ 341 } else { \ 342 rp = &ISP_FC_PC(isp, chan)-> tag; \ 343 } 344#define ISP_SET_PC(isp, chan, tag, val) \ 345 if (IS_SCSI(isp)) { \ 346 ISP_SPI_PC(isp, chan)-> tag = val; \ 347 } else { \ 348 ISP_FC_PC(isp, chan)-> tag = val; \ 349 } 350 351#define FCP_NEXT_CRN isp_fcp_next_crn 352#define isp_lock isp_osinfo.lock 353#define isp_regs isp_osinfo.regs 354#define isp_regs2 isp_osinfo.regs2 355 356/* 357 * Locking macros... 358 */ 359#define ISP_LOCK(isp) mtx_lock(&(isp)->isp_osinfo.lock) 360#define ISP_UNLOCK(isp) mtx_unlock(&(isp)->isp_osinfo.lock) 361#define ISP_ASSERT_LOCKED(isp) mtx_assert(&(isp)->isp_osinfo.lock, MA_OWNED) 362 363/* 364 * Required Macros/Defines 365 */ 366#define ISP_FC_SCRLEN 0x1000 367 368#define ISP_MEMZERO(a, b) memset(a, 0, b) 369#define ISP_MEMCPY memcpy 370#define ISP_SNPRINTF snprintf 371#define ISP_DELAY(x) DELAY(x) 372#define ISP_SLEEP(isp, x) msleep_sbt(&(isp)->isp_osinfo.is_exiting, \ 373 &(isp)->isp_osinfo.lock, 0, "isp_sleep", (x) * SBT_1US, 0, 0) 374 375#define ISP_MIN imin 376 377#ifndef DIAGNOSTIC 378#define ISP_INLINE __inline 379#else 380#define ISP_INLINE 381#endif 382 383#define NANOTIME_T struct timespec 384#define GET_NANOTIME nanotime 385#define GET_NANOSEC(x) ((x)->tv_sec * 1000000000 + (x)->tv_nsec) 386#define NANOTIME_SUB isp_nanotime_sub 387 388#define MAXISPREQUEST(isp) ((IS_FC(isp) || IS_ULTRA2(isp))? 1024 : 256) 389 390#define MEMORYBARRIER(isp, type, offset, size, chan) \ 391switch (type) { \ 392case SYNC_REQUEST: \ 393 bus_dmamap_sync(isp->isp_osinfo.reqdmat, \ 394 isp->isp_osinfo.reqmap, BUS_DMASYNC_PREWRITE); \ 395 break; \ 396case SYNC_RESULT: \ 397 bus_dmamap_sync(isp->isp_osinfo.respdmat, \ 398 isp->isp_osinfo.respmap, BUS_DMASYNC_POSTREAD); \ 399 break; \ 400case SYNC_SFORDEV: \ 401{ \ 402 struct isp_fc *fc = ISP_FC_PC(isp, chan); \ 403 bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap, \ 404 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); \ 405 break; \ 406} \ 407case SYNC_SFORCPU: \ 408{ \ 409 struct isp_fc *fc = ISP_FC_PC(isp, chan); \ 410 bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap, \ 411 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); \ 412 break; \ 413} \ 414case SYNC_REG: \ 415 bus_barrier(isp->isp_osinfo.regs, offset, size, \ 416 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); \ 417 break; \ 418case SYNC_ATIOQ: \ 419 bus_dmamap_sync(isp->isp_osinfo.atiodmat, \ 420 isp->isp_osinfo.atiomap, BUS_DMASYNC_POSTREAD); \ 421 break; \ 422case SYNC_IFORDEV: \ 423 bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \ 424 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); \ 425 break; \ 426case SYNC_IFORCPU: \ 427 bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \ 428 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); \ 429 break; \ 430default: \ 431 break; \ 432} 433 434#define MEMORYBARRIERW(isp, type, offset, size, chan) \ 435switch (type) { \ 436case SYNC_REQUEST: \ 437 bus_dmamap_sync(isp->isp_osinfo.reqdmat, \ 438 isp->isp_osinfo.reqmap, BUS_DMASYNC_PREWRITE); \ 439 break; \ 440case SYNC_SFORDEV: \ 441{ \ 442 struct isp_fc *fc = ISP_FC_PC(isp, chan); \ 443 bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap, \ 444 BUS_DMASYNC_PREWRITE); \ 445 break; \ 446} \ 447case SYNC_SFORCPU: \ 448{ \ 449 struct isp_fc *fc = ISP_FC_PC(isp, chan); \ 450 bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap, \ 451 BUS_DMASYNC_POSTWRITE); \ 452 break; \ 453} \ 454case SYNC_REG: \ 455 bus_barrier(isp->isp_osinfo.regs, offset, size, \ 456 BUS_SPACE_BARRIER_WRITE); \ 457 break; \ 458case SYNC_IFORDEV: \ 459 bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \ 460 BUS_DMASYNC_PREWRITE); \ 461 break; \ 462case SYNC_IFORCPU: \ 463 bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \ 464 BUS_DMASYNC_POSTWRITE); \ 465 break; \ 466default: \ 467 break; \ 468} 469 470#define MBOX_ACQUIRE isp_mbox_acquire 471#define MBOX_WAIT_COMPLETE isp_mbox_wait_complete 472#define MBOX_NOTIFY_COMPLETE isp_mbox_notify_done 473#define MBOX_RELEASE isp_mbox_release 474 475#define FC_SCRATCH_ACQUIRE isp_fc_scratch_acquire 476#define FC_SCRATCH_RELEASE(isp, chan) isp->isp_osinfo.pc.fc[chan].fcbsy = 0 477 478#ifndef SCSI_GOOD 479#define SCSI_GOOD SCSI_STATUS_OK 480#endif 481#ifndef SCSI_CHECK 482#define SCSI_CHECK SCSI_STATUS_CHECK_COND 483#endif 484#ifndef SCSI_BUSY 485#define SCSI_BUSY SCSI_STATUS_BUSY 486#endif 487#ifndef SCSI_QFULL 488#define SCSI_QFULL SCSI_STATUS_QUEUE_FULL 489#endif 490 491#define XS_T struct ccb_scsiio 492#define XS_DMA_ADDR_T bus_addr_t 493#define XS_GET_DMA64_SEG(a, b, c) \ 494{ \ 495 ispds64_t *d = a; \ 496 bus_dma_segment_t *e = b; \ 497 uint32_t f = c; \ 498 e += f; \ 499 d->ds_base = DMA_LO32(e->ds_addr); \ 500 d->ds_basehi = DMA_HI32(e->ds_addr); \ 501 d->ds_count = e->ds_len; \ 502} 503#define XS_GET_DMA_SEG(a, b, c) \ 504{ \ 505 ispds_t *d = a; \ 506 bus_dma_segment_t *e = b; \ 507 uint32_t f = c; \ 508 e += f; \ 509 d->ds_base = DMA_LO32(e->ds_addr); \ 510 d->ds_count = e->ds_len; \ 511} 512#define XS_ISP(ccb) cam_sim_softc(xpt_path_sim((ccb)->ccb_h.path)) 513#define XS_CHANNEL(ccb) cam_sim_bus(xpt_path_sim((ccb)->ccb_h.path)) 514#define XS_TGT(ccb) (ccb)->ccb_h.target_id 515#define XS_LUN(ccb) (ccb)->ccb_h.target_lun 516 517#define XS_CDBP(ccb) \ 518 (((ccb)->ccb_h.flags & CAM_CDB_POINTER)? \ 519 (ccb)->cdb_io.cdb_ptr : (ccb)->cdb_io.cdb_bytes) 520 521#define XS_CDBLEN(ccb) (ccb)->cdb_len 522#define XS_XFRLEN(ccb) (ccb)->dxfer_len 523#define XS_TIME(ccb) (ccb)->ccb_h.timeout 524#define XS_GET_RESID(ccb) (ccb)->resid 525#define XS_SET_RESID(ccb, r) (ccb)->resid = r 526#define XS_STSP(ccb) (&(ccb)->scsi_status) 527#define XS_SNSP(ccb) (&(ccb)->sense_data) 528 529#define XS_TOT_SNSLEN(ccb) ccb->sense_len 530#define XS_CUR_SNSLEN(ccb) (ccb->sense_len - ccb->sense_resid) 531 532#define XS_SNSKEY(ccb) (scsi_get_sense_key(&(ccb)->sense_data, \ 533 ccb->sense_len - ccb->sense_resid, 1)) 534 535#define XS_SNSASC(ccb) (scsi_get_asc(&(ccb)->sense_data, \ 536 ccb->sense_len - ccb->sense_resid, 1)) 537 538#define XS_SNSASCQ(ccb) (scsi_get_ascq(&(ccb)->sense_data, \ 539 ccb->sense_len - ccb->sense_resid, 1)) 540#define XS_TAG_P(ccb) \ 541 (((ccb)->ccb_h.flags & CAM_TAG_ACTION_VALID) && \ 542 (ccb)->tag_action != CAM_TAG_ACTION_NONE) 543 544#define XS_TAG_TYPE(ccb) \ 545 ((ccb->tag_action == MSG_SIMPLE_Q_TAG)? REQFLAG_STAG : \ 546 ((ccb->tag_action == MSG_HEAD_OF_Q_TAG)? REQFLAG_HTAG : REQFLAG_OTAG)) 547 548 549#define XS_SETERR(ccb, v) (ccb)->ccb_h.status &= ~CAM_STATUS_MASK, \ 550 (ccb)->ccb_h.status |= v 551 552# define HBA_NOERROR CAM_REQ_INPROG 553# define HBA_BOTCH CAM_UNREC_HBA_ERROR 554# define HBA_CMDTIMEOUT CAM_CMD_TIMEOUT 555# define HBA_SELTIMEOUT CAM_SEL_TIMEOUT 556# define HBA_TGTBSY CAM_SCSI_STATUS_ERROR 557# define HBA_REQINVAL CAM_REQ_INVALID 558# define HBA_BUSRESET CAM_SCSI_BUS_RESET 559# define HBA_ABORTED CAM_REQ_ABORTED 560# define HBA_DATAOVR CAM_DATA_RUN_ERR 561# define HBA_ARQFAIL CAM_AUTOSENSE_FAIL 562 563 564#define XS_ERR(ccb) ((ccb)->ccb_h.status & CAM_STATUS_MASK) 565 566#define XS_NOERR(ccb) (((ccb)->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG) 567 568#define XS_INITERR(ccb) XS_SETERR(ccb, CAM_REQ_INPROG), ccb->sense_resid = ccb->sense_len 569 570#define XS_SAVE_SENSE(xs, sense_ptr, totslen, slen) do { \ 571 uint32_t tlen = slen; \ 572 if (tlen > (xs)->sense_len) \ 573 tlen = (xs)->sense_len; \ 574 PISP_PCMD(xs)->totslen = imin((xs)->sense_len, totslen); \ 575 PISP_PCMD(xs)->cumslen = tlen; \ 576 memcpy(&(xs)->sense_data, sense_ptr, tlen); \ 577 (xs)->sense_resid = (xs)->sense_len - tlen; \ 578 (xs)->ccb_h.status |= CAM_AUTOSNS_VALID; \ 579 } while (0) 580 581#define XS_SENSE_APPEND(xs, xsnsp, xsnsl) do { \ 582 uint32_t off = PISP_PCMD(xs)->cumslen; \ 583 uint8_t *ptr = &((uint8_t *)(&(xs)->sense_data))[off]; \ 584 uint32_t amt = imin(xsnsl, PISP_PCMD(xs)->totslen - off); \ 585 if (amt) { \ 586 memcpy(ptr, xsnsp, amt); \ 587 (xs)->sense_resid -= amt; \ 588 PISP_PCMD(xs)->cumslen += amt; \ 589 } \ 590 } while (0) 591 592#define XS_SENSE_VALID(xs) (((xs)->ccb_h.status & CAM_AUTOSNS_VALID) != 0) 593 594#define DEFAULT_FRAMESIZE(isp) isp->isp_osinfo.framesize 595#define DEFAULT_EXEC_THROTTLE(isp) isp->isp_osinfo.exec_throttle 596 597#define DEFAULT_ROLE(isp, chan) \ 598 (IS_FC(isp)? ISP_FC_PC(isp, chan)->def_role : ISP_ROLE_INITIATOR) 599 600#define DEFAULT_IID(isp, chan) isp->isp_osinfo.pc.spi[chan].iid 601 602#define DEFAULT_LOOPID(x, chan) isp->isp_osinfo.pc.fc[chan].default_id 603 604#define DEFAULT_NODEWWN(isp, chan) isp_default_wwn(isp, chan, 0, 1) 605#define DEFAULT_PORTWWN(isp, chan) isp_default_wwn(isp, chan, 0, 0) 606#define ACTIVE_NODEWWN(isp, chan) isp_default_wwn(isp, chan, 1, 1) 607#define ACTIVE_PORTWWN(isp, chan) isp_default_wwn(isp, chan, 1, 0) 608 609 610#if BYTE_ORDER == BIG_ENDIAN 611#ifdef ISP_SBUS_SUPPORTED 612#define ISP_IOXPUT_8(isp, s, d) *(d) = s 613#define ISP_IOXPUT_16(isp, s, d) \ 614 *(d) = (isp->isp_bustype == ISP_BT_SBUS)? s : bswap16(s) 615#define ISP_IOXPUT_32(isp, s, d) \ 616 *(d) = (isp->isp_bustype == ISP_BT_SBUS)? s : bswap32(s) 617#define ISP_IOXGET_8(isp, s, d) d = (*((uint8_t *)s)) 618#define ISP_IOXGET_16(isp, s, d) \ 619 d = (isp->isp_bustype == ISP_BT_SBUS)? \ 620 *((uint16_t *)s) : bswap16(*((uint16_t *)s)) 621#define ISP_IOXGET_32(isp, s, d) \ 622 d = (isp->isp_bustype == ISP_BT_SBUS)? \ 623 *((uint32_t *)s) : bswap32(*((uint32_t *)s)) 624 625#else /* ISP_SBUS_SUPPORTED */ 626#define ISP_IOXPUT_8(isp, s, d) *(d) = s 627#define ISP_IOXPUT_16(isp, s, d) *(d) = bswap16(s) 628#define ISP_IOXPUT_32(isp, s, d) *(d) = bswap32(s) 629#define ISP_IOXGET_8(isp, s, d) d = (*((uint8_t *)s)) 630#define ISP_IOXGET_16(isp, s, d) d = bswap16(*((uint16_t *)s)) 631#define ISP_IOXGET_32(isp, s, d) d = bswap32(*((uint32_t *)s)) 632#endif 633#define ISP_SWIZZLE_NVRAM_WORD(isp, rp) *rp = bswap16(*rp) 634#define ISP_SWIZZLE_NVRAM_LONG(isp, rp) *rp = bswap32(*rp) 635 636#define ISP_IOZGET_8(isp, s, d) d = (*((uint8_t *)s)) 637#define ISP_IOZGET_16(isp, s, d) d = (*((uint16_t *)s)) 638#define ISP_IOZGET_32(isp, s, d) d = (*((uint32_t *)s)) 639#define ISP_IOZPUT_8(isp, s, d) *(d) = s 640#define ISP_IOZPUT_16(isp, s, d) *(d) = s 641#define ISP_IOZPUT_32(isp, s, d) *(d) = s 642 643 644#else 645#define ISP_IOXPUT_8(isp, s, d) *(d) = s 646#define ISP_IOXPUT_16(isp, s, d) *(d) = s 647#define ISP_IOXPUT_32(isp, s, d) *(d) = s 648#define ISP_IOXGET_8(isp, s, d) d = *(s) 649#define ISP_IOXGET_16(isp, s, d) d = *(s) 650#define ISP_IOXGET_32(isp, s, d) d = *(s) 651#define ISP_SWIZZLE_NVRAM_WORD(isp, rp) 652#define ISP_SWIZZLE_NVRAM_LONG(isp, rp) 653 654#define ISP_IOZPUT_8(isp, s, d) *(d) = s 655#define ISP_IOZPUT_16(isp, s, d) *(d) = bswap16(s) 656#define ISP_IOZPUT_32(isp, s, d) *(d) = bswap32(s) 657 658#define ISP_IOZGET_8(isp, s, d) d = (*((uint8_t *)(s))) 659#define ISP_IOZGET_16(isp, s, d) d = bswap16(*((uint16_t *)(s))) 660#define ISP_IOZGET_32(isp, s, d) d = bswap32(*((uint32_t *)(s))) 661 662#endif 663 664#define ISP_SWAP16(isp, s) bswap16(s) 665#define ISP_SWAP32(isp, s) bswap32(s) 666 667/* 668 * Includes of common header files 669 */ 670 671#include <dev/isp/ispreg.h> 672#include <dev/isp/ispvar.h> 673#include <dev/isp/ispmbox.h> 674 675/* 676 * isp_osinfo definiitions && shorthand 677 */ 678#define SIMQFRZ_RESOURCE 0x1 679#define SIMQFRZ_LOOPDOWN 0x2 680#define SIMQFRZ_TIMED 0x4 681 682#define isp_dev isp_osinfo.dev 683 684/* 685 * prototypes for isp_pci && isp_freebsd to share 686 */ 687extern int isp_attach(ispsoftc_t *); 688extern int isp_detach(ispsoftc_t *); 689extern uint64_t isp_default_wwn(ispsoftc_t *, int, int, int); 690 691/* 692 * driver global data 693 */ 694extern int isp_announced; 695extern int isp_loop_down_limit; 696extern int isp_gone_device_time; 697extern int isp_quickboot_time; 698 699/* 700 * Platform private flags 701 */ 702 703/* 704 * Platform Library Functions 705 */ 706void isp_prt(ispsoftc_t *, int level, const char *, ...) __printflike(3, 4); 707void isp_xs_prt(ispsoftc_t *, XS_T *, int level, const char *, ...) __printflike(4, 5); 708uint64_t isp_nanotime_sub(struct timespec *, struct timespec *); 709int isp_mbox_acquire(ispsoftc_t *); 710void isp_mbox_wait_complete(ispsoftc_t *, mbreg_t *); 711void isp_mbox_notify_done(ispsoftc_t *); 712void isp_mbox_release(ispsoftc_t *); 713int isp_fc_scratch_acquire(ispsoftc_t *, int); 714int isp_mstohz(int); 715void isp_platform_intr(void *); 716void isp_platform_intr_resp(void *); 717void isp_platform_intr_atio(void *); 718void isp_common_dmateardown(ispsoftc_t *, struct ccb_scsiio *, uint32_t); 719void isp_fcp_reset_crn(ispsoftc_t *, int, uint32_t, int); 720int isp_fcp_next_crn(ispsoftc_t *, uint8_t *, XS_T *); 721 722/* 723 * Platform Version specific defines 724 */ 725#define BUS_DMA_ROOTARG(x) bus_get_dma_tag(x) 726#define isp_dma_tag_create(a, b, c, d, e, f, g, h, i, j, k, z) \ 727 bus_dma_tag_create(a, b, c, d, e, f, g, h, i, j, k, \ 728 busdma_lock_mutex, &isp->isp_osinfo.lock, z) 729 730#define isp_sim_alloc(a, b, c, d, e, f, g, h) \ 731 cam_sim_alloc(a, b, c, d, e, &(d)->isp_osinfo.lock, f, g, h) 732 733#define ISP_PATH_PRT(i, l, p, ...) \ 734 if ((l) == ISP_LOGALL || ((l)& (i)->isp_dblev) != 0) { \ 735 xpt_print(p, __VA_ARGS__); \ 736 } 737 738/* 739 * Platform specific inline functions 740 */ 741 742/* 743 * ISP General Library functions 744 */ 745 746#include <dev/isp/isp_library.h> 747 748#endif /* _ISP_FREEBSD_H */ 749