isp_freebsd.h revision 314758
1/* $FreeBSD: stable/11/sys/dev/isp/isp_freebsd.h 314758 2017-03-06 06:39:10Z mav $ */
2/*-
3 * Qlogic ISP SCSI Host Adapter FreeBSD Wrapper Definitions
4 *
5 * Copyright (c) 1997-2008 by Matthew Jacob
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice immediately at the beginning of the file, without modification,
13 *    this list of conditions, and the following disclaimer.
14 * 2. The name of the author may not be used to endorse or promote products
15 *    derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29#ifndef	_ISP_FREEBSD_H
30#define	_ISP_FREEBSD_H
31
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/endian.h>
35#include <sys/jail.h>
36#include <sys/lock.h>
37#include <sys/kernel.h>
38#include <sys/queue.h>
39#include <sys/malloc.h>
40#include <sys/mutex.h>
41#include <sys/condvar.h>
42#include <sys/rman.h>
43#include <sys/sysctl.h>
44
45#include <sys/proc.h>
46#include <sys/bus.h>
47#include <sys/taskqueue.h>
48
49#include <machine/bus.h>
50#include <machine/cpu.h>
51#include <machine/stdarg.h>
52
53#include <cam/cam.h>
54#include <cam/cam_debug.h>
55#include <cam/cam_ccb.h>
56#include <cam/cam_sim.h>
57#include <cam/cam_xpt.h>
58#include <cam/cam_xpt_sim.h>
59#include <cam/cam_debug.h>
60#include <cam/scsi/scsi_all.h>
61#include <cam/scsi/scsi_message.h>
62
63#include "opt_ddb.h"
64#include "opt_isp.h"
65
66#define	ISP_PLATFORM_VERSION_MAJOR	7
67#define	ISP_PLATFORM_VERSION_MINOR	10
68
69/*
70 * Efficiency- get rid of SBus code && tests unless we need them.
71 */
72#ifdef __sparc64__
73#define	ISP_SBUS_SUPPORTED	1
74#else
75#define	ISP_SBUS_SUPPORTED	0
76#endif
77
78#define	ISP_IFLAGS	INTR_TYPE_CAM | INTR_ENTROPY | INTR_MPSAFE
79
80#define	N_XCMDS		64
81#define	XCMD_SIZE	512
82struct ispsoftc;
83typedef union isp_ecmd {
84	union isp_ecmd *	next;
85	uint8_t			data[XCMD_SIZE];
86} isp_ecmd_t;
87isp_ecmd_t *	isp_get_ecmd(struct ispsoftc *);
88void		isp_put_ecmd(struct ispsoftc *, isp_ecmd_t *);
89
90#ifdef	ISP_TARGET_MODE
91#define	ATPDPSIZE	4096
92#define	ATPDPHASHSIZE	32
93#define	ATPDPHASH(x)	((((x) >> 24) ^ ((x) >> 16) ^ ((x) >> 8) ^ (x)) &  \
94			    ((ATPDPHASHSIZE) - 1))
95
96#include <dev/isp/isp_target.h>
97typedef struct atio_private_data {
98	LIST_ENTRY(atio_private_data)	next;
99	uint32_t	orig_datalen;
100	uint32_t	bytes_xfered;
101	uint32_t	bytes_in_transit;
102	uint32_t	tag;		/* typically f/w RX_ID */
103	lun_id_t	lun;
104	uint32_t	nphdl;
105	uint32_t	sid;
106	uint32_t	portid;
107	uint16_t	rxid;	/* wire rxid */
108	uint16_t	oxid;	/* wire oxid */
109	uint16_t	word3;	/* PRLI word3 params */
110	uint16_t	ctcnt;	/* number of CTIOs currently active */
111	uint8_t		seqno;	/* CTIO sequence number */
112	uint32_t
113			srr_notify_rcvd	: 1,
114			cdb0		: 8,
115			sendst		: 1,
116			dead		: 1,
117			tattr		: 3,
118			state		: 3;
119	void *		ests;
120	/*
121	 * The current SRR notify copy
122	 */
123	uint8_t		srr[64];	/*  sb QENTRY_LEN, but order of definitions is wrong */
124	void *		srr_ccb;
125	uint32_t	nsrr;
126} atio_private_data_t;
127#define	ATPD_STATE_FREE			0
128#define	ATPD_STATE_ATIO			1
129#define	ATPD_STATE_CAM			2
130#define	ATPD_STATE_CTIO			3
131#define	ATPD_STATE_LAST_CTIO		4
132#define	ATPD_STATE_PDON			5
133
134#define	ATPD_CCB_OUTSTANDING		16
135
136#define	ATPD_SEQ_MASK			0x7f
137#define	ATPD_SEQ_NOTIFY_CAM		0x80
138#define	ATPD_SET_SEQNO(hdrp, atp)	((isphdr_t *)hdrp)->rqs_seqno &= ~ATPD_SEQ_MASK, ((isphdr_t *)hdrp)->rqs_seqno |= (atp)->seqno
139#define	ATPD_GET_SEQNO(hdrp)		(((isphdr_t *)hdrp)->rqs_seqno & ATPD_SEQ_MASK)
140#define	ATPD_GET_NCAM(hdrp)		((((isphdr_t *)hdrp)->rqs_seqno & ATPD_SEQ_NOTIFY_CAM) != 0)
141
142typedef struct inot_private_data inot_private_data_t;
143struct inot_private_data {
144	STAILQ_ENTRY(inot_private_data)	next;
145	isp_notify_t nt;
146	uint8_t data[64];	/* sb QENTRY_LEN, but order of definitions is wrong */
147	uint32_t tag_id, seq_id;
148};
149typedef struct isp_timed_notify_ack {
150	void *isp;
151	void *not;
152	uint8_t data[64];	 /* sb QENTRY_LEN, but order of definitions is wrong */
153	struct callout timer;
154} isp_tna_t;
155
156STAILQ_HEAD(ntpdlist, inot_private_data);
157typedef struct tstate {
158	SLIST_ENTRY(tstate)	next;
159	lun_id_t		ts_lun;
160	struct ccb_hdr_slist	atios;
161	struct ccb_hdr_slist	inots;
162	struct ntpdlist		restart_queue;
163	uint16_t		atio_count;
164	uint16_t		inot_count;
165} tstate_t;
166
167#define	LUN_HASH_SIZE		32
168#define	LUN_HASH_FUNC(lun)	((lun) & (LUN_HASH_SIZE - 1))
169
170#endif
171
172/*
173 * Per command info.
174 */
175struct isp_pcmd {
176	struct isp_pcmd *	next;
177	bus_dmamap_t 		dmap;		/* dma map for this command */
178	struct ispsoftc *	isp;		/* containing isp */
179	struct callout		wdog;		/* watchdog timer */
180	uint32_t		datalen;	/* data length for this command (target mode only) */
181	uint8_t			totslen;	/* sense length on status response */
182	uint8_t			cumslen;	/* sense length on status response */
183	uint8_t 		crn;		/* command reference number */
184};
185#define	ISP_PCMD(ccb)		(ccb)->ccb_h.spriv_ptr1
186#define	PISP_PCMD(ccb)		((struct isp_pcmd *)ISP_PCMD(ccb))
187
188/*
189 * Per nexus info.
190 */
191struct isp_nexus {
192	uint64_t lun;			/* LUN for target */
193	uint32_t tgt;			/* TGT for target */
194	uint8_t crnseed;		/* next command reference number */
195	struct isp_nexus *next;
196};
197#define	NEXUS_HASH_WIDTH	32
198#define	INITIAL_NEXUS_COUNT	MAX_FC_TARG
199#define	NEXUS_HASH(tgt, lun)	((tgt + lun) % NEXUS_HASH_WIDTH)
200
201/*
202 * Per channel information
203 */
204SLIST_HEAD(tslist, tstate);
205TAILQ_HEAD(isp_ccbq, ccb_hdr);
206LIST_HEAD(atpdlist, atio_private_data);
207
208struct isp_fc {
209	struct cam_sim *sim;
210	struct cam_path *path;
211	struct ispsoftc *isp;
212	struct proc *kproc;
213	bus_dmamap_t scmap;
214	uint64_t def_wwpn;
215	uint64_t def_wwnn;
216	time_t loop_down_time;
217	int loop_down_limit;
218	int gone_device_time;
219	/*
220	 * Per target/lun info- just to keep a per-ITL nexus crn count
221	 */
222	struct isp_nexus *nexus_hash[NEXUS_HASH_WIDTH];
223	struct isp_nexus *nexus_free_list;
224	uint32_t
225		simqfrozen	: 3,
226		default_id	: 8,
227		def_role	: 2,	/* default role */
228		gdt_running	: 1,
229		loop_dead	: 1,
230		loop_seen_once	: 1,
231		fcbsy		: 1,
232		ready		: 1;
233	struct callout gdt;	/* gone device timer */
234	struct task gtask;
235#ifdef	ISP_TARGET_MODE
236	struct tslist		lun_hash[LUN_HASH_SIZE];
237	struct isp_ccbq		waitq;		/* waiting CCBs */
238	struct ntpdlist		ntfree;
239	inot_private_data_t	ntpool[ATPDPSIZE];
240	struct atpdlist		atfree;
241	struct atpdlist		atused[ATPDPHASHSIZE];
242	atio_private_data_t	atpool[ATPDPSIZE];
243#if defined(DEBUG)
244	unsigned int inject_lost_data_frame;
245#endif
246#endif
247	int			num_threads;
248};
249
250struct isp_spi {
251	struct cam_sim *sim;
252	struct cam_path *path;
253	uint32_t
254		simqfrozen	: 3,
255		iid		: 4;
256#ifdef	ISP_TARGET_MODE
257	struct tslist		lun_hash[LUN_HASH_SIZE];
258	struct isp_ccbq		waitq;		/* waiting CCBs */
259	struct ntpdlist		ntfree;
260	inot_private_data_t	ntpool[ATPDPSIZE];
261	struct atpdlist		atfree;
262	struct atpdlist		atused[ATPDPHASHSIZE];
263	atio_private_data_t	atpool[ATPDPSIZE];
264#endif
265	int			num_threads;
266};
267
268struct isposinfo {
269	/*
270	 * Linkage, locking, and identity
271	 */
272	struct mtx		lock;
273	device_t		dev;
274	struct cdev *		cdev;
275	struct intr_config_hook	ehook;
276	struct cam_devq *	devq;
277
278	/*
279	 * Firmware pointer
280	 */
281	const struct firmware *	fw;
282
283	/*
284	 * DMA related stuff
285	 */
286	struct resource *	regs;
287	struct resource *	regs2;
288	bus_dma_tag_t		dmat;
289	bus_dma_tag_t		reqdmat;
290	bus_dma_tag_t		respdmat;
291	bus_dma_tag_t		atiodmat;
292	bus_dma_tag_t		iocbdmat;
293	bus_dma_tag_t		scdmat;
294	bus_dmamap_t		reqmap;
295	bus_dmamap_t		respmap;
296	bus_dmamap_t		atiomap;
297	bus_dmamap_t		iocbmap;
298
299	/*
300	 * Command and transaction related related stuff
301	 */
302	struct isp_pcmd *	pcmd_pool;
303	struct isp_pcmd *	pcmd_free;
304
305	uint32_t
306#ifdef	ISP_TARGET_MODE
307		tmwanted	: 1,
308		tmbusy		: 1,
309#else
310				: 2,
311#endif
312		sixtyfourbit	: 1,	/* sixtyfour bit platform */
313		timer_active	: 1,
314		autoconf	: 1,
315		ehook_active	: 1,
316		mbox_sleeping	: 1,
317		mbox_sleep_ok	: 1,
318		mboxcmd_done	: 1,
319		mboxbsy		: 1;
320
321	struct callout		tmo;	/* general timer */
322
323	/*
324	 * misc- needs to be sorted better XXXXXX
325	 */
326	int			framesize;
327	int			exec_throttle;
328	int			cont_max;
329
330	bus_addr_t		ecmd_dma;
331	isp_ecmd_t *		ecmd_base;
332	isp_ecmd_t *		ecmd_free;
333
334	/*
335	 * Per-type private storage...
336	 */
337	union {
338		struct isp_fc *fc;
339		struct isp_spi *spi;
340		void *ptr;
341	} pc;
342
343	int			is_exiting;
344};
345#define	ISP_FC_PC(isp, chan)	(&(isp)->isp_osinfo.pc.fc[(chan)])
346#define	ISP_SPI_PC(isp, chan)	(&(isp)->isp_osinfo.pc.spi[(chan)])
347#define	ISP_GET_PC(isp, chan, tag, rslt)		\
348	if (IS_SCSI(isp)) {				\
349		rslt = ISP_SPI_PC(isp, chan)-> tag;	\
350	} else {					\
351		rslt = ISP_FC_PC(isp, chan)-> tag;	\
352	}
353#define	ISP_GET_PC_ADDR(isp, chan, tag, rp)		\
354	if (IS_SCSI(isp)) {				\
355		rp = &ISP_SPI_PC(isp, chan)-> tag;	\
356	} else {					\
357		rp = &ISP_FC_PC(isp, chan)-> tag;	\
358	}
359#define	ISP_SET_PC(isp, chan, tag, val)			\
360	if (IS_SCSI(isp)) {				\
361		ISP_SPI_PC(isp, chan)-> tag = val;	\
362	} else {					\
363		ISP_FC_PC(isp, chan)-> tag = val;	\
364	}
365
366#define	FCP_NEXT_CRN	isp_fcp_next_crn
367#define	isp_lock	isp_osinfo.lock
368#define	isp_regs	isp_osinfo.regs
369#define	isp_regs2	isp_osinfo.regs2
370
371/*
372 * Locking macros...
373 */
374#define	ISP_LOCK(isp)	mtx_lock(&(isp)->isp_osinfo.lock)
375#define	ISP_UNLOCK(isp)	mtx_unlock(&(isp)->isp_osinfo.lock)
376#define	ISP_ASSERT_LOCKED(isp)	mtx_assert(&(isp)->isp_osinfo.lock, MA_OWNED)
377
378/*
379 * Required Macros/Defines
380 */
381#define	ISP_FC_SCRLEN		0x1000
382
383#define	ISP_MEMZERO(a, b)	memset(a, 0, b)
384#define	ISP_MEMCPY		memcpy
385#define	ISP_SNPRINTF		snprintf
386#define	ISP_DELAY(x)		DELAY(x)
387#if __FreeBSD_version < 1000029
388#define	ISP_SLEEP(isp, x)	msleep(&(isp)->isp_osinfo.is_exiting, \
389    &(isp)->isp_osinfo.lock, 0, "isp_sleep", ((x) + tick - 1) / tick)
390#else
391#define	ISP_SLEEP(isp, x)	msleep_sbt(&(isp)->isp_osinfo.is_exiting, \
392    &(isp)->isp_osinfo.lock, 0, "isp_sleep", (x) * SBT_1US, 0, 0)
393#endif
394
395#define	ISP_MIN			imin
396
397#ifndef	DIAGNOSTIC
398#define	ISP_INLINE		__inline
399#else
400#define	ISP_INLINE
401#endif
402
403#define	NANOTIME_T		struct timespec
404#define	GET_NANOTIME		nanotime
405#define	GET_NANOSEC(x)		((x)->tv_sec * 1000000000 + (x)->tv_nsec)
406#define	NANOTIME_SUB		isp_nanotime_sub
407
408#define	MAXISPREQUEST(isp)	((IS_FC(isp) || IS_ULTRA2(isp))? 1024 : 256)
409
410#define	MEMORYBARRIER(isp, type, offset, size, chan)		\
411switch (type) {							\
412case SYNC_REQUEST:						\
413	bus_dmamap_sync(isp->isp_osinfo.reqdmat,		\
414	   isp->isp_osinfo.reqmap, BUS_DMASYNC_PREWRITE);	\
415	break;							\
416case SYNC_RESULT:						\
417	bus_dmamap_sync(isp->isp_osinfo.respdmat, 		\
418	   isp->isp_osinfo.respmap, BUS_DMASYNC_POSTREAD);	\
419	break;							\
420case SYNC_SFORDEV:						\
421{								\
422	struct isp_fc *fc = ISP_FC_PC(isp, chan);		\
423	bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap,	\
424	   BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);		\
425	break;							\
426}								\
427case SYNC_SFORCPU:						\
428{								\
429	struct isp_fc *fc = ISP_FC_PC(isp, chan);		\
430	bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap,	\
431	   BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);	\
432	break;							\
433}								\
434case SYNC_REG:							\
435	bus_barrier(isp->isp_osinfo.regs, offset, size,		\
436	    BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);	\
437	break;							\
438case SYNC_ATIOQ:						\
439	bus_dmamap_sync(isp->isp_osinfo.atiodmat, 		\
440	   isp->isp_osinfo.atiomap, BUS_DMASYNC_POSTREAD);	\
441	break;							\
442case SYNC_IFORDEV:						\
443	bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \
444	   BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);		\
445	break;							\
446case SYNC_IFORCPU:						\
447	bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \
448	   BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);	\
449	break;							\
450default:							\
451	break;							\
452}
453
454#define	MEMORYBARRIERW(isp, type, offset, size, chan)		\
455switch (type) {							\
456case SYNC_REQUEST:						\
457	bus_dmamap_sync(isp->isp_osinfo.reqdmat,		\
458	   isp->isp_osinfo.reqmap, BUS_DMASYNC_PREWRITE);	\
459	break;							\
460case SYNC_SFORDEV:						\
461{								\
462	struct isp_fc *fc = ISP_FC_PC(isp, chan);		\
463	bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap,	\
464	   BUS_DMASYNC_PREWRITE);				\
465	break;							\
466}								\
467case SYNC_SFORCPU:						\
468{								\
469	struct isp_fc *fc = ISP_FC_PC(isp, chan);		\
470	bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap,	\
471	   BUS_DMASYNC_POSTWRITE);				\
472	break;							\
473}								\
474case SYNC_REG:							\
475	bus_barrier(isp->isp_osinfo.regs, offset, size,		\
476	    BUS_SPACE_BARRIER_WRITE);				\
477	break;							\
478case SYNC_IFORDEV:						\
479	bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \
480	   BUS_DMASYNC_PREWRITE);				\
481	break;							\
482case SYNC_IFORCPU:						\
483	bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \
484	   BUS_DMASYNC_POSTWRITE);				\
485	break;							\
486default:							\
487	break;							\
488}
489
490#define	MBOX_ACQUIRE			isp_mbox_acquire
491#define	MBOX_WAIT_COMPLETE		isp_mbox_wait_complete
492#define	MBOX_NOTIFY_COMPLETE		isp_mbox_notify_done
493#define	MBOX_RELEASE			isp_mbox_release
494
495#define	FC_SCRATCH_ACQUIRE		isp_fc_scratch_acquire
496#define	FC_SCRATCH_RELEASE(isp, chan)	isp->isp_osinfo.pc.fc[chan].fcbsy = 0
497
498#ifndef	SCSI_GOOD
499#define	SCSI_GOOD	SCSI_STATUS_OK
500#endif
501#ifndef	SCSI_CHECK
502#define	SCSI_CHECK	SCSI_STATUS_CHECK_COND
503#endif
504#ifndef	SCSI_BUSY
505#define	SCSI_BUSY	SCSI_STATUS_BUSY
506#endif
507#ifndef	SCSI_QFULL
508#define	SCSI_QFULL	SCSI_STATUS_QUEUE_FULL
509#endif
510
511#define	XS_T			struct ccb_scsiio
512#define	XS_DMA_ADDR_T		bus_addr_t
513#define XS_GET_DMA64_SEG(a, b, c)		\
514{						\
515	ispds64_t *d = a;			\
516	bus_dma_segment_t *e = b;		\
517	uint32_t f = c;				\
518	e += f;					\
519        d->ds_base = DMA_LO32(e->ds_addr);	\
520        d->ds_basehi = DMA_HI32(e->ds_addr);	\
521        d->ds_count = e->ds_len;		\
522}
523#define XS_GET_DMA_SEG(a, b, c)			\
524{						\
525	ispds_t *d = a;				\
526	bus_dma_segment_t *e = b;		\
527	uint32_t f = c;				\
528	e += f;					\
529        d->ds_base = DMA_LO32(e->ds_addr);	\
530        d->ds_count = e->ds_len;		\
531}
532#define	XS_ISP(ccb)		cam_sim_softc(xpt_path_sim((ccb)->ccb_h.path))
533#define	XS_CHANNEL(ccb)		cam_sim_bus(xpt_path_sim((ccb)->ccb_h.path))
534#define	XS_TGT(ccb)		(ccb)->ccb_h.target_id
535#define	XS_LUN(ccb)		(ccb)->ccb_h.target_lun
536
537#define	XS_CDBP(ccb)	\
538	(((ccb)->ccb_h.flags & CAM_CDB_POINTER)? \
539	 (ccb)->cdb_io.cdb_ptr : (ccb)->cdb_io.cdb_bytes)
540
541#define	XS_CDBLEN(ccb)		(ccb)->cdb_len
542#define	XS_XFRLEN(ccb)		(ccb)->dxfer_len
543#define	XS_TIME(ccb)		(ccb)->ccb_h.timeout
544#define	XS_GET_RESID(ccb)	(ccb)->resid
545#define	XS_SET_RESID(ccb, r)	(ccb)->resid = r
546#define	XS_STSP(ccb)		(&(ccb)->scsi_status)
547#define	XS_SNSP(ccb)		(&(ccb)->sense_data)
548
549#define	XS_TOT_SNSLEN(ccb)	ccb->sense_len
550#define	XS_CUR_SNSLEN(ccb)	(ccb->sense_len - ccb->sense_resid)
551
552#define	XS_SNSKEY(ccb)		(scsi_get_sense_key(&(ccb)->sense_data, \
553				 ccb->sense_len - ccb->sense_resid, 1))
554
555#define	XS_SNSASC(ccb)		(scsi_get_asc(&(ccb)->sense_data,	\
556				 ccb->sense_len - ccb->sense_resid, 1))
557
558#define	XS_SNSASCQ(ccb)		(scsi_get_ascq(&(ccb)->sense_data,	\
559				 ccb->sense_len - ccb->sense_resid, 1))
560#define	XS_TAG_P(ccb)	\
561	(((ccb)->ccb_h.flags & CAM_TAG_ACTION_VALID) && \
562	 (ccb)->tag_action != CAM_TAG_ACTION_NONE)
563
564#define	XS_TAG_TYPE(ccb)	\
565	((ccb->tag_action == MSG_SIMPLE_Q_TAG)? REQFLAG_STAG : \
566	 ((ccb->tag_action == MSG_HEAD_OF_Q_TAG)? REQFLAG_HTAG : REQFLAG_OTAG))
567
568
569#define	XS_SETERR(ccb, v)	(ccb)->ccb_h.status &= ~CAM_STATUS_MASK, \
570				(ccb)->ccb_h.status |= v
571
572#	define	HBA_NOERROR		CAM_REQ_INPROG
573#	define	HBA_BOTCH		CAM_UNREC_HBA_ERROR
574#	define	HBA_CMDTIMEOUT		CAM_CMD_TIMEOUT
575#	define	HBA_SELTIMEOUT		CAM_SEL_TIMEOUT
576#	define	HBA_TGTBSY		CAM_SCSI_STATUS_ERROR
577#	define	HBA_REQINVAL		CAM_REQ_INVALID
578#	define	HBA_BUSRESET		CAM_SCSI_BUS_RESET
579#	define	HBA_ABORTED		CAM_REQ_ABORTED
580#	define	HBA_DATAOVR		CAM_DATA_RUN_ERR
581#	define	HBA_ARQFAIL		CAM_AUTOSENSE_FAIL
582
583
584#define	XS_ERR(ccb)		((ccb)->ccb_h.status & CAM_STATUS_MASK)
585
586#define	XS_NOERR(ccb)		(((ccb)->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG)
587
588#define	XS_INITERR(ccb)		XS_SETERR(ccb, CAM_REQ_INPROG), ccb->sense_resid = ccb->sense_len
589
590#define	XS_SAVE_SENSE(xs, sense_ptr, totslen, slen)	do {			\
591		uint32_t tlen = slen;						\
592		if (tlen > (xs)->sense_len)					\
593			tlen = (xs)->sense_len;					\
594		PISP_PCMD(xs)->totslen = imin((xs)->sense_len, totslen);	\
595		PISP_PCMD(xs)->cumslen = tlen;					\
596		memcpy(&(xs)->sense_data, sense_ptr, tlen);			\
597		(xs)->sense_resid = (xs)->sense_len - tlen;			\
598		(xs)->ccb_h.status |= CAM_AUTOSNS_VALID;			\
599	} while (0)
600
601#define	XS_SENSE_APPEND(xs, xsnsp, xsnsl)	do {				\
602		uint32_t off = PISP_PCMD(xs)->cumslen;				\
603		uint8_t *ptr = &((uint8_t *)(&(xs)->sense_data))[off];		\
604		uint32_t amt = imin(xsnsl, PISP_PCMD(xs)->totslen - off);	\
605		if (amt) {							\
606			memcpy(ptr, xsnsp, amt);				\
607			(xs)->sense_resid -= amt;				\
608			PISP_PCMD(xs)->cumslen += amt;				\
609		}								\
610	} while (0)
611
612#define	XS_SENSE_VALID(xs)	(((xs)->ccb_h.status & CAM_AUTOSNS_VALID) != 0)
613
614#define	DEFAULT_FRAMESIZE(isp)		isp->isp_osinfo.framesize
615#define	DEFAULT_EXEC_THROTTLE(isp)	isp->isp_osinfo.exec_throttle
616
617#define	DEFAULT_ROLE(isp, chan)	\
618	(IS_FC(isp)? ISP_FC_PC(isp, chan)->def_role : ISP_ROLE_INITIATOR)
619
620#define	DEFAULT_IID(isp, chan)		isp->isp_osinfo.pc.spi[chan].iid
621
622#define	DEFAULT_LOOPID(x, chan)		isp->isp_osinfo.pc.fc[chan].default_id
623
624#define DEFAULT_NODEWWN(isp, chan)  	isp_default_wwn(isp, chan, 0, 1)
625#define DEFAULT_PORTWWN(isp, chan)  	isp_default_wwn(isp, chan, 0, 0)
626#define ACTIVE_NODEWWN(isp, chan)   	isp_default_wwn(isp, chan, 1, 1)
627#define ACTIVE_PORTWWN(isp, chan)   	isp_default_wwn(isp, chan, 1, 0)
628
629
630#if	BYTE_ORDER == BIG_ENDIAN
631#ifdef	ISP_SBUS_SUPPORTED
632#define	ISP_IOXPUT_8(isp, s, d)		*(d) = s
633#define	ISP_IOXPUT_16(isp, s, d)				\
634	*(d) = (isp->isp_bustype == ISP_BT_SBUS)? s : bswap16(s)
635#define	ISP_IOXPUT_32(isp, s, d)				\
636	*(d) = (isp->isp_bustype == ISP_BT_SBUS)? s : bswap32(s)
637#define	ISP_IOXGET_8(isp, s, d)		d = (*((uint8_t *)s))
638#define	ISP_IOXGET_16(isp, s, d)				\
639	d = (isp->isp_bustype == ISP_BT_SBUS)?			\
640	*((uint16_t *)s) : bswap16(*((uint16_t *)s))
641#define	ISP_IOXGET_32(isp, s, d)				\
642	d = (isp->isp_bustype == ISP_BT_SBUS)?			\
643	*((uint32_t *)s) : bswap32(*((uint32_t *)s))
644
645#else	/* ISP_SBUS_SUPPORTED */
646#define	ISP_IOXPUT_8(isp, s, d)		*(d) = s
647#define	ISP_IOXPUT_16(isp, s, d)	*(d) = bswap16(s)
648#define	ISP_IOXPUT_32(isp, s, d)	*(d) = bswap32(s)
649#define	ISP_IOXGET_8(isp, s, d)		d = (*((uint8_t *)s))
650#define	ISP_IOXGET_16(isp, s, d)	d = bswap16(*((uint16_t *)s))
651#define	ISP_IOXGET_32(isp, s, d)	d = bswap32(*((uint32_t *)s))
652#endif
653#define	ISP_SWIZZLE_NVRAM_WORD(isp, rp)	*rp = bswap16(*rp)
654#define	ISP_SWIZZLE_NVRAM_LONG(isp, rp)	*rp = bswap32(*rp)
655
656#define	ISP_IOZGET_8(isp, s, d)		d = (*((uint8_t *)s))
657#define	ISP_IOZGET_16(isp, s, d)	d = (*((uint16_t *)s))
658#define	ISP_IOZGET_32(isp, s, d)	d = (*((uint32_t *)s))
659#define	ISP_IOZPUT_8(isp, s, d)		*(d) = s
660#define	ISP_IOZPUT_16(isp, s, d)	*(d) = s
661#define	ISP_IOZPUT_32(isp, s, d)	*(d) = s
662
663
664#else
665#define	ISP_IOXPUT_8(isp, s, d)		*(d) = s
666#define	ISP_IOXPUT_16(isp, s, d)	*(d) = s
667#define	ISP_IOXPUT_32(isp, s, d)	*(d) = s
668#define	ISP_IOXGET_8(isp, s, d)		d = *(s)
669#define	ISP_IOXGET_16(isp, s, d)	d = *(s)
670#define	ISP_IOXGET_32(isp, s, d)	d = *(s)
671#define	ISP_SWIZZLE_NVRAM_WORD(isp, rp)
672#define	ISP_SWIZZLE_NVRAM_LONG(isp, rp)
673
674#define	ISP_IOZPUT_8(isp, s, d)		*(d) = s
675#define	ISP_IOZPUT_16(isp, s, d)	*(d) = bswap16(s)
676#define	ISP_IOZPUT_32(isp, s, d)	*(d) = bswap32(s)
677
678#define	ISP_IOZGET_8(isp, s, d)		d = (*((uint8_t *)(s)))
679#define	ISP_IOZGET_16(isp, s, d)	d = bswap16(*((uint16_t *)(s)))
680#define	ISP_IOZGET_32(isp, s, d)	d = bswap32(*((uint32_t *)(s)))
681
682#endif
683
684#define	ISP_SWAP16(isp, s)	bswap16(s)
685#define	ISP_SWAP32(isp, s)	bswap32(s)
686
687/*
688 * Includes of common header files
689 */
690
691#include <dev/isp/ispreg.h>
692#include <dev/isp/ispvar.h>
693#include <dev/isp/ispmbox.h>
694
695/*
696 * isp_osinfo definiitions && shorthand
697 */
698#define	SIMQFRZ_RESOURCE	0x1
699#define	SIMQFRZ_LOOPDOWN	0x2
700#define	SIMQFRZ_TIMED		0x4
701
702#define	isp_dev		isp_osinfo.dev
703
704/*
705 * prototypes for isp_pci && isp_freebsd to share
706 */
707extern int isp_attach(ispsoftc_t *);
708extern int isp_detach(ispsoftc_t *);
709extern void isp_uninit(ispsoftc_t *);
710extern uint64_t isp_default_wwn(ispsoftc_t *, int, int, int);
711
712/*
713 * driver global data
714 */
715extern int isp_announced;
716extern int isp_loop_down_limit;
717extern int isp_gone_device_time;
718extern int isp_quickboot_time;
719
720/*
721 * Platform private flags
722 */
723
724/*
725 * Platform Library Functions
726 */
727void isp_prt(ispsoftc_t *, int level, const char *, ...) __printflike(3, 4);
728void isp_xs_prt(ispsoftc_t *, XS_T *, int level, const char *, ...) __printflike(4, 5);
729uint64_t isp_nanotime_sub(struct timespec *, struct timespec *);
730int isp_mbox_acquire(ispsoftc_t *);
731void isp_mbox_wait_complete(ispsoftc_t *, mbreg_t *);
732void isp_mbox_notify_done(ispsoftc_t *);
733void isp_mbox_release(ispsoftc_t *);
734int isp_fc_scratch_acquire(ispsoftc_t *, int);
735int isp_mstohz(int);
736void isp_platform_intr(void *);
737void isp_common_dmateardown(ispsoftc_t *, struct ccb_scsiio *, uint32_t);
738void isp_fcp_reset_crn(ispsoftc_t *, int, uint32_t, int);
739int isp_fcp_next_crn(ispsoftc_t *, uint8_t *, XS_T *);
740
741/*
742 * Platform Version specific defines
743 */
744#define	BUS_DMA_ROOTARG(x)	bus_get_dma_tag(x)
745#define	isp_dma_tag_create(a, b, c, d, e, f, g, h, i, j, k, z)	\
746	bus_dma_tag_create(a, b, c, d, e, f, g, h, i, j, k, \
747	busdma_lock_mutex, &isp->isp_osinfo.lock, z)
748
749#define	isp_setup_intr	bus_setup_intr
750
751#define	isp_sim_alloc(a, b, c, d, e, f, g, h)	\
752	cam_sim_alloc(a, b, c, d, e, &(d)->isp_osinfo.lock, f, g, h)
753
754#define	ISP_PATH_PRT(i, l, p, ...)					\
755	if ((l) == ISP_LOGALL || ((l)& (i)->isp_dblev) != 0) {		\
756                xpt_print(p, __VA_ARGS__);				\
757        }
758
759/*
760 * Platform specific inline functions
761 */
762
763/*
764 * ISP General Library functions
765 */
766
767#include <dev/isp/isp_library.h>
768
769#endif	/* _ISP_FREEBSD_H */
770