mv_twsi.c revision 294435
1/*-
2 * Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
3 * All rights reserved.
4 *
5 * Developed by Semihalf.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of MARVELL nor the names of contributors
16 *    may be used to endorse or promote products derived from this software
17 *    without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31
32/*
33 * Driver for the TWSI (aka I2C, aka IIC) bus controller found on Marvell
34 * SoCs. Supports master operation only, and works in polling mode.
35 *
36 * Calls to DELAY() are needed per Application Note AN-179 "TWSI Software
37 * Guidelines for Discovery(TM), Horizon (TM) and Feroceon(TM) Devices".
38 */
39
40#include <sys/cdefs.h>
41__FBSDID("$FreeBSD: head/sys/arm/mv/twsi.c 294435 2016-01-20 14:21:06Z zbb $");
42
43#include <sys/param.h>
44#include <sys/systm.h>
45#include <sys/bus.h>
46#include <sys/kernel.h>
47#include <sys/module.h>
48#include <sys/resource.h>
49
50#include <machine/_inttypes.h>
51#include <machine/bus.h>
52#include <machine/resource.h>
53
54#include <sys/rman.h>
55
56#include <sys/lock.h>
57#include <sys/mutex.h>
58
59#include <dev/iicbus/iiconf.h>
60#include <dev/iicbus/iicbus.h>
61#include <dev/fdt/fdt_common.h>
62#include <dev/ofw/ofw_bus.h>
63#include <dev/ofw/ofw_bus_subr.h>
64
65#include <arm/mv/mvreg.h>
66#include <arm/mv/mvvar.h>
67
68#include "iicbus_if.h"
69
70#define MV_TWSI_NAME		"twsi"
71#define	IICBUS_DEVNAME		"iicbus"
72
73#define TWSI_SLAVE_ADDR		0x00
74#define TWSI_EXT_SLAVE_ADDR	0x10
75#define TWSI_DATA		0x04
76
77#define TWSI_CONTROL		0x08
78#define TWSI_CONTROL_ACK	(1 << 2)
79#define TWSI_CONTROL_IFLG	(1 << 3)
80#define TWSI_CONTROL_STOP	(1 << 4)
81#define TWSI_CONTROL_START	(1 << 5)
82#define TWSI_CONTROL_TWSIEN	(1 << 6)
83#define TWSI_CONTROL_INTEN	(1 << 7)
84
85#define TWSI_STATUS			0x0c
86#define TWSI_STATUS_START		0x08
87#define TWSI_STATUS_RPTD_START		0x10
88#define TWSI_STATUS_ADDR_W_ACK		0x18
89#define TWSI_STATUS_DATA_WR_ACK		0x28
90#define TWSI_STATUS_ADDR_R_ACK		0x40
91#define TWSI_STATUS_DATA_RD_ACK		0x50
92#define TWSI_STATUS_DATA_RD_NOACK	0x58
93
94#define TWSI_BAUD_RATE		0x0c
95#define	TWSI_BAUD_RATE_PARAM(M,N)	((((M) << 3) | ((N) & 0x7)) & 0x7f)
96#define	TWSI_BAUD_RATE_RAW(C,M,N)	((C)/((10*(M+1))<<(N+1)))
97#define	TWSI_BAUD_RATE_SLOW		50000	/* 50kHz */
98#define	TWSI_BAUD_RATE_FAST		100000	/* 100kHz */
99
100#define TWSI_SOFT_RESET		0x1c
101
102#define TWSI_DEBUG
103#undef TWSI_DEBUG
104
105#ifdef  TWSI_DEBUG
106#define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt,##args); } while (0)
107#else
108#define debugf(fmt, args...)
109#endif
110
111struct mv_twsi_softc {
112	device_t	dev;
113	struct resource	*res[1];	/* SYS_RES_MEMORY */
114	struct mtx	mutex;
115	device_t	iicbus;
116};
117
118static struct mv_twsi_baud_rate {
119	uint32_t	raw;
120	int		param;
121	int		m;
122	int		n;
123} baud_rate[IIC_FASTEST + 1];
124
125static int mv_twsi_probe(device_t);
126static int mv_twsi_attach(device_t);
127static int mv_twsi_detach(device_t);
128
129static int mv_twsi_reset(device_t dev, u_char speed, u_char addr,
130    u_char *oldaddr);
131static int mv_twsi_repeated_start(device_t dev, u_char slave, int timeout);
132static int mv_twsi_start(device_t dev, u_char slave, int timeout);
133static int mv_twsi_stop(device_t dev);
134static int mv_twsi_read(device_t dev, char *buf, int len, int *read, int last,
135    int delay);
136static int mv_twsi_write(device_t dev, const char *buf, int len, int *sent,
137    int timeout);
138
139static struct resource_spec res_spec[] = {
140	{ SYS_RES_MEMORY, 0, RF_ACTIVE },
141	{ -1, 0 }
142};
143
144static struct ofw_compat_data compat_data[] = {
145	{ "mrvl,twsi",			true },
146	{ "marvell,mv64xxx-i2c",	true },
147	{ NULL,				false }
148};
149
150static device_method_t mv_twsi_methods[] = {
151	/* device interface */
152	DEVMETHOD(device_probe,		mv_twsi_probe),
153	DEVMETHOD(device_attach,	mv_twsi_attach),
154	DEVMETHOD(device_detach,	mv_twsi_detach),
155
156	/* iicbus interface */
157	DEVMETHOD(iicbus_callback, iicbus_null_callback),
158	DEVMETHOD(iicbus_repeated_start, mv_twsi_repeated_start),
159	DEVMETHOD(iicbus_start,		mv_twsi_start),
160	DEVMETHOD(iicbus_stop,		mv_twsi_stop),
161	DEVMETHOD(iicbus_write,		mv_twsi_write),
162	DEVMETHOD(iicbus_read,		mv_twsi_read),
163	DEVMETHOD(iicbus_reset,		mv_twsi_reset),
164	DEVMETHOD(iicbus_transfer,	iicbus_transfer_gen),
165	{ 0, 0 }
166};
167
168static devclass_t mv_twsi_devclass;
169
170static driver_t mv_twsi_driver = {
171	MV_TWSI_NAME,
172	mv_twsi_methods,
173	sizeof(struct mv_twsi_softc),
174};
175
176DRIVER_MODULE(twsi, simplebus, mv_twsi_driver, mv_twsi_devclass, 0, 0);
177DRIVER_MODULE(iicbus, twsi, iicbus_driver, iicbus_devclass, 0, 0);
178MODULE_DEPEND(twsi, iicbus, 1, 1, 1);
179
180static __inline uint32_t
181TWSI_READ(struct mv_twsi_softc *sc, bus_size_t off)
182{
183
184	return (bus_read_4(sc->res[0], off));
185}
186
187static __inline void
188TWSI_WRITE(struct mv_twsi_softc *sc, bus_size_t off, uint32_t val)
189{
190
191	bus_write_4(sc->res[0], off, val);
192}
193
194static __inline void
195twsi_control_clear(struct mv_twsi_softc *sc, uint32_t mask)
196{
197	uint32_t val;
198
199	val = TWSI_READ(sc, TWSI_CONTROL);
200	val &= ~mask;
201	TWSI_WRITE(sc, TWSI_CONTROL, val);
202}
203
204static __inline void
205twsi_control_set(struct mv_twsi_softc *sc, uint32_t mask)
206{
207	uint32_t val;
208
209	val = TWSI_READ(sc, TWSI_CONTROL);
210	val |= mask;
211	TWSI_WRITE(sc, TWSI_CONTROL, val);
212}
213
214static __inline void
215twsi_clear_iflg(struct mv_twsi_softc *sc)
216{
217
218	DELAY(1000);
219	twsi_control_clear(sc, TWSI_CONTROL_IFLG);
220	DELAY(1000);
221}
222
223
224/*
225 * timeout given in us
226 * returns
227 *   0 on sucessfull mask change
228 *   non-zero on timeout
229 */
230static int
231twsi_poll_ctrl(struct mv_twsi_softc *sc, int timeout, uint32_t mask)
232{
233
234	timeout /= 10;
235	while (!(TWSI_READ(sc, TWSI_CONTROL) & mask)) {
236		DELAY(10);
237		if (--timeout < 0)
238			return (timeout);
239	}
240	return (0);
241}
242
243
244/*
245 * 'timeout' is given in us. Note also that timeout handling is not exact --
246 * twsi_locked_start() total wait can be more than 2 x timeout
247 * (twsi_poll_ctrl() is called twice). 'mask' can be either TWSI_STATUS_START
248 * or TWSI_STATUS_RPTD_START
249 */
250static int
251twsi_locked_start(device_t dev, struct mv_twsi_softc *sc, int32_t mask,
252    u_char slave, int timeout)
253{
254	int read_access, iflg_set = 0;
255	uint32_t status;
256
257	mtx_assert(&sc->mutex, MA_OWNED);
258
259	if (mask == TWSI_STATUS_RPTD_START)
260		/* read IFLG to know if it should be cleared later; from NBSD */
261		iflg_set = TWSI_READ(sc, TWSI_CONTROL) & TWSI_CONTROL_IFLG;
262
263	twsi_control_set(sc, TWSI_CONTROL_START);
264
265	if (mask == TWSI_STATUS_RPTD_START && iflg_set) {
266		debugf("IFLG set, clearing\n");
267		twsi_clear_iflg(sc);
268	}
269
270	/*
271	 * Without this delay we timeout checking IFLG if the timeout is 0.
272	 * NBSD driver always waits here too.
273	 */
274	DELAY(1000);
275
276	if (twsi_poll_ctrl(sc, timeout, TWSI_CONTROL_IFLG)) {
277		debugf("timeout sending %sSTART condition\n",
278		    mask == TWSI_STATUS_START ? "" : "repeated ");
279		return (IIC_ETIMEOUT);
280	}
281
282	status = TWSI_READ(sc, TWSI_STATUS);
283	if (status != mask) {
284		debugf("wrong status (%02x) after sending %sSTART condition\n",
285		    status, mask == TWSI_STATUS_START ? "" : "repeated ");
286		return (IIC_ESTATUS);
287	}
288
289	TWSI_WRITE(sc, TWSI_DATA, slave);
290	DELAY(1000);
291	twsi_clear_iflg(sc);
292
293	if (twsi_poll_ctrl(sc, timeout, TWSI_CONTROL_IFLG)) {
294		debugf("timeout sending slave address\n");
295		return (IIC_ETIMEOUT);
296	}
297
298	read_access = (slave & 0x1) ? 1 : 0;
299	status = TWSI_READ(sc, TWSI_STATUS);
300	if (status != (read_access ?
301	    TWSI_STATUS_ADDR_R_ACK : TWSI_STATUS_ADDR_W_ACK)) {
302		debugf("no ACK (status: %02x) after sending slave address\n",
303		    status);
304		return (IIC_ENOACK);
305	}
306
307	return (IIC_NOERR);
308}
309
310static int
311mv_twsi_probe(device_t dev)
312{
313
314	if (!ofw_bus_status_okay(dev))
315		return (ENXIO);
316
317	if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
318		return (ENXIO);
319
320	device_set_desc(dev, "Marvell Integrated I2C Bus Controller");
321	return (BUS_PROBE_DEFAULT);
322}
323
324#define	ABSSUB(a,b)	(((a) > (b)) ? (a) - (b) : (b) - (a))
325static void
326mv_twsi_cal_baud_rate(const uint32_t target, struct mv_twsi_baud_rate *rate)
327{
328	uint32_t clk, cur, diff, diff0;
329	int m, n, m0, n0;
330
331	/* Calculate baud rate. */
332	m0 = n0 = 4;	/* Default values on reset */
333	diff0 = 0xffffffff;
334	clk = get_tclk();
335
336	for (n = 0; n < 8; n++) {
337		for (m = 0; m < 16; m++) {
338			cur = TWSI_BAUD_RATE_RAW(clk,m,n);
339			diff = ABSSUB(target, cur);
340			if (diff < diff0) {
341				m0 = m;
342				n0 = n;
343				diff0 = diff;
344			}
345		}
346	}
347	rate->raw = TWSI_BAUD_RATE_RAW(clk, m0, n0);
348	rate->param = TWSI_BAUD_RATE_PARAM(m0, n0);
349	rate->m = m0;
350	rate->n = n0;
351}
352
353static int
354mv_twsi_attach(device_t dev)
355{
356	struct mv_twsi_softc *sc;
357	phandle_t child, iicbusnode;
358	device_t childdev;
359	struct iicbus_ivar *devi;
360	char dname[32];	/* 32 is taken from struct u_device */
361	uint32_t paddr;
362	int len, error;
363
364	sc = device_get_softc(dev);
365	sc->dev = dev;
366	bzero(baud_rate, sizeof(baud_rate));
367
368	mtx_init(&sc->mutex, device_get_nameunit(dev), MV_TWSI_NAME, MTX_DEF);
369
370	/* Allocate IO resources */
371	if (bus_alloc_resources(dev, res_spec, sc->res)) {
372		device_printf(dev, "could not allocate resources\n");
373		mv_twsi_detach(dev);
374		return (ENXIO);
375	}
376
377	mv_twsi_cal_baud_rate(TWSI_BAUD_RATE_SLOW, &baud_rate[IIC_SLOW]);
378	mv_twsi_cal_baud_rate(TWSI_BAUD_RATE_FAST, &baud_rate[IIC_FAST]);
379	if (bootverbose)
380		device_printf(dev, "calculated baud rates are:\n"
381		    " %" PRIu32 " kHz (M=%d, N=%d) for slow,\n"
382		    " %" PRIu32 " kHz (M=%d, N=%d) for fast.\n",
383		    baud_rate[IIC_SLOW].raw / 1000,
384		    baud_rate[IIC_SLOW].m,
385		    baud_rate[IIC_SLOW].n,
386		    baud_rate[IIC_FAST].raw / 1000,
387		    baud_rate[IIC_FAST].m,
388		    baud_rate[IIC_FAST].n);
389
390	sc->iicbus = device_add_child(dev, IICBUS_DEVNAME, -1);
391	if (sc->iicbus == NULL) {
392		device_printf(dev, "could not add iicbus child\n");
393		mv_twsi_detach(dev);
394		return (ENXIO);
395	}
396	/* Attach iicbus. */
397	bus_generic_attach(dev);
398
399	iicbusnode = 0;
400	/* Find iicbus as the child devices in the device tree. */
401	for (child = OF_child(ofw_bus_get_node(dev)); child != 0;
402	    child = OF_peer(child)) {
403		len = OF_getproplen(child, "model");
404		if (len <= 0 || len > sizeof(dname) - 1)
405			continue;
406		error = OF_getprop(child, "model", &dname, len);
407		dname[len + 1] = '\0';
408		if (error == -1)
409			continue;
410		len = strlen(dname);
411		if (len == strlen(IICBUS_DEVNAME) &&
412		    strncasecmp(dname, IICBUS_DEVNAME, len) == 0) {
413			iicbusnode = child;
414			break;
415		}
416	}
417	if (iicbusnode == 0)
418		goto attach_end;
419
420	/* Attach child devices onto iicbus. */
421	for (child = OF_child(iicbusnode); child != 0; child = OF_peer(child)) {
422		/* Get slave address. */
423		error = OF_getprop(child, "i2c-address", &paddr, sizeof(paddr));
424		if (error == -1)
425			error = OF_getprop(child, "reg", &paddr, sizeof(paddr));
426		if (error == -1)
427			continue;
428
429		/* Get device driver name. */
430		len = OF_getproplen(child, "model");
431		if (len <= 0 || len > sizeof(dname) - 1)
432			continue;
433		OF_getprop(child, "model", &dname, len);
434		dname[len + 1] = '\0';
435
436		if (bootverbose)
437			device_printf(dev, "adding a device %s at %d.\n",
438			    dname, fdt32_to_cpu(paddr));
439		childdev = BUS_ADD_CHILD(sc->iicbus, 0, dname, -1);
440		devi = IICBUS_IVAR(childdev);
441		devi->addr = fdt32_to_cpu(paddr);
442	}
443
444attach_end:
445	bus_generic_attach(sc->iicbus);
446
447	return (0);
448}
449
450static int
451mv_twsi_detach(device_t dev)
452{
453	struct mv_twsi_softc *sc;
454	int rv;
455
456	sc = device_get_softc(dev);
457
458	if ((rv = bus_generic_detach(dev)) != 0)
459		return (rv);
460
461	if (sc->iicbus != NULL)
462		if ((rv = device_delete_child(dev, sc->iicbus)) != 0)
463			return (rv);
464
465	bus_release_resources(dev, res_spec, sc->res);
466
467	mtx_destroy(&sc->mutex);
468	return (0);
469}
470
471/*
472 * Only slave mode supported, disregard [old]addr
473 */
474static int
475mv_twsi_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr)
476{
477	struct mv_twsi_softc *sc;
478	uint32_t param;
479
480	sc = device_get_softc(dev);
481
482	switch (speed) {
483	case IIC_SLOW:
484	case IIC_FAST:
485		param = baud_rate[speed].param;
486		break;
487	case IIC_FASTEST:
488	case IIC_UNKNOWN:
489	default:
490		param = baud_rate[IIC_FAST].param;
491		break;
492	}
493
494	mtx_lock(&sc->mutex);
495	TWSI_WRITE(sc, TWSI_SOFT_RESET, 0x0);
496	DELAY(2000);
497	TWSI_WRITE(sc, TWSI_BAUD_RATE, param);
498	TWSI_WRITE(sc, TWSI_CONTROL, TWSI_CONTROL_TWSIEN | TWSI_CONTROL_ACK);
499	DELAY(1000);
500	mtx_unlock(&sc->mutex);
501
502	return (0);
503}
504
505/*
506 * timeout is given in us
507 */
508static int
509mv_twsi_repeated_start(device_t dev, u_char slave, int timeout)
510{
511	struct mv_twsi_softc *sc;
512	int rv;
513
514	sc = device_get_softc(dev);
515
516	mtx_lock(&sc->mutex);
517	rv = twsi_locked_start(dev, sc, TWSI_STATUS_RPTD_START, slave,
518	    timeout);
519	mtx_unlock(&sc->mutex);
520
521	if (rv) {
522		mv_twsi_stop(dev);
523		return (rv);
524	} else
525		return (IIC_NOERR);
526}
527
528/*
529 * timeout is given in us
530 */
531static int
532mv_twsi_start(device_t dev, u_char slave, int timeout)
533{
534	struct mv_twsi_softc *sc;
535	int rv;
536
537	sc = device_get_softc(dev);
538
539	mtx_lock(&sc->mutex);
540	rv = twsi_locked_start(dev, sc, TWSI_STATUS_START, slave, timeout);
541	mtx_unlock(&sc->mutex);
542
543	if (rv) {
544		mv_twsi_stop(dev);
545		return (rv);
546	} else
547		return (IIC_NOERR);
548}
549
550static int
551mv_twsi_stop(device_t dev)
552{
553	struct mv_twsi_softc *sc;
554
555	sc = device_get_softc(dev);
556
557	mtx_lock(&sc->mutex);
558	twsi_control_set(sc, TWSI_CONTROL_STOP);
559	DELAY(1000);
560	twsi_clear_iflg(sc);
561	mtx_unlock(&sc->mutex);
562
563	return (IIC_NOERR);
564}
565
566static int
567mv_twsi_read(device_t dev, char *buf, int len, int *read, int last, int delay)
568{
569	struct mv_twsi_softc *sc;
570	uint32_t status;
571	int last_byte, rv;
572
573	sc = device_get_softc(dev);
574
575	mtx_lock(&sc->mutex);
576	*read = 0;
577	while (*read < len) {
578		/*
579		 * Check if we are reading last byte of the last buffer,
580		 * do not send ACK then, per I2C specs
581		 */
582		last_byte = ((*read == len - 1) && last) ? 1 : 0;
583		if (last_byte)
584			twsi_control_clear(sc, TWSI_CONTROL_ACK);
585		else
586			twsi_control_set(sc, TWSI_CONTROL_ACK);
587
588		DELAY (1000);
589		twsi_clear_iflg(sc);
590
591		if (twsi_poll_ctrl(sc, delay, TWSI_CONTROL_IFLG)) {
592			debugf("timeout reading data\n");
593			rv = IIC_ETIMEOUT;
594			goto out;
595		}
596
597		status = TWSI_READ(sc, TWSI_STATUS);
598		if (status != (last_byte ?
599		    TWSI_STATUS_DATA_RD_NOACK : TWSI_STATUS_DATA_RD_ACK)) {
600			debugf("wrong status (%02x) while reading\n", status);
601			rv = IIC_ESTATUS;
602			goto out;
603		}
604
605		*buf++ = TWSI_READ(sc, TWSI_DATA);
606		(*read)++;
607	}
608	rv = IIC_NOERR;
609out:
610	mtx_unlock(&sc->mutex);
611	return (rv);
612}
613
614static int
615mv_twsi_write(device_t dev, const char *buf, int len, int *sent, int timeout)
616{
617	struct mv_twsi_softc *sc;
618	uint32_t status;
619	int rv;
620
621	sc = device_get_softc(dev);
622
623	mtx_lock(&sc->mutex);
624	*sent = 0;
625	while (*sent < len) {
626		TWSI_WRITE(sc, TWSI_DATA, *buf++);
627
628		twsi_clear_iflg(sc);
629		if (twsi_poll_ctrl(sc, timeout, TWSI_CONTROL_IFLG)) {
630			debugf("timeout writing data\n");
631			rv = IIC_ETIMEOUT;
632			goto out;
633		}
634
635		status = TWSI_READ(sc, TWSI_STATUS);
636		if (status != TWSI_STATUS_DATA_WR_ACK) {
637			debugf("wrong status (%02x) while writing\n", status);
638			rv = IIC_ESTATUS;
639			goto out;
640		}
641		(*sent)++;
642	}
643	rv = IIC_NOERR;
644out:
645	mtx_unlock(&sc->mutex);
646	return (rv);
647}
648