mv_twsi.c revision 209131
1142399Swpaul/*- 2142399Swpaul * Copyright (C) 2008 MARVELL INTERNATIONAL LTD. 3142399Swpaul * All rights reserved. 4142399Swpaul * 5142399Swpaul * Developed by Semihalf. 6142399Swpaul * 7142399Swpaul * Redistribution and use in source and binary forms, with or without 8142399Swpaul * modification, are permitted provided that the following conditions 9142399Swpaul * are met: 10142399Swpaul * 1. Redistributions of source code must retain the above copyright 11142399Swpaul * notice, this list of conditions and the following disclaimer. 12142399Swpaul * 2. Redistributions in binary form must reproduce the above copyright 13142399Swpaul * notice, this list of conditions and the following disclaimer in the 14142399Swpaul * documentation and/or other materials provided with the distribution. 15142399Swpaul * 3. Neither the name of MARVELL nor the names of contributors 16142399Swpaul * may be used to endorse or promote products derived from this software 17142399Swpaul * without specific prior written permission. 18142399Swpaul * 19142399Swpaul * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20142399Swpaul * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21142399Swpaul * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22142399Swpaul * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 23142399Swpaul * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24142399Swpaul * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25142399Swpaul * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26142399Swpaul * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27142399Swpaul * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28142399Swpaul * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29142399Swpaul * SUCH DAMAGE. 30142399Swpaul */ 31142399Swpaul 32142399Swpaul/* 33142399Swpaul * Driver for the TWSI (aka I2C, aka IIC) bus controller found on Marvell 34142399Swpaul * SoCs. Supports master operation only, and works in polling mode. 35142399Swpaul * 36142399Swpaul * Calls to DELAY() are needed per Application Note AN-179 "TWSI Software 37142399Swpaul * Guidelines for Discovery(TM), Horizon (TM) and Feroceon(TM) Devices". 38186507Sweongyo */ 39142399Swpaul 40186507Sweongyo#include <sys/cdefs.h> 41189488Sweongyo__FBSDID("$FreeBSD: head/sys/arm/mv/twsi.c 209131 2010-06-13 13:28:53Z raj $"); 42186507Sweongyo 43186507Sweongyo#include <sys/param.h> 44186507Sweongyo#include <sys/systm.h> 45186507Sweongyo#include <sys/bus.h> 46186507Sweongyo#include <sys/kernel.h> 47186507Sweongyo#include <sys/module.h> 48186507Sweongyo#include <sys/resource.h> 49186507Sweongyo 50186507Sweongyo#include <machine/bus.h> 51186507Sweongyo#include <machine/resource.h> 52186507Sweongyo 53186507Sweongyo#include <sys/rman.h> 54186507Sweongyo 55186507Sweongyo#include <sys/lock.h> 56186507Sweongyo#include <sys/mutex.h> 57186507Sweongyo 58186507Sweongyo#include <dev/iicbus/iiconf.h> 59186507Sweongyo#include <dev/iicbus/iicbus.h> 60186507Sweongyo#include <dev/ofw/ofw_bus.h> 61186507Sweongyo#include <dev/ofw/ofw_bus_subr.h> 62186507Sweongyo 63186507Sweongyo#include "iicbus_if.h" 64186507Sweongyo 65186507Sweongyo#define MV_TWSI_NAME "twsi" 66186507Sweongyo 67186507Sweongyo#define TWSI_SLAVE_ADDR 0x00 68186507Sweongyo#define TWSI_EXT_SLAVE_ADDR 0x10 69186507Sweongyo#define TWSI_DATA 0x04 70186507Sweongyo 71186507Sweongyo#define TWSI_CONTROL 0x08 72186507Sweongyo#define TWSI_CONTROL_ACK (1 << 2) 73186507Sweongyo#define TWSI_CONTROL_IFLG (1 << 3) 74186507Sweongyo#define TWSI_CONTROL_STOP (1 << 4) 75186507Sweongyo#define TWSI_CONTROL_START (1 << 5) 76186507Sweongyo#define TWSI_CONTROL_TWSIEN (1 << 6) 77186507Sweongyo#define TWSI_CONTROL_INTEN (1 << 7) 78186507Sweongyo 79186507Sweongyo#define TWSI_STATUS 0x0c 80186507Sweongyo#define TWSI_STATUS_START 0x08 81186507Sweongyo#define TWSI_STATUS_RPTD_START 0x10 82186507Sweongyo#define TWSI_STATUS_ADDR_W_ACK 0x18 83186507Sweongyo#define TWSI_STATUS_DATA_WR_ACK 0x28 84186507Sweongyo#define TWSI_STATUS_ADDR_R_ACK 0x40 85186507Sweongyo#define TWSI_STATUS_DATA_RD_ACK 0x50 86186507Sweongyo#define TWSI_STATUS_DATA_RD_NOACK 0x58 87186507Sweongyo 88186507Sweongyo#define TWSI_BAUD_RATE 0x0c 89186507Sweongyo#define TWSI_BAUD_RATE_94DOT3 0x53 /* N=3, M=10 */ 90186507Sweongyo#define TWSI_BAUD_RATE_74DOT1 0x6b /* N=3, M=13 */ 91186507Sweongyo#define TWSI_BAUD_RATE_51DOT8 0x4c /* N=4, M=9 */ 92186507Sweongyo#define TWSI_BAUD_RATE_99DOT7 0x66 /* N=6, M=12 */ 93186507Sweongyo 94186507Sweongyo#define TWSI_SOFT_RESET 0x1c 95186507Sweongyo 96186507Sweongyo#define TWSI_DEBUG 97186507Sweongyo#undef TWSI_DEBUG 98186507Sweongyo 99186507Sweongyo#ifdef TWSI_DEBUG 100186507Sweongyo#define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt,##args); } while (0) 101186507Sweongyo#else 102186507Sweongyo#define debugf(fmt, args...) 103186507Sweongyo#endif 104186507Sweongyo 105186507Sweongyostruct mv_twsi_softc { 106186507Sweongyo device_t dev; 107186507Sweongyo struct resource *res[1]; /* SYS_RES_MEMORY */ 108186507Sweongyo struct mtx mutex; 109186507Sweongyo device_t iicbus; 110186507Sweongyo}; 111186507Sweongyo 112186507Sweongyostatic int mv_twsi_probe(device_t); 113186507Sweongyostatic int mv_twsi_attach(device_t); 114186507Sweongyostatic int mv_twsi_detach(device_t); 115186507Sweongyo 116186507Sweongyostatic int mv_twsi_reset(device_t dev, u_char speed, u_char addr, 117186507Sweongyo u_char *oldaddr); 118186507Sweongyostatic int mv_twsi_repeated_start(device_t dev, u_char slave, int timeout); 119186507Sweongyostatic int mv_twsi_start(device_t dev, u_char slave, int timeout); 120186507Sweongyostatic int mv_twsi_stop(device_t dev); 121186507Sweongyostatic int mv_twsi_read(device_t dev, char *buf, int len, int *read, int last, 122186507Sweongyo int delay); 123189488Sweongyostatic int mv_twsi_write(device_t dev, const char *buf, int len, int *sent, 124189488Sweongyo int timeout); 125186507Sweongyo 126186507Sweongyostatic struct resource_spec res_spec[] = { 127186507Sweongyo { SYS_RES_MEMORY, 0, RF_ACTIVE }, 128186507Sweongyo { -1, 0 } 129189488Sweongyo}; 130189488Sweongyo 131189488Sweongyostatic device_method_t mv_twsi_methods[] = { 132186507Sweongyo /* device interface */ 133186507Sweongyo DEVMETHOD(device_probe, mv_twsi_probe), 134189488Sweongyo DEVMETHOD(device_attach, mv_twsi_attach), 135189488Sweongyo DEVMETHOD(device_detach, mv_twsi_detach), 136189488Sweongyo 137189488Sweongyo /* iicbus interface */ 138189488Sweongyo DEVMETHOD(iicbus_callback, iicbus_null_callback), 139186507Sweongyo DEVMETHOD(iicbus_repeated_start, mv_twsi_repeated_start), 140186507Sweongyo DEVMETHOD(iicbus_start, mv_twsi_start), 141186507Sweongyo DEVMETHOD(iicbus_stop, mv_twsi_stop), 142186507Sweongyo DEVMETHOD(iicbus_write, mv_twsi_write), 143186507Sweongyo DEVMETHOD(iicbus_read, mv_twsi_read), 144186507Sweongyo DEVMETHOD(iicbus_reset, mv_twsi_reset), 145189488Sweongyo DEVMETHOD(iicbus_transfer, iicbus_transfer_gen), 146189488Sweongyo { 0, 0 } 147186507Sweongyo}; 148189488Sweongyo 149189488Sweongyostatic devclass_t mv_twsi_devclass; 150189488Sweongyo 151189488Sweongyostatic driver_t mv_twsi_driver = { 152189488Sweongyo MV_TWSI_NAME, 153186507Sweongyo mv_twsi_methods, 154186507Sweongyo sizeof(struct mv_twsi_softc), 155186507Sweongyo}; 156186507Sweongyo 157189488SweongyoDRIVER_MODULE(twsi, simplebus, mv_twsi_driver, mv_twsi_devclass, 0, 0); 158189488SweongyoDRIVER_MODULE(iicbus, twsi, iicbus_driver, iicbus_devclass, 0, 0); 159189488SweongyoMODULE_DEPEND(twsi, iicbus, 1, 1, 1); 160189488Sweongyo 161189488Sweongyostatic __inline uint32_t 162189488SweongyoTWSI_READ(struct mv_twsi_softc *sc, bus_size_t off) 163189488Sweongyo{ 164189488Sweongyo 165189488Sweongyo return (bus_read_4(sc->res[0], off)); 166189488Sweongyo} 167189488Sweongyo 168189488Sweongyostatic __inline void 169186507SweongyoTWSI_WRITE(struct mv_twsi_softc *sc, bus_size_t off, uint32_t val) 170186507Sweongyo{ 171186507Sweongyo 172186507Sweongyo bus_write_4(sc->res[0], off, val); 173189488Sweongyo} 174189488Sweongyo 175186507Sweongyostatic __inline void 176189488Sweongyotwsi_control_clear(struct mv_twsi_softc *sc, uint32_t mask) 177189488Sweongyo{ 178189488Sweongyo uint32_t val; 179189488Sweongyo 180186507Sweongyo val = TWSI_READ(sc, TWSI_CONTROL); 181189488Sweongyo val &= ~mask; 182189488Sweongyo TWSI_WRITE(sc, TWSI_CONTROL, val); 183189488Sweongyo} 184189488Sweongyo 185189488Sweongyostatic __inline void 186186507Sweongyotwsi_control_set(struct mv_twsi_softc *sc, uint32_t mask) 187186507Sweongyo{ 188186507Sweongyo uint32_t val; 189186507Sweongyo 190186507Sweongyo val = TWSI_READ(sc, TWSI_CONTROL); 191186507Sweongyo val |= mask; 192186507Sweongyo TWSI_WRITE(sc, TWSI_CONTROL, val); 193186507Sweongyo} 194186507Sweongyo 195189488Sweongyostatic __inline void 196189488Sweongyotwsi_clear_iflg(struct mv_twsi_softc *sc) 197189488Sweongyo{ 198189488Sweongyo 199189488Sweongyo DELAY(1000); 200186507Sweongyo twsi_control_clear(sc, TWSI_CONTROL_IFLG); 201186507Sweongyo DELAY(1000); 202186507Sweongyo} 203186507Sweongyo 204186507Sweongyo 205186507Sweongyo/* 206186507Sweongyo * timeout given in us 207186507Sweongyo * returns 208142399Swpaul * 0 on sucessfull mask change 209142399Swpaul * non-zero on timeout 210142399Swpaul */ 211142399Swpaulstatic int 212142399Swpaultwsi_poll_ctrl(struct mv_twsi_softc *sc, int timeout, uint32_t mask) 213142399Swpaul{ 214142399Swpaul 215142399Swpaul timeout /= 10; 216142399Swpaul while (!(TWSI_READ(sc, TWSI_CONTROL) & mask)) { 217142399Swpaul DELAY(10); 218142399Swpaul if (--timeout < 0) 219142399Swpaul return (timeout); 220142399Swpaul } 221142399Swpaul return (0); 222142399Swpaul} 223 224 225/* 226 * 'timeout' is given in us. Note also that timeout handling is not exact -- 227 * twsi_locked_start() total wait can be more than 2 x timeout 228 * (twsi_poll_ctrl() is called twice). 'mask' can be either TWSI_STATUS_START 229 * or TWSI_STATUS_RPTD_START 230 */ 231static int 232twsi_locked_start(device_t dev, struct mv_twsi_softc *sc, int32_t mask, 233 u_char slave, int timeout) 234{ 235 int read_access, iflg_set = 0; 236 uint32_t status; 237 238 mtx_assert(&sc->mutex, MA_OWNED); 239 240 if (mask == TWSI_STATUS_RPTD_START) 241 /* read IFLG to know if it should be cleared later; from NBSD */ 242 iflg_set = TWSI_READ(sc, TWSI_CONTROL) & TWSI_CONTROL_IFLG; 243 244 twsi_control_set(sc, TWSI_CONTROL_START); 245 246 if (mask == TWSI_STATUS_RPTD_START && iflg_set) { 247 debugf("IFLG set, clearing\n"); 248 twsi_clear_iflg(sc); 249 } 250 251 /* 252 * Without this delay we timeout checking IFLG if the timeout is 0. 253 * NBSD driver always waits here too. 254 */ 255 DELAY(1000); 256 257 if (twsi_poll_ctrl(sc, timeout, TWSI_CONTROL_IFLG)) { 258 debugf("timeout sending %sSTART condition\n", 259 mask == TWSI_STATUS_START ? "" : "repeated "); 260 return (IIC_ETIMEOUT); 261 } 262 263 status = TWSI_READ(sc, TWSI_STATUS); 264 if (status != mask) { 265 debugf("wrong status (%02x) after sending %sSTART condition\n", 266 status, mask == TWSI_STATUS_START ? "" : "repeated "); 267 return (IIC_ESTATUS); 268 } 269 270 TWSI_WRITE(sc, TWSI_DATA, slave); 271 DELAY(1000); 272 twsi_clear_iflg(sc); 273 274 if (twsi_poll_ctrl(sc, timeout, TWSI_CONTROL_IFLG)) { 275 debugf("timeout sending slave address\n"); 276 return (IIC_ETIMEOUT); 277 } 278 279 read_access = (slave & 0x1) ? 1 : 0; 280 status = TWSI_READ(sc, TWSI_STATUS); 281 if (status != (read_access ? 282 TWSI_STATUS_ADDR_R_ACK : TWSI_STATUS_ADDR_W_ACK)) { 283 debugf("no ACK (status: %02x) after sending slave address\n", 284 status); 285 return (IIC_ENOACK); 286 } 287 288 return (IIC_NOERR); 289} 290 291static int 292mv_twsi_probe(device_t dev) 293{ 294 295 if (!ofw_bus_is_compatible(dev, "mrvl,twsi")) 296 return (ENXIO); 297 298 device_set_desc(dev, "Marvell Integrated I2C Bus Controller"); 299 return (BUS_PROBE_DEFAULT); 300} 301 302static int 303mv_twsi_attach(device_t dev) 304{ 305 struct mv_twsi_softc *sc; 306 307 sc = device_get_softc(dev); 308 sc->dev = dev; 309 310 mtx_init(&sc->mutex, device_get_nameunit(dev), MV_TWSI_NAME, MTX_DEF); 311 312 /* Allocate IO resources */ 313 if (bus_alloc_resources(dev, res_spec, sc->res)) { 314 device_printf(dev, "could not allocate resources\n"); 315 mv_twsi_detach(dev); 316 return (ENXIO); 317 } 318 319 sc->iicbus = device_add_child(dev, "iicbus", -1); 320 if (sc->iicbus == NULL) { 321 device_printf(dev, "could not add iicbus child\n"); 322 mv_twsi_detach(dev); 323 return (ENXIO); 324 } 325 326 bus_generic_attach(dev); 327 return (0); 328} 329 330static int 331mv_twsi_detach(device_t dev) 332{ 333 struct mv_twsi_softc *sc; 334 int rv; 335 336 sc = device_get_softc(dev); 337 338 if ((rv = bus_generic_detach(dev)) != 0) 339 return (rv); 340 341 if (sc->iicbus != NULL) 342 if ((rv = device_delete_child(dev, sc->iicbus)) != 0) 343 return (rv); 344 345 bus_release_resources(dev, res_spec, sc->res); 346 347 mtx_destroy(&sc->mutex); 348 return (0); 349} 350 351/* 352 * Only slave mode supported, disregard [old]addr 353 */ 354static int 355mv_twsi_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr) 356{ 357 struct mv_twsi_softc *sc; 358 uint32_t baud_rate; 359 360 sc = device_get_softc(dev); 361 362 switch (speed) { 363 case IIC_SLOW: 364 baud_rate = TWSI_BAUD_RATE_51DOT8; 365 break; 366 case IIC_FAST: 367 baud_rate = TWSI_BAUD_RATE_51DOT8; 368 break; 369 case IIC_UNKNOWN: 370 case IIC_FASTEST: 371 default: 372 baud_rate = TWSI_BAUD_RATE_99DOT7; 373 break; 374 } 375 376 mtx_lock(&sc->mutex); 377 TWSI_WRITE(sc, TWSI_SOFT_RESET, 0x0); 378 DELAY(2000); 379 TWSI_WRITE(sc, TWSI_BAUD_RATE, baud_rate); 380 TWSI_WRITE(sc, TWSI_CONTROL, TWSI_CONTROL_TWSIEN | TWSI_CONTROL_ACK); 381 DELAY(1000); 382 mtx_unlock(&sc->mutex); 383 384 return (0); 385} 386 387/* 388 * timeout is given in us 389 */ 390static int 391mv_twsi_repeated_start(device_t dev, u_char slave, int timeout) 392{ 393 struct mv_twsi_softc *sc; 394 int rv; 395 396 sc = device_get_softc(dev); 397 398 mtx_lock(&sc->mutex); 399 rv = twsi_locked_start(dev, sc, TWSI_STATUS_RPTD_START, slave, 400 timeout); 401 mtx_unlock(&sc->mutex); 402 403 if (rv) { 404 mv_twsi_stop(dev); 405 return (rv); 406 } else 407 return (IIC_NOERR); 408} 409 410/* 411 * timeout is given in us 412 */ 413static int 414mv_twsi_start(device_t dev, u_char slave, int timeout) 415{ 416 struct mv_twsi_softc *sc; 417 int rv; 418 419 sc = device_get_softc(dev); 420 421 mtx_lock(&sc->mutex); 422 rv = twsi_locked_start(dev, sc, TWSI_STATUS_START, slave, timeout); 423 mtx_unlock(&sc->mutex); 424 425 if (rv) { 426 mv_twsi_stop(dev); 427 return (rv); 428 } else 429 return (IIC_NOERR); 430} 431 432static int 433mv_twsi_stop(device_t dev) 434{ 435 struct mv_twsi_softc *sc; 436 437 sc = device_get_softc(dev); 438 439 mtx_lock(&sc->mutex); 440 twsi_control_set(sc, TWSI_CONTROL_STOP); 441 DELAY(1000); 442 twsi_clear_iflg(sc); 443 mtx_unlock(&sc->mutex); 444 445 return (IIC_NOERR); 446} 447 448static int 449mv_twsi_read(device_t dev, char *buf, int len, int *read, int last, int delay) 450{ 451 struct mv_twsi_softc *sc; 452 uint32_t status; 453 int last_byte, rv; 454 455 sc = device_get_softc(dev); 456 457 mtx_lock(&sc->mutex); 458 *read = 0; 459 while (*read < len) { 460 /* 461 * Check if we are reading last byte of the last buffer, 462 * do not send ACK then, per I2C specs 463 */ 464 last_byte = ((*read == len - 1) && last) ? 1 : 0; 465 if (last_byte) 466 twsi_control_clear(sc, TWSI_CONTROL_ACK); 467 else 468 twsi_control_set(sc, TWSI_CONTROL_ACK); 469 470 DELAY (1000); 471 twsi_clear_iflg(sc); 472 473 if (twsi_poll_ctrl(sc, delay, TWSI_CONTROL_IFLG)) { 474 debugf("timeout reading data\n"); 475 rv = IIC_ETIMEOUT; 476 goto out; 477 } 478 479 status = TWSI_READ(sc, TWSI_STATUS); 480 if (status != (last_byte ? 481 TWSI_STATUS_DATA_RD_NOACK : TWSI_STATUS_DATA_RD_ACK)) { 482 debugf("wrong status (%02x) while reading\n", status); 483 rv = IIC_ESTATUS; 484 goto out; 485 } 486 487 *buf++ = TWSI_READ(sc, TWSI_DATA); 488 (*read)++; 489 } 490 rv = IIC_NOERR; 491out: 492 mtx_unlock(&sc->mutex); 493 return (rv); 494} 495 496static int 497mv_twsi_write(device_t dev, const char *buf, int len, int *sent, int timeout) 498{ 499 struct mv_twsi_softc *sc; 500 uint32_t status; 501 int rv; 502 503 sc = device_get_softc(dev); 504 505 mtx_lock(&sc->mutex); 506 *sent = 0; 507 while (*sent < len) { 508 TWSI_WRITE(sc, TWSI_DATA, *buf++); 509 510 twsi_clear_iflg(sc); 511 if (twsi_poll_ctrl(sc, timeout, TWSI_CONTROL_IFLG)) { 512 debugf("timeout writing data\n"); 513 rv = IIC_ETIMEOUT; 514 goto out; 515 } 516 517 status = TWSI_READ(sc, TWSI_STATUS); 518 if (status != TWSI_STATUS_DATA_WR_ACK) { 519 debugf("wrong status (%02x) while writing\n", status); 520 rv = IIC_ESTATUS; 521 goto out; 522 } 523 (*sent)++; 524 } 525 rv = IIC_NOERR; 526out: 527 mtx_unlock(&sc->mutex); 528 return (rv); 529} 530