iiconf.h revision 38774
138774Snsouch/*- 238774Snsouch * Copyright (c) 1998 Nicolas Souchu 338774Snsouch * All rights reserved. 438774Snsouch * 538774Snsouch * Redistribution and use in source and binary forms, with or without 638774Snsouch * modification, are permitted provided that the following conditions 738774Snsouch * are met: 838774Snsouch * 1. Redistributions of source code must retain the above copyright 938774Snsouch * notice, this list of conditions and the following disclaimer. 1038774Snsouch * 2. Redistributions in binary form must reproduce the above copyright 1138774Snsouch * notice, this list of conditions and the following disclaimer in the 1238774Snsouch * documentation and/or other materials provided with the distribution. 1338774Snsouch * 1438774Snsouch * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1538774Snsouch * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1638774Snsouch * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1738774Snsouch * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1838774Snsouch * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 1938774Snsouch * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2038774Snsouch * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2138774Snsouch * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2238774Snsouch * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2338774Snsouch * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2438774Snsouch * SUCH DAMAGE. 2538774Snsouch * 2638774Snsouch * $Id: iiconf.h,v 1.1.1.10 1998/08/13 17:10:43 son Exp $ 2738774Snsouch */ 2838774Snsouch#ifndef __IICONF_H 2938774Snsouch#define __IICONF_H 3038774Snsouch 3138774Snsouch#include <sys/queue.h> 3238774Snsouch 3338774Snsouch#define IICPRI PZERO+8 /* XXX sleep/wakeup queue priority */ 3438774Snsouch 3538774Snsouch#define n(flags) (~(flags) & (flags)) 3638774Snsouch 3738774Snsouch#define LSB 0x1 3838774Snsouch 3938774Snsouch/* 4038774Snsouch * How tsleep() is called in iic_request_bus(). 4138774Snsouch */ 4238774Snsouch#define IIC_DONTWAIT 0 4338774Snsouch#define IIC_NOINTR 0 4438774Snsouch#define IIC_WAIT 0x1 4538774Snsouch#define IIC_INTR 0x2 4638774Snsouch 4738774Snsouch/* 4838774Snsouch * i2c modes 4938774Snsouch */ 5038774Snsouch#define IIC_MASTER 0x1 5138774Snsouch#define IIC_SLAVE 0x2 5238774Snsouch#define IIC_POLLED 0x4 5338774Snsouch 5438774Snsouch/* 5538774Snsouch * i2c speed 5638774Snsouch */ 5738774Snsouch#define IIC_UNKNOWN 0x0 5838774Snsouch#define IIC_SLOW 0x1 5938774Snsouch#define IIC_FAST 0x2 6038774Snsouch#define IIC_FASTEST 0x3 6138774Snsouch 6238774Snsouch/* 6338774Snsouch * interrupt events 6438774Snsouch */ 6538774Snsouch#define INTR_GENERAL 0x1 /* general call received */ 6638774Snsouch#define INTR_START 0x2 /* the I2C interface is addressed */ 6738774Snsouch#define INTR_STOP 0x3 /* stop condition received */ 6838774Snsouch#define INTR_RECEIVE 0x4 /* character received */ 6938774Snsouch#define INTR_TRANSMIT 0x5 /* character to transmit */ 7038774Snsouch#define INTR_ERROR 0x6 /* error */ 7138774Snsouch#define INTR_NOACK 0x7 /* no ack from master receiver */ 7238774Snsouch 7338774Snsouch/* 7438774Snsouch * adapter layer errors 7538774Snsouch */ 7638774Snsouch#define IIC_NOERR 0x0 /* no error occured */ 7738774Snsouch#define IIC_EBUSERR 0x1 /* bus error */ 7838774Snsouch#define IIC_ENOACK 0x2 /* ack not received until timeout */ 7938774Snsouch#define IIC_ETIMEOUT 0x3 /* timeout */ 8038774Snsouch#define IIC_EBUSBSY 0x4 /* bus busy */ 8138774Snsouch#define IIC_ESTATUS 0x5 /* status error */ 8238774Snsouch#define IIC_EUNDERFLOW 0x6 /* slave ready for more data */ 8338774Snsouch#define IIC_EOVERFLOW 0x7 /* too much data */ 8438774Snsouch 8538774Snsouch/* 8638774Snsouch * ivars codes 8738774Snsouch */ 8838774Snsouch#define IICBUS_IVAR_ADDR 0x1 /* I2C address of the device */ 8938774Snsouch 9038774Snsouchextern int iicbus_request_bus(device_t, device_t, int); 9138774Snsouchextern int iicbus_release_bus(device_t, device_t); 9238774Snsouchextern device_t iicbus_alloc_bus(device_t); 9338774Snsouch 9438774Snsouchextern void iicbus_intr(device_t, int, char *); 9538774Snsouch 9638774Snsouch#define iicbus_repeated_start(bus,slave) \ 9738774Snsouch (IICBUS_REPEATED_START(device_get_parent(bus), slave)) 9838774Snsouch#define iicbus_start(bus,slave) \ 9938774Snsouch (IICBUS_START(device_get_parent(bus), slave)) 10038774Snsouch#define iicbus_stop(bus) \ 10138774Snsouch (IICBUS_STOP(device_get_parent(bus))) 10238774Snsouch#define iicbus_reset(bus,speed) \ 10338774Snsouch (IICBUS_RESET(device_get_parent(bus), speed)) 10438774Snsouch#define iicbus_write(bus,buf,len,sent) \ 10538774Snsouch (IICBUS_WRITE(device_get_parent(bus), buf, len, sent)) 10638774Snsouch#define iicbus_read(bus,buf,len,sent) \ 10738774Snsouch (IICBUS_READ(device_get_parent(bus), buf, len, sent)) 10838774Snsouch 10938774Snsouchextern int iicbus_block_write(device_t, u_char, char *, int, int *); 11038774Snsouchextern int iicbus_block_read(device_t, u_char, char *, int, int *); 11138774Snsouch 11238774Snsouchextern u_char iicbus_get_addr(device_t); 11338774Snsouchextern u_char iicbus_get_own_address(device_t); 11438774Snsouch 11538774Snsouch#endif 116