iiconf.h revision 160372
138774Snsouch/*-
293023Snsouch * Copyright (c) 1998, 2001 Nicolas Souchu
338774Snsouch * All rights reserved.
438774Snsouch *
538774Snsouch * Redistribution and use in source and binary forms, with or without
638774Snsouch * modification, are permitted provided that the following conditions
738774Snsouch * are met:
838774Snsouch * 1. Redistributions of source code must retain the above copyright
938774Snsouch *    notice, this list of conditions and the following disclaimer.
1038774Snsouch * 2. Redistributions in binary form must reproduce the above copyright
1138774Snsouch *    notice, this list of conditions and the following disclaimer in the
1238774Snsouch *    documentation and/or other materials provided with the distribution.
1338774Snsouch *
1438774Snsouch * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
1538774Snsouch * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1638774Snsouch * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1738774Snsouch * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
1838774Snsouch * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
1938774Snsouch * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
2038774Snsouch * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
2138774Snsouch * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
2238774Snsouch * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
2338774Snsouch * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
2438774Snsouch * SUCH DAMAGE.
2538774Snsouch *
2650477Speter * $FreeBSD: head/sys/dev/iicbus/iiconf.h 160372 2006-07-14 23:15:06Z imp $
2738774Snsouch */
2838774Snsouch#ifndef __IICONF_H
2938774Snsouch#define __IICONF_H
3038774Snsouch
3138774Snsouch#include <sys/queue.h>
32160372Simp#include <dev/iicbus/iic.h>
3338774Snsouch
34160372Simp
3543301Sdillon#define IICPRI (PZERO+8)		/* XXX sleep/wakeup queue priority */
3638774Snsouch
3738774Snsouch#define n(flags) (~(flags) & (flags))
3838774Snsouch
3938774Snsouch#define LSB 0x1
4038774Snsouch
4138774Snsouch/*
4238774Snsouch * How tsleep() is called in iic_request_bus().
4338774Snsouch */
4438774Snsouch#define IIC_DONTWAIT	0
4538774Snsouch#define IIC_NOINTR	0
4638774Snsouch#define IIC_WAIT	0x1
4738774Snsouch#define IIC_INTR	0x2
4838774Snsouch
4938774Snsouch/*
5038774Snsouch * i2c modes
5138774Snsouch */
5238774Snsouch#define IIC_MASTER	0x1
5338774Snsouch#define IIC_SLAVE	0x2
5438774Snsouch#define IIC_POLLED	0x4
5538774Snsouch
5638774Snsouch/*
5738774Snsouch * i2c speed
5838774Snsouch */
5938774Snsouch#define IIC_UNKNOWN	0x0
6038774Snsouch#define IIC_SLOW	0x1
6138774Snsouch#define IIC_FAST	0x2
6238774Snsouch#define IIC_FASTEST	0x3
6338774Snsouch
6440782Snsouch#define IIC_LAST_READ	0x1
6540782Snsouch
6638774Snsouch/*
6740782Snsouch * callback index
6840782Snsouch */
6940782Snsouch#define IIC_REQUEST_BUS	0x1
7040782Snsouch#define IIC_RELEASE_BUS	0x2
7140782Snsouch
7240782Snsouch/*
7338774Snsouch * interrupt events
7438774Snsouch */
7538774Snsouch#define INTR_GENERAL	0x1	/* general call received */
7638774Snsouch#define INTR_START	0x2	/* the I2C interface is addressed */
7738774Snsouch#define INTR_STOP	0x3	/* stop condition received */
7838774Snsouch#define INTR_RECEIVE	0x4	/* character received */
7938774Snsouch#define INTR_TRANSMIT	0x5	/* character to transmit */
8038774Snsouch#define INTR_ERROR	0x6	/* error */
8138774Snsouch#define INTR_NOACK	0x7	/* no ack from master receiver */
8238774Snsouch
8338774Snsouch/*
8438774Snsouch * adapter layer errors
8538774Snsouch */
8638774Snsouch#define IIC_NOERR	0x0	/* no error occured */
8738774Snsouch#define IIC_EBUSERR	0x1	/* bus error */
8838774Snsouch#define IIC_ENOACK	0x2	/* ack not received until timeout */
8938774Snsouch#define IIC_ETIMEOUT	0x3	/* timeout */
9038774Snsouch#define IIC_EBUSBSY	0x4	/* bus busy */
9138774Snsouch#define IIC_ESTATUS	0x5	/* status error */
9238774Snsouch#define IIC_EUNDERFLOW	0x6	/* slave ready for more data */
9338774Snsouch#define IIC_EOVERFLOW	0x7	/* too much data */
9440782Snsouch#define IIC_ENOTSUPP	0x8	/* request not supported */
9540782Snsouch#define IIC_ENOADDR	0x9	/* no address assigned to the interface */
9638774Snsouch
9738774Snsouch/*
9838774Snsouch * ivars codes
9938774Snsouch */
10038774Snsouch#define IICBUS_IVAR_ADDR	0x1	/* I2C address of the device */
10138774Snsouch
10238774Snsouchextern int iicbus_request_bus(device_t, device_t, int);
10338774Snsouchextern int iicbus_release_bus(device_t, device_t);
10438774Snsouchextern device_t iicbus_alloc_bus(device_t);
10538774Snsouch
10638774Snsouchextern void iicbus_intr(device_t, int, char *);
10738774Snsouch
10840782Snsouchextern int iicbus_null_repeated_start(device_t, u_char);
10940782Snsouchextern int iicbus_null_callback(device_t, int, caddr_t);
11040782Snsouch
11140782Snsouch#define iicbus_reset(bus,speed,addr,oldaddr) \
11240782Snsouch	(IICBUS_RESET(device_get_parent(bus), speed, addr, oldaddr))
11338774Snsouch
11442442Snsouch/* basic I2C operations */
11542442Snsouchextern int iicbus_started(device_t);
11642442Snsouchextern int iicbus_start(device_t, u_char, int);
11742442Snsouchextern int iicbus_stop(device_t);
11843346Srogerextern int iicbus_repeated_start(device_t, u_char, int);
11942442Snsouchextern int iicbus_write(device_t, char *, int, int *, int);
12042442Snsouchextern int iicbus_read(device_t, char *, int, int *, int, int);
12142442Snsouch
12243346Sroger/* single byte read/write functions, start/stop not managed */
12343346Srogerextern int iicbus_write_byte(device_t, char, int);
12443346Srogerextern int iicbus_read_byte(device_t, char *, int);
12543346Sroger
12642442Snsouch/* Read/write operations with start/stop conditions managed */
12738774Snsouchextern int iicbus_block_write(device_t, u_char, char *, int, int *);
12838774Snsouchextern int iicbus_block_read(device_t, u_char, char *, int, int *);
12938774Snsouch
13038774Snsouchextern u_char iicbus_get_addr(device_t);
13138774Snsouch
132160372Simp/* vectors of iic operations to pass to bridge */
133160372Simpint iicbus_transfer(device_t bus, struct iic_msg *msgs, uint32_t nmsgs);
134160372Simpint iicbus_transfer_gen(device_t bus, struct iic_msg *msgs, uint32_t nmsgs);
135160372Simp
13693023Snsouch#define IICBUS_MODVER	1
13793023Snsouch#define IICBUS_MINVER	1
13893023Snsouch#define IICBUS_MAXVER	1
13993023Snsouch#define IICBUS_PREFVER	IICBUS_MODVER
14093023Snsouch
141116559Sjmgextern driver_t iicbb_driver;
142116559Sjmgextern devclass_t iicbb_devclass;
143116559Sjmg
14493023Snsouch#define IICBB_MODVER	1
14593023Snsouch#define IICBB_MINVER	1
14693023Snsouch#define IICBB_MAXVER	1
14793023Snsouch#define IICBB_PREFVER	IICBB_MODVER
14893023Snsouch
14938774Snsouch#endif
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