icee.c revision 289105
1/*- 2 * Copyright (c) 2006 Warner Losh. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 */ 24 25#include <sys/cdefs.h> 26__FBSDID("$FreeBSD: head/sys/dev/iicbus/icee.c 289105 2015-10-10 02:29:02Z ian $"); 27/* 28 * Generic IIC eeprom support, modeled after the AT24C family of products. 29 */ 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/bus.h> 33#include <sys/conf.h> 34#include <sys/kernel.h> 35#include <sys/module.h> 36#include <sys/resource.h> 37#include <sys/sx.h> 38#include <sys/uio.h> 39#include <machine/bus.h> 40#include <dev/iicbus/iiconf.h> 41#include <dev/iicbus/iicbus.h> 42 43#include "iicbus_if.h" 44 45#define IIC_M_WR 0 /* write operation */ 46#define MAX_RD_SZ 256 /* Largest read size we support */ 47#define MAX_WR_SZ 256 /* Largest write size we support */ 48 49struct icee_softc { 50 device_t sc_dev; /* Myself */ 51 struct sx sc_lock; /* basically a perimeter lock */ 52 struct cdev *cdev; /* user interface */ 53 int addr; 54 int size; /* How big am I? */ 55 int type; /* What type 8 or 16 bit? */ 56 int rd_sz; /* What's the read page size */ 57 int wr_sz; /* What's the write page size */ 58}; 59 60#define ICEE_LOCK(_sc) sx_xlock(&(_sc)->sc_lock) 61#define ICEE_UNLOCK(_sc) sx_xunlock(&(_sc)->sc_lock) 62#define ICEE_LOCK_INIT(_sc) sx_init(&_sc->sc_lock, "icee") 63#define ICEE_LOCK_DESTROY(_sc) sx_destroy(&_sc->sc_lock); 64#define ICEE_ASSERT_LOCKED(_sc) sx_assert(&_sc->sc_lock, SA_XLOCKED); 65#define ICEE_ASSERT_UNLOCKED(_sc) sx_assert(&_sc->sc_lock, SA_UNLOCKED); 66#define CDEV2SOFTC(dev) ((dev)->si_drv1) 67 68/* cdev routines */ 69static d_open_t icee_open; 70static d_close_t icee_close; 71static d_read_t icee_read; 72static d_write_t icee_write; 73 74static struct cdevsw icee_cdevsw = 75{ 76 .d_version = D_VERSION, 77 .d_flags = D_TRACKCLOSE, 78 .d_open = icee_open, 79 .d_close = icee_close, 80 .d_read = icee_read, 81 .d_write = icee_write 82}; 83 84static int 85icee_probe(device_t dev) 86{ 87 88 device_set_desc(dev, "I2C EEPROM"); 89 return (BUS_PROBE_NOWILDCARD); 90} 91 92static int 93icee_attach(device_t dev) 94{ 95 struct icee_softc *sc = device_get_softc(dev); 96 const char *dname; 97 int dunit, err; 98 99 sc->sc_dev = dev; 100 sc->addr = iicbus_get_addr(dev); 101 err = 0; 102 dname = device_get_name(dev); 103 dunit = device_get_unit(dev); 104 resource_int_value(dname, dunit, "size", &sc->size); 105 resource_int_value(dname, dunit, "type", &sc->type); 106 resource_int_value(dname, dunit, "rd_sz", &sc->rd_sz); 107 if (sc->rd_sz > MAX_RD_SZ) 108 sc->rd_sz = MAX_RD_SZ; 109 resource_int_value(dname, dunit, "wr_sz", &sc->wr_sz); 110 if (bootverbose) 111 device_printf(dev, "size: %d bytes bus_width: %d-bits\n", 112 sc->size, sc->type); 113 sc->cdev = make_dev(&icee_cdevsw, device_get_unit(dev), UID_ROOT, 114 GID_WHEEL, 0600, "icee%d", device_get_unit(dev)); 115 if (sc->cdev == NULL) { 116 err = ENOMEM; 117 goto out; 118 } 119 sc->cdev->si_drv1 = sc; 120 ICEE_LOCK_INIT(sc); 121out: 122 return (err); 123} 124 125static int 126icee_open(struct cdev *dev, int oflags, int devtype, struct thread *td) 127{ 128 129 return (0); 130} 131 132static int 133icee_close(struct cdev *dev, int fflag, int devtype, struct thread *td) 134{ 135 136 return (0); 137} 138 139static int 140icee_read(struct cdev *dev, struct uio *uio, int ioflag) 141{ 142 struct icee_softc *sc; 143 uint8_t addr[2]; 144 uint8_t data[MAX_RD_SZ]; 145 int error, i, len, slave; 146 struct iic_msg msgs[2] = { 147 { 0, IIC_M_WR, 1, addr }, 148 { 0, IIC_M_RD, 0, data }, 149 }; 150 151 sc = CDEV2SOFTC(dev); 152 if (uio->uio_offset == sc->size) 153 return (0); 154 if (uio->uio_offset > sc->size) 155 return (EIO); 156 if (sc->type != 8 && sc->type != 16) 157 return (EINVAL); 158 ICEE_LOCK(sc); 159 slave = error = 0; 160 while (uio->uio_resid > 0) { 161 if (uio->uio_offset >= sc->size) 162 break; 163 len = MIN(sc->rd_sz - (uio->uio_offset & (sc->rd_sz - 1)), 164 uio->uio_resid); 165 switch (sc->type) { 166 case 8: 167 slave = (uio->uio_offset >> 7) | sc->addr; 168 msgs[0].len = 1; 169 msgs[1].len = len; 170 addr[0] = uio->uio_offset & 0xff; 171 break; 172 case 16: 173 slave = sc->addr | (uio->uio_offset >> 15); 174 msgs[0].len = 2; 175 msgs[1].len = len; 176 addr[0] = (uio->uio_offset >> 8) & 0xff; 177 addr[1] = uio->uio_offset & 0xff; 178 break; 179 } 180 for (i = 0; i < 2; i++) 181 msgs[i].slave = slave; 182 error = iicbus_transfer(sc->sc_dev, msgs, 2); 183 if (error) { 184 error = iic2errno(error); 185 break; 186 } 187 error = uiomove(data, len, uio); 188 if (error) 189 break; 190 } 191 ICEE_UNLOCK(sc); 192 return (error); 193} 194 195/* 196 * Write to the part. We use three transfers here since we're actually 197 * doing a write followed by a read to make sure that the write finished. 198 * It is easier to encode the dummy read here than to break things up 199 * into smaller chunks... 200 */ 201static int 202icee_write(struct cdev *dev, struct uio *uio, int ioflag) 203{ 204 struct icee_softc *sc; 205 int error, len, slave, waitlimit; 206 uint8_t data[MAX_WR_SZ + 2]; 207 struct iic_msg wr[1] = { 208 { 0, IIC_M_WR, 0, data }, 209 }; 210 struct iic_msg rd[1] = { 211 { 0, IIC_M_RD, 1, data }, 212 }; 213 214 sc = CDEV2SOFTC(dev); 215 if (uio->uio_offset >= sc->size) 216 return (EIO); 217 if (sc->type != 8 && sc->type != 16) 218 return (EINVAL); 219 ICEE_LOCK(sc); 220 slave = error = 0; 221 while (uio->uio_resid > 0) { 222 if (uio->uio_offset >= sc->size) 223 break; 224 len = MIN(sc->wr_sz - (uio->uio_offset & (sc->wr_sz - 1)), 225 uio->uio_resid); 226 switch (sc->type) { 227 case 8: 228 slave = (uio->uio_offset >> 7) | sc->addr; 229 wr[0].len = 1 + len; 230 data[0] = uio->uio_offset & 0xff; 231 break; 232 case 16: 233 slave = sc->addr | (uio->uio_offset >> 15); 234 wr[0].len = 2 + len; 235 data[0] = (uio->uio_offset >> 8) & 0xff; 236 data[1] = uio->uio_offset & 0xff; 237 break; 238 } 239 wr[0].slave = slave; 240 error = uiomove(data + sc->type / 8, len, uio); 241 if (error) 242 break; 243 error = iicbus_transfer(sc->sc_dev, wr, 1); 244 if (error) { 245 error = iic2errno(error); 246 break; 247 } 248 /* Read after write to wait for write-done. */ 249 waitlimit = 10000; 250 rd[0].slave = slave; 251 do { 252 error = iicbus_transfer(sc->sc_dev, rd, 1); 253 } while (waitlimit-- > 0 && error != 0); 254 if (error) { 255 error = iic2errno(error); 256 break; 257 } 258 } 259 ICEE_UNLOCK(sc); 260 return error; 261} 262 263static device_method_t icee_methods[] = { 264 DEVMETHOD(device_probe, icee_probe), 265 DEVMETHOD(device_attach, icee_attach), 266 267 DEVMETHOD_END 268}; 269 270static driver_t icee_driver = { 271 "icee", 272 icee_methods, 273 sizeof(struct icee_softc), 274}; 275static devclass_t icee_devclass; 276 277DRIVER_MODULE(icee, iicbus, icee_driver, icee_devclass, 0, 0); 278MODULE_VERSION(icee, 1); 279MODULE_DEPEND(icee, iicbus, 1, 1, 1); 280