ichsmb_pci.c revision 165951
11590Srgrimes/*-
21590Srgrimes * ichsmb_pci.c
31590Srgrimes *
41590Srgrimes * Author: Archie Cobbs <archie@freebsd.org>
51590Srgrimes * Copyright (c) 2000 Whistle Communications, Inc.
61590Srgrimes * All rights reserved.
71590Srgrimes * Author: Archie Cobbs <archie@freebsd.org>
81590Srgrimes *
91590Srgrimes * Subject to the following obligations and disclaimer of warranty, use and
101590Srgrimes * redistribution of this software, in source or object code forms, with or
111590Srgrimes * without modifications are expressly permitted by Whistle Communications;
121590Srgrimes * provided, however, that:
131590Srgrimes * 1. Any and all reproductions of the source or object code must include the
141590Srgrimes *    copyright notice above and the following disclaimer of warranties; and
151590Srgrimes * 2. No rights are granted, in any manner or form, to use Whistle
161590Srgrimes *    Communications, Inc. trademarks, including the mark "WHISTLE
171590Srgrimes *    COMMUNICATIONS" on advertising, endorsements, or otherwise except as
181590Srgrimes *    such appears in the above copyright notice or in the software.
191590Srgrimes *
201590Srgrimes * THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND
211590Srgrimes * TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO
221590Srgrimes * REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE,
231590Srgrimes * INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF
241590Srgrimes * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
251590Srgrimes * WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY
261590Srgrimes * REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS
271590Srgrimes * SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE.
281590Srgrimes * IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES
291590Srgrimes * RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING
301590Srgrimes * WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
311590Srgrimes * PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR
321590Srgrimes * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY
331590Srgrimes * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
341590Srgrimes * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
351590Srgrimes * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY
361590Srgrimes * OF SUCH DAMAGE.
371590Srgrimes */
381590Srgrimes
391590Srgrimes#include <sys/cdefs.h>
401590Srgrimes__FBSDID("$FreeBSD: head/sys/dev/ichsmb/ichsmb_pci.c 165951 2007-01-11 19:56:24Z jhb $");
411590Srgrimes
421590Srgrimes/*
431590Srgrimes * Support for the SMBus controller logical device which is part of the
4461575Sroberto * Intel 81801AA/AB/BA/CA/DC/EB (ICH/ICH[02345]) I/O controller hub chips.
4523695Speter */
4661575Sroberto
471590Srgrimes#include <sys/param.h>
48116333Smarkm#include <sys/systm.h>
4993604Sobrien#include <sys/kernel.h>
5093604Sobrien#include <sys/module.h>
511590Srgrimes#include <sys/errno.h>
521590Srgrimes#include <sys/lock.h>
531590Srgrimes#include <sys/mutex.h>
541590Srgrimes#include <sys/syslog.h>
551590Srgrimes#include <sys/bus.h>
56200462Sdelphij
571590Srgrimes#include <machine/bus.h>
581590Srgrimes#include <sys/rman.h>
5917534Sache#include <machine/resource.h>
6072945Sknu
611590Srgrimes#include <dev/pci/pcivar.h>
621590Srgrimes#include <dev/pci/pcireg.h>
631590Srgrimes
6423695Speter#include <dev/smbus/smbconf.h>
651590Srgrimes
661590Srgrimes#include <dev/ichsmb/ichsmb_var.h>
671590Srgrimes#include <dev/ichsmb/ichsmb_reg.h>
681590Srgrimes
691590Srgrimes/* PCI unique identifiers */
701590Srgrimes#define ID_82801AA			0x24138086
711590Srgrimes#define ID_82801AB			0x24238086
721590Srgrimes#define ID_82801BA			0x24438086
731590Srgrimes#define ID_82801CA			0x24838086
7441399Sbde#define ID_82801DC			0x24C38086
751590Srgrimes#define ID_82801EB			0x24D38086
7661575Sroberto#define ID_6300ESB			0x25a48086
7772945Sknu
781590Srgrimes#define PCIS_SERIALBUS_SMBUS_PROGIF	0x00
7992786Smarkm
801590Srgrimes/* Internal functions */
811590Srgrimesstatic int	ichsmb_pci_probe(device_t dev);
82116333Smarkmstatic int	ichsmb_pci_attach(device_t dev);
831590Srgrimes/*Use generic one for now*/
8491400Sdwmalone#if 0
8525942Sjdpstatic int	ichsmb_pci_detach(device_t dev);
861590Srgrimes#endif
8717534Sache
8817534Sache/* Device methods */
891590Srgrimesstatic device_method_t ichsmb_pci_methods[] = {
901590Srgrimes	/* Device interface */
911590Srgrimes        DEVMETHOD(device_probe, ichsmb_pci_probe),
9225942Sjdp        DEVMETHOD(device_attach, ichsmb_pci_attach),
931590Srgrimes        DEVMETHOD(device_detach, ichsmb_detach),
9472945Sknu
951590Srgrimes	/* Bus methods */
9672945Sknu        DEVMETHOD(bus_print_child, bus_generic_print_child),
9772945Sknu
9872945Sknu	/* SMBus methods */
991590Srgrimes        DEVMETHOD(smbus_callback, ichsmb_callback),
1001590Srgrimes        DEVMETHOD(smbus_quick, ichsmb_quick),
10125942Sjdp        DEVMETHOD(smbus_sendb, ichsmb_sendb),
1021590Srgrimes        DEVMETHOD(smbus_recvb, ichsmb_recvb),
1031590Srgrimes        DEVMETHOD(smbus_writeb, ichsmb_writeb),
1041590Srgrimes        DEVMETHOD(smbus_writew, ichsmb_writew),
10525942Sjdp        DEVMETHOD(smbus_readb, ichsmb_readb),
1061590Srgrimes        DEVMETHOD(smbus_readw, ichsmb_readw),
1071590Srgrimes        DEVMETHOD(smbus_pcall, ichsmb_pcall),
1081590Srgrimes        DEVMETHOD(smbus_bwrite, ichsmb_bwrite),
1091590Srgrimes        DEVMETHOD(smbus_bread, ichsmb_bread),
1101590Srgrimes	{ 0, 0 }
1111590Srgrimes};
1121590Srgrimes
1131590Srgrimesstatic driver_t ichsmb_pci_driver = {
1141590Srgrimes	"ichsmb",
1151590Srgrimes	ichsmb_pci_methods,
1161590Srgrimes	sizeof(struct ichsmb_softc)
1171590Srgrimes};
1181590Srgrimes
11941391Swoschstatic devclass_t ichsmb_pci_devclass;
12041391Swosch
12141391SwoschDRIVER_MODULE(ichsmb, pci, ichsmb_pci_driver, ichsmb_pci_devclass, 0, 0);
1221590Srgrimes
1231590Srgrimesstatic int
1241590Srgrimesichsmb_pci_probe(device_t dev)
1251590Srgrimes{
1261590Srgrimes	/* Check PCI identifier */
1271590Srgrimes	switch (pci_get_devid(dev)) {
1281590Srgrimes	case ID_82801AA:
1291590Srgrimes		device_set_desc(dev, "Intel 82801AA (ICH) SMBus controller");
1308874Srgrimes		break;
1311590Srgrimes	case ID_82801AB:
1321590Srgrimes		device_set_desc(dev, "Intel 82801AB (ICH0) SMBus controller");
1331590Srgrimes		break;
1341590Srgrimes	case ID_82801BA:
1351590Srgrimes		device_set_desc(dev, "Intel 82801BA (ICH2) SMBus controller");
1361590Srgrimes		break;
1371590Srgrimes	case ID_82801CA:
1381590Srgrimes		device_set_desc(dev, "Intel 82801CA (ICH3) SMBus controller");
1391590Srgrimes		break;
1401590Srgrimes	case ID_82801DC:
1411590Srgrimes		device_set_desc(dev, "Intel 82801DC (ICH4) SMBus controller");
1421590Srgrimes		break;
1431590Srgrimes	case ID_82801EB:
1441590Srgrimes		device_set_desc(dev, "Intel 82801EB (ICH5) SMBus controller");
1451590Srgrimes		break;
1461590Srgrimes	case ID_6300ESB:
1471590Srgrimes		device_set_desc(dev, "Intel 6300ESB (ICH) SMBus controller");
1481590Srgrimes		break;
1491590Srgrimes	default:
1501590Srgrimes		if (pci_get_class(dev) == PCIC_SERIALBUS
1511590Srgrimes		    && pci_get_subclass(dev) == PCIS_SERIALBUS_SMBUS
1521590Srgrimes		    && pci_get_progif(dev) == PCIS_SERIALBUS_SMBUS_PROGIF) {
1531590Srgrimes			device_set_desc(dev, "SMBus controller");
1541590Srgrimes			return (BUS_PROBE_DEFAULT); /* XXX */
1551590Srgrimes		}
1561590Srgrimes		return (ENXIO);
1571590Srgrimes	}
1581590Srgrimes
1591590Srgrimes	/* Done */
1601590Srgrimes	return (ichsmb_probe(dev));
1611590Srgrimes}
1621590Srgrimes
1631590Srgrimesstatic int
164116333Smarkmichsmb_pci_attach(device_t dev)
1651590Srgrimes{
166176761Sru	const sc_p sc = device_get_softc(dev);
167176761Sru	int error;
168176761Sru
1691590Srgrimes	/* Initialize private state */
1701590Srgrimes	bzero(sc, sizeof(*sc));
171	sc->ich_cmd = -1;
172	sc->dev = dev;
173
174	/* Allocate an I/O range */
175	sc->io_rid = ICH_SMB_BASE;
176	sc->io_res = bus_alloc_resource(dev, SYS_RES_IOPORT,
177	    &sc->io_rid, 0, ~0, 16, RF_ACTIVE);
178	if (sc->io_res == NULL)
179		sc->io_res = bus_alloc_resource(dev, SYS_RES_IOPORT,
180		    &sc->io_rid, 0, ~0, 32, RF_ACTIVE);
181	if (sc->io_res == NULL) {
182		device_printf(dev, "can't map I/O\n");
183		error = ENXIO;
184		goto fail;
185	}
186	sc->io_bst = rman_get_bustag(sc->io_res);
187	sc->io_bsh = rman_get_bushandle(sc->io_res);
188
189	/* Allocate interrupt */
190	sc->irq_rid = 0;
191	sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
192	    &sc->irq_rid, RF_ACTIVE | RF_SHAREABLE);
193	if (sc->irq_res == NULL) {
194		device_printf(dev, "can't get IRQ\n");
195		error = ENXIO;
196		goto fail;
197	}
198
199	/* Enable device */
200	pci_write_config(dev, ICH_HOSTC, ICH_HOSTC_HST_EN, 1);
201
202	/* Done */
203	error = ichsmb_attach(dev);
204	if (error)
205		goto fail;
206	return (0);
207
208fail:
209	/* Attach failed, release resources */
210	ichsmb_release_resources(sc);
211	return (error);
212}
213
214
215MODULE_DEPEND(ichsmb, pci, 1, 1, 1);
216MODULE_DEPEND(ichsmb, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER);
217MODULE_VERSION(ichsmb, 1);
218