ichsmb_pci.c revision 146996
1119418Sobrien/*- 266703Sarchie * ichsmb_pci.c 366703Sarchie * 4119418Sobrien * Author: Archie Cobbs <archie@freebsd.org> 566703Sarchie * Copyright (c) 2000 Whistle Communications, Inc. 666703Sarchie * All rights reserved. 7119418Sobrien * Author: Archie Cobbs <archie@freebsd.org> 866703Sarchie * 966703Sarchie * Subject to the following obligations and disclaimer of warranty, use and 1066703Sarchie * redistribution of this software, in source or object code forms, with or 1166703Sarchie * without modifications are expressly permitted by Whistle Communications; 1266703Sarchie * provided, however, that: 1366703Sarchie * 1. Any and all reproductions of the source or object code must include the 1466703Sarchie * copyright notice above and the following disclaimer of warranties; and 1566703Sarchie * 2. No rights are granted, in any manner or form, to use Whistle 1666703Sarchie * Communications, Inc. trademarks, including the mark "WHISTLE 1766703Sarchie * COMMUNICATIONS" on advertising, endorsements, or otherwise except as 1866703Sarchie * such appears in the above copyright notice or in the software. 1966703Sarchie * 2066703Sarchie * THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND 2166703Sarchie * TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO 2266703Sarchie * REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE, 2366703Sarchie * INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF 2466703Sarchie * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. 2566703Sarchie * WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY 2666703Sarchie * REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS 2766703Sarchie * SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE. 2866703Sarchie * IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES 2966703Sarchie * RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING 3066703Sarchie * WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, 3166703Sarchie * PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR 3266703Sarchie * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY 3366703Sarchie * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3466703Sarchie * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 3566703Sarchie * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY 3666703Sarchie * OF SUCH DAMAGE. 3766703Sarchie */ 3866703Sarchie 39119418Sobrien#include <sys/cdefs.h> 40119418Sobrien__FBSDID("$FreeBSD: head/sys/dev/ichsmb/ichsmb_pci.c 146996 2005-06-05 11:55:29Z takawata $"); 41119418Sobrien 4266703Sarchie/* 4366703Sarchie * Support for the SMBus controller logical device which is part of the 44119618Snjl * Intel 81801AA/AB/BA/CA/DC/EB (ICH/ICH[02345]) I/O controller hub chips. 4566703Sarchie */ 4666703Sarchie 4766703Sarchie#include <sys/param.h> 4866703Sarchie#include <sys/systm.h> 4966703Sarchie#include <sys/kernel.h> 50129879Sphk#include <sys/module.h> 5166703Sarchie#include <sys/errno.h> 5274914Sjhb#include <sys/lock.h> 5369734Sarchie#include <sys/mutex.h> 5466703Sarchie#include <sys/syslog.h> 5566703Sarchie#include <sys/bus.h> 5666703Sarchie 5766703Sarchie#include <machine/bus.h> 5866703Sarchie#include <sys/rman.h> 5966703Sarchie#include <machine/resource.h> 6066703Sarchie 61119280Simp#include <dev/pci/pcivar.h> 62119280Simp#include <dev/pci/pcireg.h> 6366703Sarchie 6466703Sarchie#include <dev/smbus/smbconf.h> 6566703Sarchie 6666703Sarchie#include <dev/ichsmb/ichsmb_var.h> 6766703Sarchie#include <dev/ichsmb/ichsmb_reg.h> 6866703Sarchie 6966703Sarchie/* PCI unique identifiers */ 70105394Snyan#define ID_82801AA 0x24138086 71105394Snyan#define ID_82801AB 0x24238086 7266703Sarchie#define ID_82801BA 0x24438086 7396200Sjhb#define ID_82801CA 0x24838086 74101742Smp#define ID_82801DC 0x24C38086 75119600Snjl#define ID_82801EB 0x24D38086 76131070Sambrisko#define ID_6300ESB 0x25a48086 7766703Sarchie 7866703Sarchie#define PCIS_SERIALBUS_SMBUS_PROGIF 0x00 7966703Sarchie 8066703Sarchie/* Internal functions */ 8166703Sarchiestatic int ichsmb_pci_probe(device_t dev); 8266703Sarchiestatic int ichsmb_pci_attach(device_t dev); 8366703Sarchie 8466703Sarchie/* Device methods */ 8566703Sarchiestatic device_method_t ichsmb_pci_methods[] = { 8666703Sarchie /* Device interface */ 8766703Sarchie DEVMETHOD(device_probe, ichsmb_pci_probe), 8866703Sarchie DEVMETHOD(device_attach, ichsmb_pci_attach), 8966703Sarchie 9066703Sarchie /* Bus methods */ 9166703Sarchie DEVMETHOD(bus_print_child, bus_generic_print_child), 9266703Sarchie 9366703Sarchie /* SMBus methods */ 9466703Sarchie DEVMETHOD(smbus_callback, ichsmb_callback), 9566703Sarchie DEVMETHOD(smbus_quick, ichsmb_quick), 9666703Sarchie DEVMETHOD(smbus_sendb, ichsmb_sendb), 9766703Sarchie DEVMETHOD(smbus_recvb, ichsmb_recvb), 9866703Sarchie DEVMETHOD(smbus_writeb, ichsmb_writeb), 9966703Sarchie DEVMETHOD(smbus_writew, ichsmb_writew), 10066703Sarchie DEVMETHOD(smbus_readb, ichsmb_readb), 10166703Sarchie DEVMETHOD(smbus_readw, ichsmb_readw), 10266703Sarchie DEVMETHOD(smbus_pcall, ichsmb_pcall), 10366703Sarchie DEVMETHOD(smbus_bwrite, ichsmb_bwrite), 10466703Sarchie DEVMETHOD(smbus_bread, ichsmb_bread), 10566703Sarchie { 0, 0 } 10666703Sarchie}; 10766703Sarchie 10866703Sarchiestatic driver_t ichsmb_pci_driver = { 10966703Sarchie "ichsmb", 11066703Sarchie ichsmb_pci_methods, 11166703Sarchie sizeof(struct ichsmb_softc) 11266703Sarchie}; 11366703Sarchie 11466703Sarchiestatic devclass_t ichsmb_pci_devclass; 11566703Sarchie 11666703SarchieDRIVER_MODULE(ichsmb, pci, ichsmb_pci_driver, ichsmb_pci_devclass, 0, 0); 11766703Sarchie 11866703Sarchiestatic int 11966703Sarchieichsmb_pci_probe(device_t dev) 12066703Sarchie{ 12166703Sarchie /* Check PCI identifier */ 12266703Sarchie switch (pci_get_devid(dev)) { 123105394Snyan case ID_82801AA: 12466703Sarchie device_set_desc(dev, "Intel 82801AA (ICH) SMBus controller"); 12566703Sarchie break; 126105394Snyan case ID_82801AB: 12766703Sarchie device_set_desc(dev, "Intel 82801AB (ICH0) SMBus controller"); 12866703Sarchie break; 12966703Sarchie case ID_82801BA: 13066703Sarchie device_set_desc(dev, "Intel 82801BA (ICH2) SMBus controller"); 13166703Sarchie break; 13296200Sjhb case ID_82801CA: 13396200Sjhb device_set_desc(dev, "Intel 82801CA (ICH3) SMBus controller"); 13496200Sjhb break; 135101742Smp case ID_82801DC: 136101742Smp device_set_desc(dev, "Intel 82801DC (ICH4) SMBus controller"); 137101742Smp break; 138119600Snjl case ID_82801EB: 139119600Snjl device_set_desc(dev, "Intel 82801EB (ICH5) SMBus controller"); 140119600Snjl break; 141131070Sambrisko case ID_6300ESB: 142131070Sambrisko device_set_desc(dev, "Intel 6300ESB (ICH) SMBus controller"); 143131070Sambrisko break; 14466703Sarchie default: 14566703Sarchie if (pci_get_class(dev) == PCIC_SERIALBUS 14666703Sarchie && pci_get_subclass(dev) == PCIS_SERIALBUS_SMBUS 14766703Sarchie && pci_get_progif(dev) == PCIS_SERIALBUS_SMBUS_PROGIF) { 14866703Sarchie device_set_desc(dev, "SMBus controller"); 149143160Simp return (BUS_PROBE_DEFAULT); /* XXX */ 15066703Sarchie } 15166703Sarchie return (ENXIO); 15266703Sarchie } 15366703Sarchie 15466703Sarchie /* Done */ 15566703Sarchie return (ichsmb_probe(dev)); 15666703Sarchie} 15766703Sarchie 15866703Sarchiestatic int 15966703Sarchieichsmb_pci_attach(device_t dev) 16066703Sarchie{ 16166703Sarchie const sc_p sc = device_get_softc(dev); 16266703Sarchie u_int32_t cmd; 16366703Sarchie int error; 16466703Sarchie 16566703Sarchie /* Initialize private state */ 16666703Sarchie bzero(sc, sizeof(*sc)); 16766703Sarchie sc->ich_cmd = -1; 16866703Sarchie sc->dev = dev; 16966703Sarchie 17066703Sarchie /* Allocate an I/O range */ 17166703Sarchie sc->io_rid = ICH_SMB_BASE; 17266703Sarchie sc->io_res = bus_alloc_resource(dev, SYS_RES_IOPORT, 17366703Sarchie &sc->io_rid, 0, ~0, 16, RF_ACTIVE); 174131070Sambrisko if (sc->io_res == NULL) 175131070Sambrisko sc->io_res = bus_alloc_resource(dev, SYS_RES_IOPORT, 176131070Sambrisko &sc->io_rid, 0, ~0, 32, RF_ACTIVE); 17766703Sarchie if (sc->io_res == NULL) { 17866703Sarchie log(LOG_ERR, "%s: can't map I/O\n", device_get_nameunit(dev)); 17966703Sarchie error = ENXIO; 18066703Sarchie goto fail; 18166703Sarchie } 18266703Sarchie sc->io_bst = rman_get_bustag(sc->io_res); 18366703Sarchie sc->io_bsh = rman_get_bushandle(sc->io_res); 18466703Sarchie 18566703Sarchie /* Allocate interrupt */ 18666703Sarchie sc->irq_rid = 0; 187127135Snjl sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, 188127135Snjl &sc->irq_rid, RF_ACTIVE | RF_SHAREABLE); 18966703Sarchie if (sc->irq_res == NULL) { 19066703Sarchie log(LOG_ERR, "%s: can't get IRQ\n", device_get_nameunit(dev)); 19166703Sarchie error = ENXIO; 19266703Sarchie goto fail; 19366703Sarchie } 19466703Sarchie 19566703Sarchie /* Set up interrupt handler */ 19666703Sarchie error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC, 19766703Sarchie ichsmb_device_intr, sc, &sc->irq_handle); 19866703Sarchie if (error != 0) { 19966703Sarchie log(LOG_ERR, "%s: can't setup irq\n", device_get_nameunit(dev)); 20066703Sarchie goto fail; 20166703Sarchie } 20266703Sarchie 20366703Sarchie /* Enable I/O mapping */ 20466703Sarchie cmd = pci_read_config(dev, PCIR_COMMAND, 4); 20566703Sarchie cmd |= PCIM_CMD_PORTEN; 20666703Sarchie pci_write_config(dev, PCIR_COMMAND, cmd, 4); 20766703Sarchie cmd = pci_read_config(dev, PCIR_COMMAND, 4); 20866703Sarchie if ((cmd & PCIM_CMD_PORTEN) == 0) { 20966703Sarchie log(LOG_ERR, "%s: can't enable memory map\n", 21066703Sarchie device_get_nameunit(dev)); 21166703Sarchie error = ENXIO; 21266703Sarchie goto fail; 21366703Sarchie } 21466703Sarchie 21566703Sarchie /* Enable device */ 21666703Sarchie pci_write_config(dev, ICH_HOSTC, ICH_HOSTC_HST_EN, 1); 21766703Sarchie 21866703Sarchie /* Done */ 21966703Sarchie return (ichsmb_attach(dev)); 22066703Sarchie 22166703Sarchiefail: 22266703Sarchie /* Attach failed, release resources */ 22366703Sarchie ichsmb_release_resources(sc); 22466703Sarchie return (error); 22566703Sarchie} 22666703Sarchie 227146996StakawataMODULE_DEPEND(ichsmb, pci, 1, 1, 1); 228146996StakawataMODULE_DEPEND(ichsmb, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER); 229146996StakawataMODULE_VERSION(ichsmb, 1); 230