ichsmb_pci.c revision 129879
1/*- 2 * ichsmb_pci.c 3 * 4 * Author: Archie Cobbs <archie@freebsd.org> 5 * Copyright (c) 2000 Whistle Communications, Inc. 6 * All rights reserved. 7 * Author: Archie Cobbs <archie@freebsd.org> 8 * 9 * Subject to the following obligations and disclaimer of warranty, use and 10 * redistribution of this software, in source or object code forms, with or 11 * without modifications are expressly permitted by Whistle Communications; 12 * provided, however, that: 13 * 1. Any and all reproductions of the source or object code must include the 14 * copyright notice above and the following disclaimer of warranties; and 15 * 2. No rights are granted, in any manner or form, to use Whistle 16 * Communications, Inc. trademarks, including the mark "WHISTLE 17 * COMMUNICATIONS" on advertising, endorsements, or otherwise except as 18 * such appears in the above copyright notice or in the software. 19 * 20 * THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND 21 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO 22 * REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE, 23 * INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF 24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. 25 * WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY 26 * REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS 27 * SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE. 28 * IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES 29 * RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING 30 * WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, 31 * PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR 32 * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 35 * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY 36 * OF SUCH DAMAGE. 37 */ 38 39#include <sys/cdefs.h> 40__FBSDID("$FreeBSD: head/sys/dev/ichsmb/ichsmb_pci.c 129879 2004-05-30 20:08:47Z phk $"); 41 42/* 43 * Support for the SMBus controller logical device which is part of the 44 * Intel 81801AA/AB/BA/CA/DC/EB (ICH/ICH[02345]) I/O controller hub chips. 45 */ 46 47#include <sys/param.h> 48#include <sys/systm.h> 49#include <sys/kernel.h> 50#include <sys/module.h> 51#include <sys/errno.h> 52#include <sys/lock.h> 53#include <sys/mutex.h> 54#include <sys/syslog.h> 55#include <sys/bus.h> 56 57#include <machine/bus.h> 58#include <sys/rman.h> 59#include <machine/resource.h> 60 61#include <dev/pci/pcivar.h> 62#include <dev/pci/pcireg.h> 63 64#include <dev/smbus/smbconf.h> 65 66#include <dev/ichsmb/ichsmb_var.h> 67#include <dev/ichsmb/ichsmb_reg.h> 68 69/* PCI unique identifiers */ 70#define ID_82801AA 0x24138086 71#define ID_82801AB 0x24238086 72#define ID_82801BA 0x24438086 73#define ID_82801CA 0x24838086 74#define ID_82801DC 0x24C38086 75#define ID_82801EB 0x24D38086 76 77#define PCIS_SERIALBUS_SMBUS_PROGIF 0x00 78 79/* Internal functions */ 80static int ichsmb_pci_probe(device_t dev); 81static int ichsmb_pci_attach(device_t dev); 82 83/* Device methods */ 84static device_method_t ichsmb_pci_methods[] = { 85 /* Device interface */ 86 DEVMETHOD(device_probe, ichsmb_pci_probe), 87 DEVMETHOD(device_attach, ichsmb_pci_attach), 88 89 /* Bus methods */ 90 DEVMETHOD(bus_print_child, bus_generic_print_child), 91 92 /* SMBus methods */ 93 DEVMETHOD(smbus_callback, ichsmb_callback), 94 DEVMETHOD(smbus_quick, ichsmb_quick), 95 DEVMETHOD(smbus_sendb, ichsmb_sendb), 96 DEVMETHOD(smbus_recvb, ichsmb_recvb), 97 DEVMETHOD(smbus_writeb, ichsmb_writeb), 98 DEVMETHOD(smbus_writew, ichsmb_writew), 99 DEVMETHOD(smbus_readb, ichsmb_readb), 100 DEVMETHOD(smbus_readw, ichsmb_readw), 101 DEVMETHOD(smbus_pcall, ichsmb_pcall), 102 DEVMETHOD(smbus_bwrite, ichsmb_bwrite), 103 DEVMETHOD(smbus_bread, ichsmb_bread), 104 { 0, 0 } 105}; 106 107static driver_t ichsmb_pci_driver = { 108 "ichsmb", 109 ichsmb_pci_methods, 110 sizeof(struct ichsmb_softc) 111}; 112 113static devclass_t ichsmb_pci_devclass; 114 115DRIVER_MODULE(ichsmb, pci, ichsmb_pci_driver, ichsmb_pci_devclass, 0, 0); 116 117static int 118ichsmb_pci_probe(device_t dev) 119{ 120 /* Check PCI identifier */ 121 switch (pci_get_devid(dev)) { 122 case ID_82801AA: 123 device_set_desc(dev, "Intel 82801AA (ICH) SMBus controller"); 124 break; 125 case ID_82801AB: 126 device_set_desc(dev, "Intel 82801AB (ICH0) SMBus controller"); 127 break; 128 case ID_82801BA: 129 device_set_desc(dev, "Intel 82801BA (ICH2) SMBus controller"); 130 break; 131 case ID_82801CA: 132 device_set_desc(dev, "Intel 82801CA (ICH3) SMBus controller"); 133 break; 134 case ID_82801DC: 135 device_set_desc(dev, "Intel 82801DC (ICH4) SMBus controller"); 136 break; 137 case ID_82801EB: 138 device_set_desc(dev, "Intel 82801EB (ICH5) SMBus controller"); 139 break; 140 default: 141 if (pci_get_class(dev) == PCIC_SERIALBUS 142 && pci_get_subclass(dev) == PCIS_SERIALBUS_SMBUS 143 && pci_get_progif(dev) == PCIS_SERIALBUS_SMBUS_PROGIF) { 144 device_set_desc(dev, "SMBus controller"); 145 return (-2); /* XXX */ 146 } 147 return (ENXIO); 148 } 149 150 /* Done */ 151 return (ichsmb_probe(dev)); 152} 153 154static int 155ichsmb_pci_attach(device_t dev) 156{ 157 const sc_p sc = device_get_softc(dev); 158 u_int32_t cmd; 159 int error; 160 161 /* Initialize private state */ 162 bzero(sc, sizeof(*sc)); 163 sc->ich_cmd = -1; 164 sc->dev = dev; 165 166 /* Allocate an I/O range */ 167 sc->io_rid = ICH_SMB_BASE; 168 sc->io_res = bus_alloc_resource(dev, SYS_RES_IOPORT, 169 &sc->io_rid, 0, ~0, 16, RF_ACTIVE); 170 if (sc->io_res == NULL) { 171 log(LOG_ERR, "%s: can't map I/O\n", device_get_nameunit(dev)); 172 error = ENXIO; 173 goto fail; 174 } 175 sc->io_bst = rman_get_bustag(sc->io_res); 176 sc->io_bsh = rman_get_bushandle(sc->io_res); 177 178 /* Allocate interrupt */ 179 sc->irq_rid = 0; 180 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, 181 &sc->irq_rid, RF_ACTIVE | RF_SHAREABLE); 182 if (sc->irq_res == NULL) { 183 log(LOG_ERR, "%s: can't get IRQ\n", device_get_nameunit(dev)); 184 error = ENXIO; 185 goto fail; 186 } 187 188 /* Set up interrupt handler */ 189 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC, 190 ichsmb_device_intr, sc, &sc->irq_handle); 191 if (error != 0) { 192 log(LOG_ERR, "%s: can't setup irq\n", device_get_nameunit(dev)); 193 goto fail; 194 } 195 196 /* Enable I/O mapping */ 197 cmd = pci_read_config(dev, PCIR_COMMAND, 4); 198 cmd |= PCIM_CMD_PORTEN; 199 pci_write_config(dev, PCIR_COMMAND, cmd, 4); 200 cmd = pci_read_config(dev, PCIR_COMMAND, 4); 201 if ((cmd & PCIM_CMD_PORTEN) == 0) { 202 log(LOG_ERR, "%s: can't enable memory map\n", 203 device_get_nameunit(dev)); 204 error = ENXIO; 205 goto fail; 206 } 207 208 /* Enable device */ 209 pci_write_config(dev, ICH_HOSTC, ICH_HOSTC_HST_EN, 1); 210 211 /* Done */ 212 return (ichsmb_attach(dev)); 213 214fail: 215 /* Attach failed, release resources */ 216 ichsmb_release_resources(sc); 217 return (error); 218} 219 220