ichsmb_pci.c revision 119280
1 2/* 3 * ichsmb_pci.c 4 * 5 * Copyright (c) 2000 Whistle Communications, Inc. 6 * All rights reserved. 7 * 8 * Subject to the following obligations and disclaimer of warranty, use and 9 * redistribution of this software, in source or object code forms, with or 10 * without modifications are expressly permitted by Whistle Communications; 11 * provided, however, that: 12 * 1. Any and all reproductions of the source or object code must include the 13 * copyright notice above and the following disclaimer of warranties; and 14 * 2. No rights are granted, in any manner or form, to use Whistle 15 * Communications, Inc. trademarks, including the mark "WHISTLE 16 * COMMUNICATIONS" on advertising, endorsements, or otherwise except as 17 * such appears in the above copyright notice or in the software. 18 * 19 * THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND 20 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO 21 * REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE, 22 * INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF 23 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. 24 * WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY 25 * REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS 26 * SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE. 27 * IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES 28 * RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING 29 * WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, 30 * PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY 35 * OF SUCH DAMAGE. 36 * 37 * Author: Archie Cobbs <archie@freebsd.org> 38 * 39 * $FreeBSD: head/sys/dev/ichsmb/ichsmb_pci.c 119280 2003-08-22 06:00:27Z imp $ 40 */ 41 42/* 43 * Support for the SMBus controller logical device which is part of the 44 * Intel 81801AA/AB/BA/CA/DC (ICH/ICH[0234]) I/O controller hub chips. 45 */ 46 47#include <sys/param.h> 48#include <sys/systm.h> 49#include <sys/kernel.h> 50#include <sys/errno.h> 51#include <sys/lock.h> 52#include <sys/mutex.h> 53#include <sys/syslog.h> 54#include <sys/bus.h> 55 56#include <machine/bus.h> 57#include <sys/rman.h> 58#include <machine/resource.h> 59 60#include <dev/pci/pcivar.h> 61#include <dev/pci/pcireg.h> 62 63#include <dev/smbus/smbconf.h> 64 65#include <dev/ichsmb/ichsmb_var.h> 66#include <dev/ichsmb/ichsmb_reg.h> 67 68/* PCI unique identifiers */ 69#define ID_82801AA 0x24138086 70#define ID_82801AB 0x24238086 71#define ID_82801BA 0x24438086 72#define ID_82801CA 0x24838086 73#define ID_82801DC 0x24C38086 74 75#define PCIS_SERIALBUS_SMBUS_PROGIF 0x00 76 77/* Internal functions */ 78static int ichsmb_pci_probe(device_t dev); 79static int ichsmb_pci_attach(device_t dev); 80 81/* Device methods */ 82static device_method_t ichsmb_pci_methods[] = { 83 /* Device interface */ 84 DEVMETHOD(device_probe, ichsmb_pci_probe), 85 DEVMETHOD(device_attach, ichsmb_pci_attach), 86 87 /* Bus methods */ 88 DEVMETHOD(bus_print_child, bus_generic_print_child), 89 90 /* SMBus methods */ 91 DEVMETHOD(smbus_callback, ichsmb_callback), 92 DEVMETHOD(smbus_quick, ichsmb_quick), 93 DEVMETHOD(smbus_sendb, ichsmb_sendb), 94 DEVMETHOD(smbus_recvb, ichsmb_recvb), 95 DEVMETHOD(smbus_writeb, ichsmb_writeb), 96 DEVMETHOD(smbus_writew, ichsmb_writew), 97 DEVMETHOD(smbus_readb, ichsmb_readb), 98 DEVMETHOD(smbus_readw, ichsmb_readw), 99 DEVMETHOD(smbus_pcall, ichsmb_pcall), 100 DEVMETHOD(smbus_bwrite, ichsmb_bwrite), 101 DEVMETHOD(smbus_bread, ichsmb_bread), 102 { 0, 0 } 103}; 104 105static driver_t ichsmb_pci_driver = { 106 "ichsmb", 107 ichsmb_pci_methods, 108 sizeof(struct ichsmb_softc) 109}; 110 111static devclass_t ichsmb_pci_devclass; 112 113DRIVER_MODULE(ichsmb, pci, ichsmb_pci_driver, ichsmb_pci_devclass, 0, 0); 114 115static int 116ichsmb_pci_probe(device_t dev) 117{ 118 /* Check PCI identifier */ 119 switch (pci_get_devid(dev)) { 120 case ID_82801AA: 121 device_set_desc(dev, "Intel 82801AA (ICH) SMBus controller"); 122 break; 123 case ID_82801AB: 124 device_set_desc(dev, "Intel 82801AB (ICH0) SMBus controller"); 125 break; 126 case ID_82801BA: 127 device_set_desc(dev, "Intel 82801BA (ICH2) SMBus controller"); 128 break; 129 case ID_82801CA: 130 device_set_desc(dev, "Intel 82801CA (ICH3) SMBus controller"); 131 break; 132 case ID_82801DC: 133 device_set_desc(dev, "Intel 82801DC (ICH4) SMBus controller"); 134 break; 135 default: 136 if (pci_get_class(dev) == PCIC_SERIALBUS 137 && pci_get_subclass(dev) == PCIS_SERIALBUS_SMBUS 138 && pci_get_progif(dev) == PCIS_SERIALBUS_SMBUS_PROGIF) { 139 device_set_desc(dev, "SMBus controller"); 140 return (-2); /* XXX */ 141 } 142 return (ENXIO); 143 } 144 145 /* Done */ 146 return (ichsmb_probe(dev)); 147} 148 149static int 150ichsmb_pci_attach(device_t dev) 151{ 152 const sc_p sc = device_get_softc(dev); 153 u_int32_t cmd; 154 int error; 155 156 /* Initialize private state */ 157 bzero(sc, sizeof(*sc)); 158 sc->ich_cmd = -1; 159 sc->dev = dev; 160 161 /* Allocate an I/O range */ 162 sc->io_rid = ICH_SMB_BASE; 163 sc->io_res = bus_alloc_resource(dev, SYS_RES_IOPORT, 164 &sc->io_rid, 0, ~0, 16, RF_ACTIVE); 165 if (sc->io_res == NULL) { 166 log(LOG_ERR, "%s: can't map I/O\n", device_get_nameunit(dev)); 167 error = ENXIO; 168 goto fail; 169 } 170 sc->io_bst = rman_get_bustag(sc->io_res); 171 sc->io_bsh = rman_get_bushandle(sc->io_res); 172 173 /* Allocate interrupt */ 174 sc->irq_rid = 0; 175 sc->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, 176 &sc->irq_rid, 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 177 if (sc->irq_res == NULL) { 178 log(LOG_ERR, "%s: can't get IRQ\n", device_get_nameunit(dev)); 179 error = ENXIO; 180 goto fail; 181 } 182 183 /* Set up interrupt handler */ 184 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC, 185 ichsmb_device_intr, sc, &sc->irq_handle); 186 if (error != 0) { 187 log(LOG_ERR, "%s: can't setup irq\n", device_get_nameunit(dev)); 188 goto fail; 189 } 190 191 /* Enable I/O mapping */ 192 cmd = pci_read_config(dev, PCIR_COMMAND, 4); 193 cmd |= PCIM_CMD_PORTEN; 194 pci_write_config(dev, PCIR_COMMAND, cmd, 4); 195 cmd = pci_read_config(dev, PCIR_COMMAND, 4); 196 if ((cmd & PCIM_CMD_PORTEN) == 0) { 197 log(LOG_ERR, "%s: can't enable memory map\n", 198 device_get_nameunit(dev)); 199 error = ENXIO; 200 goto fail; 201 } 202 203 /* Enable device */ 204 pci_write_config(dev, ICH_HOSTC, ICH_HOSTC_HST_EN, 1); 205 206 /* Done */ 207 return (ichsmb_attach(dev)); 208 209fail: 210 /* Attach failed, release resources */ 211 ichsmb_release_resources(sc); 212 return (error); 213} 214 215