ichsmb.c revision 66703
1
2/*
3 * ichsmb.c
4 *
5 * Copyright (c) 2000 Whistle Communications, Inc.
6 * All rights reserved.
7 *
8 * Subject to the following obligations and disclaimer of warranty, use and
9 * redistribution of this software, in source or object code forms, with or
10 * without modifications are expressly permitted by Whistle Communications;
11 * provided, however, that:
12 * 1. Any and all reproductions of the source or object code must include the
13 *    copyright notice above and the following disclaimer of warranties; and
14 * 2. No rights are granted, in any manner or form, to use Whistle
15 *    Communications, Inc. trademarks, including the mark "WHISTLE
16 *    COMMUNICATIONS" on advertising, endorsements, or otherwise except as
17 *    such appears in the above copyright notice or in the software.
18 *
19 * THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND
20 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO
21 * REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE,
22 * INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF
23 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
24 * WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY
25 * REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS
26 * SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE.
27 * IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES
28 * RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING
29 * WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
30 * PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR
31 * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY
32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
34 * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY
35 * OF SUCH DAMAGE.
36 *
37 * Author: Archie Cobbs <archie@freebsd.org>
38 *
39 * $FreeBSD: head/sys/dev/ichsmb/ichsmb.c 66703 2000-10-06 00:09:46Z archie $
40 */
41
42/*
43 * Support for the SMBus controller logical device which is part of the
44 * Intel 81801AA (ICH) and 81801AB (ICH0) I/O controller hub chips.
45 */
46
47#include <sys/param.h>
48#include <sys/systm.h>
49#include <sys/kernel.h>
50#include <sys/errno.h>
51#include <sys/syslog.h>
52#include <sys/bus.h>
53
54#include <machine/bus.h>
55#include <sys/rman.h>
56#include <machine/resource.h>
57
58#include <dev/smbus/smbconf.h>
59
60#include <dev/ichsmb/ichsmb_var.h>
61#include <dev/ichsmb/ichsmb_reg.h>
62
63/*
64 * Enable debugging by defining ICHSMB_DEBUG to a non-zero value.
65 */
66#define ICHSMB_DEBUG	0
67#if ICHSMB_DEBUG != 0 && defined(__GNUC__)
68#define DBG(fmt, args...)	\
69	do { log(LOG_DEBUG, "%s: " fmt, __FUNCTION__ , ## args); } while (0)
70#else
71#define DBG(fmt, args...)	do { } while (0)
72#endif
73
74/*
75 * Our child device driver name
76 */
77#define DRIVER_SMBUS	"smbus"
78
79/*
80 * Internal functions
81 */
82static int ichsmb_wait(sc_p sc);
83
84/********************************************************************
85		BUS-INDEPENDENT BUS METHODS
86********************************************************************/
87
88/*
89 * Handle probe-time duties that are independent of the bus
90 * our device lives on.
91 */
92int
93ichsmb_probe(device_t dev)
94{
95	device_t smb;
96
97	/* Add child: an instance of the "smbus" device */
98	if ((smb = device_add_child(dev, DRIVER_SMBUS, -1)) == NULL) {
99		log(LOG_ERR, "%s: no \"%s\" child found\n",
100		    device_get_nameunit(dev), DRIVER_SMBUS);
101		return (ENXIO);
102	}
103	return (0);
104}
105
106/*
107 * Handle attach-time duties that are independent of the bus
108 * our device lives on.
109 */
110int
111ichsmb_attach(device_t dev)
112{
113	const sc_p sc = device_get_softc(dev);
114	int error;
115
116	/* Clear interrupt conditions */
117	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_STA, 0xff);
118
119	/* Add "smbus" child */
120	if ((error = bus_generic_attach(dev)) != 0) {
121		log(LOG_ERR, "%s: failed to attach child: %d\n",
122		    device_get_nameunit(dev), error);
123		error = ENXIO;
124	}
125
126	/* Done */
127	return (error);
128}
129
130/********************************************************************
131			SMBUS METHODS
132********************************************************************/
133
134int
135ichsmb_callback(device_t dev, int index, caddr_t data)
136{
137	int smb_error = 0;
138
139	DBG("index=%d how=%d\n", index, data ? *(int *)data : -1);
140	switch (index) {
141	case SMB_REQUEST_BUS:
142		break;
143	case SMB_RELEASE_BUS:
144		break;
145	default:
146		smb_error = SMB_EABORT;	/* XXX */
147		break;
148	}
149	DBG("smb_error=%d\n", smb_error);
150	return (smb_error);
151}
152
153int
154ichsmb_quick(device_t dev, u_char slave, int how)
155{
156	const sc_p sc = device_get_softc(dev);
157	int smb_error;
158	int s;
159
160	DBG("slave=0x%02x how=%d\n", slave, how);
161	KASSERT(sc->ich_cmd == -1,
162	    ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
163	switch (how) {
164	case SMB_QREAD:
165	case SMB_QWRITE:
166		s = splhigh();
167		sc->ich_cmd = ICH_HST_CNT_SMB_CMD_QUICK;
168		bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
169		    (slave << 1) | (how == SMB_QREAD ?
170	    		ICH_XMIT_SLVA_READ : ICH_XMIT_SLVA_WRITE));
171		bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
172		    ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
173		smb_error = ichsmb_wait(sc);
174		splx(s);
175		break;
176	default:
177		smb_error = SMB_ENOTSUPP;
178	}
179	DBG("smb_error=%d\n", smb_error);
180	return (smb_error);
181}
182
183int
184ichsmb_sendb(device_t dev, u_char slave, char byte)
185{
186	const sc_p sc = device_get_softc(dev);
187	int smb_error;
188	int s;
189
190	DBG("slave=0x%02x byte=0x%02x\n", slave, (u_char)byte);
191	KASSERT(sc->ich_cmd == -1,
192	    ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
193	s = splhigh();
194	sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE;
195	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
196	    (slave << 1) | ICH_XMIT_SLVA_WRITE);
197	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, byte);
198	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
199	    ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
200	smb_error = ichsmb_wait(sc);
201	splx(s);
202	DBG("smb_error=%d\n", smb_error);
203	return (smb_error);
204}
205
206int
207ichsmb_recvb(device_t dev, u_char slave, char *byte)
208{
209	const sc_p sc = device_get_softc(dev);
210	int smb_error;
211	int s;
212
213	DBG("slave=0x%02x\n", slave);
214	KASSERT(sc->ich_cmd == -1,
215	    ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
216	s = splhigh();
217	sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE;
218	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
219	    (slave << 1) | ICH_XMIT_SLVA_READ);
220	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
221	    ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
222	if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
223		*byte = bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_D0);
224	splx(s);
225	DBG("smb_error=%d byte=0x%02x\n", smb_error, (u_char)*byte);
226	return (smb_error);
227}
228
229int
230ichsmb_writeb(device_t dev, u_char slave, char cmd, char byte)
231{
232	const sc_p sc = device_get_softc(dev);
233	int smb_error;
234	int s;
235
236	DBG("slave=0x%02x cmd=0x%02x byte=0x%02x\n",
237	    slave, (u_char)cmd, (u_char)byte);
238	KASSERT(sc->ich_cmd == -1,
239	    ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
240	s = splhigh();
241	sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE_DATA;
242	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
243	    (slave << 1) | ICH_XMIT_SLVA_WRITE);
244	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
245	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, byte);
246	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
247	    ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
248	smb_error = ichsmb_wait(sc);
249	splx(s);
250	DBG("smb_error=%d\n", smb_error);
251	return (smb_error);
252}
253
254int
255ichsmb_writew(device_t dev, u_char slave, char cmd, short word)
256{
257	const sc_p sc = device_get_softc(dev);
258	int smb_error;
259	int s;
260
261	DBG("slave=0x%02x cmd=0x%02x word=0x%04x\n",
262	    slave, (u_char)cmd, (u_int16_t)word);
263	KASSERT(sc->ich_cmd == -1,
264	    ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
265	s = splhigh();
266	sc->ich_cmd = ICH_HST_CNT_SMB_CMD_WORD_DATA;
267	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
268	    (slave << 1) | ICH_XMIT_SLVA_WRITE);
269	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
270	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, word & 0xff);
271	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D1, word >> 8);
272	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
273	    ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
274	smb_error = ichsmb_wait(sc);
275	splx(s);
276	DBG("smb_error=%d\n", smb_error);
277	return (smb_error);
278}
279
280int
281ichsmb_readb(device_t dev, u_char slave, char cmd, char *byte)
282{
283	const sc_p sc = device_get_softc(dev);
284	int smb_error;
285	int s;
286
287	DBG("slave=0x%02x cmd=0x%02x\n", slave, (u_char)cmd);
288	KASSERT(sc->ich_cmd == -1,
289	    ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
290	s = splhigh();
291	sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE_DATA;
292	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
293	    (slave << 1) | ICH_XMIT_SLVA_READ);
294	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
295	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
296	    ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
297	if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
298		*byte = bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_D0);
299	splx(s);
300	DBG("smb_error=%d byte=0x%02x\n", smb_error, (u_char)*byte);
301	return (smb_error);
302}
303
304int
305ichsmb_readw(device_t dev, u_char slave, char cmd, short *word)
306{
307	const sc_p sc = device_get_softc(dev);
308	int smb_error;
309	int s;
310
311	DBG("slave=0x%02x cmd=0x%02x\n", slave, (u_char)cmd);
312	KASSERT(sc->ich_cmd == -1,
313	    ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
314	s = splhigh();
315	sc->ich_cmd = ICH_HST_CNT_SMB_CMD_WORD_DATA;
316	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
317	    (slave << 1) | ICH_XMIT_SLVA_READ);
318	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
319	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
320	    ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
321	if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR) {
322		*word = (bus_space_read_1(sc->io_bst,
323			sc->io_bsh, ICH_D0) & 0xff)
324		  | (bus_space_read_1(sc->io_bst,
325			sc->io_bsh, ICH_D1) << 8);
326	}
327	splx(s);
328	DBG("smb_error=%d word=0x%04x\n", smb_error, (u_int16_t)*word);
329	return (smb_error);
330}
331
332int
333ichsmb_pcall(device_t dev, u_char slave, char cmd, short sdata, short *rdata)
334{
335	const sc_p sc = device_get_softc(dev);
336	int smb_error;
337	int s;
338
339	DBG("slave=0x%02x cmd=0x%02x sdata=0x%04x\n",
340	    slave, (u_char)cmd, (u_int16_t)sdata);
341	KASSERT(sc->ich_cmd == -1,
342	    ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
343	s = splhigh();
344	sc->ich_cmd = ICH_HST_CNT_SMB_CMD_PROC_CALL;
345	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
346	    (slave << 1) | ICH_XMIT_SLVA_WRITE);
347	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
348	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, sdata & 0xff);
349	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D1, sdata >> 8);
350	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
351	    ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
352	if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR) {
353		*rdata = (bus_space_read_1(sc->io_bst,
354			sc->io_bsh, ICH_D0) & 0xff)
355		  | (bus_space_read_1(sc->io_bst,
356			sc->io_bsh, ICH_D1) << 8);
357	}
358	splx(s);
359	DBG("smb_error=%d rdata=0x%04x\n", smb_error, (u_int16_t)*rdata);
360	return (smb_error);
361}
362
363int
364ichsmb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
365{
366	const sc_p sc = device_get_softc(dev);
367	int smb_error;
368	int s;
369
370	DBG("slave=0x%02x cmd=0x%02x count=%d\n", slave, (u_char)cmd, count);
371#if ICHSMB_DEBUG
372#define DISP(ch)	(((ch) < 0x20 || (ch) >= 0x7e) ? '.' : (ch))
373	{
374	    u_char *p;
375
376	    for (p = (u_char *)buf; p - (u_char *)buf < 32; p += 8) {
377		DBG("%02x: %02x %02x %02x %02x %02x %02x %02x %02x"
378		    "  %c%c%c%c%c%c%c%c", (p - (u_char *)buf),
379		    p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7],
380		    DISP(p[0]), DISP(p[1]), DISP(p[2]), DISP(p[3]),
381		    DISP(p[4]), DISP(p[5]), DISP(p[6]), DISP(p[7]));
382	    }
383	}
384#undef DISP
385#endif
386	KASSERT(sc->ich_cmd == -1,
387	    ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
388	if (count < 1 || count > 32)
389		return (EINVAL);
390	bcopy(buf, sc->block_data, count);
391	sc->block_count = count;
392	sc->block_index = 1;
393	sc->block_write = 1;
394
395	s = splhigh();
396	sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BLOCK;
397	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
398	    (slave << 1) | ICH_XMIT_SLVA_WRITE);
399	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
400	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, count);
401	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_BLOCK_DB, buf[0]);
402	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
403	    ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
404	smb_error = ichsmb_wait(sc);
405	splx(s);
406	DBG("smb_error=%d\n", smb_error);
407	return (smb_error);
408}
409
410int
411ichsmb_bread(device_t dev, u_char slave, char cmd, u_char count, char *buf)
412{
413	const sc_p sc = device_get_softc(dev);
414	int smb_error;
415	int s;
416
417	DBG("slave=0x%02x cmd=0x%02x count=%d\n", slave, (u_char)cmd, count);
418	KASSERT(sc->ich_cmd == -1,
419	    ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
420	if (count < 1 || count > 32)
421		return (EINVAL);
422	bzero(sc->block_data, sizeof(sc->block_data));
423	sc->block_count = count;
424	sc->block_index = 0;
425	sc->block_write = 0;
426
427	s = splhigh();
428	sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BLOCK;
429	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
430	    (slave << 1) | ICH_XMIT_SLVA_READ);
431	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
432	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, count); /* XXX? */
433	bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
434	    ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
435	if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
436		bcopy(sc->block_data, buf, sc->block_count);
437	splx(s);
438	DBG("smb_error=%d\n", smb_error);
439#if ICHSMB_DEBUG
440#define DISP(ch)	(((ch) < 0x20 || (ch) >= 0x7e) ? '.' : (ch))
441	{
442	    u_char *p;
443
444	    for (p = (u_char *)buf; p - (u_char *)buf < 32; p += 8) {
445		DBG("%02x: %02x %02x %02x %02x %02x %02x %02x %02x"
446		    "  %c%c%c%c%c%c%c%c", (p - (u_char *)buf),
447		    p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7],
448		    DISP(p[0]), DISP(p[1]), DISP(p[2]), DISP(p[3]),
449		    DISP(p[4]), DISP(p[5]), DISP(p[6]), DISP(p[7]));
450	    }
451	}
452#undef DISP
453#endif
454	return (smb_error);
455}
456
457/********************************************************************
458			OTHER FUNCTIONS
459********************************************************************/
460
461/*
462 * This table describes what interrupts we should ever expect to
463 * see after each ICH command, not including the SMBALERT interrupt.
464 */
465static const u_int8_t ichsmb_state_irqs[] = {
466	/* quick */
467	(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
468	/* byte */
469	(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
470	/* byte data */
471	(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
472	/* word data */
473	(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
474	/* process call */
475	(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
476	/* block */
477	(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR
478	    | ICH_HST_STA_BYTE_DONE_STS),
479	/* i2c read (not used) */
480	(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR
481	    | ICH_HST_STA_BYTE_DONE_STS)
482};
483
484/*
485 * Interrupt handler. This handler is bus-independent. Note that our
486 * interrupt may be shared, so we must handle "false" interrupts.
487 */
488void
489ichsmb_device_intr(void *cookie)
490{
491	const sc_p sc = cookie;
492	const device_t dev = sc->dev;
493	const int maxloops = 16;
494	u_int8_t status;
495	u_int8_t ok_bits;
496	int cmd_index;
497        int count;
498	int s;
499
500	s = splhigh();
501	for (count = 0; count < maxloops; count++) {
502
503		/* Get and reset status bits */
504		status = bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_HST_STA);
505#if ICHSMB_DEBUG
506		if ((status & ~(ICH_HST_STA_INUSE_STS | ICH_HST_STA_HOST_BUSY))
507		    || count > 0) {
508			DBG("%d stat=0x%02x\n", count, status);
509		}
510#endif
511		status &= ~(ICH_HST_STA_INUSE_STS | ICH_HST_STA_HOST_BUSY);
512		if (status == 0)
513			break;
514
515		/* Check for unexpected interrupt */
516		ok_bits = ICH_HST_STA_SMBALERT_STS;
517		cmd_index = sc->ich_cmd >> 2;
518		if (sc->ich_cmd != -1) {
519			KASSERT(cmd_index < sizeof(ichsmb_state_irqs),
520			    ("%s: ich_cmd=%d", device_get_nameunit(dev),
521			    sc->ich_cmd));
522			ok_bits |= ichsmb_state_irqs[cmd_index];
523		}
524		if ((status & ~ok_bits) != 0) {
525			log(LOG_ERR, "%s: irq 0x%02x during %d\n",
526			    device_get_nameunit(dev), status, cmd_index);
527			bus_space_write_1(sc->io_bst, sc->io_bsh,
528			    ICH_HST_STA, (status & ~ok_bits));
529			continue;
530		}
531
532		/* Handle SMBALERT interrupt */
533		if (status & ICH_HST_STA_SMBALERT_STS) {
534			static int smbalert_count = 16;
535			if (smbalert_count > 0) {
536				log(LOG_WARNING, "%s: SMBALERT# rec'd\n",
537				    device_get_nameunit(dev));
538				if (--smbalert_count == 0) {
539					log(LOG_WARNING,
540					    "%s: not logging anymore\n",
541					    device_get_nameunit(dev));
542				}
543			}
544		}
545
546		/* Check for bus error */
547		if (status & ICH_HST_STA_BUS_ERR) {
548			sc->smb_error = SMB_ECOLLI;	/* XXX SMB_EBUSERR? */
549			goto finished;
550		}
551
552		/* Check for device error */
553		if (status & ICH_HST_STA_DEV_ERR) {
554			sc->smb_error = SMB_ENOACK;	/* or SMB_ETIMEOUT? */
555			goto finished;
556		}
557
558		/* Check for byte completion in block transfer */
559		if (status & ICH_HST_STA_BYTE_DONE_STS) {
560			if (sc->block_write) {
561				if (sc->block_index < sc->block_count) {
562
563					/* Write next byte */
564					bus_space_write_1(sc->io_bst,
565					    sc->io_bsh, ICH_BLOCK_DB,
566					    sc->block_data[sc->block_index++]);
567				}
568			} else {
569
570				/* First interrupt, get the count also */
571				if (sc->block_index == 0) {
572					sc->block_count = bus_space_read_1(
573					    sc->io_bst, sc->io_bsh, ICH_D0);
574				}
575
576				/* Get next byte, if any */
577				if (sc->block_index < sc->block_count) {
578
579					/* Read next byte */
580					sc->block_data[sc->block_index++] =
581					    bus_space_read_1(sc->io_bst,
582					      sc->io_bsh, ICH_BLOCK_DB);
583
584					/* Set "LAST_BYTE" bit before reading
585					   the last byte of block data */
586					if (sc->block_index
587					    >= sc->block_count - 1) {
588						bus_space_write_1(sc->io_bst,
589						    sc->io_bsh, ICH_HST_CNT,
590						    ICH_HST_CNT_LAST_BYTE
591							| ICH_HST_CNT_INTREN
592							| sc->ich_cmd);
593					}
594				}
595			}
596		}
597
598		/* Check command completion */
599		if (status & ICH_HST_STA_INTR) {
600			sc->smb_error = SMB_ENOERR;
601finished:
602			sc->ich_cmd = -1;
603			bus_space_write_1(sc->io_bst, sc->io_bsh,
604			    ICH_HST_STA, status);
605			wakeup(sc);
606			break;
607		}
608
609		/* Clear status bits and try again */
610		bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_STA, status);
611	}
612	splx(s);
613
614	/* Too many loops? */
615	if (count == maxloops) {
616		log(LOG_ERR, "%s: interrupt loop, status=0x%02x\n",
617		    device_get_nameunit(dev),
618		    bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_HST_STA));
619	}
620}
621
622/*
623 * Wait for command completion. Assumes splhigh().
624 * Returns an SMB_* error code.
625 */
626static int
627ichsmb_wait(sc_p sc)
628{
629	const device_t dev = sc->dev;
630	int error, smb_error;
631
632	KASSERT(sc->ich_cmd != -1,
633	    ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
634sleep:
635	error = tsleep(sc, PZERO | PCATCH, "ichsmb", hz / 4);
636	DBG("tsleep -> %d\n", error);
637	switch (error) {
638	case ERESTART:
639		if (sc->ich_cmd != -1)
640			goto sleep;
641		/* FALLTHROUGH */
642	case 0:
643		smb_error = sc->smb_error;
644		break;
645	case EWOULDBLOCK:
646		log(LOG_ERR, "%s: device timeout, status=0x%02x\n",
647		    device_get_nameunit(dev),
648		    bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_HST_STA));
649		sc->ich_cmd = -1;
650		smb_error = SMB_ETIMEOUT;
651		break;
652	default:
653		smb_error = SMB_EABORT;
654		break;
655	}
656	return (smb_error);
657}
658
659/*
660 * Release resources associated with device.
661 */
662void
663ichsmb_release_resources(sc_p sc)
664{
665	const device_t dev = sc->dev;
666
667	if (sc->irq_handle != NULL) {
668		bus_teardown_intr(dev, sc->irq_res, sc->irq_handle);
669		sc->irq_handle = NULL;
670	}
671	if (sc->irq_res != NULL) {
672		bus_release_resource(dev,
673		    SYS_RES_IRQ, sc->irq_rid, sc->irq_res);
674		sc->irq_res = NULL;
675	}
676	if (sc->io_res != NULL) {
677		bus_release_resource(dev,
678		    SYS_RES_IOPORT, sc->io_rid, sc->io_res);
679		sc->io_res = NULL;
680	}
681}
682
683