ig4_var.h revision 339029 
1/*
2 * Copyright (c) 2014 The DragonFly Project.  All rights reserved.
3 *
4 * This code is derived from software contributed to The DragonFly Project
5 * by Matthew Dillon <dillon@backplane.com> and was subsequently ported
6 * to FreeBSD by Michael Gmelin <freebsd@grem.de>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 *
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in
16 *    the documentation and/or other materials provided with the
17 *    distribution.
18 * 3. Neither the name of The DragonFly Project nor the names of its
19 *    contributors may be used to endorse or promote products derived
20 *    from this software without specific, prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
25 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
26 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
27 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
28 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
30 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
32 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 *
35 * $FreeBSD: stable/11/sys/dev/ichiic/ig4_var.h 339029 2018-09-30 23:14:07Z gonzo $
36 */
37
38#ifndef _ICHIIC_IG4_VAR_H_
39#define _ICHIIC_IG4_VAR_H_
40
41#include "bus_if.h"
42#include "device_if.h"
43#include "pci_if.h"
44#include "iicbus_if.h"
45
46#define IG4_RBUFSIZE	128
47#define IG4_RBUFMASK	(IG4_RBUFSIZE - 1)
48
49enum ig4_op { IG4_IDLE, IG4_READ, IG4_WRITE };
50enum ig4_vers { IG4_HASWELL, IG4_ATOM, IG4_SKYLAKE, IG4_APL };
51
52struct ig4iic_softc {
53	device_t	dev;
54	struct		intr_config_hook enum_hook;
55	device_t	iicbus;
56	struct resource	*regs_res;
57	int		regs_rid;
58	struct resource	*intr_res;
59	int		intr_rid;
60	void		*intr_handle;
61	int		intr_type;
62	enum ig4_vers	version;
63	enum ig4_op	op;
64	int		cmd;
65	int		rnext;
66	int		rpos;
67	char		rbuf[IG4_RBUFSIZE];
68	int		error;
69	uint8_t		last_slave;
70	int		platform_attached : 1;
71	int		use_10bit : 1;
72	int		slave_valid : 1;
73	int		read_started : 1;
74	int		write_started : 1;
75
76	/*
77	 * Locking semantics:
78	 *
79	 * Functions implementing the icbus interface that interact
80	 * with the controller acquire an exclusive lock on call_lock
81	 * to prevent interleaving of calls to the interface and a lock on
82	 * io_lock right afterwards, to synchronize controller I/O activity.
83	 *
84	 * The interrupt handler can only read data while no iicbus call
85	 * is in progress or while io_lock is dropped during mtx_sleep in
86	 * wait_status and set_controller. It is safe to drop io_lock in those
87	 * places, because the interrupt handler only accesses those registers:
88	 *
89	 * - IG4_REG_I2C_STA  (I2C Status)
90	 * - IG4_REG_DATA_CMD (Data Buffer and Command)
91	 * - IG4_REG_CLR_INTR (Clear Interrupt)
92	 *
93	 * Locking outside of those places is required to make the content
94	 * of rpos/rnext predictable (e.g. whenever data_read is called and in
95	 * ig4iic_transfer).
96	 */
97	struct sx	call_lock;
98	struct mtx	io_lock;
99};
100
101typedef struct ig4iic_softc ig4iic_softc_t;
102
103/* Attach/Detach called from ig4iic_pci_*() */
104int ig4iic_attach(ig4iic_softc_t *sc);
105int ig4iic_detach(ig4iic_softc_t *sc);
106
107/* iicbus methods */
108extern iicbus_transfer_t ig4iic_transfer;
109extern iicbus_reset_t   ig4iic_reset;
110
111#endif /* _ICHIIC_IG4_VAR_H_ */
112