1/*-
2 * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
3 * All rights reserved.
4 *
5 * This software was developed by SRI International and the University of
6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
7 * ("CTSRD"), as part of the DARPA CRASH research programme.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 * $FreeBSD$
31 */
32
33#ifndef _DEV_HWPMC_ARMV7_H_
34#define _DEV_HWPMC_ARMV7_H_
35
36#define	ARMV7_PMC_CAPS		(PMC_CAP_INTERRUPT | PMC_CAP_USER |     \
37				 PMC_CAP_SYSTEM | PMC_CAP_EDGE |	\
38				 PMC_CAP_THRESHOLD | PMC_CAP_READ |	\
39				 PMC_CAP_WRITE | PMC_CAP_INVERT |	\
40				 PMC_CAP_QUALIFIER)
41
42#define	ARMV7_PMNC_ENABLE	(1 << 0) /* Enable all counters */
43#define	ARMV7_PMNC_P		(1 << 1) /* Reset all counters */
44#define	ARMV7_PMNC_C		(1 << 2) /* Cycle counter reset */
45#define	ARMV7_PMNC_D		(1 << 3) /* CCNT counts every 64th cpu cycle */
46#define	ARMV7_PMNC_X		(1 << 4) /* Export to ext. monitoring (ETM) */
47#define	ARMV7_PMNC_DP		(1 << 5) /* Disable CCNT if non-invasive debug*/
48#define	ARMV7_PMNC_N_SHIFT	11       /* Number of counters implemented */
49#define	ARMV7_PMNC_N_MASK	0x1f
50#define	ARMV7_PMNC_MASK		0x3f     /* Writable bits */
51#define	ARMV7_IDCODE_SHIFT	16       /* Identification code */
52#define	ARMV7_IDCODE_MASK	(0xff << ARMV7_IDCODE_SHIFT)
53#define	ARMV7_IDCODE_CORTEX_A9	9
54#define	ARMV7_IDCODE_CORTEX_A8	8
55
56#define	ARMV7_RELOAD_COUNT_TO_PERFCTR_VALUE(R)	(-(R))
57#define	ARMV7_PERFCTR_VALUE_TO_RELOAD_COUNT(P)	(-(P))
58#define	EVENT_ID_MASK	0xFF
59
60#ifdef _KERNEL
61/* MD extension for 'struct pmc' */
62struct pmc_md_armv7_pmc {
63	uint32_t	pm_armv7_evsel;
64};
65#endif /* _KERNEL */
66#endif /* _DEV_HWPMC_ARMV7_H_ */
67