entry.c revision 143039
1/*- 2 * Copyright (c) 2003-2004 HighPoint Technologies, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: head/sys/dev/hptmv/entry.c 143039 2005-03-02 15:13:37Z scottl $ 27 */ 28#include <sys/param.h> 29#include <sys/systm.h> 30#include <sys/kernel.h> 31#include <sys/bus.h> 32#include <sys/malloc.h> 33#include <sys/resource.h> 34#include <sys/time.h> 35#include <sys/callout.h> 36#include <sys/signalvar.h> 37#include <sys/eventhandler.h> 38#include <sys/proc.h> 39#include <sys/kthread.h> 40 41#include <dev/pci/pcireg.h> 42#include <dev/pci/pcivar.h> 43 44#include <dev/hptmv/global.h> 45#include <dev/hptmv/hptintf.h> 46#include <dev/hptmv/osbsd.h> 47#include <dev/hptmv/access601.h> 48 49#ifdef DEBUG 50#ifdef DEBUG_LEVEL 51int hpt_dbg_level = DEBUG_LEVEL; 52#else 53int hpt_dbg_level = 0; 54#endif 55#endif 56 57#define MV_ERROR printf 58/* 59 * CAM SIM entry points 60 */ 61static int hpt_probe(device_t dev); 62static int hpt_attach(device_t dev); 63static int hpt_detach(device_t dev); 64static int hpt_shutdown(device_t dev); 65static void hpt_poll(struct cam_sim *sim); 66static void hpt_intr(void *arg); 67static void hpt_action(struct cam_sim *sim, union ccb *ccb); 68static void SetInquiryData(PINQUIRYDATA inquiryData, PVDevice pVDev); 69static void HPTLIBAPI OsSendCommand (_VBUS_ARG union ccb * ccb); 70static void HPTLIBAPI fOsCommandDone(_VBUS_ARG PCommand pCmd); 71static void ccb_done(union ccb *ccb); 72static void hpt_queue_ccb(union ccb **ccb_Q, union ccb *ccb); 73static void hpt_free_ccb(union ccb **ccb_Q, union ccb *ccb); 74static void launch_worker_thread(void); 75static MV_SATA_CHANNEL gMvSataChannels[MAX_VBUS][MV_SATA_CHANNELS_NUM]; 76static void hptmv_free_edma_queues(IAL_ADAPTER_T *pAdapter); 77static void hptmv_free_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum); 78static void handleEdmaError(_VBUS_ARG PCommand pCmd); 79static int hptmv_init_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum); 80static int fResetActiveCommands(PVBus _vbus_p); 81static void fRegisterVdevice(IAL_ADAPTER_T *pAdapter); 82static int hptmv_allocate_edma_queues(IAL_ADAPTER_T *pAdapter); 83static void hptmv_handle_event_disconnect(void *data); 84static void hptmv_handle_event_connect(void *data); 85static int start_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum); 86static void init_vdev_params(IAL_ADAPTER_T *pAdapter, MV_U8 channel); 87static int hptmv_parse_identify_results(MV_SATA_CHANNEL *pMvSataChannel); 88static void hpt_async(void *callback_arg, u_int32_t code, 89 struct cam_path *path, void *arg); 90static int HPTLIBAPI fOsBuildSgl(_VBUS_ARG PCommand pCmd, FPSCAT_GATH pSg, 91 int logical); 92static MV_BOOLEAN CommandCompletionCB(MV_SATA_ADAPTER *pMvSataAdapter, 93 MV_U8 channelNum, MV_COMPLETION_TYPE comp_type, MV_VOID_PTR commandId, 94 MV_U16 responseFlags, MV_U32 timeStamp, 95 MV_STORAGE_DEVICE_REGISTERS *registerStruct); 96static MV_BOOLEAN hptmv_event_notify(MV_SATA_ADAPTER *pMvSataAdapter, 97 MV_EVENT_TYPE eventType, MV_U32 param1, MV_U32 param2); 98 99#define ccb_ccb_ptr spriv_ptr0 100#define ccb_adapter ccb_h.spriv_ptr1 101 102IAL_ADAPTER_T *gIal_Adapter = 0; 103IAL_ADAPTER_T *pCurAdapter = 0; 104 105typedef struct st_HPT_DPC { 106 IAL_ADAPTER_T *pAdapter; 107 void (*dpc)(IAL_ADAPTER_T *, void *, UCHAR); 108 void *arg; 109 UCHAR flags; 110} ST_HPT_DPC; 111 112#define MAX_DPC 16 113UCHAR DPC_Request_Nums = 0; 114static ST_HPT_DPC DpcQueue[MAX_DPC]; 115static int DpcQueue_First=0; 116static int DpcQueue_Last = 0; 117 118static device_method_t driver_methods[] = { 119 /* Device interface */ 120 DEVMETHOD(device_probe, hpt_probe), 121 DEVMETHOD(device_attach, hpt_attach), 122 DEVMETHOD(device_detach, hpt_detach), 123 { 0, 0 } 124}; 125 126static driver_t hpt_pci_driver = { 127 __str(PROC_DIR_NAME), 128 driver_methods, 129 sizeof(IAL_ADAPTER_T) 130}; 131 132static devclass_t hpt_devclass; 133 134DRIVER_MODULE(PROC_DIR_NAME, pci, hpt_pci_driver, hpt_devclass, 0, 0); 135MODULE_DEPEND(PROC_DIR_NAME, cam, 1, 1, 1); 136 137intrmask_t 138lock_driver() 139{ 140 intrmask_t spl = splcam(); 141 return spl; 142} 143 144void 145unlock_driver(intrmask_t spl) 146{ 147 splx(spl); 148} 149 150/******************************************************************************* 151 * Name: hptmv_free_channel 152 * 153 * Description: free allocated queues for the given channel 154 * 155 * Parameters: pMvSataAdapter - pointer to the RR182x controler this 156 * channel connected to. 157 * channelNum - channel number. 158 * 159 ******************************************************************************/ 160static void 161hptmv_free_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum) 162{ 163 PVDevice pVDev = &(pAdapter->VDevices[channelNum]); 164 _VBUS_INST(&pAdapter->VBus); 165 166 HPT_ASSERT(channelNum < MV_SATA_CHANNELS_NUM); 167 168 pAdapter->mvSataAdapter.sataChannel[channelNum] = NULL; 169 170 if(pVDev->vf_online) 171 { 172 pVDev->u.disk.df_on_line = 0; 173 pVDev->vf_online = 0; 174 if (pVDev->pfnDeviceFailed) { 175 CallWhenIdle(_VBUS_P (DPC_PROC)pVDev->pfnDeviceFailed, 176 pVDev); 177 } 178 } 179} 180 181int MvSataResetChannel(MV_SATA_ADAPTER *pMvSataAdapter, MV_U8 channel); 182 183static void 184handleEdmaError(_VBUS_ARG PCommand pCmd) 185{ 186 PDevice pDevice = &pCmd->pVDevice->u.disk; 187 MV_SATA_ADAPTER * pSataAdapter = pDevice->mv->mvSataAdapter; 188 189 MV_ERROR("Reset channel\n"); 190 191 MvSataResetChannel(pSataAdapter, pDevice->mv->channelNumber); 192 /*now no other cmds on this channel*/ 193 if (!pDevice->df_on_line) { 194 KdPrint(("Device is offline")); 195 pCmd->Result = RETURN_BAD_DEVICE; 196 CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd); 197 return; 198 } 199 200 if (pCmd->RetryCount++>5) { 201 pDevice->df_on_line = 0; 202 pCmd->pVDevice->vf_online = 0; 203 if (pCmd->pVDevice->pfnDeviceFailed) 204 CallWhenIdle(_VBUS_P 205 (DPC_PROC)pCmd->pVDevice->pfnDeviceFailed, 206 pCmd->pVDevice); 207 fNotifyGUI(ET_DEVICE_REMOVED, Map2pVDevice(pDevice)); 208 pCmd->Result = RETURN_IDE_ERROR; 209 CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd); 210 return; 211 } 212 /* retry the command */ 213 fDeviceSendCommand(_VBUS_P pCmd); 214} 215 216/**************************************************************** 217 * Name: hptmv_init_channel 218 * 219 * Description: allocate request and response queues for the EDMA of 220 * the given channel and sets other fields. 221 * Parameters: 222 * pAdapter - pointer to the emulated adapter data structure 223 * channelNum - channel number. 224 * Return: 0 on success, otherwise on failure 225 ****************************************************************/ 226static int 227hptmv_init_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum) 228{ 229 MV_SATA_CHANNEL *pMvSataChannel; 230 dma_addr_t req_dma_addr; 231 dma_addr_t rsp_dma_addr; 232 233 if (channelNum >= MV_SATA_CHANNELS_NUM) 234 { 235 MV_ERROR("RR182x[%d]: Bad channelNum=%d", 236 pAdapter->mvSataAdapter.adapterId, channelNum); 237 return -1; 238 } 239 240 pMvSataChannel = 241 &gMvSataChannels[pAdapter->mvSataAdapter.adapterId][channelNum]; 242 pAdapter->mvSataAdapter.sataChannel[channelNum] = pMvSataChannel; 243 pMvSataChannel->channelNumber = channelNum; 244 pMvSataChannel->lba48Address = MV_FALSE; 245 pMvSataChannel->maxReadTransfer = MV_FALSE; 246 247 pMvSataChannel->requestQueue = 248 (struct mvDmaRequestQueueEntry *) 249 (pAdapter->requestsArrayBaseAlignedAddr + 250 (channelNum * MV_EDMA_REQUEST_QUEUE_SIZE)); 251 req_dma_addr = pAdapter->requestsArrayBaseDmaAlignedAddr + 252 (channelNum * MV_EDMA_REQUEST_QUEUE_SIZE); 253 254 255 KdPrint(("requestQueue addr is 0x%lX", (u_long)req_dma_addr)); 256 257 /* check the 1K alignment of the request queue*/ 258 if (req_dma_addr & 0x3ff) 259 { 260 MV_ERROR("RR182x[%d]: request queue allocated not 1 K aligned," 261 " dma_addr=%lx channel=%d\n", 262 pAdapter->mvSataAdapter.adapterId,(u_long)req_dma_addr, 263 channelNum); 264 return -1; 265 } 266 pMvSataChannel->requestQueuePciLowAddress = req_dma_addr; 267 pMvSataChannel->requestQueuePciHiAddress = 0; 268 KdPrint(("RR182x[%d,%d]: request queue allocated: 0x%p", 269 pAdapter->mvSataAdapter.adapterId, channelNum, 270 pMvSataChannel->requestQueue)); 271 pMvSataChannel->responseQueue = 272 (struct mvDmaResponseQueueEntry *) 273 (pAdapter->responsesArrayBaseAlignedAddr + 274 (channelNum * MV_EDMA_RESPONSE_QUEUE_SIZE)); 275 rsp_dma_addr = pAdapter->responsesArrayBaseDmaAlignedAddr + 276 (channelNum * MV_EDMA_RESPONSE_QUEUE_SIZE); 277 278 /* check the 256 alignment of the response queue*/ 279 if (rsp_dma_addr & 0xff) 280 { 281 MV_ERROR("RR182x[%d,%d]: response queue allocated not 256 byte" 282 " aligned, dma_addr=%lx\n", 283 pAdapter->mvSataAdapter.adapterId, channelNum, 284 (u_long)rsp_dma_addr); 285 return -1; 286 } 287 pMvSataChannel->responseQueuePciLowAddress = rsp_dma_addr; 288 pMvSataChannel->responseQueuePciHiAddress = 0; 289 KdPrint(("RR182x[%d,%d]: response queue allocated: 0x%p", 290 pAdapter->mvSataAdapter.adapterId, channelNum, 291 pMvSataChannel->responseQueue)); 292 293 pAdapter->mvChannel[channelNum].online = MV_TRUE; 294 return 0; 295} 296 297/****************************************************************************** 298 * Name: hptmv_parse_identify_results 299 * 300 * Description: this functions parses the identify command results, 301 * checks that the connected deives can be accesed by 302 * RR182x EDMA, and updates the channel stucture 303 * accordingly. 304 * Parameters: pMvSataChannel, pointer to the channel data structure. 305 * 306 * Returns: =0 ->success, < 0 ->failure. 307 * 308 ******************************************************************************/ 309static int 310hptmv_parse_identify_results(MV_SATA_CHANNEL *pMvSataChannel) 311{ 312 MV_U16 *iden = pMvSataChannel->identifyDevice; 313 314 /*LBA addressing*/ 315 if (! (iden[IDEN_CAPACITY_1_OFFSET] & 0x200)) { 316 KdPrint(("IAL Error in IDENTIFY info: LBA not supported\n")); 317 return -1; 318 } else { 319 KdPrint(("%25s - %s\n", "Capabilities", "LBA supported")); 320 } 321 /*DMA support*/ 322 if (! (iden[IDEN_CAPACITY_1_OFFSET] & 0x100)) { 323 KdPrint(("IAL Error in IDENTIFY info: DMA not supported\n")); 324 return -1; 325 } else { 326 KdPrint(("%25s - %s\n", "Capabilities", "DMA supported")); 327 } 328 /* PIO */ 329 if ((iden[IDEN_VALID] & 2) == 0) { 330 KdPrint(("IAL Error in IDENTIFY info: not able to find PIO " 331 "mode\n")); 332 return -1; 333 } 334 KdPrint(("%25s - 0x%02x\n", "PIO modes supported", 335 iden[IDEN_PIO_MODE_SPPORTED] & 0xff)); 336 337 /*UDMA*/ 338 if ((iden[IDEN_VALID] & 4) == 0) { 339 KdPrint(("IAL Error in IDENTIFY info: not able to find UDMA " 340 "mode\n")); 341 return -1; 342 } 343 344 /* 48 bit address */ 345 if ((iden[IDEN_SUPPORTED_COMMANDS2] & 0x400)) { 346 KdPrint(("%25s - %s\n", "LBA48 addressing", "supported")); 347 pMvSataChannel->lba48Address = MV_TRUE; 348 } else { 349 KdPrint(("%25s - %s\n", "LBA48 addressing", "Not supported")); 350 pMvSataChannel->lba48Address = MV_FALSE; 351 } 352 return 0; 353} 354 355static void 356init_vdev_params(IAL_ADAPTER_T *pAdapter, MV_U8 channel) 357{ 358 PVDevice pVDev; 359 MV_SATA_CHANNEL *pMvSataChannel; 360 MV_U16_PTR IdentifyData; 361 362 pVDev = &pAdapter->VDevices[channel]; 363 pMvSataChannel = pAdapter->mvSataAdapter.sataChannel[channel]; 364 pMvSataChannel->outstandingCommands = 0; 365 IdentifyData = pMvSataChannel->identifyDevice; 366 367 pVDev->u.disk.mv = pMvSataChannel; 368 pVDev->u.disk.df_on_line = 1; 369 pVDev->u.disk.pVBus = &pAdapter->VBus; 370 pVDev->pVBus = &pAdapter->VBus; 371 372#ifdef SUPPORT_48BIT_LBA 373 if (pMvSataChannel->lba48Address == MV_TRUE) 374 pVDev->u.disk.dDeRealCapacity = 375 ((IdentifyData[101]<<16) | IdentifyData[100]) - 1; 376 else 377#endif 378 if(IdentifyData[53] & 1) { 379 pVDev->u.disk.dDeRealCapacity = 380 (((IdentifyData[58]<<16 | IdentifyData[57]) < 381 (IdentifyData[61]<<16 | IdentifyData[60])) ? 382 (IdentifyData[61]<<16 | IdentifyData[60]) : 383 (IdentifyData[58]<<16 | IdentifyData[57])) - 1; 384 } else 385 pVDev->u.disk.dDeRealCapacity = 386 (IdentifyData[61]<<16 | IdentifyData[60]) - 1; 387 388 pVDev->u.disk.bDeUsable_Mode = pVDev->u.disk.bDeModeSetting = 389 pAdapter->mvChannel[channel].maxPioModeSupported - 390 MV_ATA_TRANSFER_PIO_0; 391 392 if (pAdapter->mvChannel[channel].maxUltraDmaModeSupported!=0xFF) { 393 pVDev->u.disk.bDeUsable_Mode = pVDev->u.disk.bDeModeSetting = 394 pAdapter->mvChannel[channel].maxUltraDmaModeSupported - 395 MV_ATA_TRANSFER_UDMA_0 + 8; 396 } 397} 398 399static void 400device_change(IAL_ADAPTER_T *pAdapter , MV_U8 channelIndex, int plugged) 401{ 402 PVDevice pVDev; 403 MV_SATA_ADAPTER *pMvSataAdapter; 404 MV_SATA_CHANNEL *pMvSataChannel; 405 PVBus _vbus_p; 406 407 pMvSataAdapter = &pAdapter->mvSataAdapter; 408 pMvSataChannel = pMvSataAdapter->sataChannel[channelIndex]; 409 _vbus_p = &pAdapter->VBus; 410 411 if (!pMvSataChannel) 412 return; 413 414 if (plugged) { 415 pVDev = &(pAdapter->VDevices[channelIndex]); 416 init_vdev_params(pAdapter, channelIndex); 417 418 pVDev->VDeviceType = pVDev->u.disk.df_atapi ? VD_ATAPI : 419 pVDev->u.disk.df_removable_drive ? VD_REMOVABLE : 420 VD_SINGLE_DISK; 421 422 pVDev->VDeviceCapacity = pVDev->u.disk.dDeRealCapacity; 423 pVDev->pfnSendCommand = pfnSendCommand[pVDev->VDeviceType]; 424 pVDev->pfnDeviceFailed = pfnDeviceFailed[pVDev->VDeviceType]; 425 pVDev->vf_online = 1; 426 427#ifdef SUPPORT_ARRAY 428 if(pVDev->pParent) { 429 int iMember; 430 431 for (iMember = 0; 432 iMember < pVDev->pParent->u.array.bArnMember; 433 iMember++) 434 if ((PVDevice)pVDev->pParent->u.array.pMember[iMember] == pVDev) 435 pVDev->pParent->u.array.pMember[iMember] = NULL; 436 pVDev->pParent = NULL; 437 } 438#endif 439 fNotifyGUI(ET_DEVICE_PLUGGED,pVDev); 440 fCheckBootable(pVDev); 441 RegisterVDevice(pVDev); 442 443#ifndef FOR_DEMO 444 if (pAdapter->beeping) { 445 pAdapter->beeping = 0; 446 BeepOff(pAdapter->mvSataAdapter.adapterIoBaseAddress); 447 } 448#endif 449 450 } else { 451 pVDev = &(pAdapter->VDevices[channelIndex]); 452 pVDev->u.disk.df_on_line = 0; 453 pVDev->vf_online = 0; 454 if (pVDev->pfnDeviceFailed) { 455 _VBUS_INST(&pAdapter->VBus) 456 CallWhenIdle(_VBUS_P (DPC_PROC)pVDev->pfnDeviceFailed, 457 pVDev); 458 } 459 fNotifyGUI(ET_DEVICE_REMOVED,pVDev); 460 461#ifndef FOR_DEMO 462 if (pAdapter->ver_601==2 && !pAdapter->beeping) { 463 pAdapter->beeping = 1; 464 BeepOn(pAdapter->mvSataAdapter.adapterIoBaseAddress); 465 set_fail_led(&pAdapter->mvSataAdapter, channelIndex, 1); 466 } 467#endif 468 469 } 470} 471 472static int 473start_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum) 474{ 475 MV_SATA_ADAPTER *pMvSataAdapter; 476 MV_SATA_CHANNEL *pMvSataChannel; 477 MV_CHANNEL *pChannelInfo; 478 MV_U32 udmaMode,pioMode; 479 480 pMvSataAdapter = &pAdapter->mvSataAdapter; 481 pMvSataChannel = pMvSataAdapter->sataChannel[channelNum]; 482 pChannelInfo = &(pAdapter->mvChannel[channelNum]); 483 484 KdPrint(("RR182x [%d]: start channel (%d)", pMvSataAdapter->adapterId, 485 channelNum)); 486 487 488 /* Software reset channel */ 489 if (mvStorageDevATASoftResetDevice(pMvSataAdapter, channelNum) == 490 MV_FALSE) { 491 MV_ERROR("RR182x [%d,%d]: failed to perform Software reset\n", 492 pMvSataAdapter->adapterId, channelNum); 493 return -1; 494 } 495 496 /* Hardware reset channel */ 497 if (mvSataChannelHardReset(pMvSataAdapter, channelNum) == MV_FALSE) { 498 /* 499 * If failed, try again - this is when trying to hardreset a 500 * channel when drive is just spinning up 501 */ 502 StallExec(5000000); /* wait 5 sec before trying again */ 503 if (mvSataChannelHardReset(pMvSataAdapter, channelNum) == 504 MV_FALSE) { 505 MV_ERROR("RR182x [%d,%d]: failed to perform Hard " 506 "reset\n", pMvSataAdapter->adapterId, 507 channelNum); 508 return -1; 509 } 510 } 511 512 /* identify device*/ 513 if (mvStorageDevATAIdentifyDevice(pMvSataAdapter, channelNum) == 514 MV_FALSE) { 515 MV_ERROR("RR182x [%d,%d]: failed to perform ATA Identify " 516 "command\n", pMvSataAdapter->adapterId, channelNum); 517 return -1; 518 } 519 if (hptmv_parse_identify_results(pMvSataChannel)) { 520 MV_ERROR("RR182x [%d,%d]: Error in parsing ATA Identify " 521 "message\n", pMvSataAdapter->adapterId, channelNum); 522 return -1; 523 } 524 525 /* mvStorageDevATASetFeatures */ 526 /* Disable 8 bit PIO in case CFA enabled */ 527 if (pMvSataChannel->identifyDevice[86] & 4) { 528 KdPrint(("RR182x [%d]: Disable 8 bit PIO (CFA enabled) \n", 529 pMvSataAdapter->adapterId)); 530 if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum, 531 MV_ATA_SET_FEATURES_DISABLE_8_BIT_PIO, 0, 0, 0, 0) == 532 MV_FALSE) { 533 MV_ERROR("RR182x [%d]: channel %d: " 534 "mvStorageDevATASetFeatures failed\n", 535 pMvSataAdapter->adapterId, channelNum); 536 return -1; 537 } 538 } 539 540#ifdef ENABLE_WRITE_CACHE 541 /* Write cache */ 542 if (pMvSataChannel->identifyDevice[82] & 0x20) { 543 if (!(pMvSataChannel->identifyDevice[85] & 0x20)) { 544 /* if not enabled by default */ 545 if (mvStorageDevATASetFeatures(pMvSataAdapter, 546 channelNum, MV_ATA_SET_FEATURES_ENABLE_WCACHE, 0, 547 0, 0, 0) == MV_FALSE) { 548 MV_ERROR("RR182x [%d]: channel %d: " 549 "mvStorageDevATASetFeatures failed\n", 550 pMvSataAdapter->adapterId, channelNum); 551 return -1; 552 } 553 } 554 KdPrint(("RR182x [%d]: channel %d, write cache enabled\n", 555 pMvSataAdapter->adapterId, channelNum)); 556 } else { 557 KdPrint(("RR182x [%d]: channel %d, write cache not supported\n", 558 pMvSataAdapter->adapterId, channelNum)); 559 } 560#else 561 /* disable write cache */ 562 if (pMvSataChannel->identifyDevice[85] & 0x20) { 563 KdPrint(("RR182x [%d]: channel =%d, disable write cache\n", 564 pMvSataAdapter->adapterId, channelNum)); 565 if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum, 566 MV_ATA_SET_FEATURES_DISABLE_WCACHE, 0, 0, 0, 0) == 567 MV_FALSE) { 568 MV_ERROR("RR182x [%d]: channel %d: " 569 "mvStorageDevATASetFeatures failed\n", 570 pMvSataAdapter->adapterId, channelNum); 571 return -1; 572 } 573 } 574 KdPrint(("RR182x [%d]: channel=%d, write cache disabled\n", 575 pMvSataAdapter->adapterId, channelNum)); 576#endif 577 578 /* Set transfer mode */ 579 KdPrint(("RR182x [%d] Set transfer mode XFER_PIO_SLOW\n", 580 pMvSataAdapter->adapterId)); 581 if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum, 582 MV_ATA_SET_FEATURES_TRANSFER, MV_ATA_TRANSFER_PIO_SLOW, 0, 0, 0) == 583 MV_FALSE) { 584 MV_ERROR("RR182x [%d] channel %d: Set Features failed\n", 585 pMvSataAdapter->adapterId, channelNum); 586 return -1; 587 } 588 589 if (pMvSataChannel->identifyDevice[IDEN_PIO_MODE_SPPORTED] & 1) { 590 pioMode = MV_ATA_TRANSFER_PIO_4; 591 } else if (pMvSataChannel->identifyDevice[IDEN_PIO_MODE_SPPORTED] & 2) { 592 pioMode = MV_ATA_TRANSFER_PIO_3; 593 } else { 594 MV_ERROR("IAL Error in IDENTIFY info: PIO modes 3 and 4 not " 595 "supported\n"); 596 pioMode = MV_ATA_TRANSFER_PIO_SLOW; 597 } 598 599 KdPrint(("RR182x [%d] Set transfer mode XFER_PIO_4\n", 600 pMvSataAdapter->adapterId)); 601 pAdapter->mvChannel[channelNum].maxPioModeSupported = pioMode; 602 if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum, 603 MV_ATA_SET_FEATURES_TRANSFER, pioMode, 0, 0, 0) == MV_FALSE) { 604 MV_ERROR("RR182x [%d] channel %d: Set Features failed\n", 605 pMvSataAdapter->adapterId, channelNum); 606 return -1; 607 } 608 609 udmaMode = MV_ATA_TRANSFER_UDMA_0; 610 if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 0x40) { 611 udmaMode = MV_ATA_TRANSFER_UDMA_6; 612 } else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 0x20) { 613 udmaMode = MV_ATA_TRANSFER_UDMA_5; 614 } else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 0x10) { 615 udmaMode = MV_ATA_TRANSFER_UDMA_4; 616 } else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 8) { 617 udmaMode = MV_ATA_TRANSFER_UDMA_3; 618 } else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 4) { 619 udmaMode = MV_ATA_TRANSFER_UDMA_2; 620 } 621 622 KdPrint(("RR182x [%d] Set transfer mode XFER_UDMA_%d\n", 623 pMvSataAdapter->adapterId, udmaMode & 0xf)); 624 pChannelInfo->maxUltraDmaModeSupported = udmaMode; 625 626#if 0 627 if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum, 628 MV_ATA_SET_FEATURES_TRANSFER, udmaMode, 0, 0, 0) == MV_FALSE) { 629 MV_ERROR("RR182x [%d] channel %d: Set Features failed\n", 630 pMvSataAdapter->adapterId, channelNum); 631 return -1; 632 } 633#endif 634 if (pChannelInfo->maxUltraDmaModeSupported == 0xFF) 635 return TRUE; 636 637 do { 638 if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum, 639 MV_ATA_SET_FEATURES_TRANSFER, 640 pChannelInfo->maxUltraDmaModeSupported, 0, 0, 0) != 641 MV_FALSE) { 642 break; 643 } 644 645 if (pChannelInfo->maxUltraDmaModeSupported <= 646 MV_ATA_TRANSFER_UDMA_0) { 647 return FALSE; 648 } 649 if (mvStorageDevATASoftResetDevice(pMvSataAdapter, 650 channelNum) == MV_FALSE) { 651 mv_reg_write_byte(pMvSataAdapter->adapterIoBaseAddress, 652 pMvSataChannel->eDmaRegsOffset + 0x11c, 653 /* command reg */ MV_ATA_COMMAND_IDLE_IMMEDIATE); 654 mvMicroSecondsDelay(10000); 655 mvSataChannelHardReset(pMvSataAdapter, channelNum); 656 if (mvStorageDevATASoftResetDevice(pMvSataAdapter, 657 channelNum) == MV_FALSE) 658 return FALSE; 659 } 660 if (mvSataChannelHardReset(pMvSataAdapter, channelNum) == 661 MV_FALSE) 662 return FALSE; 663 pChannelInfo->maxUltraDmaModeSupported--; 664 } while (1); 665 666#ifdef ENABLE_READ_AHEAD 667 /* Read look ahead */ 668 if (pMvSataChannel->identifyDevice[82] & 0x40) { 669 if (!(pMvSataChannel->identifyDevice[85] & 0x40)) { 670 /* if not enabled by default */ 671 if (mvStorageDevATASetFeatures(pMvSataAdapter, 672 channelNum, MV_ATA_SET_FEATURES_ENABLE_RLA, 0, 0, 673 0, 0) == MV_FALSE) { 674 MV_ERROR("RR182x [%d] channel %d: Set Features " 675 "failed\n", pMvSataAdapter->adapterId, 676 channelNum); 677 return -1; 678 } 679 } 680 KdPrint(("RR182x [%d]: channel=%d, read look ahead enabled\n", 681 pMvSataAdapter->adapterId, channelNum)); 682 } else { 683 KdPrint(("RR182x [%d]: channel %d, Read Look Ahead not " 684 "supported\n", pMvSataAdapter->adapterId, channelNum)); 685 } 686#else 687 if (pMvSataChannel->identifyDevice[86] & 0x20) { 688 KdPrint(("RR182x [%d]:channel %d, disable read look ahead\n", 689 pMvSataAdapter->adapterId, channelNum)); 690 if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum, 691 MV_ATA_SET_FEATURES_DISABLE_RLA, 0, 0, 0, 0) == MV_FALSE) { 692 MV_ERROR("RR182x [%d]:channel %d: ATA Set Features " 693 "failed\n", pMvSataAdapter->adapterId, 694 channelNum); 695 return -1; 696 } 697 } 698 KdPrint(("RR182x [%d]:channel %d, read look ahead disabled\n", 699 pMvSataAdapter->adapterId, channelNum)); 700#endif 701 702#if 0 703 KdPrint(("RR182x [%d]:channel %d, Set standby timer to 200 seconds\n", 704 pMvSataAdapter->adapterId, channelNum)); 705 if (mvStorageDevATAExecuteNonUDMACommand(pMvSataAdapter, channelNum, 706 MV_NON_UDMA_PROTOCOL_NON_DATA, 707 MV_FALSE, /* isEXT*/ 708 NULL, 0, 0, /* features*/ 709 40, /*sectorCount*/ 710 0, /*lbaLow*/ 711 0, /*lbaMid*/ 712 0, /*lbaHigh*/ 713 0, /*device*/ 714 MV_ATA_COMMAND_IDLE) == 715 MV_FALSE) { 716 MV_ERROR("RR182x [%d]:channel %d: ATA Idle command failed\n", 717 pMvSataAdapter->adapterId, channelNum); 718 return -1; 719 } 720#endif 721 722#if 0 723 /* 2003-9-16 disable TCQ until we have better solution */ 724 if ((pMvSataChannel->identifyDevice[IDEN_SUPPORTED_COMMANDS2] & 2)) { 725 MV_U8 depth; 726 MV_BOOLEAN result; 727 728 depth = (pMvSataChannel->identifyDevice[IDEN_QUEUE_DEPTH] & 729 0x1f) + 1; 730 KdPrint(("RR182x [%d]: channel %d config EDMA, Queued Mode, " 731 "queue depth %d\n", pMvSataAdapter->adapterId, 732 channelNum, depth)); 733 result = mvSataConfigEdmaMode(pMvSataAdapter, channelNum, 734 MV_EDMA_MODE_QUEUED, depth); 735 if (result == MV_FALSE) { 736 MV_ERROR("RR182x [%d] Error: mvSataConfigEdmaMode " 737 "failed\n", pMvSataAdapter->adapterId); 738 return -1; 739 } 740 } else { 741#endif 742 KdPrint(("RR182x [%d]: channel %d config EDMA, Non Queued Mode\n", 743 pMvSataAdapter->adapterId, channelNum)); 744 if (mvSataConfigEdmaMode(pMvSataAdapter, channelNum, 745 MV_EDMA_MODE_NOT_QUEUED, 0) == MV_FALSE) { 746 MV_ERROR("RR182x [%d] channel %d Error: mvSataConfigEdmaMode " 747 "failed\n", pMvSataAdapter->adapterId, channelNum); 748 return -1; 749 } 750 751 /* Enable EDMA */ 752 if (mvSataEnableChannelDma(pMvSataAdapter, channelNum) == MV_FALSE) { 753 MV_ERROR("RR182x [%d] Failed to enable DMA, channel=%d\n", 754 pMvSataAdapter->adapterId, channelNum); 755 return -1; 756 } 757 MV_ERROR("RR182x [%d,%d]: channel started successfully\n", 758 pMvSataAdapter->adapterId, channelNum); 759 760#ifndef FOR_DEMO 761 set_fail_led(pMvSataAdapter, channelNum, 0); 762#endif 763 return 0; 764} 765 766static void 767hptmv_handle_event(void * data, int flag) 768{ 769 IAL_ADAPTER_T *pAdapter; 770 MV_SATA_ADAPTER *pMvSataAdapter; 771 MV_U8 channelIndex; 772 773 pAdapter = (IAL_ADAPTER_T *)data; 774 pMvSataAdapter = &pAdapter->mvSataAdapter; 775 776 mvOsSemTake(&pMvSataAdapter->semaphore); 777 for (channelIndex = 0; channelIndex < MV_SATA_CHANNELS_NUM; 778 channelIndex++) { 779 switch(pAdapter->sataEvents[channelIndex]) { 780 case SATA_EVENT_CHANNEL_CONNECTED: 781 /* Handle only connects */ 782 if (flag == 1) 783 break; 784 KdPrint(("RR182x [%d,%d]: new device connected\n", 785 pMvSataAdapter->adapterId, channelIndex)); 786 hptmv_init_channel(pAdapter, channelIndex); 787 if (mvSataConfigureChannel( pMvSataAdapter, 788 channelIndex) == MV_FALSE) { 789 MV_ERROR("RR182x [%d,%d] Failed to configure\n", 790 pMvSataAdapter->adapterId, 791 channelIndex); 792 hptmv_free_channel(pAdapter, channelIndex); 793 } else { 794#if 0 795 mvSataChannelHardReset(pMvSataAdapter, channel); 796#endif 797 if (start_channel( pAdapter, channelIndex)) { 798 MV_ERROR("RR182x [%d,%d]Failed to start" 799 " channel\n", 800 pMvSataAdapter->adapterId, 801 channelIndex); 802 hptmv_free_channel(pAdapter, 803 channelIndex); 804 } else { 805 device_change(pAdapter, channelIndex, 806 TRUE); 807 } 808 } 809 pAdapter->sataEvents[channelIndex] = 810 SATA_EVENT_NO_CHANGE; 811 break; 812 813 case SATA_EVENT_CHANNEL_DISCONNECTED: 814 /* Handle only disconnects */ 815 if (flag == 0) 816 break; 817 KdPrint(("RR182x [%d,%d]: device disconnected\n", 818 pMvSataAdapter->adapterId, channelIndex)); 819 /* Flush pending commands */ 820 if(pMvSataAdapter->sataChannel[channelIndex]) { 821 _VBUS_INST(&pAdapter->VBus) 822 mvSataFlushDmaQueue (pMvSataAdapter, 823 channelIndex, MV_FLUSH_TYPE_CALLBACK); 824 CheckPendingCall(_VBUS_P0); 825 mvSataRemoveChannel(pMvSataAdapter, 826 channelIndex); 827 hptmv_free_channel(pAdapter, channelIndex); 828 pMvSataAdapter->sataChannel[channelIndex] = 829 NULL; 830 KdPrint(("RR182x [%d,%d]: channel removed\n", 831 pMvSataAdapter->adapterId, 832 channelIndex)); 833 if (pAdapter->outstandingCommands==0 && 834 DPC_Request_Nums==0) 835 Check_Idle_Call(pAdapter); 836 } else { 837 KdPrint(("RR182x [%d,%d]: channel already " 838 "removed!!\n", 839 pMvSataAdapter->adapterId, 840 channelIndex)); 841 } 842 pAdapter->sataEvents[channelIndex] = 843 SATA_EVENT_NO_CHANGE; 844 break; 845 846 case SATA_EVENT_NO_CHANGE: 847 break; 848 849 default: 850 break; 851 } 852 } 853 mvOsSemRelease(&pMvSataAdapter->semaphore); 854} 855 856#define EVENT_CONNECT 1 857#define EVENT_DISCONNECT 0 858 859static void 860hptmv_handle_event_connect(void *data) 861{ 862 hptmv_handle_event (data, 0); 863} 864 865static void 866hptmv_handle_event_disconnect(void *data) 867{ 868 hptmv_handle_event (data, 1); 869} 870 871static MV_BOOLEAN 872hptmv_event_notify(MV_SATA_ADAPTER *pMvSataAdapter, MV_EVENT_TYPE eventType, 873 MV_U32 param1, MV_U32 param2) 874{ 875 IAL_ADAPTER_T *pAdapter = pMvSataAdapter->IALData; 876 877 switch (eventType) { 878 case MV_EVENT_TYPE_SATA_CABLE: 879 { 880 MV_U8 channel = param2; 881 882 if (param1 == EVENT_CONNECT) { 883 pAdapter->sataEvents[channel] = 884 SATA_EVENT_CHANNEL_CONNECTED; 885 KdPrint(("RR182x [%d,%d]: device connected event " 886 "received\n", pMvSataAdapter->adapterId, 887 channel)); 888 /* 889 * Delete previous timers (if multiple drives connected 890 * in the same time 891 */ 892 pAdapter->event_timer_connect = 893 timeout(hptmv_handle_event_connect, pAdapter,10*hz); 894 } else if (param1 == EVENT_DISCONNECT) { 895 pAdapter->sataEvents[channel] = 896 SATA_EVENT_CHANNEL_DISCONNECTED; 897 KdPrint(("RR182x [%d,%d]: device disconnected event " 898 "received \n", pMvSataAdapter->adapterId, 899 channel)); 900 device_change(pAdapter, channel, FALSE); 901 /* 902 * Delete previous timers (if multiple drives 903 * disconnected in the same time 904 */ 905 pAdapter->event_timer_disconnect = 906 timeout(hptmv_handle_event_disconnect, pAdapter, 907 10*hz); 908 } else { 909 MV_ERROR("RR182x: illigal value for param1(%d) at " 910 "connect/disconect event, host=%d\n", param1, 911 pMvSataAdapter->adapterId ); 912 913 } 914 break; 915 } 916 case MV_EVENT_TYPE_ADAPTER_ERROR: 917 KdPrint(("RR182x: DEVICE error event received, pci cause " 918 "reg=%x, don't how to handle this\n", param1)); 919 return MV_TRUE; 920 default: 921 MV_ERROR("RR182x[%d]: unknown event type (%d)\n", 922 pMvSataAdapter->adapterId, eventType); 923 return MV_FALSE; 924 } 925 return MV_TRUE; 926} 927 928static void 929hptmv_map_req(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 930{ 931 dma_addr_t *addr; 932 933 addr = (dma_addr_t *)arg; 934 935 if (error || nsegs != 1) 936 return; 937 938 *addr = segs[0].ds_addr; 939 940 return; 941} 942 943static int 944hptmv_allocate_edma_queues(IAL_ADAPTER_T *pAdapter) 945{ 946 if (bus_dmamem_alloc(pAdapter->req_dmat, 947 (void **)&pAdapter->requestsArrayBaseAddr, BUS_DMA_WAITOK, 948 &pAdapter->req_map) != 0) { 949 MV_ERROR("RR182x[%d]: Failed to allocate memory for EDMA " 950 "request queues\n", pAdapter->mvSataAdapter.adapterId); 951 return -1; 952 } 953 954 (void)bus_dmamap_load(pAdapter->req_dmat, pAdapter->req_map, 955 pAdapter->requestsArrayBaseAddr, REQUESTS_ARRAY_SIZE, hptmv_map_req, 956 &pAdapter->requestsArrayBaseDmaAddr, 0); 957 958 pAdapter->requestsArrayBaseAlignedAddr = 959 pAdapter->requestsArrayBaseAddr; 960 pAdapter->requestsArrayBaseAlignedAddr += MV_EDMA_REQUEST_QUEUE_SIZE; 961 pAdapter->requestsArrayBaseAlignedAddr = 962 (MV_U8 *)(((ULONG_PTR)pAdapter->requestsArrayBaseAlignedAddr) & 963 ~(ULONG_PTR)(MV_EDMA_REQUEST_QUEUE_SIZE - 1)); 964 pAdapter->requestsArrayBaseDmaAlignedAddr = 965 pAdapter->requestsArrayBaseDmaAddr; 966 pAdapter->requestsArrayBaseDmaAlignedAddr += MV_EDMA_REQUEST_QUEUE_SIZE; 967 pAdapter->requestsArrayBaseDmaAlignedAddr &= 968 ~(ULONG_PTR)(MV_EDMA_REQUEST_QUEUE_SIZE - 1); 969 970 if ((pAdapter->requestsArrayBaseDmaAlignedAddr - 971 pAdapter->requestsArrayBaseDmaAddr) != 972 (pAdapter->requestsArrayBaseAlignedAddr - 973 pAdapter->requestsArrayBaseAddr)) { 974 MV_ERROR("RR182x[%d]: Error in Request Quueues Alignment\n", 975 pAdapter->mvSataAdapter.adapterId); 976 bus_dmamap_unload(pAdapter->req_dmat, pAdapter->req_map); 977 bus_dmamem_free(pAdapter->req_dmat, 978 pAdapter->requestsArrayBaseAddr, pAdapter->req_map); 979 return -1; 980 } 981 /* response queues */ 982 if (bus_dmamem_alloc(pAdapter->resp_dmat, 983 (void **)&pAdapter->responsesArrayBaseAddr, BUS_DMA_WAITOK, 984 &pAdapter->resp_map) != 0) { 985 MV_ERROR("RR182x[%d]: Failed to allocate memory for EDMA " 986 "response queues\n", pAdapter->mvSataAdapter.adapterId); 987 bus_dmamap_unload(pAdapter->req_dmat, pAdapter->req_map); 988 bus_dmamem_free(pAdapter->req_dmat, 989 pAdapter->requestsArrayBaseAddr, pAdapter->req_map); 990 return -1; 991 } 992 993 (void)bus_dmamap_load(pAdapter->resp_dmat, pAdapter->resp_map, 994 pAdapter->responsesArrayBaseAddr, RESPONSES_ARRAY_SIZE, 995 hptmv_map_req, &pAdapter->responsesArrayBaseDmaAddr, 0); 996 997 pAdapter->responsesArrayBaseAlignedAddr = 998 pAdapter->responsesArrayBaseAddr; 999 pAdapter->responsesArrayBaseAlignedAddr += MV_EDMA_RESPONSE_QUEUE_SIZE; 1000 pAdapter->responsesArrayBaseAlignedAddr = 1001 (MV_U8 *)(((ULONG_PTR)pAdapter->responsesArrayBaseAlignedAddr) & 1002 ~(ULONG_PTR)(MV_EDMA_RESPONSE_QUEUE_SIZE - 1)); 1003 pAdapter->responsesArrayBaseDmaAlignedAddr = 1004 pAdapter->responsesArrayBaseDmaAddr; 1005 pAdapter->responsesArrayBaseDmaAlignedAddr += 1006 MV_EDMA_RESPONSE_QUEUE_SIZE; 1007 pAdapter->responsesArrayBaseDmaAlignedAddr &= 1008 ~(ULONG_PTR)(MV_EDMA_RESPONSE_QUEUE_SIZE - 1); 1009 1010 if ((pAdapter->responsesArrayBaseDmaAlignedAddr - 1011 pAdapter->responsesArrayBaseDmaAddr) != 1012 (pAdapter->responsesArrayBaseAlignedAddr - 1013 pAdapter->responsesArrayBaseAddr)) { 1014 MV_ERROR("RR182x[%d]: Error in Response Quueues Alignment\n", 1015 pAdapter->mvSataAdapter.adapterId); 1016 hptmv_free_edma_queues(pAdapter); 1017 return -1; 1018 } 1019 return 0; 1020} 1021 1022static void 1023hptmv_free_edma_queues(IAL_ADAPTER_T *pAdapter) 1024{ 1025 bus_dmamap_unload(pAdapter->req_dmat, pAdapter->req_map); 1026 bus_dmamem_free(pAdapter->req_dmat, pAdapter->requestsArrayBaseAddr, 1027 pAdapter->req_map); 1028 bus_dmamap_unload(pAdapter->resp_dmat, pAdapter->resp_map); 1029 bus_dmamem_free(pAdapter->resp_dmat, pAdapter->responsesArrayBaseAddr, 1030 pAdapter->resp_map); 1031} 1032 1033static PVOID 1034AllocatePRDTable(IAL_ADAPTER_T *pAdapter) 1035{ 1036 PVOID ret; 1037 if (pAdapter->pFreePRDLink) { 1038 KdPrint(("pAdapter->pFreePRDLink:%p\n", 1039 pAdapter->pFreePRDLink)); 1040 ret = pAdapter->pFreePRDLink; 1041 pAdapter->pFreePRDLink = *(void**)ret; 1042 return ret; 1043 } 1044 return NULL; 1045} 1046 1047static void 1048FreePRDTable(IAL_ADAPTER_T *pAdapter, PVOID PRDTable) 1049{ 1050 *(void**)PRDTable = pAdapter->pFreePRDLink; 1051 pAdapter->pFreePRDLink = PRDTable; 1052} 1053 1054extern PVDevice fGetFirstChild(PVDevice pLogical); 1055extern void fResetBootMark(PVDevice pLogical); 1056static void 1057fRegisterVdevice(IAL_ADAPTER_T *pAdapter) 1058{ 1059 PVDevice pPhysical, pLogical; 1060 PVBus pVBus; 1061 int i,j; 1062 1063 for(i = 0; i < MV_SATA_CHANNELS_NUM; i++) { 1064 pPhysical = &(pAdapter->VDevices[i]); 1065 pLogical = pPhysical; 1066 while (pLogical->pParent) pLogical = pLogical->pParent; 1067 if (pLogical->vf_online==0) { 1068 pPhysical->vf_bootmark = pLogical->vf_bootmark = 0; 1069 continue; 1070 } 1071 if (pLogical->VDeviceType == VD_SPARE || 1072 pPhysical != fGetFirstChild(pLogical)) 1073 continue; 1074 1075 pVBus = &pAdapter->VBus; 1076 if(pVBus) { 1077 j=0; 1078 while(j < MAX_VDEVICE_PER_VBUS && pVBus->pVDevice[j]) 1079 j++; 1080 if (j < MAX_VDEVICE_PER_VBUS) { 1081 pVBus->pVDevice[j] = pLogical; 1082 pLogical->pVBus = pVBus; 1083 1084 if (j>0 && pLogical->vf_bootmark) { 1085 if (pVBus->pVDevice[0]->vf_bootmark) { 1086 fResetBootMark(pLogical); 1087 } else { 1088 do { 1089 pVBus->pVDevice[j] = 1090 pVBus->pVDevice[j-1]; 1091 } while (--j); 1092 pVBus->pVDevice[0] = pLogical; 1093 } 1094 } 1095 } 1096 } 1097 } 1098} 1099 1100PVDevice 1101GetSpareDisk(_VBUS_ARG PVDevice pArray) 1102{ 1103 IAL_ADAPTER_T *pAdapter; 1104 ULONG capacity; 1105 ULONG thiscap, maxcap = MAX_LBA_T; 1106 PVDevice pVDevice, pFind = NULL; 1107 int i; 1108 1109 pAdapter = (IAL_ADAPTER_T *)pArray->pVBus->OsExt; 1110 capacity = 1111 LongDiv(pArray->VDeviceCapacity, pArray->u.array.bArnMember-1); 1112 for (i = 0;i < MV_SATA_CHANNELS_NUM; i++) { 1113 pVDevice = &pAdapter->VDevices[i]; 1114 if(!pVDevice) 1115 continue; 1116 thiscap = pArray->vf_format_v2 ? 1117 pVDevice->u.disk.dDeRealCapacity : pVDevice->VDeviceCapacity; 1118 /* find the smallest usable spare disk */ 1119 if (pVDevice->VDeviceType==VD_SPARE && 1120 pVDevice->u.disk.df_on_line && thiscap < maxcap && 1121 thiscap >= capacity) { 1122 maxcap = pVDevice->VDeviceCapacity; 1123 pFind = pVDevice; 1124 } 1125 } 1126 return pFind; 1127} 1128 1129/****************************************************************** 1130 * IO ATA Command 1131 *******************************************************************/ 1132int HPTLIBAPI 1133fDeReadWrite(PDevice pDev, ULONG Lba, UCHAR Cmd, void *tmpBuffer) 1134{ 1135 return mvReadWrite(pDev->mv, Lba, Cmd, tmpBuffer); 1136} 1137 1138void HPTLIBAPI fDeSelectMode(PDevice pDev, UCHAR NewMode) 1139{ 1140#ifndef SIMULATE 1141 MV_SATA_CHANNEL *pSataChannel; 1142 MV_SATA_ADAPTER *pSataAdapter; 1143 MV_U8 channelIndex; 1144 UCHAR mvMode; 1145 1146 pSataChannel = pDev->mv; 1147 pSataAdapter = pSataChannel->mvSataAdapter; 1148 channelIndex = pSataChannel->channelNumber; 1149 1150 /* 508x don't use MW-DMA? */ 1151 if (NewMode>4 && NewMode<8) NewMode = 4; 1152 pDev->bDeModeSetting = NewMode; 1153 if (NewMode<=4) 1154 mvMode = MV_ATA_TRANSFER_PIO_0 + NewMode; 1155 else 1156 mvMode = MV_ATA_TRANSFER_UDMA_0 + (NewMode-8); 1157 1158 /*To fix 88i8030 bug*/ 1159 if (mvMode > MV_ATA_TRANSFER_UDMA_0 && mvMode < MV_ATA_TRANSFER_UDMA_4) 1160 mvMode = MV_ATA_TRANSFER_UDMA_0; 1161 1162 mvSataDisableChannelDma(pSataAdapter, channelIndex); 1163 /* Flush pending commands */ 1164 mvSataFlushDmaQueue (pSataAdapter, channelIndex, MV_FLUSH_TYPE_NONE); 1165 1166 if (mvStorageDevATASetFeatures(pSataAdapter, channelIndex, 1167 MV_ATA_SET_FEATURES_TRANSFER, mvMode, 0, 0, 0) == MV_FALSE) { 1168 KdPrint(("channel %d: Set Features failed\n", channelIndex)); 1169 } 1170 /* Enable EDMA */ 1171 if (mvSataEnableChannelDma(pSataAdapter, channelIndex) == MV_FALSE) 1172 KdPrint(("Failed to enable DMA, channel=%d", channelIndex)); 1173#endif 1174} 1175 1176#ifdef SUPPORT_ARRAY 1177#define IdeRegisterVDevice fCheckArray 1178#else 1179void 1180IdeRegisterVDevice(PDevice pDev) 1181{ 1182 PVDevice pVDev = Map2pVDevice(pDev); 1183 1184 pVDev->VDeviceType = pDev->df_atapi? VD_ATAPI : 1185 pDev->df_removable_drive ? VD_REMOVABLE : VD_SINGLE_DISK; 1186 pVDev->vf_online = 1; 1187 pVDev->VDeviceCapacity = pDev->dDeRealCapacity; 1188 pVDev->pfnSendCommand = pfnSendCommand[pVDev->VDeviceType]; 1189 pVDev->pfnDeviceFailed = pfnDeviceFailed[pVDev->VDeviceType]; 1190} 1191#endif 1192 1193static int num_adapters = 0; 1194static int 1195init_adapter(IAL_ADAPTER_T *pAdapter) 1196{ 1197 PCommand pCmd; 1198 pPrivCommand prvCmd; 1199 PVBus _vbus_p = &pAdapter->VBus; 1200 MV_SATA_ADAPTER *pMvSataAdapter; 1201 PUCHAR PRDTable; 1202 int i, channel, rid, error; 1203 1204 PVDevice pVDev; 1205 1206 intrmask_t oldspl = lock_driver(); 1207 1208 pAdapter->next = 0; 1209 1210 if(gIal_Adapter == 0) { 1211 gIal_Adapter = pAdapter; 1212 pCurAdapter = gIal_Adapter; 1213 } else { 1214 pCurAdapter->next = pAdapter; 1215 pCurAdapter = pAdapter; 1216 } 1217 1218 pAdapter->outstandingCommands = 0; 1219 1220 pMvSataAdapter = &(pAdapter->mvSataAdapter); 1221 _vbus_p->OsExt = (void *)pAdapter; 1222 pMvSataAdapter->IALData = pAdapter; 1223 1224 if (bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT, 1225 BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE_32BIT, 1226 MV_MAX_SEGMENTS, BUS_SPACE_MAXSIZE_32BIT, 0, NULL, NULL, 1227 &pAdapter->parent_dmat) != 0) { 1228 MV_ERROR("RR182x: Failed to create busdma resources\n"); 1229 unlock_driver(oldspl); 1230 return (ENOMEM); 1231 } 1232 1233 if (bus_dma_tag_create(pAdapter->parent_dmat, PAGE_SIZE, 0, 1234 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 1235 REQUESTS_ARRAY_SIZE, 1, REQUESTS_ARRAY_SIZE, 0, NULL, NULL, 1236 &pAdapter->req_dmat) != 0) { 1237 MV_ERROR("RR182x: Failed to create busdma resources\n"); 1238 error = ENOMEM; 1239 goto unregister; 1240 } 1241 1242 if (bus_dma_tag_create(pAdapter->parent_dmat, PAGE_SIZE, 0, 1243 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 1244 RESPONSES_ARRAY_SIZE, 1, RESPONSES_ARRAY_SIZE, 0, NULL, NULL, 1245 &pAdapter->resp_dmat) != 0) { 1246 MV_ERROR("RR182x: Failed to create busdma resources\n"); 1247 error = ENOMEM; 1248 goto unregister; 1249 } 1250 1251 if (bus_dma_tag_create(pAdapter->parent_dmat, 1, 0, 1252 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 1253 MAXBSIZE, MV_MAX_SEGMENTS, MAXBSIZE, 0, busdma_lock_mutex, &Giant, 1254 &pAdapter->buf_dmat) != 0) { 1255 MV_ERROR("RR182x: Failed to create busdma resources\n"); 1256 error = ENOMEM; 1257 goto unregister; 1258 } 1259 1260 if (hptmv_allocate_edma_queues(pAdapter)) { 1261 MV_ERROR("RR182x: Failed to allocate memory for EDMA queues\n"); 1262 error = ENOMEM; 1263 goto unregister; 1264 } 1265 1266 /* also map EPROM address */ 1267 rid = 0x10; 1268 if ((pAdapter->mem_res = bus_alloc_resource(pAdapter->hpt_dev, 1269 SYS_RES_MEMORY, &rid, 0, ~0, MV_SATA_PCI_BAR0_SPACE_SIZE+0x40000, 1270 RF_ACTIVE)) == 0) { 1271 MV_ERROR("RR182x: Failed to remap memory space\n"); 1272 error = ENXIO; 1273 goto unregister; 1274 } 1275 1276 /* 1277 * This field is opaque. Abuse it so that the bus_space functions 1278 * can get the info that they need when called. 1279 */ 1280 pMvSataAdapter->adapterIoBaseAddress = pAdapter; 1281 pAdapter->mem_bsh = rman_get_bushandle(pAdapter->mem_res); 1282 pAdapter->mem_btag = rman_get_bustag(pAdapter->mem_res); 1283 1284 pMvSataAdapter->adapterId = num_adapters++; 1285 /* get the revision ID */ 1286 pMvSataAdapter->pciConfigRevisionId = 1287 pci_read_config(pAdapter->hpt_dev, PCIR_REVID, 1); 1288 pMvSataAdapter->pciConfigDeviceId = pci_get_device(pAdapter->hpt_dev); 1289 1290 /* init RR182x */ 1291 pMvSataAdapter->intCoalThre[0]= 1; 1292 pMvSataAdapter->intCoalThre[1]= 1; 1293 pMvSataAdapter->intTimeThre[0] = 1; 1294 pMvSataAdapter->intTimeThre[1] = 1; 1295 pMvSataAdapter->pciCommand = 0x0107E371; 1296 pMvSataAdapter->pciSerrMask = 0xd77fe6ul; 1297 pMvSataAdapter->pciInterruptMask = 0xd77fe6ul; 1298 pMvSataAdapter->mvSataEventNotify = hptmv_event_notify; 1299 1300 if (mvSataInitAdapter(pMvSataAdapter) == MV_FALSE) { 1301 MV_ERROR("RR182x[%d]: core failed to initialize the adapter\n", 1302 pMvSataAdapter->adapterId); 1303 error = ENXIO; 1304 goto unregister; 1305 } 1306 pAdapter->ver_601 = pMvSataAdapter->pcbVersion; 1307 1308#ifndef FOR_DEMO 1309 set_fail_leds(pMvSataAdapter, 0); 1310#endif 1311 1312 /* setup command blocks */ 1313 KdPrint(("Allocate command blocks\n")); 1314 _vbus_(pFreeCommands) = 0; 1315 pAdapter->pCommandBlocks = malloc(sizeof(struct _Command) * 1316 MAX_COMMAND_BLOCKS_FOR_EACH_VBUS, M_DEVBUF, M_ZERO | M_WAITOK); 1317 KdPrint(("pCommandBlocks:%p\n", pAdapter->pCommandBlocks)); 1318 1319 /* 1320 * Gotta cheat here. The _Command struct only gives us a single 1321 * pointer for private data, but we need to store more than that. 1322 * Of course the pCommand retains no type stability, and FreeCommand 1323 * is hidden in the binary object, so gotta track these on our own 1324 * list. 1325 */ 1326 pAdapter->pPrivateBlocks = malloc(sizeof(struct _privCommand) * 1327 MAX_COMMAND_BLOCKS_FOR_EACH_VBUS, M_DEVBUF, M_ZERO | M_WAITOK); 1328 TAILQ_INIT(&pAdapter->PrivCmdTQH); 1329 1330 for (i = 0; i < MAX_COMMAND_BLOCKS_FOR_EACH_VBUS; i++) { 1331 pCmd = &pAdapter->pCommandBlocks[i]; 1332 prvCmd = &pAdapter->pPrivateBlocks[i]; 1333 prvCmd->pAdapter = pAdapter; 1334 if ((error = bus_dmamap_create(pAdapter->buf_dmat, 0, 1335 &prvCmd->buf_map)) == 0) { 1336 FreeCommand(_VBUS_P (pCmd)); 1337 FreePrivCommand(pAdapter, prvCmd); 1338 } else 1339 break; 1340 } 1341 1342 /* setup PRD Tables */ 1343 KdPrint(("Allocate PRD Tables\n")); 1344 pAdapter->pFreePRDLink = 0; 1345 1346 if (bus_dma_tag_create(pAdapter->parent_dmat, PAGE_SIZE, 0, 1347 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 1348 PRD_ENTRIES_SIZE * PRD_TABLES_FOR_VBUS, 1, 1349 PRD_ENTRIES_SIZE * PRD_TABLES_FOR_VBUS, 0, NULL, NULL, 1350 &pAdapter->prd_dmat) != 0) { 1351 MV_ERROR("RR182x: Failed to create busdma resources\n"); 1352 error = ENOMEM; 1353 goto unregister; 1354 } 1355 1356 if (bus_dmamem_alloc(pAdapter->prd_dmat, 1357 (void **)&pAdapter->prdTableAddr, BUS_DMA_WAITOK, 1358 &pAdapter->prd_map) != 0) 1359 goto unregister; 1360 1361 (void)bus_dmamap_load(pAdapter->prd_dmat, pAdapter->prd_map, 1362 pAdapter->prdTableAddr, PRD_ENTRIES_SIZE * PRD_TABLES_FOR_VBUS, 1363 hptmv_map_req, &pAdapter->prdTableDmaAddr, 0); 1364 1365 KdPrint(("prdTableAddr:%p\n",pAdapter->prdTableAddr)); 1366 if (!pAdapter->prdTableAddr) { 1367 MV_ERROR("insufficient PRD Tables\n"); 1368 error = ENOMEM; 1369 goto unregister; 1370 } 1371 1372 PRDTable = pAdapter->prdTableAddr; 1373 for (i = 0; i < PRD_TABLES_FOR_VBUS; i++) { 1374 KdPrint(("i= %d, pAdapter->pFreePRDLink= %p\n", i, 1375 pAdapter->pFreePRDLink)); 1376 FreePRDTable(pAdapter, PRDTable); 1377 PRDTable += PRD_ENTRIES_SIZE; 1378 } 1379 1380 /* enable the adapter interrupts */ 1381 1382 /* configure and start the connected channels*/ 1383 for (channel = 0; channel < MV_SATA_CHANNELS_NUM; channel++) { 1384 pAdapter->mvChannel[channel].online = MV_FALSE; 1385 if (mvSataIsStorageDeviceConnected(pMvSataAdapter, channel) 1386 != MV_TRUE) 1387 continue; 1388 1389 KdPrint(("RR182x[%d]: channel %d is connected\n", 1390 pMvSataAdapter->adapterId, channel)); 1391 1392 if (hptmv_init_channel(pAdapter, channel) == 0) { 1393 if (mvSataConfigureChannel(pMvSataAdapter, channel) 1394 == MV_FALSE) { 1395 MV_ERROR("RR182x[%d]: Failed to configure " 1396 "channel %d\n", pMvSataAdapter->adapterId, 1397 channel); 1398 hptmv_free_channel(pAdapter, channel); 1399 continue; 1400 } 1401 if (start_channel(pAdapter, channel)) { 1402 MV_ERROR("RR182x[%d]: Failed to start channel, " 1403 "channel=%d\n", pMvSataAdapter->adapterId, 1404 channel); 1405 hptmv_free_channel(pAdapter, channel); 1406 } 1407 pAdapter->mvChannel[channel].online = MV_TRUE; 1408#if 0 1409 mvSataChannelSetEdmaLoopBackMode( 1410 pMvSataAdapter, channel, MV_TRUE); 1411#endif 1412 } 1413 KdPrint(("pAdapter->mvChannel[channel].online:%x, channel:%d\n", 1414 pAdapter->mvChannel[channel].online, channel)); 1415 } 1416 1417#ifdef SUPPORT_ARRAY 1418 for(i = MAX_ARRAY_DEVICE - 1; i >= 0; i--) { 1419 pVDev = ArrayTables(i); 1420 mArFreeArrayTable(pVDev); 1421 } 1422#endif 1423 1424 KdPrint(("Initialize Devices\n")); 1425 for (channel = 0; channel < MV_SATA_CHANNELS_NUM; channel++) { 1426 MV_SATA_CHANNEL *pMvSataChannel; 1427 1428 pMvSataChannel = pMvSataAdapter->sataChannel[channel]; 1429 if (pMvSataChannel) { 1430 init_vdev_params(pAdapter, channel); 1431 IdeRegisterVDevice(&pAdapter->VDevices[channel].u.disk); 1432 } 1433 } 1434#ifdef SUPPORT_ARRAY 1435 CheckArrayCritical(_VBUS_P0); 1436#endif 1437 _vbus_p->nInstances = 1; 1438 fRegisterVdevice(pAdapter); 1439 1440 for (channel=0;channel<MV_SATA_CHANNELS_NUM;channel++) { 1441 pVDev = _vbus_p->pVDevice[channel]; 1442 if (pVDev && pVDev->vf_online) 1443 fCheckBootable(pVDev); 1444 } 1445 1446#if defined(SUPPORT_ARRAY) && defined(_RAID5N_) 1447 init_raid5_memory(_VBUS_P0); 1448 _vbus_(r5).enable_write_back = 1; 1449 printf("RR182x: RAID5 write-back %s\n", 1450 _vbus_(r5).enable_write_back? "enabled" : "disabled"); 1451#endif 1452 1453 mvSataUnmaskAdapterInterrupt(pMvSataAdapter); 1454 unlock_driver(oldspl); 1455 return 0; 1456 1457unregister: 1458 if (pAdapter->mem_res != 0) 1459 bus_release_resource(pAdapter->hpt_dev, SYS_RES_MEMORY, rid, 1460 pAdapter->mem_res); 1461 1462 hptmv_free_edma_queues(pAdapter); 1463 1464 if (pAdapter->resp_dmat != NULL) 1465 bus_dma_tag_destroy(pAdapter->resp_dmat); 1466 if (pAdapter->req_dmat != NULL) 1467 bus_dma_tag_destroy(pAdapter->req_dmat); 1468 if (pAdapter->buf_dmat != NULL) 1469 bus_dma_tag_destroy(pAdapter->buf_dmat); 1470 if (pAdapter->parent_dmat != NULL) 1471 bus_dma_tag_destroy(pAdapter->parent_dmat); 1472 1473 unlock_driver(oldspl); 1474 return error; 1475} 1476 1477int 1478MvSataResetChannel(MV_SATA_ADAPTER *pMvSataAdapter, MV_U8 channel) 1479{ 1480 IAL_ADAPTER_T *pAdapter = (IAL_ADAPTER_T *)pMvSataAdapter->IALData; 1481 1482 mvSataDisableChannelDma(pMvSataAdapter, channel); 1483 1484 /* Flush pending commands */ 1485 mvSataFlushDmaQueue (pMvSataAdapter, channel, MV_FLUSH_TYPE_CALLBACK); 1486 1487 /* Software reset channel */ 1488 if (mvStorageDevATASoftResetDevice(pMvSataAdapter, channel) == 1489 MV_FALSE) { 1490 MV_ERROR("RR182x [%d,%d]: failed to perform Software reset\n", 1491 pMvSataAdapter->adapterId, channel); 1492 return -1; 1493 } 1494 1495 /* Hardware reset channel */ 1496 if (mvSataChannelHardReset(pMvSataAdapter, channel)== MV_FALSE) { 1497 MV_ERROR("RR182x [%d,%d] Failed to Hard reser the SATA " 1498 "channel\n", pMvSataAdapter->adapterId, channel); 1499 hptmv_free_channel(pAdapter, channel); 1500 return -1; 1501 } 1502 1503 if (mvSataIsStorageDeviceConnected(pMvSataAdapter, channel) == 1504 MV_FALSE) { 1505 MV_ERROR("RR182x [%d,%d] Failed to Connect Device\n", 1506 pMvSataAdapter->adapterId, channel); 1507 hptmv_free_channel(pAdapter, channel); 1508 return -1; 1509 } else { 1510 /* Set transfer mode */ 1511 if((mvStorageDevATASetFeatures(pMvSataAdapter, channel, 1512 MV_ATA_SET_FEATURES_TRANSFER, MV_ATA_TRANSFER_PIO_SLOW, 0, 1513 0, 0) == MV_FALSE) || 1514 (mvStorageDevATASetFeatures(pMvSataAdapter, channel, 1515 MV_ATA_SET_FEATURES_TRANSFER, 1516 pAdapter->mvChannel[channel].maxPioModeSupported, 0, 0, 0) 1517 == MV_FALSE) || (mvStorageDevATASetFeatures(pMvSataAdapter, 1518 channel, MV_ATA_SET_FEATURES_TRANSFER, 1519 pAdapter->mvChannel[channel].maxUltraDmaModeSupported, 0, 1520 0, 0) == MV_FALSE)) { 1521 MV_ERROR("channel %d: Set Features failed", channel); 1522 hptmv_free_channel(pAdapter, channel); 1523 return -1; 1524 } 1525 /* Enable EDMA */ 1526 if (mvSataEnableChannelDma(pMvSataAdapter, channel)==MV_FALSE) { 1527 MV_ERROR("Failed to enable DMA, channel=%d", channel); 1528 hptmv_free_channel(pAdapter, channel); 1529 return -1; 1530 } 1531 } 1532 return 0; 1533} 1534 1535static int 1536fResetActiveCommands(PVBus _vbus_p) 1537{ 1538 MV_SATA_ADAPTER *pMvSataAdapter; 1539 MV_U8 channel; 1540 int rtn = 0; 1541 1542 pMvSataAdapter = &((IAL_ADAPTER_T *)_vbus_p->OsExt)->mvSataAdapter; 1543 for (channel=0;channel< MV_SATA_CHANNELS_NUM;channel++) { 1544 if (pMvSataAdapter->sataChannel[channel] && 1545 pMvSataAdapter->sataChannel[channel]->outstandingCommands) 1546 if (MvSataResetChannel(pMvSataAdapter,channel) == -1) 1547 rtn = -1; 1548 } 1549 HPT_ASSERT(rtn==0); 1550 return 0; 1551} 1552 1553void 1554fCompleteAllCommandsSynchronously(PVBus _vbus_p) 1555{ 1556 UINT cont; 1557 ULONG ticks = 0; 1558 MV_U8 channel; 1559 MV_SATA_ADAPTER *pMvSataAdapter; 1560 MV_SATA_CHANNEL *pMvSataChannel; 1561 1562 pMvSataAdapter = &((IAL_ADAPTER_T *)_vbus_p->OsExt)->mvSataAdapter; 1563 do { 1564check_cmds: 1565 cont = 0; 1566 CheckPendingCall(_VBUS_P0); 1567#ifdef _RAID5N_ 1568 dataxfer_poll(); 1569 xor_poll(); 1570#endif 1571 for (channel = 0; channel < MV_SATA_CHANNELS_NUM; channel++) { 1572 pMvSataChannel = pMvSataAdapter->sataChannel[channel]; 1573 if (pMvSataChannel && 1574 pMvSataChannel->outstandingCommands) { 1575 while (pMvSataChannel->outstandingCommands) { 1576 if (!mvSataInterruptServiceRoutine( 1577 pMvSataAdapter)) { 1578 StallExec(1000); 1579 if (ticks++ > 3000) { 1580 MvSataResetChannel( 1581 pMvSataAdapter, 1582 channel); 1583 goto check_cmds; 1584 } 1585 } else 1586 ticks = 0; 1587 } 1588 cont = 1; 1589 } 1590 } 1591 } while (cont); 1592} 1593 1594void 1595fResetVBus(_VBUS_ARG0) 1596{ 1597 KdPrint(("fMvResetBus(%p)", _vbus_p)); 1598 1599 /* some commands may already finished. */ 1600 CheckPendingCall(_VBUS_P0); 1601 1602 fResetActiveCommands(_vbus_p); 1603 /* 1604 * the other pending commands may still be finished successfully. 1605 */ 1606 fCompleteAllCommandsSynchronously(_vbus_p); 1607 1608 /* Now there should be no pending commands. No more action needed. */ 1609 CheckIdleCall(_VBUS_P0); 1610 1611 KdPrint(("fMvResetBus() done")); 1612} 1613 1614void 1615fRescanAllDevice(_VBUS_ARG0) 1616{ 1617} 1618 1619static MV_BOOLEAN 1620CommandCompletionCB(MV_SATA_ADAPTER *pMvSataAdapter, MV_U8 channelNum, 1621 MV_COMPLETION_TYPE comp_type, MV_VOID_PTR commandId, MV_U16 responseFlags, 1622 MV_U32 timeStamp, MV_STORAGE_DEVICE_REGISTERS *registerStruct) 1623{ 1624 PCommand pCmd = (PCommand) commandId; 1625 _VBUS_INST(pCmd->pVDevice->pVBus) 1626 1627 if (pCmd->uScratch.sata_param.prdAddr) 1628 FreePRDTable(pMvSataAdapter->IALData, 1629 pCmd->uScratch.sata_param.prdAddr); 1630 1631 switch (comp_type) { 1632 case MV_COMPLETION_TYPE_NORMAL: 1633 pCmd->Result = RETURN_SUCCESS; 1634 break; 1635 case MV_COMPLETION_TYPE_ABORT: 1636 pCmd->Result = RETURN_BUS_RESET; 1637 break; 1638 case MV_COMPLETION_TYPE_ERROR: 1639 MV_ERROR("IAL: COMPLETION ERROR, adapter %d, channel %d, " 1640 "flags=%x\n", pMvSataAdapter->adapterId, channelNum, 1641 responseFlags); 1642 1643 if (responseFlags & 4) { 1644 MV_ERROR("ATA regs: error %x, sector count %x, LBA low " 1645 "%x, LBA mid %x, LBA high %x, device %x, " 1646 "status %x\n", registerStruct->errorRegister, 1647 registerStruct->sectorCountRegister, 1648 registerStruct->lbaLowRegister, 1649 registerStruct->lbaMidRegister, 1650 registerStruct->lbaHighRegister, 1651 registerStruct->deviceRegister, 1652 registerStruct->statusRegister); 1653 } 1654 /* 1655 * We can't do handleEdmaError directly here, because 1656 * CommandCompletionCB is called by mv's ISR, if we retry the 1657 * command, than the internel data structure may be destroyed 1658 */ 1659 pCmd->uScratch.sata_param.responseFlags = responseFlags; 1660 pCmd->uScratch.sata_param.bIdeStatus = 1661 registerStruct->statusRegister; 1662 pCmd->uScratch.sata_param.errorRegister = 1663 registerStruct->errorRegister; 1664 pCmd->pVDevice->u.disk.QueueLength--; 1665 CallAfterReturn(_VBUS_P (DPC_PROC)handleEdmaError,pCmd); 1666 return TRUE; 1667 1668 default: 1669 MV_ERROR(" Unknown completion type (%d)\n", comp_type); 1670 return MV_FALSE; 1671 } 1672 1673 if (pCmd->uCmd.Ide.Command == IDE_COMMAND_VERIFY && 1674 pCmd->uScratch.sata_param.cmd_priv > 1) { 1675 pCmd->uScratch.sata_param.cmd_priv --; 1676 return TRUE; 1677 } 1678 pCmd->pVDevice->u.disk.QueueLength--; 1679 CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd); 1680 return TRUE; 1681} 1682 1683void 1684fDeviceSendCommand(_VBUS_ARG PCommand pCmd) 1685{ 1686 MV_SATA_EDMA_PRD_ENTRY *pPRDTable = 0; 1687 MV_SATA_ADAPTER *pMvSataAdapter; 1688 MV_SATA_CHANNEL *pMvSataChannel; 1689 IAL_ADAPTER_T *pAdapter; 1690 MV_QUEUE_COMMAND_RESULT result; 1691 MV_QUEUE_COMMAND_INFO commandInfo; 1692 MV_UDMA_COMMAND_PARAMS *pUdmaParams; 1693 MV_NONE_UDMA_COMMAND_PARAMS *pNoUdmaParams; 1694 MV_BOOLEAN is48bit = MV_FALSE; 1695 PVDevice pVDevice; 1696 PDevice pDevice; 1697 ULONG Lba; 1698 USHORT nSector; 1699 MV_U8 channel; 1700 int i=0; 1701 1702 pVDevice = pCmd->pVDevice; 1703 pDevice = &pVDevice->u.disk; 1704 Lba = pCmd->uCmd.Ide.Lba; 1705 nSector = pCmd->uCmd.Ide.nSectors; 1706 pUdmaParams = &commandInfo.commandParams.udmaCommand; 1707 pNoUdmaParams = &commandInfo.commandParams.NoneUdmaCommand; 1708 1709 DECLARE_BUFFER(FPSCAT_GATH, tmpSg); 1710 1711 if (!pDevice->df_on_line) { 1712 MV_ERROR("Device is offline"); 1713 pCmd->Result = RETURN_BAD_DEVICE; 1714 CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd); 1715 return; 1716 } 1717 1718 pDevice->HeadPosition = pCmd->uCmd.Ide.Lba + pCmd->uCmd.Ide.nSectors; 1719 pMvSataChannel = pDevice->mv; 1720 pMvSataAdapter = pMvSataChannel->mvSataAdapter; 1721 channel = pMvSataChannel->channelNumber; 1722 pAdapter = pMvSataAdapter->IALData; 1723 1724 /* 1725 * Old RAID0 has hidden lba. Remember to clear dDeHiddenLba when 1726 * deleting array! 1727 */ 1728 Lba += pDevice->dDeHiddenLba; 1729 /* check LBA */ 1730 if (Lba+nSector-1 > pDevice->dDeRealCapacity) { 1731 pCmd->Result = RETURN_INVALID_REQUEST; 1732 CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd); 1733 return; 1734 } 1735 1736 if(Lba & 0xF0000000){ 1737 is48bit = MV_TRUE; 1738 } 1739 1740 switch (pCmd->uCmd.Ide.Command) { 1741 case IDE_COMMAND_READ: 1742 case IDE_COMMAND_WRITE: 1743 if (pDevice->bDeModeSetting<8) goto pio; 1744 1745 commandInfo.type = MV_QUEUED_COMMAND_TYPE_UDMA; 1746 pUdmaParams->isEXT = is48bit; 1747 pUdmaParams->numOfSectors = nSector; 1748 pUdmaParams->lowLBAAddress = Lba; 1749 pUdmaParams->highLBAAddress = 0; 1750 pUdmaParams->prdHighAddr = 0; 1751 pUdmaParams->callBack = CommandCompletionCB; 1752 pUdmaParams->commandId = (MV_VOID_PTR )pCmd; 1753 if(pCmd->uCmd.Ide.Command == IDE_COMMAND_READ) 1754 pUdmaParams->readWrite = MV_UDMA_TYPE_READ; 1755 else 1756 pUdmaParams->readWrite = MV_UDMA_TYPE_WRITE; 1757 1758 if (pCmd->pSgTable && pCmd->cf_physical_sg) { 1759 FPSCAT_GATH sg1=tmpSg, sg2=pCmd->pSgTable; 1760 do { 1761 *sg1++=*sg2; 1762 } while ((sg2++->wSgFlag & SG_FLAG_EOT)==0); 1763 } else if (!pCmd->pfnBuildSgl || 1764 !pCmd->pfnBuildSgl(_VBUS_P pCmd, tmpSg, 0)) { 1765pio: 1766 mvSataDisableChannelDma(pMvSataAdapter, channel); 1767 mvSataFlushDmaQueue(pMvSataAdapter, channel, 1768 MV_FLUSH_TYPE_CALLBACK); 1769 1770 if (pCmd->pSgTable && pCmd->cf_physical_sg==0) { 1771 FPSCAT_GATH sg1=tmpSg, sg2=pCmd->pSgTable; 1772 do { 1773 *sg1++=*sg2; 1774 } while ((sg2++->wSgFlag & SG_FLAG_EOT)==0); 1775 } else if (!pCmd->pfnBuildSgl || 1776 !pCmd->pfnBuildSgl(_VBUS_P pCmd, tmpSg, 1)){ 1777 pCmd->Result = RETURN_NEED_LOGICAL_SG; 1778 goto finish_cmd; 1779 } 1780 1781 do { 1782 ULONG size; 1783 ULONG_PTR addr = tmpSg->dSgAddress; 1784 1785 size = tmpSg->wSgSize? tmpSg->wSgSize : 0x10000; 1786 if (size & 0x1ff) { 1787 pCmd->Result = RETURN_INVALID_REQUEST; 1788 goto finish_cmd; 1789 } 1790 if (mvStorageDevATAExecuteNonUDMACommand( 1791 pMvSataAdapter, channel, 1792 (pCmd->cf_data_out) ? 1793 MV_NON_UDMA_PROTOCOL_PIO_DATA_OUT : 1794 MV_NON_UDMA_PROTOCOL_PIO_DATA_IN, 1795 is48bit, (MV_U16_PTR)addr, 1796 size >> 1, /* count */ 1797 0, /* features N/A */ 1798 (MV_U16)(size>>9), /*sector count*/ 1799 (MV_U16)((is48bit ? 1800 (MV_U16)((Lba >> 16) & 0xFF00) : 0 ) | 1801 (UCHAR)(Lba & 0xFF) ), /*lbalow*/ 1802 (MV_U16)((Lba >> 8) & 0xFF), /* lbaMid */ 1803 (MV_U16)((Lba >> 16) & 0xFF),/* lbaHig */ 1804 (MV_U8)(0x40 | (is48bit ? 0 : 1805 (UCHAR)(Lba >> 24) & 0xFF )),/* device */ 1806 (MV_U8)(is48bit ? (pCmd->cf_data_in ? 1807 IDE_COMMAND_READ_EXT : 1808 IDE_COMMAND_WRITE_EXT) : 1809 pCmd->uCmd.Ide.Command))==MV_FALSE) { 1810 pCmd->Result = RETURN_IDE_ERROR; 1811 goto finish_cmd; 1812 } 1813 Lba += size>>9; 1814 if(Lba & 0xF0000000) is48bit = MV_TRUE; 1815 } 1816 while ((tmpSg++->wSgFlag & SG_FLAG_EOT)==0); 1817 pCmd->Result = RETURN_SUCCESS; 1818finish_cmd: 1819 mvSataEnableChannelDma(pMvSataAdapter,channel); 1820 CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, 1821 pCmd); 1822 return; 1823 } 1824 1825 pPRDTable = AllocatePRDTable(pAdapter); 1826 KdPrint(("pPRDTable:%p\n",pPRDTable)); 1827 if (!pPRDTable) { 1828 pCmd->Result = RETURN_DEVICE_BUSY; 1829 CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, 1830 pCmd); 1831 HPT_ASSERT(0); 1832 return; 1833 } 1834 1835 do { 1836 pPRDTable[i].highBaseAddr = 0; 1837 pPRDTable[i].flags = (MV_U16)tmpSg->wSgFlag; 1838 pPRDTable[i].byteCount = (MV_U16)tmpSg->wSgSize; 1839 pPRDTable[i].lowBaseAddr = (MV_U32)tmpSg->dSgAddress; 1840 pPRDTable[i].reserved = 0; 1841 i++; 1842 } while((tmpSg++->wSgFlag & SG_FLAG_EOT)==0); 1843 1844 pUdmaParams->prdLowAddr = pAdapter->prdTableDmaAddr + 1845 ((ULONG)pPRDTable - (ULONG)pAdapter->prdTableAddr); 1846 1847 if ((pUdmaParams->numOfSectors == 256) && 1848 (pMvSataChannel->lba48Address == MV_FALSE)) { 1849 pUdmaParams->numOfSectors = 0; 1850 } 1851 1852 pCmd->uScratch.sata_param.prdAddr = (PVOID)pPRDTable; 1853 1854 result = mvSataQueueCommand(pMvSataAdapter, channel, 1855 &commandInfo); 1856 1857 if (result != MV_QUEUE_COMMAND_RESULT_OK) { 1858queue_failed: 1859 switch (result) { 1860 case MV_QUEUE_COMMAND_RESULT_BAD_LBA_ADDRESS: 1861 MV_ERROR("IAL Error: Edma Queue command " 1862 "failed. Bad LBA LBA[31:0](0x%08x)\n", 1863 pUdmaParams->lowLBAAddress); 1864 pCmd->Result = RETURN_IDE_ERROR; 1865 break; 1866 case MV_QUEUE_COMMAND_RESULT_QUEUED_MODE_DISABLED: 1867 MV_ERROR("IAL Error: Edma Queue command " 1868 "failed. EDMA disabled adapter %d " 1869 "channel %d\n", 1870 pMvSataAdapter->adapterId, channel); 1871 mvSataEnableChannelDma(pMvSataAdapter,channel); 1872 pCmd->Result = RETURN_IDE_ERROR; 1873 break; 1874 case MV_QUEUE_COMMAND_RESULT_FULL: 1875 MV_ERROR("IAL Error: Edma Queue command " 1876 "failed. Queue is Full adapter %d " 1877 "channel %d\n", 1878 pMvSataAdapter->adapterId, channel); 1879 pCmd->Result = RETURN_DEVICE_BUSY; 1880 break; 1881 case MV_QUEUE_COMMAND_RESULT_BAD_PARAMS: 1882 MV_ERROR("IAL Error: Edma Queue command " 1883 "failed. (Bad Params), pMvSataAdapter:" 1884 " %p, pSataChannel: %p.\n", 1885 pMvSataAdapter, 1886 pMvSataAdapter->sataChannel[channel]); 1887 pCmd->Result = RETURN_IDE_ERROR; 1888 break; 1889 default: 1890 MV_ERROR("IAL Error: Bad result value (%d) " 1891 "from queue command\n", result); 1892 pCmd->Result = RETURN_IDE_ERROR; 1893 } 1894 if(pPRDTable) 1895 FreePRDTable(pAdapter, pPRDTable); 1896 CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, 1897 pCmd); 1898 } 1899 pDevice->QueueLength++; 1900 return; 1901 1902 case IDE_COMMAND_VERIFY: 1903 commandInfo.type = MV_QUEUED_COMMAND_TYPE_NONE_UDMA; 1904 pNoUdmaParams->bufPtr = NULL; 1905 pNoUdmaParams->callBack = CommandCompletionCB; 1906 pNoUdmaParams->commandId = (MV_VOID_PTR)pCmd; 1907 pNoUdmaParams->count = 0; 1908 pNoUdmaParams->features = 0; 1909 pNoUdmaParams->protocolType = MV_NON_UDMA_PROTOCOL_NON_DATA; 1910 1911 pCmd->uScratch.sata_param.cmd_priv = 1; 1912 if (pMvSataChannel->lba48Address == MV_TRUE){ 1913 pNoUdmaParams->command = 1914 MV_ATA_COMMAND_READ_VERIFY_SECTORS_EXT; 1915 pNoUdmaParams->isEXT = MV_TRUE; 1916 pNoUdmaParams->lbaHigh = 1917 (MV_U16)((Lba & 0xff0000) >> 16); 1918 pNoUdmaParams->lbaMid = (MV_U16)((Lba & 0xff00) >> 8); 1919 pNoUdmaParams->lbaLow = 1920 (MV_U16)(((Lba & 0xff000000) >> 16)| (Lba & 0xff)); 1921 pNoUdmaParams->sectorCount = nSector; 1922 pNoUdmaParams->device = 0x40; 1923 result = mvSataQueueCommand(pMvSataAdapter, channel, 1924 &commandInfo); 1925 if (result != MV_QUEUE_COMMAND_RESULT_OK) { 1926 goto queue_failed; 1927 } 1928 return; 1929 } 1930 pNoUdmaParams->command = MV_ATA_COMMAND_READ_VERIFY_SECTORS; 1931 pNoUdmaParams->isEXT = MV_FALSE; 1932 pNoUdmaParams->lbaHigh = (MV_U16)((Lba & 0xff0000) >> 16); 1933 pNoUdmaParams->lbaMid = (MV_U16)((Lba & 0xff00) >> 8); 1934 pNoUdmaParams->lbaLow = (MV_U16)(Lba & 0xff); 1935 pNoUdmaParams->sectorCount = 0xff & nSector; 1936 pNoUdmaParams->device = (MV_U8)(0x40 | 1937 ((Lba & 0xf000000) >> 24)); 1938 pNoUdmaParams->callBack = CommandCompletionCB; 1939 result = mvSataQueueCommand(pMvSataAdapter, channel, 1940 &commandInfo); 1941 /* 1942 * FIXME: how about the commands already queued? but marvel 1943 * also forgets to consider this 1944 */ 1945 if (result != MV_QUEUE_COMMAND_RESULT_OK){ 1946 goto queue_failed; 1947 } 1948 break; 1949 default: 1950 pCmd->Result = RETURN_INVALID_REQUEST; 1951 CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd); 1952 break; 1953 } 1954} 1955 1956/********************************************************** 1957 * 1958 * Probe the hostadapter. 1959 * 1960 **********************************************************/ 1961static int 1962hpt_probe(device_t dev) 1963{ 1964 if ((pci_get_vendor(dev) == MV_SATA_VENDOR_ID) && 1965 (pci_get_device(dev) == MV_SATA_DEVICE_ID_5081 1966#ifdef FOR_DEMO 1967 || pci_get_device(dev) == MV_SATA_DEVICE_ID_5080 1968#endif 1969 )) { 1970 KdPrintI((CONTROLLER_NAME " found\n")); 1971 device_set_desc(dev, CONTROLLER_NAME); 1972 return 0; 1973 } 1974 else 1975 return(ENXIO); 1976} 1977 1978/*********************************************************** 1979 * 1980 * Auto configuration: attach and init a host adapter. 1981 * 1982 ***********************************************************/ 1983static int 1984hpt_attach(device_t dev) 1985{ 1986 IAL_ADAPTER_T * pAdapter; 1987 int rid; 1988 union ccb *ccb; 1989 struct cam_devq *devq; 1990 struct cam_sim *hpt_vsim; 1991 1992 printf("%s Version %s\n", DRIVER_NAME, DRIVER_VERSION); 1993 1994 pAdapter = device_get_softc(dev); 1995 pAdapter->hpt_dev = dev; 1996 1997 rid = init_adapter(pAdapter); 1998 if (rid) 1999 return rid; 2000 2001 rid = 0; 2002 if ((pAdapter->hpt_irq = bus_alloc_resource(pAdapter->hpt_dev, 2003 SYS_RES_IRQ, &rid, 0, ~0ul, 1, RF_SHAREABLE | RF_ACTIVE)) == NULL){ 2004 hpt_printk(("can't allocate interrupt\n")); 2005 return(ENXIO); 2006 } 2007 2008 if(bus_setup_intr(pAdapter->hpt_dev, pAdapter->hpt_irq, INTR_TYPE_CAM, 2009 hpt_intr, pAdapter, &pAdapter->hpt_intr)) { 2010 hpt_printk(("can't set up interrupt\n")); 2011 free(pAdapter, M_DEVBUF); 2012 return(ENXIO); 2013 } 2014 2015#if 1 2016 if ((ccb = malloc(sizeof(*ccb), M_DEVBUF, M_WAITOK | M_ZERO)) != NULL) { 2017 ccb->ccb_h.pinfo.priority = 1; 2018 ccb->ccb_h.pinfo.index = CAM_UNQUEUED_INDEX; 2019 } else { 2020 return ENOMEM; 2021 } 2022#endif 2023 /* 2024 * Create the device queue for our SIM(s). 2025 */ 2026 if((devq = cam_simq_alloc(8/*MAX_QUEUE_COMM*/)) == NULL) { 2027 KdPrint(("ENXIO\n")); 2028 free(ccb, M_DEVBUF); 2029 return ENOMEM; 2030 } 2031 2032 /* 2033 * Construct our SIM entry 2034 */ 2035 if ((hpt_vsim = cam_sim_alloc(hpt_action, hpt_poll,__str(PROC_DIR_NAME), 2036 pAdapter, device_get_unit(pAdapter->hpt_dev), /*untagged*/1, 2037 /*tagged*/8, devq)) == NULL) { 2038 cam_simq_free(devq); 2039 return ENOMEM; 2040 } 2041 2042 if(xpt_bus_register(hpt_vsim, 0) != CAM_SUCCESS) { 2043 cam_sim_free(hpt_vsim, /*free devq*/ TRUE); 2044 hpt_vsim = NULL; 2045 return ENXIO; 2046 } 2047 2048 if(xpt_create_path(&pAdapter->path, /*periph */ NULL, 2049 cam_sim_path(hpt_vsim), CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) 2050 != CAM_REQ_CMP) { 2051 xpt_bus_deregister(cam_sim_path(hpt_vsim)); 2052 cam_sim_free(hpt_vsim, /*free_devq*/TRUE); 2053 hpt_vsim = NULL; 2054 return ENXIO; 2055 } 2056 2057 xpt_setup_ccb(&(ccb->ccb_h), pAdapter->path, /*priority*/5); 2058 ccb->ccb_h.func_code = XPT_SASYNC_CB; 2059 ccb->csa.event_enable = AC_LOST_DEVICE; 2060 ccb->csa.callback = hpt_async; 2061 ccb->csa.callback_arg = hpt_vsim; 2062 xpt_action((union ccb *)ccb); 2063 free(ccb, M_DEVBUF); 2064 2065 /* Only do this setup for the first device. */ 2066 if (device_get_unit(dev) == 0) { 2067 pAdapter->eh = EVENTHANDLER_REGISTER(shutdown_final, 2068 hpt_shutdown, dev, SHUTDOWN_PRI_DEFAULT); 2069 if (pAdapter->eh != NULL) 2070 launch_worker_thread(); 2071 else 2072 printf("hptmv: shutdown event registration failed\n"); 2073 } 2074 2075 return 0; 2076} 2077 2078static int 2079hpt_detach(device_t dev) 2080{ 2081 return (EBUSY); 2082} 2083 2084/*************************************************************** 2085 * The poll function is used to simulate the interrupt when 2086 * the interrupt subsystem is not functioning. 2087 * 2088 ***************************************************************/ 2089static void 2090hpt_poll(struct cam_sim *sim) 2091{ 2092 hpt_intr((void *)cam_sim_softc(sim)); 2093} 2094 2095/**************************************************************** 2096 * Name: hpt_intr 2097 * Description: Interrupt handler. 2098 ****************************************************************/ 2099static void 2100hpt_intr(void *arg) 2101{ 2102 IAL_ADAPTER_T *pAdapter = (IAL_ADAPTER_T *)arg; 2103 intrmask_t oldspl; 2104 2105 oldspl = lock_driver(); 2106 /* KdPrintI(("----- Entering Isr() -----\n")); */ 2107 if (mvSataInterruptServiceRoutine(&pAdapter->mvSataAdapter) == MV_TRUE){ 2108 _VBUS_INST(&pAdapter->VBus) 2109 CheckPendingCall(_VBUS_P0); 2110 } 2111 2112 /* KdPrintI(("----- Leaving Isr() -----\n")); */ 2113 unlock_driver(oldspl); 2114} 2115 2116/********************************************************** 2117 * Asynchronous Events 2118 *********************************************************/ 2119#if (!defined(UNREFERENCED_PARAMETER)) 2120#define UNREFERENCED_PARAMETER(x) (void)(x) 2121#endif 2122 2123static void 2124hpt_async(void * callback_arg, u_int32_t code, struct cam_path * path, 2125 void * arg) 2126{ 2127 /* debug XXXX */ 2128 panic("Here"); 2129 UNREFERENCED_PARAMETER(callback_arg); 2130 UNREFERENCED_PARAMETER(code); 2131 UNREFERENCED_PARAMETER(path); 2132 UNREFERENCED_PARAMETER(arg); 2133 2134} 2135 2136static void 2137FlushAdapter(IAL_ADAPTER_T *pAdapter) 2138{ 2139 int i; 2140 2141 hpt_printk(("flush all devices\n")); 2142 2143 /* flush all devices */ 2144 for (i=0; i<MAX_VDEVICE_PER_VBUS; i++) { 2145 PVDevice pVDev = pAdapter->VBus.pVDevice[i]; 2146 if (pVDev) 2147 fFlushVDev(pVDev); 2148 } 2149} 2150 2151static int 2152hpt_shutdown(device_t dev) 2153{ 2154 IAL_ADAPTER_T *pAdapter; 2155 2156 pAdapter = device_get_softc(dev); 2157 if (pAdapter == NULL) 2158 return (EINVAL); 2159 2160 EVENTHANDLER_DEREGISTER(shutdown_final, pAdapter->eh); 2161 FlushAdapter(pAdapter); 2162 2163 return 0; 2164} 2165 2166void 2167Check_Idle_Call(IAL_ADAPTER_T *pAdapter) 2168{ 2169 int i = 0; 2170 2171 _VBUS_INST(&pAdapter->VBus) 2172 2173 if (mWaitingForIdle(_VBUS_P0)) { 2174 CheckIdleCall(_VBUS_P0); 2175#ifdef SUPPORT_ARRAY 2176 for(i = 0; i < MAX_ARRAY_PER_VBUS; i++){ 2177 PVDevice pArray; 2178 2179 if ((pArray = ArrayTables(i))->u.array.dArStamp == 0) 2180 continue; 2181 else if (pArray->u.array.rf_auto_rebuild) { 2182 KdPrint(("auto rebuild.\n")); 2183 pArray->u.array.rf_auto_rebuild = 0; 2184 hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, 2185 pAdapter, pArray, DUPLICATE); 2186 } 2187 } 2188#endif 2189 } 2190 /* launch the awaiting commands blocked by mWaitingForIdle */ 2191 while(pAdapter->pending_Q!= NULL) { 2192 _VBUS_INST(&pAdapter->VBus) 2193 union ccb *ccb = 2194 (union ccb *)pAdapter->pending_Q->ccb_h.ccb_ccb_ptr; 2195 2196 hpt_free_ccb(&pAdapter->pending_Q, ccb); 2197 CallAfterReturn(_VBUS_P (DPC_PROC)OsSendCommand, ccb); 2198 } 2199} 2200 2201static void 2202ccb_done(union ccb *ccb) 2203{ 2204 IAL_ADAPTER_T * pAdapter = (IAL_ADAPTER_T *)ccb->ccb_adapter; 2205 KdPrintI(("ccb_done: ccb %p status %x", ccb, ccb->ccb_h.status)); 2206 2207 xpt_done(ccb); 2208 2209 pAdapter->outstandingCommands--; 2210 2211 if (pAdapter->outstandingCommands == 0) { 2212 if(DPC_Request_Nums == 0) 2213 Check_Idle_Call(pAdapter); 2214 } 2215} 2216 2217/**************************************************************** 2218 * Name: hpt_action 2219 * Description: Process a queued command from the CAM layer. 2220 * Parameters: sim - Pointer to SIM object 2221 * ccb - Pointer to SCSI command structure. 2222 ****************************************************************/ 2223 2224void 2225hpt_action(struct cam_sim *sim, union ccb *ccb) 2226{ 2227 intrmask_t oldspl; 2228 IAL_ADAPTER_T * pAdapter = (IAL_ADAPTER_T *) cam_sim_softc(sim); 2229 _VBUS_INST(&pAdapter->VBus) 2230 2231 ccb->ccb_adapter = pAdapter; 2232 2233 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("hpt_action\n")); 2234 KdPrint(("hpt_action(%lx,%lx{%x})\n", (u_long)sim, (u_long)ccb, 2235 ccb->ccb_h.func_code)); 2236 2237 switch (ccb->ccb_h.func_code) { 2238 case XPT_SCSI_IO: /* Execute the requested I/O operation */ 2239 /* ccb->ccb_h.path_id is not our bus id - don't check it */ 2240 2241 if (ccb->ccb_h.target_lun) { 2242 ccb->ccb_h.status = CAM_LUN_INVALID; 2243 xpt_done(ccb); 2244 return; 2245 } 2246 if (ccb->ccb_h.target_id >= MAX_VDEVICE_PER_VBUS || 2247 pAdapter->VBus.pVDevice[ccb->ccb_h.target_id]==0) { 2248 ccb->ccb_h.status = CAM_TID_INVALID; 2249 xpt_done(ccb); 2250 return; 2251 } 2252 2253 oldspl = lock_driver(); 2254 if (pAdapter->outstandingCommands==0 && DPC_Request_Nums==0) 2255 Check_Idle_Call(pAdapter); 2256 2257 if (mWaitingForIdle(_VBUS_P0)) 2258 hpt_queue_ccb(&pAdapter->pending_Q, ccb); 2259 else 2260 OsSendCommand(_VBUS_P ccb); 2261 unlock_driver(oldspl); 2262 2263 /* KdPrint(("leave scsiio\n")); */ 2264 break; 2265 2266 case XPT_RESET_BUS: 2267 KdPrint(("reset bus\n")); 2268 oldspl = lock_driver(); 2269 fResetVBus(_VBUS_P0); 2270 unlock_driver(oldspl); 2271 xpt_done(ccb); 2272 break; 2273 2274 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 2275 case XPT_EN_LUN: /* Enable LUN as a target */ 2276 case XPT_TARGET_IO: /* Execute target I/O request */ 2277 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 2278 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 2279 case XPT_ABORT: /* Abort the specified CCB */ 2280 case XPT_TERM_IO: /* Terminate the I/O process */ 2281 /* XXX Implement */ 2282 ccb->ccb_h.status = CAM_REQ_INVALID; 2283 xpt_done(ccb); 2284 break; 2285 2286 case XPT_GET_TRAN_SETTINGS: 2287 case XPT_SET_TRAN_SETTINGS: 2288 /* XXX Implement */ 2289 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 2290 xpt_done(ccb); 2291 break; 2292 2293 case XPT_CALC_GEOMETRY: 2294 { 2295 struct ccb_calc_geometry *ccg; 2296 u_int32_t size_mb; 2297 u_int32_t secs_per_cylinder; 2298 2299 ccg = &ccb->ccg; 2300 size_mb = ccg->volume_size / ((1024L*1024L) / ccg->block_size); 2301 2302 if (size_mb > 1024 ) { 2303 ccg->heads = 255; 2304 ccg->secs_per_track = 63; 2305 } else { 2306 ccg->heads = 64; 2307 ccg->secs_per_track = 32; 2308 } 2309 secs_per_cylinder = ccg->heads * ccg->secs_per_track; 2310 ccg->cylinders = ccg->volume_size / secs_per_cylinder; 2311 ccb->ccb_h.status = CAM_REQ_CMP; 2312 xpt_done(ccb); 2313 break; 2314 } 2315 2316 case XPT_PATH_INQ: /* Path routing inquiry */ 2317 { 2318 struct ccb_pathinq *cpi = &ccb->cpi; 2319 2320 cpi->version_num = 1; /* XXX??? */ 2321 cpi->hba_inquiry = PI_SDTR_ABLE; 2322 cpi->target_sprt = 0; 2323 /* Not necessary to reset bus */ 2324 cpi->hba_misc = PIM_NOBUSRESET; 2325 cpi->hba_eng_cnt = 0; 2326 2327 cpi->max_target = MAX_VDEVICE_PER_VBUS; 2328 cpi->max_lun = 0; 2329 cpi->initiator_id = MAX_VDEVICE_PER_VBUS; 2330 2331 cpi->bus_id = cam_sim_bus(sim); 2332 cpi->base_transfer_speed = 3300; 2333 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 2334 strncpy(cpi->hba_vid, "HPT ", HBA_IDLEN); 2335 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 2336 cpi->unit_number = cam_sim_unit(sim); 2337 cpi->ccb_h.status = CAM_REQ_CMP; 2338 xpt_done(ccb); 2339 break; 2340 } 2341 2342 default: 2343 KdPrint(("invalid cmd\n")); 2344 ccb->ccb_h.status = CAM_REQ_INVALID; 2345 xpt_done(ccb); 2346 break; 2347 } 2348 /* KdPrint(("leave hpt_action..............\n")); */ 2349} 2350 2351/* shall be called at lock_driver() */ 2352static void 2353hpt_queue_ccb(union ccb **ccb_Q, union ccb *ccb) 2354{ 2355 if(*ccb_Q == NULL) 2356 ccb->ccb_h.ccb_ccb_ptr = ccb; 2357 else { 2358 ccb->ccb_h.ccb_ccb_ptr = (*ccb_Q)->ccb_h.ccb_ccb_ptr; 2359 (*ccb_Q)->ccb_h.ccb_ccb_ptr = (char *)ccb; 2360 } 2361 2362 *ccb_Q = ccb; 2363} 2364 2365/* shall be called at lock_driver() */ 2366static void 2367hpt_free_ccb(union ccb **ccb_Q, union ccb *ccb) 2368{ 2369 union ccb *TempCCB; 2370 2371 TempCCB = *ccb_Q; 2372 2373 if(ccb->ccb_h.ccb_ccb_ptr == ccb) 2374 /*it means SCpnt is the last one in CURRCMDs*/ 2375 *ccb_Q = NULL; 2376 else { 2377 while(TempCCB->ccb_h.ccb_ccb_ptr != (char *)ccb) 2378 TempCCB = (union ccb *)TempCCB->ccb_h.ccb_ccb_ptr; 2379 2380 TempCCB->ccb_h.ccb_ccb_ptr = ccb->ccb_h.ccb_ccb_ptr; 2381 2382 if(*ccb_Q == ccb) 2383 *ccb_Q = TempCCB; 2384 } 2385} 2386 2387#ifdef SUPPORT_ARRAY 2388/*************************************************************************** 2389 * Function: hpt_worker_thread 2390 * Description: Do background rebuilding. Execute in kernel thread context. 2391 * Returns: None 2392 ***************************************************************************/ 2393static void hpt_worker_thread(void) 2394{ 2395 intrmask_t oldspl; 2396 2397 for(;;) { 2398 while (DpcQueue_First!=DpcQueue_Last) { 2399 ST_HPT_DPC p; 2400 IAL_ADAPTER_T *pAdapter; 2401 PVDevice pArray; 2402 PVBus _vbus_p; 2403 int i; 2404 2405 oldspl = lock_driver(); 2406 p = DpcQueue[DpcQueue_First]; 2407 DpcQueue_First++; 2408 DpcQueue_First %= MAX_DPC; 2409 DPC_Request_Nums++; 2410 unlock_driver(oldspl); 2411 p.dpc(p.pAdapter, p.arg, p.flags); 2412 2413 oldspl = lock_driver(); 2414 DPC_Request_Nums--; 2415 /* 2416 * since we may have prevented Check_Idle_Call, do it 2417 * here 2418 */ 2419 if (DPC_Request_Nums==0) { 2420 if (p.pAdapter->outstandingCommands == 0) { 2421 _VBUS_INST(&p.pAdapter->VBus); 2422 Check_Idle_Call(p.pAdapter); 2423 CheckPendingCall(_VBUS_P0); 2424 } 2425 } 2426 unlock_driver(oldspl); 2427 if (SIGISMEMBER(curproc->p_siglist, SIGSTOP) == 0) 2428 continue; 2429 2430 /* abort rebuilding process. */ 2431 pAdapter = gIal_Adapter; 2432 while (pAdapter != 0) { 2433 _vbus_p = &pAdapter->VBus; 2434 for (i = 0; i < MAX_ARRAY_PER_VBUS;i++){ 2435 if ((pArray=ArrayTables(i))->u.array.dArStamp==0) 2436 continue; 2437 if (pArray->u.array.rf_rebuilding || 2438 pArray->u.array.rf_verifying || 2439 pArray->u.array.rf_initializing) { 2440 pArray->u.array.rf_abort_rebuild = 1; 2441 } 2442 } 2443 pAdapter = pAdapter->next; 2444 } 2445 } 2446 2447#ifdef DEBUG 2448 if (SIGISMEMBER(curproc->p_siglist, SIGSTOP)) 2449 tsleep(hpt_worker_thread, PPAUSE, "hptrdy", 2 * hz); 2450#endif 2451#if (__FreeBSD_version >= 500043) 2452 kthread_suspend_check(curproc); 2453#else 2454 kproc_suspend_loop(curproc); 2455#endif 2456 /* wait for something to do */ 2457 tsleep(hpt_worker_thread, PPAUSE, "hptrdy", 2 * hz); 2458 } 2459} 2460 2461static struct proc *hptdaemonproc; 2462static struct kproc_desc hpt_kp = { 2463 "hpt_wt", 2464 hpt_worker_thread, 2465 &hptdaemonproc 2466}; 2467 2468static void 2469launch_worker_thread(void) 2470{ 2471 IAL_ADAPTER_T *pAdapTemp; 2472 2473 kproc_start(&hpt_kp); 2474 2475 for (pAdapTemp = gIal_Adapter; pAdapTemp; pAdapTemp = pAdapTemp->next) { 2476 2477 _VBUS_INST(&pAdapTemp->VBus) 2478 int i; 2479 PVDevice pVDev; 2480 2481 for(i = 0; i < MAX_ARRAY_PER_VBUS; i++) 2482 if ((pVDev=ArrayTables(i))->u.array.dArStamp==0) 2483 continue; 2484 if (pVDev->u.array.rf_need_rebuild && 2485 !pVDev->u.array.rf_rebuilding) { 2486 hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, 2487 pAdapTemp, pVDev, 2488 (UCHAR)((pVDev->u.array.CriticalMembers || 2489 pVDev->VDeviceType == VD_RAID_1) ? 2490 DUPLICATE : REBUILD_PARITY)); 2491 } 2492 } 2493 2494 /* 2495 * hpt_worker_thread needs to be suspended after shutdown sync, when fs 2496 * sync finished. 2497 */ 2498#if (__FreeBSD_version < 500043) 2499 EVENTHANDLER_REGISTER(shutdown_post_sync, shutdown_kproc, 2500 hptdaemonproc, SHUTDOWN_PRI_FIRST); 2501#else 2502 EVENTHANDLER_REGISTER(shutdown_post_sync, kproc_shutdown, 2503 hptdaemonproc, SHUTDOWN_PRI_FIRST); 2504#endif 2505} 2506 2507#endif /* SUPPORT_ARRAY */ 2508 2509/* build sgl with merge function */ 2510#define ON64KBOUNDARY(x) (((ULONG_PTR)(x) & 0xFFFF) == 0) 2511 2512/* XXX */ 2513/* #define NOTNEIGHBORPAGE(x, y) (max(x, y) - min(x, y) > PAGE_SIZE) */ 2514#define NOTNEIGHBORPAGE(highvaddr, lowvaddr) \ 2515 ((ULONG_PTR)(highvaddr) - (ULONG_PTR)(lowvaddr) != PAGE_SIZE) 2516 2517 2518/********************************************************************************/ 2519 2520static void 2521hptmv_buffer_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 2522{ 2523 FPSCAT_GATH pSg; 2524 int idx; 2525 2526 if (error || nsegs == 0) { 2527 panic("busdma bewm"); 2528 return; 2529 } 2530 2531 pSg = *(FPSCAT_GATH *)arg; 2532 2533 for (idx = 0; idx < nsegs; idx++) { 2534 pSg[idx].dSgAddress = (ULONG_PTR)segs[idx].ds_addr; 2535 pSg[idx].wSgSize = segs[idx].ds_len; 2536 pSg[idx].wSgFlag = 0; 2537 } 2538 pSg[idx - 1].wSgFlag = SG_FLAG_EOT; 2539 2540 return; 2541} 2542 2543static int HPTLIBAPI 2544fOsBuildSgl(_VBUS_ARG PCommand pCmd, FPSCAT_GATH pSg, int logical) 2545{ 2546 IAL_ADAPTER_T *pAdapter; 2547 pPrivCommand prvCmd; 2548 union ccb *ccb; 2549 struct ccb_hdr *ccb_h; 2550 struct ccb_scsiio *csio; 2551 bus_dma_segment_t *sgList; 2552 int error; 2553 2554 prvCmd = pCmd->pOrgCommand; 2555 pAdapter = prvCmd->pAdapter; 2556 ccb = prvCmd->ccb; 2557 ccb_h = &ccb->ccb_h; 2558 csio = &ccb->csio; 2559 sgList = (bus_dma_segment_t *)(csio->data_ptr); 2560 2561 if ((ccb_h->flags & CAM_DIR_MASK) == CAM_DIR_NONE) 2562 return TRUE; 2563 2564 if ((ccb_h->flags & CAM_SCATTER_VALID) != 0) { 2565 if((ccb_h->flags & CAM_DATA_PHYS) != 0) 2566 panic(KMSG_LEADING "physical address unsupported!"); 2567 2568 hptmv_buffer_callback(&pSg, sgList, csio->sglist_cnt, 0); 2569 return TRUE; 2570 } 2571 2572 if (logical) { 2573 if ((ccb_h->flags & CAM_DATA_PHYS) != 0) 2574 panic(KMSG_LEADING "physical address unsupported\n"); 2575 2576 pSg->dSgAddress = (ULONG_PTR)csio->data_ptr; 2577 pSg->wSgSize = (USHORT)csio->dxfer_len; 2578 pSg->wSgFlag = SG_FLAG_EOT; 2579 return TRUE; 2580 } 2581 2582 KdPrint(("use sgl (physical) ...........\n")); 2583 2584 /* 2585 * XXX Hack to make this work with PAE. It will fail under 2586 * heavy load. 2587 */ 2588 error = bus_dmamap_load(pAdapter->buf_dmat, prvCmd->buf_map, 2589 csio->data_ptr, csio->dxfer_len, hptmv_buffer_callback, &pSg, 2590 BUS_DMA_NOWAIT); 2591 2592 if (error) { 2593 printf("bus_dmamap_load failed error= %d\n", error); 2594 return FALSE; 2595 } 2596 2597/*#ifdef DEBUG 2598 do { 2599 int size, i = 0; 2600 KdPrintI(("sg[%d]:0x%lx %d\n", i++, pSg[i].dSgAddress, 2601 pSg[i].wSgSize)); 2602 size = pSg->wSgSize; 2603 if (pSg[i].wSgFlag & SG_FLAG_EOT) 2604 break; 2605 } while (i<17); 2606#endif*/ 2607 2608 if ((ccb_h->flags & CAM_DIR_MASK) == CAM_DIR_IN) { 2609 bus_dmamap_sync(pAdapter->buf_dmat, prvCmd->buf_map, 2610 BUS_DMASYNC_PREREAD); 2611 } else { 2612 bus_dmamap_sync(pAdapter->buf_dmat, prvCmd->buf_map, 2613 BUS_DMASYNC_PREWRITE); 2614 } 2615 2616 return TRUE; 2617} 2618 2619/*******************************************************************************/ 2620ULONG HPTLIBAPI 2621GetStamp(void) 2622{ 2623 ULONG stamp; 2624 2625 /* 2626 * the system variable, ticks, can't be used since it hasn't yet been active 2627 * when our driver starts (ticks==0, it's a invalid stamp value) 2628 */ 2629 do { 2630 stamp = random(); 2631 } while (stamp==0); 2632 2633 return stamp; 2634} 2635 2636 2637static void 2638SetInquiryData(PINQUIRYDATA inquiryData, PVDevice pVDev) 2639{ 2640 int i; 2641 IDENTIFY_DATA2 *pIdentify; 2642 2643 pIdentify = (IDENTIFY_DATA2*)pVDev->u.disk.mv->identifyDevice; 2644 inquiryData->DeviceType = T_DIRECT; /*DIRECT_ACCESS_DEVICE*/ 2645 inquiryData->AdditionalLength = (UCHAR)(sizeof(INQUIRYDATA) - 5); 2646#ifndef SERIAL_CMDS 2647 inquiryData->CommandQueue = 1; 2648#endif 2649 2650 switch(pVDev->VDeviceType) { 2651 case VD_SINGLE_DISK: 2652 case VD_ATAPI: 2653 case VD_REMOVABLE: 2654 /* Set the removable bit, if applicable. */ 2655 if ((pVDev->u.disk.df_removable_drive) || 2656 (pIdentify->GeneralConfiguration & 0x80)) 2657 inquiryData->RemovableMedia = 1; 2658 2659 /* Fill in vendor identification fields. */ 2660 for (i = 0; i < 20; i += 2) { 2661 inquiryData->VendorId[i] = 2662 ((PUCHAR)pIdentify->ModelNumber)[i + 1]; 2663 inquiryData->VendorId[i+1] = 2664 ((PUCHAR)pIdentify->ModelNumber)[i]; 2665 2666 } 2667 2668 /* Initialize unused portion of product id. */ 2669 for (i = 0; i < 4; i++) inquiryData->ProductId[12+i] = ' '; 2670 2671 /* firmware revision */ 2672 for (i = 0; i < 4; i += 2) { 2673 inquiryData->ProductRevisionLevel[i] = 2674 ((PUCHAR)pIdentify->FirmwareRevision)[i+1]; 2675 inquiryData->ProductRevisionLevel[i+1] = 2676 ((PUCHAR)pIdentify->FirmwareRevision)[i]; 2677 } 2678 break; 2679 default: 2680 memcpy(&inquiryData->VendorId, "RR182x ", 8); 2681#ifdef SUPPORT_ARRAY 2682 switch(pVDev->VDeviceType) { 2683 case VD_RAID_0: 2684 if ((pVDev->u.array.pMember[0] && 2685 mIsArray(pVDev->u.array.pMember[0])) || 2686 (pVDev->u.array.pMember[1] && 2687 mIsArray(pVDev->u.array.pMember[1]))) 2688 memcpy(&inquiryData->ProductId, 2689 "RAID 1/0 Array ", 16); 2690 else 2691 memcpy(&inquiryData->ProductId, 2692 "RAID 0 Array ", 16); 2693 break; 2694 case VD_RAID_1: 2695 if ((pVDev->u.array.pMember[0] && 2696 mIsArray(pVDev->u.array.pMember[0])) || 2697 (pVDev->u.array.pMember[1] && 2698 mIsArray(pVDev->u.array.pMember[1]))) 2699 memcpy(&inquiryData->ProductId, 2700 "RAID 0/1 Array ", 16); 2701 else 2702 memcpy(&inquiryData->ProductId, 2703 "RAID 1 Array ", 16); 2704 break; 2705 case VD_RAID_5: 2706 memcpy(&inquiryData->ProductId, "RAID 5 Array ", 16); 2707 break; 2708 case VD_JBOD: 2709 memcpy(&inquiryData->ProductId, "JBOD Array ", 16); 2710 break; 2711 } 2712#endif 2713 memcpy(&inquiryData->ProductRevisionLevel, "3.00", 4); 2714 break; 2715 } 2716} 2717 2718static void 2719hpt_timeout(void *arg) 2720{ 2721 _VBUS_INST(&((IAL_ADAPTER_T*)((union ccb *)arg)->ccb_adapter)->VBus) 2722 intrmask_t oldspl; 2723 2724 oldspl = lock_driver(); 2725 fResetVBus(_VBUS_P0); 2726 unlock_driver(oldspl); 2727} 2728 2729static void HPTLIBAPI 2730OsSendCommand(_VBUS_ARG union ccb *ccb) 2731{ 2732 IAL_ADAPTER_T *pAdapter; 2733 struct ccb_hdr *ccb_h; 2734 struct ccb_scsiio *csio; 2735 PVDevice pVDev; 2736 2737 pAdapter = (IAL_ADAPTER_T *)ccb->ccb_adapter; 2738 ccb_h = &ccb->ccb_h; 2739 csio = &ccb->csio; 2740 pVDev = pAdapter->VBus.pVDevice[ccb_h->target_id]; 2741 2742 KdPrintI(("OsSendCommand: ccb %p cdb %x-%x-%x\n", 2743 ccb, 2744 *(ULONG *)&ccb->csio.cdb_io.cdb_bytes[0], 2745 *(ULONG *)&ccb->csio.cdb_io.cdb_bytes[4], 2746 *(ULONG *)&ccb->csio.cdb_io.cdb_bytes[8] 2747 )); 2748 2749 pAdapter->outstandingCommands++; 2750 2751 if (pVDev == NULL || pVDev->vf_online == 0) { 2752 ccb->ccb_h.status = CAM_REQ_INVALID; 2753 ccb_done(ccb); 2754 goto Command_Complished; 2755 } 2756 2757 switch(ccb->csio.cdb_io.cdb_bytes[0]) 2758 { 2759 case TEST_UNIT_READY: 2760 case START_STOP_UNIT: 2761 case SYNCHRONIZE_CACHE: 2762 /* FALLTHROUGH */ 2763 ccb->ccb_h.status = CAM_REQ_CMP; 2764 break; 2765 2766 case INQUIRY: 2767 ZeroMemory(ccb->csio.data_ptr, ccb->csio.dxfer_len); 2768 SetInquiryData((PINQUIRYDATA)ccb->csio.data_ptr, pVDev); 2769 ccb_h->status = CAM_REQ_CMP; 2770 break; 2771 2772 case READ_CAPACITY: 2773 { 2774 UCHAR swip[4]; 2775 /* Claim 512 byte blocks (big-endian). */ 2776 ((PREAD_CAPACITY_DATA)csio->data_ptr)->BytesPerBlock = 0x20000; 2777 *(ULONG*)swip = pVDev->VDeviceCapacity - 1; 2778 ((PREAD_CAPACITY_DATA)csio->data_ptr)->LogicalBlockAddress = 2779 (swip[0] << 24) | (swip[1] << 16) | (swip[2] << 8) | swip[3]; 2780 ccb_h->status = CAM_REQ_CMP; 2781 break; 2782 } 2783 2784 case READ_6: 2785 case WRITE_6: 2786 case READ_10: 2787 case WRITE_10: 2788 case 0x13: 2789 case 0x2f: 2790 { 2791 UCHAR Cdb[16]; 2792 UCHAR CdbLength; 2793 _VBUS_INST(pVDev->pVBus) 2794 PCommand pCmd; 2795 2796 pCmd = AllocateCommand(_VBUS_P0); 2797 HPT_ASSERT(pCmd); 2798 2799 CdbLength = csio->cdb_len; 2800 if ((ccb->ccb_h.flags & CAM_CDB_POINTER) != 0) { 2801 if ((ccb->ccb_h.flags & CAM_CDB_PHYS) == 0) { 2802 bcopy(csio->cdb_io.cdb_ptr, Cdb, CdbLength); 2803 } else { 2804 KdPrintE(("ERROR!!!\n")); 2805 ccb->ccb_h.status = CAM_REQ_INVALID; 2806 break; 2807 } 2808 } else { 2809 bcopy(csio->cdb_io.cdb_bytes, Cdb, CdbLength); 2810 } 2811 2812 pCmd->pOrgCommand = AllocPrivCommand(pAdapter); 2813 if (pCmd->pOrgCommand == NULL) 2814 panic("command leak!"); 2815 ((pPrivCommand)(pCmd->pOrgCommand))->ccb = ccb; 2816 pCmd->pVDevice = pVDev; 2817 pCmd->pfnCompletion = fOsCommandDone; 2818 pCmd->pfnBuildSgl = fOsBuildSgl; 2819 2820 switch (Cdb[0]) { 2821 case READ_6: 2822 case WRITE_6: 2823 case 0x13: 2824 pCmd->uCmd.Ide.Lba = ((ULONG)Cdb[1] << 16) | 2825 ((ULONG)Cdb[2] << 8) | (ULONG)Cdb[3]; 2826 pCmd->uCmd.Ide.nSectors = (USHORT) Cdb[4]; 2827 break; 2828 default: 2829 pCmd->uCmd.Ide.Lba = (ULONG)Cdb[5] | 2830 ((ULONG)Cdb[4] << 8) | ((ULONG)Cdb[3] << 16) | 2831 ((ULONG)Cdb[2] << 24); 2832 pCmd->uCmd.Ide.nSectors = (USHORT) Cdb[8] | 2833 ((USHORT)Cdb[7]<<8); 2834 break; 2835 } 2836 2837 switch (Cdb[0]) { 2838 case READ_6: 2839 case READ_10: 2840 pCmd->uCmd.Ide.Command = IDE_COMMAND_READ; 2841 pCmd->cf_data_in = 1; 2842 break; 2843 2844 case WRITE_6: 2845 case WRITE_10: 2846 pCmd->uCmd.Ide.Command = IDE_COMMAND_WRITE; 2847 pCmd->cf_data_out = 1; 2848 break; 2849 case 0x13: 2850 case 0x2f: 2851 pCmd->uCmd.Ide.Command = IDE_COMMAND_VERIFY; 2852 break; 2853 } 2854 2855 ccb->ccb_h.timeout_ch = timeout(hpt_timeout, (caddr_t)ccb, 20*hz); 2856 2857 pVDev->pfnSendCommand(_VBUS_P pCmd); 2858 goto Command_Complished; 2859 } 2860 2861 default: 2862 ccb->ccb_h.status = CAM_REQ_INVALID; 2863 break; 2864 } 2865 ccb_done(ccb); 2866Command_Complished: 2867 CheckPendingCall(_VBUS_P0); 2868 return; 2869} 2870 2871static void HPTLIBAPI 2872fOsCommandDone(_VBUS_ARG PCommand pCmd) 2873{ 2874 IAL_ADAPTER_T *pAdapter; 2875 pPrivCommand prvCmd; 2876 union ccb *ccb; 2877 2878 prvCmd = pCmd->pOrgCommand; 2879 pAdapter = prvCmd->pAdapter; 2880 ccb = prvCmd->ccb; 2881 2882 KdPrint(("fOsCommandDone(%p, %d)", pCmd, pCmd->Result)); 2883 2884 untimeout(hpt_timeout, (caddr_t)ccb, ccb->ccb_h.timeout_ch); 2885 2886 switch(pCmd->Result) { 2887 case RETURN_SUCCESS: 2888 ccb->ccb_h.status = CAM_REQ_CMP; 2889 break; 2890 case RETURN_BAD_DEVICE: 2891 ccb->ccb_h.status = CAM_DEV_NOT_THERE; 2892 break; 2893 case RETURN_DEVICE_BUSY: 2894 ccb->ccb_h.status = CAM_BUSY; 2895 break; 2896 case RETURN_INVALID_REQUEST: 2897 ccb->ccb_h.status = CAM_REQ_INVALID; 2898 break; 2899 case RETURN_SELECTION_TIMEOUT: 2900 ccb->ccb_h.status = CAM_SEL_TIMEOUT; 2901 break; 2902 case RETURN_RETRY: 2903 ccb->ccb_h.status = CAM_BUSY; 2904 break; 2905 default: 2906 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR; 2907 break; 2908 } 2909 2910 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 2911 bus_dmamap_sync(pAdapter->buf_dmat, prvCmd->buf_map, 2912 BUS_DMASYNC_POSTREAD); 2913 } else { 2914 bus_dmamap_sync(pAdapter->buf_dmat, prvCmd->buf_map, 2915 BUS_DMASYNC_POSTWRITE); 2916 } 2917 bus_dmamap_unload(pAdapter->buf_dmat, prvCmd->buf_map); 2918 2919 FreePrivCommand(pAdapter, prvCmd); 2920 FreeCommand(_VBUS_P pCmd); 2921 ccb_done(ccb); 2922} 2923 2924int 2925hpt_queue_dpc(HPT_DPC dpc, IAL_ADAPTER_T * pAdapter, void *arg, UCHAR flags) 2926{ 2927 int p; 2928 2929 p = (DpcQueue_Last + 1) % MAX_DPC; 2930 if (p==DpcQueue_First) { 2931 KdPrint(("DPC Queue full!\n")); 2932 return -1; 2933 } 2934 2935 DpcQueue[DpcQueue_Last].dpc = dpc; 2936 DpcQueue[DpcQueue_Last].pAdapter = pAdapter; 2937 DpcQueue[DpcQueue_Last].arg = arg; 2938 DpcQueue[DpcQueue_Last].flags = flags; 2939 DpcQueue_Last = p; 2940 2941 return 0; 2942} 2943 2944#ifdef _RAID5N_ 2945/* 2946 * Allocate memory above 16M, otherwise we may eat all low memory for ISA 2947 * devices. 2948 * 2949 * Busdma should be used here, not contigmalloc/free. However, this API 2950 * will need to be changed to use it effective. 2951 */ 2952void 2953*os_alloc_page(_VBUS_ARG0) 2954{ 2955 return (void *)contigmalloc(0x1000, M_DEVBUF, M_NOWAIT, 0x1000000, 2956 0xffffffff, PAGE_SIZE, 0); 2957} 2958void 2959*os_alloc_dma_page(_VBUS_ARG0) 2960{ 2961 return (void *)contigmalloc(0x1000, M_DEVBUF, M_NOWAIT, 0x1000000, 2962 0xffffffff, PAGE_SIZE, 0); 2963} 2964 2965/* 2966 * The next two are not used right now. 2967 */ 2968void 2969os_free_page(_VBUS_ARG void *p) 2970{ 2971 contigfree(p, 0x1000, M_DEVBUF); 2972} 2973 2974void 2975os_free_dma_page(_VBUS_ARG void *p) 2976{ 2977 contigfree(p, 0x1000, M_DEVBUF); 2978} 2979 2980void 2981DoXor1(ULONG *p0, ULONG *p1, ULONG *p2, UINT nBytes) 2982{ 2983 UINT i; 2984 for (i = 0; i < nBytes / 4; i++) 2985 *p0++ = *p1++ ^ *p2++; 2986} 2987 2988void 2989DoXor2(ULONG *p0, ULONG *p2, UINT nBytes) 2990{ 2991 UINT i; 2992 for (i = 0; i < nBytes / 4; i++) 2993 *p0++ ^= *p2++; 2994} 2995#endif 2996