inphy.c revision 95722
1/*-
2 * Copyright (c) 2001 Jonathan Lemon
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of the author nor the names of any co-contributors
14 *    may be used to endorse or promote products derived from this software
15 *    without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 *	$FreeBSD: head/sys/dev/mii/inphy.c 95722 2002-04-29 13:07:38Z phk $
30 */
31
32/*
33 * driver for Intel 82553 and 82555 PHYs
34 */
35
36#include <sys/param.h>
37#include <sys/systm.h>
38#include <sys/kernel.h>
39#include <sys/malloc.h>
40#include <sys/socket.h>
41#include <sys/bus.h>
42
43#include <net/if.h>
44#include <net/if_media.h>
45
46#include <dev/mii/mii.h>
47#include <dev/mii/miivar.h>
48#include <dev/mii/miidevs.h>
49
50#include <dev/mii/inphyreg.h>
51
52#include "miibus_if.h"
53
54static int 	inphy_probe(device_t dev);
55static int 	inphy_attach(device_t dev);
56
57static device_method_t inphy_methods[] = {
58	/* device interface */
59	DEVMETHOD(device_probe,		inphy_probe),
60	DEVMETHOD(device_attach,	inphy_attach),
61	DEVMETHOD(device_detach,	mii_phy_detach),
62	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
63	{ 0, 0 }
64};
65
66static devclass_t inphy_devclass;
67
68static driver_t inphy_driver = {
69	"inphy",
70	inphy_methods,
71	sizeof(struct mii_softc)
72};
73
74DRIVER_MODULE(inphy, miibus, inphy_driver, inphy_devclass, 0, 0);
75
76static int	inphy_service(struct mii_softc *, struct mii_data *, int);
77static void	inphy_status(struct mii_softc *);
78
79static int
80inphy_probe(device_t dev)
81{
82	struct mii_attach_args *ma;
83	device_t parent;
84
85	ma = device_get_ivars(dev);
86	parent = device_get_parent(device_get_parent(dev));
87
88	/* Intel 82553 A/B steppings */
89	if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxINTEL &&
90	    MII_MODEL(ma->mii_id2) == MII_MODEL_xxINTEL_I82553AB) {
91		device_set_desc(dev, MII_STR_xxINTEL_I82553AB);
92		return (0);
93	}
94
95	if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_INTEL) {
96		switch (MII_MODEL(ma->mii_id2)) {
97		case MII_MODEL_INTEL_I82555:
98			device_set_desc(dev, MII_STR_INTEL_I82555);
99			return (0);
100		case MII_MODEL_INTEL_I82553C:
101			device_set_desc(dev, MII_STR_INTEL_I82553C);
102			return (0);
103		case MII_MODEL_INTEL_I82562EM:
104			device_set_desc(dev, MII_STR_INTEL_I82562EM);
105			return (0);
106		case MII_MODEL_INTEL_I82562ET:
107			device_set_desc(dev, MII_STR_INTEL_I82562ET);
108			return (0);
109		}
110	}
111
112	return (ENXIO);
113}
114
115static int
116inphy_attach(device_t dev)
117{
118	struct mii_softc *sc;
119	struct mii_attach_args *ma;
120	struct mii_data *mii;
121
122	sc = device_get_softc(dev);
123	ma = device_get_ivars(dev);
124	sc->mii_dev = device_get_parent(dev);
125	mii = device_get_softc(sc->mii_dev);
126	LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
127
128	sc->mii_inst = mii->mii_instance;
129	sc->mii_phy = ma->mii_phyno;
130	sc->mii_service = inphy_service;
131	sc->mii_pdata = mii;
132	mii->mii_instance++;
133
134#if 0
135	sc->mii_flags |= MIIF_NOISOLATE;
136#endif
137
138	ifmedia_add(&mii->mii_media,
139	    IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst),
140	    BMCR_LOOP|BMCR_S100, NULL);
141
142	mii_phy_reset(sc);
143
144	sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
145	device_printf(dev, " ");
146	mii_phy_add_media(sc);
147	printf("\n");
148
149	MIIBUS_MEDIAINIT(sc->mii_dev);
150
151	return (0);
152}
153
154static int
155inphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
156{
157	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
158	int reg;
159
160	switch (cmd) {
161	case MII_POLLSTAT:
162		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
163			return (0);
164		break;
165
166	case MII_MEDIACHG:
167		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
168			reg = PHY_READ(sc, MII_BMCR);
169			PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
170			return (0);
171		}
172
173		/*
174		 * If the interface is not up, don't do anything.
175		 */
176		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
177			break;
178
179		mii_phy_setmedia(sc);
180		break;
181
182	case MII_TICK:
183		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
184			return (0);
185		if (mii_phy_tick(sc) == EJUSTRETURN)
186			return (0);
187		break;
188	}
189
190	/* Update the media status. */
191	inphy_status(sc);
192
193	/* Callback if something changed. */
194	mii_phy_update(sc, cmd);
195	return (0);
196}
197
198static void
199inphy_status(struct mii_softc *sc)
200{
201	struct mii_data *mii = sc->mii_pdata;
202	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
203	int bmsr, bmcr, scr;
204
205	mii->mii_media_status = IFM_AVALID;
206	mii->mii_media_active = IFM_ETHER;
207
208	bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
209	if (bmsr & BMSR_LINK)
210		mii->mii_media_status |= IFM_ACTIVE;
211
212	bmcr = PHY_READ(sc, MII_BMCR);
213	if (bmcr & BMCR_ISO) {
214		mii->mii_media_active |= IFM_NONE;
215		mii->mii_media_status = 0;
216		return;
217	}
218
219	if (bmcr & BMCR_LOOP)
220		mii->mii_media_active |= IFM_LOOP;
221
222	if (bmcr & BMCR_AUTOEN) {
223		if ((bmsr & BMSR_ACOMP) == 0) {
224			mii->mii_media_active |= IFM_NONE;
225			return;
226		}
227
228		scr = PHY_READ(sc, MII_INPHY_SCR);
229		if (scr & SCR_S100)
230			mii->mii_media_active |= IFM_100_TX;
231		else
232			mii->mii_media_active |= IFM_10_T;
233		if (scr & SCR_FDX)
234			mii->mii_media_active |= IFM_FDX;
235	} else
236		mii->mii_media_active = ife->ifm_media;
237}
238