inphy.c revision 95718
1/*- 2 * Copyright (c) 2001 Jonathan Lemon 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. Neither the name of the author nor the names of any co-contributors 14 * may be used to endorse or promote products derived from this software 15 * without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: head/sys/dev/mii/inphy.c 95718 2002-04-29 11:57:30Z phk $ 30 */ 31 32/* 33 * driver for Intel 82553 and 82555 PHYs 34 */ 35 36#include <sys/param.h> 37#include <sys/systm.h> 38#include <sys/kernel.h> 39#include <sys/malloc.h> 40#include <sys/socket.h> 41#include <sys/bus.h> 42 43#include <net/if.h> 44#include <net/if_media.h> 45 46#include <dev/mii/mii.h> 47#include <dev/mii/miivar.h> 48#include <dev/mii/miidevs.h> 49 50#include <dev/mii/inphyreg.h> 51 52#include "miibus_if.h" 53 54static int inphy_probe(device_t dev); 55static int inphy_attach(device_t dev); 56static int inphy_detach(device_t dev); 57 58static device_method_t inphy_methods[] = { 59 /* device interface */ 60 DEVMETHOD(device_probe, inphy_probe), 61 DEVMETHOD(device_attach, inphy_attach), 62 DEVMETHOD(device_detach, inphy_detach), 63 DEVMETHOD(device_shutdown, bus_generic_shutdown), 64 { 0, 0 } 65}; 66 67static devclass_t inphy_devclass; 68 69static driver_t inphy_driver = { 70 "inphy", 71 inphy_methods, 72 sizeof(struct mii_softc) 73}; 74 75DRIVER_MODULE(inphy, miibus, inphy_driver, inphy_devclass, 0, 0); 76 77static int inphy_service(struct mii_softc *, struct mii_data *, int); 78static void inphy_status(struct mii_softc *); 79 80static int 81inphy_probe(device_t dev) 82{ 83 struct mii_attach_args *ma; 84 device_t parent; 85 86 ma = device_get_ivars(dev); 87 parent = device_get_parent(device_get_parent(dev)); 88 89 /* Intel 82553 A/B steppings */ 90 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxINTEL && 91 MII_MODEL(ma->mii_id2) == MII_MODEL_xxINTEL_I82553AB) { 92 device_set_desc(dev, MII_STR_xxINTEL_I82553AB); 93 return (0); 94 } 95 96 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_INTEL) { 97 switch (MII_MODEL(ma->mii_id2)) { 98 case MII_MODEL_INTEL_I82555: 99 device_set_desc(dev, MII_STR_INTEL_I82555); 100 return (0); 101 case MII_MODEL_INTEL_I82553C: 102 device_set_desc(dev, MII_STR_INTEL_I82553C); 103 return (0); 104 case MII_MODEL_INTEL_I82562EM: 105 device_set_desc(dev, MII_STR_INTEL_I82562EM); 106 return (0); 107 case MII_MODEL_INTEL_I82562ET: 108 device_set_desc(dev, MII_STR_INTEL_I82562ET); 109 return (0); 110 } 111 } 112 113 return (ENXIO); 114} 115 116static int 117inphy_attach(device_t dev) 118{ 119 struct mii_softc *sc; 120 struct mii_attach_args *ma; 121 struct mii_data *mii; 122 123 sc = device_get_softc(dev); 124 ma = device_get_ivars(dev); 125 sc->mii_dev = device_get_parent(dev); 126 mii = device_get_softc(sc->mii_dev); 127 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 128 129 sc->mii_inst = mii->mii_instance; 130 sc->mii_phy = ma->mii_phyno; 131 sc->mii_service = inphy_service; 132 sc->mii_pdata = mii; 133 mii->mii_instance++; 134 135#if 0 136 sc->mii_flags |= MIIF_NOISOLATE; 137#endif 138 139 ifmedia_add(&mii->mii_media, 140 IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst), 141 BMCR_LOOP|BMCR_S100, NULL); 142 143 mii_phy_reset(sc); 144 145 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 146 device_printf(dev, " "); 147 mii_phy_add_media(sc); 148 printf("\n"); 149 150 MIIBUS_MEDIAINIT(sc->mii_dev); 151 152 return (0); 153} 154 155static int 156inphy_detach(device_t dev) 157{ 158 struct mii_softc *sc; 159 struct mii_data *mii; 160 161 sc = device_get_softc(dev); 162 mii = device_get_softc(device_get_softc(dev)); 163 mii_phy_auto_stop(sc); 164 sc->mii_dev = NULL; 165 LIST_REMOVE(sc, mii_list); 166 167 return (0); 168} 169 170static int 171inphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 172{ 173 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 174 int reg; 175 176 switch (cmd) { 177 case MII_POLLSTAT: 178 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 179 return (0); 180 break; 181 182 case MII_MEDIACHG: 183 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 184 reg = PHY_READ(sc, MII_BMCR); 185 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 186 return (0); 187 } 188 189 /* 190 * If the interface is not up, don't do anything. 191 */ 192 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 193 break; 194 195 mii_phy_setmedia(sc); 196 break; 197 198 case MII_TICK: 199 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 200 return (0); 201 if (mii_phy_tick(sc) == EJUSTRETURN) 202 return (0); 203 break; 204 } 205 206 /* Update the media status. */ 207 inphy_status(sc); 208 209 /* Callback if something changed. */ 210 mii_phy_update(sc, cmd); 211 return (0); 212} 213 214static void 215inphy_status(struct mii_softc *sc) 216{ 217 struct mii_data *mii = sc->mii_pdata; 218 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 219 int bmsr, bmcr, scr; 220 221 mii->mii_media_status = IFM_AVALID; 222 mii->mii_media_active = IFM_ETHER; 223 224 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 225 if (bmsr & BMSR_LINK) 226 mii->mii_media_status |= IFM_ACTIVE; 227 228 bmcr = PHY_READ(sc, MII_BMCR); 229 if (bmcr & BMCR_ISO) { 230 mii->mii_media_active |= IFM_NONE; 231 mii->mii_media_status = 0; 232 return; 233 } 234 235 if (bmcr & BMCR_LOOP) 236 mii->mii_media_active |= IFM_LOOP; 237 238 if (bmcr & BMCR_AUTOEN) { 239 if ((bmsr & BMSR_ACOMP) == 0) { 240 mii->mii_media_active |= IFM_NONE; 241 return; 242 } 243 244 scr = PHY_READ(sc, MII_INPHY_SCR); 245 if (scr & SCR_S100) 246 mii->mii_media_active |= IFM_100_TX; 247 else 248 mii->mii_media_active |= IFM_10_T; 249 if (scr & SCR_FDX) 250 mii->mii_media_active |= IFM_FDX; 251 } else 252 mii->mii_media_active = ife->ifm_media; 253} 254