fwohci_pci.c revision 332156
1/*- 2 * Copyright (c) 2003 Hidetoshi Shimokawa 3 * Copyright (c) 1998-2002 Katsushi Kobayashi and Hidetoshi Shimokawa 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the acknowledgement as bellow: 16 * 17 * This product includes software developed by K. Kobayashi and H. SHimokawa 18 * 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 26 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 30 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 31 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35#include <sys/cdefs.h> 36__FBSDID("$FreeBSD: stable/11/sys/dev/firewire/fwohci_pci.c 332156 2018-04-06 21:50:09Z kevans $"); 37 38#define BOUNCE_BUFFER_TEST 0 39 40#include <sys/param.h> 41#include <sys/systm.h> 42#include <sys/kernel.h> 43#include <sys/module.h> 44#include <sys/bus.h> 45#include <sys/queue.h> 46#include <machine/bus.h> 47#include <sys/rman.h> 48#include <sys/malloc.h> 49#include <sys/lock.h> 50#include <sys/mutex.h> 51#include <machine/resource.h> 52 53#include <dev/pci/pcivar.h> 54#include <dev/pci/pcireg.h> 55 56#include <dev/firewire/firewire.h> 57#include <dev/firewire/firewirereg.h> 58 59#include <dev/firewire/fwdma.h> 60#include <dev/firewire/fwohcireg.h> 61#include <dev/firewire/fwohcivar.h> 62 63static int fwohci_pci_attach(device_t self); 64static int fwohci_pci_detach(device_t self); 65 66/* 67 * The probe routine. 68 */ 69static int 70fwohci_pci_probe(device_t dev) 71{ 72 uint32_t id; 73 74 id = pci_get_devid(dev); 75 if (id == (FW_VENDORID_NATSEMI | FW_DEVICE_CS4210)) { 76 device_set_desc(dev, "National Semiconductor CS4210"); 77 return BUS_PROBE_DEFAULT; 78 } 79 if (id == (FW_VENDORID_NEC | FW_DEVICE_UPD861)) { 80 device_set_desc(dev, "NEC uPD72861"); 81 return BUS_PROBE_DEFAULT; 82 } 83 if (id == (FW_VENDORID_NEC | FW_DEVICE_UPD871)) { 84 device_set_desc(dev, "NEC uPD72871/2"); 85 return BUS_PROBE_DEFAULT; 86 } 87 if (id == (FW_VENDORID_NEC | FW_DEVICE_UPD72870)) { 88 device_set_desc(dev, "NEC uPD72870"); 89 return BUS_PROBE_DEFAULT; 90 } 91 if (id == (FW_VENDORID_NEC | FW_DEVICE_UPD72873)) { 92 device_set_desc(dev, "NEC uPD72873"); 93 return BUS_PROBE_DEFAULT; 94 } 95 if (id == (FW_VENDORID_NEC | FW_DEVICE_UPD72874)) { 96 device_set_desc(dev, "NEC uPD72874"); 97 return BUS_PROBE_DEFAULT; 98 } 99 if (id == (FW_VENDORID_SIS | FW_DEVICE_7007)) { 100 /* It has no real identifier, using device id. */ 101 device_set_desc(dev, "SiS 7007"); 102 return BUS_PROBE_DEFAULT; 103 } 104 if (id == (FW_VENDORID_TI | FW_DEVICE_TITSB22)) { 105 device_set_desc(dev, "Texas Instruments TSB12LV22"); 106 return BUS_PROBE_DEFAULT; 107 } 108 if (id == (FW_VENDORID_TI | FW_DEVICE_TITSB23)) { 109 device_set_desc(dev, "Texas Instruments TSB12LV23"); 110 return BUS_PROBE_DEFAULT; 111 } 112 if (id == (FW_VENDORID_TI | FW_DEVICE_TITSB26)) { 113 device_set_desc(dev, "Texas Instruments TSB12LV26"); 114 return BUS_PROBE_DEFAULT; 115 } 116 if (id == (FW_VENDORID_TI | FW_DEVICE_TITSB43)) { 117 device_set_desc(dev, "Texas Instruments TSB43AA22"); 118 return BUS_PROBE_DEFAULT; 119 } 120 if (id == (FW_VENDORID_TI | FW_DEVICE_TITSB43A)) { 121 device_set_desc(dev, "Texas Instruments TSB43AB22/A"); 122 return BUS_PROBE_DEFAULT; 123 } 124 if (id == (FW_VENDORID_TI | FW_DEVICE_TITSB43AB21)) { 125 device_set_desc(dev, "Texas Instruments TSB43AB21/A/AI/A-EP"); 126 return BUS_PROBE_DEFAULT; 127 } 128 if (id == (FW_VENDORID_TI | FW_DEVICE_TITSB43AB23)) { 129 device_set_desc(dev, "Texas Instruments TSB43AB23"); 130 return BUS_PROBE_DEFAULT; 131 } 132 if (id == (FW_VENDORID_TI | FW_DEVICE_TITSB82AA2)) { 133 device_set_desc(dev, "Texas Instruments TSB82AA2"); 134 return BUS_PROBE_DEFAULT; 135 } 136 if (id == (FW_VENDORID_TI | FW_DEVICE_TIPCI4450)) { 137 device_set_desc(dev, "Texas Instruments PCI4450"); 138 return BUS_PROBE_DEFAULT; 139 } 140 if (id == (FW_VENDORID_TI | FW_DEVICE_TIPCI4410A)) { 141 device_set_desc(dev, "Texas Instruments PCI4410A"); 142 return BUS_PROBE_DEFAULT; 143 } 144 if (id == (FW_VENDORID_TI | FW_DEVICE_TIPCI4451)) { 145 device_set_desc(dev, "Texas Instruments PCI4451"); 146 return BUS_PROBE_DEFAULT; 147 } 148 if (id == (FW_VENDORID_SONY | FW_DEVICE_CXD1947)) { 149 device_printf(dev, "Sony i.LINK (CXD1947) not supported\n"); 150 return ENXIO; 151 } 152 if (id == (FW_VENDORID_SONY | FW_DEVICE_CXD3222)) { 153 device_set_desc(dev, "Sony i.LINK (CXD3222)"); 154 return BUS_PROBE_DEFAULT; 155 } 156 if (id == (FW_VENDORID_VIA | FW_DEVICE_VT6306)) { 157 device_set_desc(dev, "VIA Fire II (VT6306)"); 158 return BUS_PROBE_DEFAULT; 159 } 160 if (id == (FW_VENDORID_RICOH | FW_DEVICE_R5C551)) { 161 device_set_desc(dev, "Ricoh R5C551"); 162 return BUS_PROBE_DEFAULT; 163 } 164 if (id == (FW_VENDORID_RICOH | FW_DEVICE_R5C552)) { 165 device_set_desc(dev, "Ricoh R5C552"); 166 return BUS_PROBE_DEFAULT; 167 } 168 if (id == (FW_VENDORID_APPLE | FW_DEVICE_PANGEA)) { 169 device_set_desc(dev, "Apple Pangea"); 170 return BUS_PROBE_DEFAULT; 171 } 172 if (id == (FW_VENDORID_APPLE | FW_DEVICE_UNINORTH2)) { 173 device_set_desc(dev, "Apple UniNorth 2"); 174 return BUS_PROBE_DEFAULT; 175 } 176 if (id == (FW_VENDORID_LUCENT | FW_DEVICE_FW322)) { 177 device_set_desc(dev, "Lucent FW322/323"); 178 return BUS_PROBE_DEFAULT; 179 } 180 if (id == (FW_VENDORID_INTEL | FW_DEVICE_82372FB)) { 181 device_set_desc(dev, "Intel 82372FB"); 182 return BUS_PROBE_DEFAULT; 183 } 184 if (id == (FW_VENDORID_ADAPTEC | FW_DEVICE_AIC5800)) { 185 device_set_desc(dev, "Adaptec AHA-894x/AIC-5800"); 186 return BUS_PROBE_DEFAULT; 187 } 188 if (id == (FW_VENDORID_SUN | FW_DEVICE_PCIO2FW)) { 189 device_set_desc(dev, "Sun PCIO-2"); 190 return BUS_PROBE_DEFAULT; 191 } 192 if (pci_get_class(dev) == PCIC_SERIALBUS 193 && pci_get_subclass(dev) == PCIS_SERIALBUS_FW 194 && pci_get_progif(dev) == PCI_INTERFACE_OHCI) { 195 if (bootverbose) 196 device_printf(dev, "vendor=%x, dev=%x\n", 197 pci_get_vendor(dev), pci_get_device(dev)); 198 device_set_desc(dev, "1394 Open Host Controller Interface"); 199 return BUS_PROBE_DEFAULT; 200 } 201 202 return ENXIO; 203} 204 205static int 206fwohci_pci_init(device_t self) 207{ 208 int olatency, latency, ocache_line, cache_line; 209 uint16_t cmd; 210 211 cmd = pci_read_config(self, PCIR_COMMAND, 2); 212 cmd |= PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN; 213#if 1 /* for broken hardware */ 214 cmd &= ~PCIM_CMD_MWRICEN; 215#endif 216 pci_write_config(self, PCIR_COMMAND, cmd, 2); 217 218 /* 219 * Some Sun PCIO-2 FireWire controllers have their intpin register 220 * bogusly set to 0, although it should be 3. Correct that. 221 */ 222 if (pci_get_devid(self) == (FW_VENDORID_SUN | FW_DEVICE_PCIO2FW) && 223 pci_get_intpin(self) == 0) 224 pci_set_intpin(self, 3); 225 226 latency = olatency = pci_read_config(self, PCIR_LATTIMER, 1); 227#define DEF_LATENCY 0x20 228 if (olatency < DEF_LATENCY) { 229 latency = DEF_LATENCY; 230 pci_write_config(self, PCIR_LATTIMER, latency, 1); 231 } 232 233 cache_line = ocache_line = pci_read_config(self, PCIR_CACHELNSZ, 1); 234#define DEF_CACHE_LINE 8 235 if (ocache_line < DEF_CACHE_LINE) { 236 cache_line = DEF_CACHE_LINE; 237 pci_write_config(self, PCIR_CACHELNSZ, cache_line, 1); 238 } 239 240 if (firewire_debug) { 241 device_printf(self, "latency timer %d -> %d.\n", 242 olatency, latency); 243 device_printf(self, "cache size %d -> %d.\n", 244 ocache_line, cache_line); 245 } 246 247 return 0; 248} 249 250static int 251fwohci_pci_attach(device_t self) 252{ 253 fwohci_softc_t *sc = device_get_softc(self); 254 int err; 255 int rid; 256 257#if 0 258 if (bootverbose) 259 firewire_debug = bootverbose; 260#endif 261 262 mtx_init(FW_GMTX(&sc->fc), "firewire", NULL, MTX_DEF); 263 fwohci_pci_init(self); 264 265 rid = PCI_CBMEM; 266 sc->bsr = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE); 267 if (!sc->bsr) { 268 device_printf(self, "Could not map memory\n"); 269 return ENXIO; 270 } 271 272 sc->bst = rman_get_bustag(sc->bsr); 273 sc->bsh = rman_get_bushandle(sc->bsr); 274 275 rid = 0; 276 sc->irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 277 RF_SHAREABLE | RF_ACTIVE); 278 if (sc->irq_res == NULL) { 279 device_printf(self, "Could not allocate irq\n"); 280 fwohci_pci_detach(self); 281 return ENXIO; 282 } 283 284 err = bus_setup_intr(self, sc->irq_res, 285 INTR_TYPE_NET | INTR_MPSAFE, 286 NULL, (driver_intr_t *) fwohci_intr, 287 sc, &sc->ih); 288 289 if (err) { 290 device_printf(self, "Could not setup irq, %d\n", err); 291 fwohci_pci_detach(self); 292 return ENXIO; 293 } 294 295 err = bus_dma_tag_create( 296 /*parent*/bus_get_dma_tag(self), 297 /*alignment*/1, 298 /*boundary*/0, 299#if BOUNCE_BUFFER_TEST 300 /*lowaddr*/BUS_SPACE_MAXADDR_24BIT, 301#else 302 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 303#endif 304 /*highaddr*/BUS_SPACE_MAXADDR, 305 /*filter*/NULL, /*filterarg*/NULL, 306 /*maxsize*/0x100000, 307 /*nsegments*/0x20, 308 /*maxsegsz*/0x8000, 309 /*flags*/BUS_DMA_ALLOCNOW, 310 /*lockfunc*/busdma_lock_mutex, 311 /*lockarg*/FW_GMTX(&sc->fc), 312 &sc->fc.dmat); 313 if (err != 0) { 314 device_printf(self, "fwohci_pci_attach: Could not allocate DMA " 315 "tag - error %d\n", err); 316 fwohci_pci_detach(self); 317 return (ENOMEM); 318 } 319 320 err = fwohci_init(sc, self); 321 322 if (err != 0) { 323 device_printf(self, "fwohci_init failed with err=%d\n", err); 324 fwohci_pci_detach(self); 325 return EIO; 326 } 327 328 /* probe and attach a child device(firewire) */ 329 bus_generic_probe(self); 330 bus_generic_attach(self); 331 332 return 0; 333} 334 335static int 336fwohci_pci_detach(device_t self) 337{ 338 fwohci_softc_t *sc = device_get_softc(self); 339 int s; 340 341 s = splfw(); 342 343 if (sc->bsr) 344 fwohci_stop(sc, self); 345 346 bus_generic_detach(self); 347 348 if (sc->fc.bdev) { 349 device_delete_child(self, sc->fc.bdev); 350 sc->fc.bdev = NULL; 351 } 352 353 /* disable interrupts that might have been switched on */ 354 if (sc->bst && sc->bsh) 355 bus_space_write_4(sc->bst, sc->bsh, 356 FWOHCI_INTMASKCLR, OHCI_INT_EN); 357 358 if (sc->irq_res) { 359 int err; 360 if (sc->ih) { 361 err = bus_teardown_intr(self, sc->irq_res, sc->ih); 362 if (err) 363 device_printf(self, 364 "Could not tear down irq, %d\n", err); 365 sc->ih = NULL; 366 } 367 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res); 368 sc->irq_res = NULL; 369 } 370 371 if (sc->bsr) { 372 bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM, sc->bsr); 373 sc->bsr = NULL; 374 sc->bst = 0; 375 sc->bsh = 0; 376 } 377 378 fwohci_detach(sc, self); 379 mtx_destroy(FW_GMTX(&sc->fc)); 380 splx(s); 381 382 return 0; 383} 384 385static int 386fwohci_pci_suspend(device_t dev) 387{ 388 fwohci_softc_t *sc = device_get_softc(dev); 389 int err; 390 391 device_printf(dev, "fwohci_pci_suspend\n"); 392 err = bus_generic_suspend(dev); 393 if (err) 394 return err; 395 fwohci_stop(sc, dev); 396 return 0; 397} 398 399static int 400fwohci_pci_resume(device_t dev) 401{ 402 fwohci_softc_t *sc = device_get_softc(dev); 403 404 fwohci_pci_init(dev); 405 fwohci_resume(sc, dev); 406 return 0; 407} 408 409static int 410fwohci_pci_shutdown(device_t dev) 411{ 412 fwohci_softc_t *sc = device_get_softc(dev); 413 414 bus_generic_shutdown(dev); 415 fwohci_stop(sc, dev); 416 return 0; 417} 418 419static device_t 420fwohci_pci_add_child(device_t dev, u_int order, const char *name, int unit) 421{ 422 struct fwohci_softc *sc; 423 device_t child; 424 int err = 0; 425 426 sc = (struct fwohci_softc *)device_get_softc(dev); 427 child = device_add_child(dev, name, unit); 428 if (child == NULL) 429 return (child); 430 431 sc->fc.bdev = child; 432 device_set_ivars(child, &sc->fc); 433 434 err = device_probe_and_attach(child); 435 if (err) { 436 device_printf(dev, "probe_and_attach failed with err=%d\n", 437 err); 438 fwohci_pci_detach(dev); 439 device_delete_child(dev, child); 440 return NULL; 441 } 442 443 /* XXX 444 * Clear the bus reset event flag to start transactions even when 445 * interrupt is disabled during the boot process. 446 */ 447 if (cold) { 448 int s; 449 DELAY(250); /* 2 cycles */ 450 s = splfw(); 451 fwohci_poll(&sc->fc, 0, -1); 452 splx(s); 453 } 454 455 return (child); 456} 457 458static device_method_t fwohci_methods[] = { 459 /* Device interface */ 460 DEVMETHOD(device_probe, fwohci_pci_probe), 461 DEVMETHOD(device_attach, fwohci_pci_attach), 462 DEVMETHOD(device_detach, fwohci_pci_detach), 463 DEVMETHOD(device_suspend, fwohci_pci_suspend), 464 DEVMETHOD(device_resume, fwohci_pci_resume), 465 DEVMETHOD(device_shutdown, fwohci_pci_shutdown), 466 467 /* Bus interface */ 468 DEVMETHOD(bus_add_child, fwohci_pci_add_child), 469 470 DEVMETHOD_END 471}; 472 473static driver_t fwohci_driver = { 474 "fwohci", 475 fwohci_methods, 476 sizeof(fwohci_softc_t), 477}; 478 479static devclass_t fwohci_devclass; 480 481#ifdef FWOHCI_MODULE 482MODULE_DEPEND(fwohci, firewire, 1, 1, 1); 483#endif 484DRIVER_MODULE(fwohci, pci, fwohci_driver, fwohci_devclass, 0, 0); 485