vga.c revision 65176
1/*- 2 * Copyright (c) 1999 Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp> 3 * Copyright (c) 1992-1998 S�ren Schmidt 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer as 11 * the first lines of this file unmodified. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * $FreeBSD: head/sys/dev/fb/vga.c 65176 2000-08-28 21:48:13Z dfr $ 30 */ 31 32#include "opt_vga.h" 33#include "opt_fb.h" 34#include "opt_syscons.h" /* should be removed in the future, XXX */ 35 36#include <sys/param.h> 37#include <sys/systm.h> 38#include <sys/kernel.h> 39#include <sys/conf.h> 40#include <sys/proc.h> 41#include <sys/fcntl.h> 42#include <sys/malloc.h> 43#include <sys/fbio.h> 44 45#include <vm/vm.h> 46#include <vm/vm_param.h> 47#include <vm/pmap.h> 48 49#include <machine/md_var.h> 50#include <machine/pc/bios.h> 51#include <machine/bus.h> 52 53#include <dev/fb/fbreg.h> 54#include <dev/fb/vgareg.h> 55 56#include <isa/isareg.h> 57 58#ifndef VGA_DEBUG 59#define VGA_DEBUG 0 60#endif 61 62int 63vga_probe_unit(int unit, video_adapter_t *buf, int flags) 64{ 65 video_adapter_t *adp; 66 video_switch_t *sw; 67 int error; 68 69 sw = vid_get_switch(VGA_DRIVER_NAME); 70 if (sw == NULL) 71 return 0; 72 error = (*sw->probe)(unit, &adp, NULL, flags); 73 if (error) 74 return error; 75 bcopy(adp, buf, sizeof(*buf)); 76 return 0; 77} 78 79int 80vga_attach_unit(int unit, vga_softc_t *sc, int flags) 81{ 82 video_switch_t *sw; 83 int error; 84 85 sw = vid_get_switch(VGA_DRIVER_NAME); 86 if (sw == NULL) 87 return ENXIO; 88 89 error = (*sw->probe)(unit, &sc->adp, NULL, flags); 90 if (error) 91 return error; 92 return (*sw->init)(unit, sc->adp, flags); 93} 94 95/* cdev driver functions */ 96 97#ifdef FB_INSTALL_CDEV 98 99int 100vga_open(dev_t dev, vga_softc_t *sc, int flag, int mode, struct proc *p) 101{ 102 if (sc == NULL) 103 return ENXIO; 104 if (mode & (O_CREAT | O_APPEND | O_TRUNC)) 105 return ENODEV; 106 107 return genfbopen(&sc->gensc, sc->adp, flag, mode, p); 108} 109 110int 111vga_close(dev_t dev, vga_softc_t *sc, int flag, int mode, struct proc *p) 112{ 113 return genfbclose(&sc->gensc, sc->adp, flag, mode, p); 114} 115 116int 117vga_read(dev_t dev, vga_softc_t *sc, struct uio *uio, int flag) 118{ 119 return genfbread(&sc->gensc, sc->adp, uio, flag); 120} 121 122int 123vga_write(dev_t dev, vga_softc_t *sc, struct uio *uio, int flag) 124{ 125 return genfbread(&sc->gensc, sc->adp, uio, flag); 126} 127 128int 129vga_ioctl(dev_t dev, vga_softc_t *sc, u_long cmd, caddr_t arg, int flag, 130 struct proc *p) 131{ 132 return genfbioctl(&sc->gensc, sc->adp, cmd, arg, flag, p); 133} 134 135int 136vga_mmap(dev_t dev, vga_softc_t *sc, vm_offset_t offset, int prot) 137{ 138 return genfbmmap(&sc->gensc, sc->adp, offset, prot); 139} 140 141#endif /* FB_INSTALL_CDEV */ 142 143/* LOW-LEVEL */ 144 145#include <machine/clock.h> 146#include <machine/pc/vesa.h> 147 148#define probe_done(adp) ((adp)->va_flags & V_ADP_PROBED) 149#define init_done(adp) ((adp)->va_flags & V_ADP_INITIALIZED) 150#define config_done(adp) ((adp)->va_flags & V_ADP_REGISTERED) 151 152/* for compatibility with old kernel options */ 153#ifdef SC_ALT_SEQACCESS 154#undef SC_ALT_SEQACCESS 155#undef VGA_ALT_SEQACCESS 156#define VGA_ALT_SEQACCESS 1 157#endif 158 159#ifdef SLOW_VGA 160#undef SLOW_VGA 161#undef VGA_SLOW_IOACCESS 162#define VGA_SLOW_IOACCESS 1 163#endif 164 165/* architecture dependent option */ 166#ifdef __alpha__ 167#define VGA_NO_BIOS 1 168#endif 169 170/* this should really be in `rtc.h' */ 171#define RTC_EQUIPMENT 0x14 172 173/* various sizes */ 174#define V_MODE_MAP_SIZE (M_VGA_CG320 + 1) 175#define V_MODE_PARAM_SIZE 64 176 177/* video adapter state buffer */ 178struct adp_state { 179 int sig; 180#define V_STATE_SIG 0x736f6962 181 u_char regs[V_MODE_PARAM_SIZE]; 182}; 183typedef struct adp_state adp_state_t; 184 185/* video adapter information */ 186#define DCC_MONO 0 187#define DCC_CGA40 1 188#define DCC_CGA80 2 189#define DCC_EGAMONO 3 190#define DCC_EGA40 4 191#define DCC_EGA80 5 192 193/* 194 * NOTE: `va_window' should have a virtual address, but is initialized 195 * with a physical address in the following table, as verify_adapter() 196 * will perform address conversion at run-time. 197 */ 198static video_adapter_t adapter_init_value[] = { 199 /* DCC_MONO */ 200 { 0, KD_MONO, "mda", 0, 0, 0, IO_MDA, IO_MDASIZE, MONO_CRTC, 201 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 202 0, 0, 0, 0, 7, 0, }, 203 /* DCC_CGA40 */ 204 { 0, KD_CGA, "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC, 205 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 206 0, 0, 0, 0, 3, 0, }, 207 /* DCC_CGA80 */ 208 { 0, KD_CGA, "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC, 209 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 210 0, 0, 0, 0, 3, 0, }, 211 /* DCC_EGAMONO */ 212 { 0, KD_EGA, "ega", 0, 0, 0, IO_MDA, 48, MONO_CRTC, 213 EGA_BUF_BASE, EGA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 214 0, 0, 0, 0, 7, 0, }, 215 /* DCC_EGA40 */ 216 { 0, KD_EGA, "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48, COLOR_CRTC, 217 EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 218 0, 0, 0, 0, 3, 0, }, 219 /* DCC_EGA80 */ 220 { 0, KD_EGA, "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48, COLOR_CRTC, 221 EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 222 0, 0, 0, 0, 3, 0, }, 223}; 224 225static video_adapter_t biosadapter[2]; 226static int biosadapters = 0; 227 228/* video driver declarations */ 229static int vga_configure(int flags); 230 int (*vga_sub_configure)(int flags); 231#if 0 232static int vga_nop(void); 233#endif 234static int vga_error(void); 235static vi_probe_t vga_probe; 236static vi_init_t vga_init; 237static vi_get_info_t vga_get_info; 238static vi_query_mode_t vga_query_mode; 239static vi_set_mode_t vga_set_mode; 240static vi_save_font_t vga_save_font; 241static vi_load_font_t vga_load_font; 242static vi_show_font_t vga_show_font; 243static vi_save_palette_t vga_save_palette; 244static vi_load_palette_t vga_load_palette; 245static vi_set_border_t vga_set_border; 246static vi_save_state_t vga_save_state; 247static vi_load_state_t vga_load_state; 248static vi_set_win_org_t vga_set_origin; 249static vi_read_hw_cursor_t vga_read_hw_cursor; 250static vi_set_hw_cursor_t vga_set_hw_cursor; 251static vi_set_hw_cursor_shape_t vga_set_hw_cursor_shape; 252static vi_blank_display_t vga_blank_display; 253static vi_mmap_t vga_mmap_buf; 254static vi_ioctl_t vga_dev_ioctl; 255#ifndef VGA_NO_MODE_CHANGE 256static vi_clear_t vga_clear; 257static vi_fill_rect_t vga_fill_rect; 258static vi_bitblt_t vga_bitblt; 259#else /* VGA_NO_MODE_CHANGE */ 260#define vga_clear (vi_clear_t *)vga_error 261#define vga_fill_rect (vi_fill_rect_t *)vga_error 262#define vga_bitblt (vi_bitblt_t *)vga_error 263#endif 264static vi_diag_t vga_diag; 265 266static video_switch_t vgavidsw = { 267 vga_probe, 268 vga_init, 269 vga_get_info, 270 vga_query_mode, 271 vga_set_mode, 272 vga_save_font, 273 vga_load_font, 274 vga_show_font, 275 vga_save_palette, 276 vga_load_palette, 277 vga_set_border, 278 vga_save_state, 279 vga_load_state, 280 vga_set_origin, 281 vga_read_hw_cursor, 282 vga_set_hw_cursor, 283 vga_set_hw_cursor_shape, 284 vga_blank_display, 285 vga_mmap_buf, 286 vga_dev_ioctl, 287 vga_clear, 288 vga_fill_rect, 289 vga_bitblt, 290 vga_error, 291 vga_error, 292 vga_diag, 293}; 294 295VIDEO_DRIVER(mda, vgavidsw, NULL); 296VIDEO_DRIVER(cga, vgavidsw, NULL); 297VIDEO_DRIVER(ega, vgavidsw, NULL); 298VIDEO_DRIVER(vga, vgavidsw, vga_configure); 299 300/* VGA BIOS standard video modes */ 301#define EOT (-1) 302#define NA (-2) 303 304static video_info_t bios_vmode[] = { 305 /* CGA */ 306 { M_B40x25, V_INFO_COLOR, 40, 25, 8, 8, 2, 1, 307 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 308 { M_C40x25, V_INFO_COLOR, 40, 25, 8, 8, 4, 1, 309 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 310 { M_B80x25, V_INFO_COLOR, 80, 25, 8, 8, 2, 1, 311 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 312 { M_C80x25, V_INFO_COLOR, 80, 25, 8, 8, 4, 1, 313 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 314 /* EGA */ 315 { M_ENH_B40x25, V_INFO_COLOR, 40, 25, 8, 14, 2, 1, 316 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 317 { M_ENH_C40x25, V_INFO_COLOR, 40, 25, 8, 14, 4, 1, 318 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 319 { M_ENH_B80x25, V_INFO_COLOR, 80, 25, 8, 14, 2, 1, 320 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 321 { M_ENH_C80x25, V_INFO_COLOR, 80, 25, 8, 14, 4, 1, 322 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 323 /* VGA */ 324 { M_VGA_C40x25, V_INFO_COLOR, 40, 25, 8, 16, 4, 1, 325 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 326 { M_VGA_M80x25, 0, 80, 25, 8, 16, 2, 1, 327 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 328 { M_VGA_C80x25, V_INFO_COLOR, 80, 25, 8, 16, 4, 1, 329 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 330 /* MDA */ 331 { M_EGAMONO80x25, 0, 80, 25, 8, 14, 2, 1, 332 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 333 /* EGA */ 334 { M_ENH_B80x43, 0, 80, 43, 8, 8, 2, 1, 335 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 336 { M_ENH_C80x43, V_INFO_COLOR, 80, 43, 8, 8, 4, 1, 337 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 338 /* VGA */ 339 { M_VGA_M80x30, 0, 80, 30, 8, 16, 2, 1, 340 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 341 { M_VGA_C80x30, V_INFO_COLOR, 80, 30, 8, 16, 4, 1, 342 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 343 { M_VGA_M80x50, 0, 80, 50, 8, 8, 2, 1, 344 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 345 { M_VGA_C80x50, V_INFO_COLOR, 80, 50, 8, 8, 4, 1, 346 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 347 { M_VGA_M80x60, 0, 80, 60, 8, 8, 2, 1, 348 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 349 { M_VGA_C80x60, V_INFO_COLOR, 80, 60, 8, 8, 4, 1, 350 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 351 352#ifndef VGA_NO_MODE_CHANGE 353 354#ifdef VGA_WIDTH90 355 { M_VGA_M90x25, 0, 90, 25, 8, 16, 2, 1, 356 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 357 { M_VGA_C90x25, V_INFO_COLOR, 90, 25, 8, 16, 4, 1, 358 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 359 { M_VGA_M90x30, 0, 90, 30, 8, 16, 2, 1, 360 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 361 { M_VGA_C90x30, V_INFO_COLOR, 90, 30, 8, 16, 4, 1, 362 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 363 { M_VGA_M90x43, 0, 90, 43, 8, 8, 2, 1, 364 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 365 { M_VGA_C90x43, V_INFO_COLOR, 90, 43, 8, 8, 4, 1, 366 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 367 { M_VGA_M90x50, 0, 90, 50, 8, 8, 2, 1, 368 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 369 { M_VGA_C90x50, V_INFO_COLOR, 90, 50, 8, 8, 4, 1, 370 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 371 { M_VGA_M90x60, 0, 90, 60, 8, 8, 2, 1, 372 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 373 { M_VGA_C90x60, V_INFO_COLOR, 90, 60, 8, 8, 4, 1, 374 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 375#endif /* VGA_WIDTH90 */ 376 377 /* CGA */ 378 { M_BG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 2, 1, 379 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 380 { M_CG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 2, 1, 381 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 382 { M_BG640, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8, 8, 1, 1, 383 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 384 /* EGA */ 385 { M_CG320_D, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 4, 4, 386 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 387 V_INFO_MM_PLANAR }, 388 { M_CG640_E, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8, 8, 4, 4, 389 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 390 V_INFO_MM_PLANAR }, 391 { M_EGAMONOAPA, V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 392 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, 64*1024, 0, 0 , 393 V_INFO_MM_PLANAR }, 394 { M_ENHMONOAPA2,V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 395 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 396 V_INFO_MM_PLANAR }, 397 { M_CG640x350, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 2, 2, 398 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 399 V_INFO_MM_PLANAR }, 400 { M_ENH_CG640, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 401 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 402 V_INFO_MM_PLANAR }, 403 /* VGA */ 404 { M_BG640x480, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4, 405 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 406 V_INFO_MM_PLANAR }, 407 { M_CG640x480, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4, 408 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 409 V_INFO_MM_PLANAR }, 410 { M_VGA_CG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 8, 1, 411 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 412 V_INFO_MM_PACKED, 1 }, 413 { M_VGA_MODEX, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 240, 8, 8, 8, 4, 414 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 415 V_INFO_MM_VGAX, 1 }, 416#endif /* VGA_NO_MODE_CHANGE */ 417 418 { EOT }, 419}; 420 421static int vga_init_done = FALSE; 422#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 423static u_char *video_mode_ptr = NULL; /* EGA/VGA */ 424static u_char *video_mode_ptr2 = NULL; /* CGA/MDA */ 425#endif 426static u_char *mode_map[V_MODE_MAP_SIZE]; 427static adp_state_t adpstate; 428static adp_state_t adpstate2; 429static int rows_offset = 1; 430 431/* local macros and functions */ 432#define BIOS_SADDRTOLADDR(p) ((((p) & 0xffff0000) >> 12) + ((p) & 0x0000ffff)) 433 434#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 435static void map_mode_table(u_char *map[], u_char *table, int max); 436#endif 437static void clear_mode_map(video_adapter_t *adp, u_char *map[], int max, 438 int color); 439#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 440static int map_mode_num(int mode); 441#endif 442static int map_gen_mode_num(int type, int color, int mode); 443static int map_bios_mode_num(int type, int color, int bios_mode); 444static u_char *get_mode_param(int mode); 445#ifndef VGA_NO_BIOS 446static void fill_adapter_param(int code, video_adapter_t *adp); 447#endif 448static int verify_adapter(video_adapter_t *adp); 449static void update_adapter_info(video_adapter_t *adp, video_info_t *info); 450#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 451#define COMP_IDENTICAL 0 452#define COMP_SIMILAR 1 453#define COMP_DIFFERENT 2 454static int comp_adpregs(u_char *buf1, u_char *buf2); 455#endif 456static int probe_adapters(void); 457static int set_line_length(video_adapter_t *adp, int pixel); 458static int set_display_start(video_adapter_t *adp, int x, int y); 459static void filll_io(int val, vm_offset_t d, size_t size); 460 461#ifndef VGA_NO_MODE_CHANGE 462#ifdef VGA_WIDTH90 463static void set_width90(adp_state_t *params); 464#endif 465#endif /* !VGA_NO_MODE_CHANGE */ 466 467#ifndef VGA_NO_FONT_LOADING 468#define PARAM_BUFSIZE 6 469static void set_font_mode(video_adapter_t *adp, u_char *buf); 470static void set_normal_mode(video_adapter_t *adp, u_char *buf); 471#endif 472 473#ifndef VGA_NO_MODE_CHANGE 474static void planar_fill(video_adapter_t *adp, int val); 475static void packed_fill(video_adapter_t *adp, int val); 476static void direct_fill(video_adapter_t *adp, int val); 477#ifdef notyet 478static void planar_fill_rect(video_adapter_t *adp, int val, int x, int y, 479 int cx, int cy); 480static void packed_fill_rect(video_adapter_t *adp, int val, int x, int y, 481 int cx, int cy); 482static void direct_fill_rect16(video_adapter_t *adp, int val, int x, int y, 483 int cx, int cy); 484static void direct_fill_rect24(video_adapter_t *adp, int val, int x, int y, 485 int cx, int cy); 486static void direct_fill_rect32(video_adapter_t *adp, int val, int x, int y, 487 int cx, int cy); 488#endif /* notyet */ 489#endif /* !VGA_NO_MODE_CHANGE */ 490 491static void dump_buffer(u_char *buf, size_t len); 492 493#define ISMAPPED(pa, width) \ 494 (((pa) <= (u_long)0x1000 - (width)) \ 495 || ((pa) >= ISA_HOLE_START && (pa) <= 0x100000 - (width))) 496 497#define prologue(adp, flag, err) \ 498 if (!vga_init_done || !((adp)->va_flags & (flag))) \ 499 return (err) 500 501/* a backdoor for the console driver */ 502static int 503vga_configure(int flags) 504{ 505 int i; 506 507 probe_adapters(); 508 for (i = 0; i < biosadapters; ++i) { 509 if (!probe_done(&biosadapter[i])) 510 continue; 511 biosadapter[i].va_flags |= V_ADP_INITIALIZED; 512 if (!config_done(&biosadapter[i])) { 513 if (vid_register(&biosadapter[i]) < 0) 514 continue; 515 biosadapter[i].va_flags |= V_ADP_REGISTERED; 516 } 517 } 518 if (vga_sub_configure != NULL) 519 (*vga_sub_configure)(flags); 520 521 return biosadapters; 522} 523 524/* local subroutines */ 525 526#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 527/* construct the mode parameter map */ 528static void 529map_mode_table(u_char *map[], u_char *table, int max) 530{ 531 int i; 532 533 for(i = 0; i < max; ++i) 534 map[i] = table + i*V_MODE_PARAM_SIZE; 535 for(; i < V_MODE_MAP_SIZE; ++i) 536 map[i] = NULL; 537} 538#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 539 540static void 541clear_mode_map(video_adapter_t *adp, u_char *map[], int max, int color) 542{ 543 video_info_t info; 544 int i; 545 546 /* 547 * NOTE: we don't touch `bios_vmode[]' because it is shared 548 * by all adapters. 549 */ 550 for(i = 0; i < max; ++i) { 551 if (vga_get_info(adp, i, &info)) 552 continue; 553 if ((info.vi_flags & V_INFO_COLOR) != color) 554 map[i] = NULL; 555 } 556} 557 558#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 559/* map the non-standard video mode to a known mode number */ 560static int 561map_mode_num(int mode) 562{ 563 static struct { 564 int from; 565 int to; 566 } mode_map[] = { 567 { M_ENH_B80x43, M_ENH_B80x25 }, 568 { M_ENH_C80x43, M_ENH_C80x25 }, 569 { M_VGA_M80x30, M_VGA_M80x25 }, 570 { M_VGA_C80x30, M_VGA_C80x25 }, 571 { M_VGA_M80x50, M_VGA_M80x25 }, 572 { M_VGA_C80x50, M_VGA_C80x25 }, 573 { M_VGA_M80x60, M_VGA_M80x25 }, 574 { M_VGA_C80x60, M_VGA_C80x25 }, 575#ifdef VGA_WIDTH90 576 { M_VGA_M90x25, M_VGA_M80x25 }, 577 { M_VGA_C90x25, M_VGA_C80x25 }, 578 { M_VGA_M90x30, M_VGA_M80x25 }, 579 { M_VGA_C90x30, M_VGA_C80x25 }, 580 { M_VGA_M90x43, M_ENH_B80x25 }, 581 { M_VGA_C90x43, M_ENH_C80x25 }, 582 { M_VGA_M90x50, M_VGA_M80x25 }, 583 { M_VGA_C90x50, M_VGA_C80x25 }, 584 { M_VGA_M90x60, M_VGA_M80x25 }, 585 { M_VGA_C90x60, M_VGA_C80x25 }, 586#endif 587 { M_VGA_MODEX, M_VGA_CG320 }, 588 }; 589 int i; 590 591 for (i = 0; i < sizeof(mode_map)/sizeof(mode_map[0]); ++i) { 592 if (mode_map[i].from == mode) 593 return mode_map[i].to; 594 } 595 return mode; 596} 597#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 598 599/* map a generic video mode to a known mode number */ 600static int 601map_gen_mode_num(int type, int color, int mode) 602{ 603 static struct { 604 int from; 605 int to_color; 606 int to_mono; 607 } mode_map[] = { 608 { M_TEXT_80x30, M_VGA_C80x30, M_VGA_M80x30, }, 609 { M_TEXT_80x43, M_ENH_C80x43, M_ENH_B80x43, }, 610 { M_TEXT_80x50, M_VGA_C80x50, M_VGA_M80x50, }, 611 { M_TEXT_80x60, M_VGA_C80x60, M_VGA_M80x60, }, 612 }; 613 int i; 614 615 if (mode == M_TEXT_80x25) { 616 switch (type) { 617 618 case KD_VGA: 619 if (color) 620 return M_VGA_C80x25; 621 else 622 return M_VGA_M80x25; 623 break; 624 625 case KD_EGA: 626 if (color) 627 return M_ENH_C80x25; 628 else 629 return M_EGAMONO80x25; 630 break; 631 632 case KD_CGA: 633 return M_C80x25; 634 635 case KD_MONO: 636 case KD_HERCULES: 637 return M_EGAMONO80x25; /* XXX: this name is confusing */ 638 639 default: 640 return -1; 641 } 642 } 643 644 for (i = 0; i < sizeof(mode_map)/sizeof(mode_map[0]); ++i) { 645 if (mode_map[i].from == mode) 646 return ((color) ? mode_map[i].to_color : mode_map[i].to_mono); 647 } 648 return mode; 649} 650 651/* turn the BIOS video number into our video mode number */ 652static int 653map_bios_mode_num(int type, int color, int bios_mode) 654{ 655 static int cga_modes[7] = { 656 M_B40x25, M_C40x25, /* 0, 1 */ 657 M_B80x25, M_C80x25, /* 2, 3 */ 658 M_BG320, M_CG320, 659 M_BG640, 660 }; 661 static int ega_modes[17] = { 662 M_ENH_B40x25, M_ENH_C40x25, /* 0, 1 */ 663 M_ENH_B80x25, M_ENH_C80x25, /* 2, 3 */ 664 M_BG320, M_CG320, 665 M_BG640, 666 M_EGAMONO80x25, /* 7 */ 667 8, 9, 10, 11, 12, 668 M_CG320_D, 669 M_CG640_E, 670 M_ENHMONOAPA2, /* XXX: video momery > 64K */ 671 M_ENH_CG640, /* XXX: video momery > 64K */ 672 }; 673 static int vga_modes[20] = { 674 M_VGA_C40x25, M_VGA_C40x25, /* 0, 1 */ 675 M_VGA_C80x25, M_VGA_C80x25, /* 2, 3 */ 676 M_BG320, M_CG320, 677 M_BG640, 678 M_VGA_M80x25, /* 7 */ 679 8, 9, 10, 11, 12, 680 M_CG320_D, 681 M_CG640_E, 682 M_ENHMONOAPA2, 683 M_ENH_CG640, 684 M_BG640x480, M_CG640x480, 685 M_VGA_CG320, 686 }; 687 688 switch (type) { 689 690 case KD_VGA: 691 if (bios_mode < sizeof(vga_modes)/sizeof(vga_modes[0])) 692 return vga_modes[bios_mode]; 693 else if (color) 694 return M_VGA_C80x25; 695 else 696 return M_VGA_M80x25; 697 break; 698 699 case KD_EGA: 700 if (bios_mode < sizeof(ega_modes)/sizeof(ega_modes[0])) 701 return ega_modes[bios_mode]; 702 else if (color) 703 return M_ENH_C80x25; 704 else 705 return M_EGAMONO80x25; 706 break; 707 708 case KD_CGA: 709 if (bios_mode < sizeof(cga_modes)/sizeof(cga_modes[0])) 710 return cga_modes[bios_mode]; 711 else 712 return M_C80x25; 713 break; 714 715 case KD_MONO: 716 case KD_HERCULES: 717 return M_EGAMONO80x25; /* XXX: this name is confusing */ 718 719 default: 720 break; 721 } 722 return -1; 723} 724 725/* look up a parameter table entry */ 726static u_char 727*get_mode_param(int mode) 728{ 729#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 730 if (mode >= V_MODE_MAP_SIZE) 731 mode = map_mode_num(mode); 732#endif 733 if ((mode >= 0) && (mode < V_MODE_MAP_SIZE)) 734 return mode_map[mode]; 735 else 736 return NULL; 737} 738 739#ifndef VGA_NO_BIOS 740static void 741fill_adapter_param(int code, video_adapter_t *adp) 742{ 743 static struct { 744 int primary; 745 int secondary; 746 } dcc[] = { 747 { DCC_MONO, DCC_EGA40 /* CGA monitor */ }, 748 { DCC_MONO, DCC_EGA80 /* CGA monitor */ }, 749 { DCC_MONO, DCC_EGA80 }, 750 { DCC_MONO, DCC_EGA80 }, 751 { DCC_CGA40, DCC_EGAMONO }, 752 { DCC_CGA80, DCC_EGAMONO }, 753 { DCC_EGA40 /* CGA monitor */, DCC_MONO}, 754 { DCC_EGA80 /* CGA monitor */, DCC_MONO}, 755 { DCC_EGA80, DCC_MONO }, 756 { DCC_EGA80, DCC_MONO }, 757 { DCC_EGAMONO, DCC_CGA40 }, 758 { DCC_EGAMONO, DCC_CGA80 }, 759 }; 760 761 if ((code < 0) || (code >= sizeof(dcc)/sizeof(dcc[0]))) { 762 adp[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO]; 763 adp[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80]; 764 } else { 765 adp[V_ADP_PRIMARY] = adapter_init_value[dcc[code].primary]; 766 adp[V_ADP_SECONDARY] = adapter_init_value[dcc[code].secondary]; 767 } 768} 769#endif /* VGA_NO_BIOS */ 770 771static int 772verify_adapter(video_adapter_t *adp) 773{ 774 vm_offset_t buf; 775 u_int16_t v; 776#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 777 u_int32_t p; 778#endif 779 780 buf = BIOS_PADDRTOVADDR(adp->va_window); 781 v = readw(buf); 782 writew(buf, 0xA55A); 783 if (readw(buf) != 0xA55A) 784 return ENXIO; 785 writew(buf, v); 786 787 switch (adp->va_type) { 788 789 case KD_EGA: 790 outb(adp->va_crtc_addr, 7); 791 if (inb(adp->va_crtc_addr) == 7) { 792 adp->va_type = KD_VGA; 793 adp->va_name = "vga"; 794 adp->va_flags |= V_ADP_STATESAVE | V_ADP_PALETTE; 795 } 796 adp->va_flags |= V_ADP_STATELOAD | V_ADP_BORDER; 797 /* the color adapter may be in the 40x25 mode... XXX */ 798 799#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 800 /* get the BIOS video mode pointer */ 801 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8); 802 p = BIOS_SADDRTOLADDR(p); 803 if (ISMAPPED(p, sizeof(u_int32_t))) { 804 p = *(u_int32_t *)BIOS_PADDRTOVADDR(p); 805 p = BIOS_SADDRTOLADDR(p); 806 if (ISMAPPED(p, V_MODE_PARAM_SIZE)) 807 video_mode_ptr = (u_char *)BIOS_PADDRTOVADDR(p); 808 } 809#endif 810 break; 811 812 case KD_CGA: 813 adp->va_flags |= V_ADP_COLOR | V_ADP_BORDER; 814 /* may be in the 40x25 mode... XXX */ 815#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 816 /* get the BIOS video mode pointer */ 817 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4); 818 p = BIOS_SADDRTOLADDR(p); 819 video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p); 820#endif 821 break; 822 823 case KD_MONO: 824#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 825 /* get the BIOS video mode pointer */ 826 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4); 827 p = BIOS_SADDRTOLADDR(p); 828 video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p); 829#endif 830 break; 831 } 832 833 return 0; 834} 835 836static void 837update_adapter_info(video_adapter_t *adp, video_info_t *info) 838{ 839 adp->va_flags &= ~V_ADP_COLOR; 840 adp->va_flags |= 841 (info->vi_flags & V_INFO_COLOR) ? V_ADP_COLOR : 0; 842 adp->va_crtc_addr = 843 (adp->va_flags & V_ADP_COLOR) ? COLOR_CRTC : MONO_CRTC; 844 adp->va_window = BIOS_PADDRTOVADDR(info->vi_window); 845 adp->va_window_size = info->vi_window_size; 846 adp->va_window_gran = info->vi_window_gran; 847 adp->va_window_orig = 0; 848 /* XXX */ 849 adp->va_buffer = info->vi_buffer; 850 adp->va_buffer_size = info->vi_buffer_size; 851 if (info->vi_mem_model == V_INFO_MM_VGAX) { 852 adp->va_line_width = info->vi_width/2; 853 } else if (info->vi_flags & V_INFO_GRAPHICS) { 854 switch (info->vi_depth/info->vi_planes) { 855 case 1: 856 adp->va_line_width = info->vi_width/8; 857 break; 858 case 2: 859 adp->va_line_width = info->vi_width/4; 860 break; 861 case 4: 862 adp->va_line_width = info->vi_width/2; 863 break; 864 case 8: 865 default: /* shouldn't happen */ 866 adp->va_line_width = info->vi_width; 867 break; 868 } 869 } else { 870 adp->va_line_width = info->vi_width; 871 } 872 adp->va_disp_start.x = 0; 873 adp->va_disp_start.y = 0; 874 bcopy(info, &adp->va_info, sizeof(adp->va_info)); 875} 876 877#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 878/* compare two parameter table entries */ 879static int 880comp_adpregs(u_char *buf1, u_char *buf2) 881{ 882 static struct { 883 u_char mask; 884 } params[V_MODE_PARAM_SIZE] = { 885 {0xff}, {0x00}, {0xff}, /* COLS}, ROWS}, POINTS */ 886 {0x00}, {0x00}, /* page length */ 887 {0xfe}, {0xff}, {0xff}, {0xff}, /* sequencer registers */ 888 {0xf3}, /* misc register */ 889 {0xff}, {0xff}, {0xff}, {0x7f}, {0xff}, /* CRTC */ 890 {0xff}, {0xff}, {0xff}, {0x7f}, {0xff}, 891 {0x00}, {0x00}, {0x00}, {0x00}, {0x00}, 892 {0x00}, {0xff}, {0x7f}, {0xff}, {0xff}, 893 {0x7f}, {0xff}, {0xff}, {0xef}, {0xff}, 894 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, /* attribute controller regs */ 895 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, 896 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, 897 {0xff}, {0xff}, {0xff}, {0xff}, {0xf0}, 898 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, /* GDC register */ 899 {0xff}, {0xff}, {0xff}, {0xff}, 900 }; 901 int identical = TRUE; 902 int i; 903 904 if ((buf1 == NULL) || (buf2 == NULL)) 905 return COMP_DIFFERENT; 906 907 for (i = 0; i < sizeof(params)/sizeof(params[0]); ++i) { 908 if (params[i].mask == 0) /* don't care */ 909 continue; 910 if ((buf1[i] & params[i].mask) != (buf2[i] & params[i].mask)) 911 return COMP_DIFFERENT; 912 if (buf1[i] != buf2[i]) 913 identical = FALSE; 914 } 915 return (identical) ? COMP_IDENTICAL : COMP_SIMILAR; 916} 917#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 918 919/* probe video adapters and return the number of detected adapters */ 920static int 921probe_adapters(void) 922{ 923 video_adapter_t *adp; 924 video_info_t info; 925#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 926 u_char *mp; 927#endif 928 int i; 929 930 /* do this test only once */ 931 if (vga_init_done) 932 return biosadapters; 933 vga_init_done = TRUE; 934 935 /* 936 * Locate display adapters. 937 * The AT architecture supports upto two adapters. `syscons' allows 938 * the following combinations of adapters: 939 * 1) MDA + CGA 940 * 2) MDA + EGA/VGA color 941 * 3) CGA + EGA/VGA mono 942 * Note that `syscons' doesn't bother with MCGA as it is only 943 * avaiable for low end PS/2 models which has 80286 or earlier CPUs, 944 * thus, they are not running FreeBSD! 945 * When there are two adapaters in the system, one becomes `primary' 946 * and the other `secondary'. The EGA adapter has a set of DIP 947 * switches on board for this information and the EGA BIOS copies 948 * it in the BIOS data area BIOSDATA_VIDEOSWITCH (40:88). 949 * The VGA BIOS has more sophisticated mechanism and has this 950 * information in BIOSDATA_DCCINDEX (40:8a), but it also maintains 951 * compatibility with the EGA BIOS by updating BIOSDATA_VIDEOSWITCH. 952 */ 953 954 /* 955 * Check rtc and BIOS data area. 956 * XXX: we don't use BIOSDATA_EQUIPMENT, since it is not a dead 957 * copy of RTC_EQUIPMENT. Bits 4 and 5 of ETC_EQUIPMENT are 958 * zeros for EGA and VGA. However, the EGA/VGA BIOS sets 959 * these bits in BIOSDATA_EQUIPMENT according to the monitor 960 * type detected. 961 */ 962#ifndef VGA_NO_BIOS 963 if (*(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8)) { 964 /* EGA/VGA BIOS is present */ 965 fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f, 966 biosadapter); 967 } else { 968 switch ((rtcin(RTC_EQUIPMENT) >> 4) & 3) { /* bit 4 and 5 */ 969 case 0: 970 /* EGA/VGA: shouldn't be happening */ 971 fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f, 972 biosadapter); 973 break; 974 case 1: 975 /* CGA 40x25 */ 976 /* FIXME: switch to the 80x25 mode? XXX */ 977 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA40]; 978 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 979 break; 980 case 2: 981 /* CGA 80x25 */ 982 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA80]; 983 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 984 break; 985 case 3: 986 /* MDA */ 987 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO]; 988 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80]; 989 break; 990 } 991 } 992#else 993 /* assume EGA/VGA? XXX */ 994 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_EGA80]; 995 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 996#endif /* VGA_NO_BIOS */ 997 998 biosadapters = 0; 999 if (verify_adapter(&biosadapter[V_ADP_SECONDARY]) == 0) { 1000 ++biosadapters; 1001 biosadapter[V_ADP_SECONDARY].va_flags |= V_ADP_PROBED; 1002 biosadapter[V_ADP_SECONDARY].va_mode = 1003 biosadapter[V_ADP_SECONDARY].va_initial_mode = 1004 map_bios_mode_num(biosadapter[V_ADP_SECONDARY].va_type, 1005 biosadapter[V_ADP_SECONDARY].va_flags 1006 & V_ADP_COLOR, 1007 biosadapter[V_ADP_SECONDARY].va_initial_bios_mode); 1008 } else { 1009 biosadapter[V_ADP_SECONDARY].va_type = -1; 1010 } 1011 if (verify_adapter(&biosadapter[V_ADP_PRIMARY]) == 0) { 1012 ++biosadapters; 1013 biosadapter[V_ADP_PRIMARY].va_flags |= V_ADP_PROBED; 1014#ifndef VGA_NO_BIOS 1015 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode = 1016 readb(BIOS_PADDRTOVADDR(0x449)); 1017#else 1018 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode = 3; /* XXX */ 1019#endif 1020 biosadapter[V_ADP_PRIMARY].va_mode = 1021 biosadapter[V_ADP_PRIMARY].va_initial_mode = 1022 map_bios_mode_num(biosadapter[V_ADP_PRIMARY].va_type, 1023 biosadapter[V_ADP_PRIMARY].va_flags & V_ADP_COLOR, 1024 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode); 1025 } else { 1026 biosadapter[V_ADP_PRIMARY] = biosadapter[V_ADP_SECONDARY]; 1027 biosadapter[V_ADP_SECONDARY].va_type = -1; 1028 } 1029 if (biosadapters == 0) 1030 return biosadapters; 1031 biosadapter[V_ADP_PRIMARY].va_unit = V_ADP_PRIMARY; 1032 biosadapter[V_ADP_SECONDARY].va_unit = V_ADP_SECONDARY; 1033 1034#if 0 /* we don't need these... */ 1035 fb_init_struct(&biosadapter[V_ADP_PRIMARY], ...); 1036 fb_init_struct(&biosadapter[V_ADP_SECONDARY], ...); 1037#endif 1038 1039#if notyet 1040 /* 1041 * We cannot have two video adapter of the same type; there must be 1042 * only one of color or mono adapter, or one each of them. 1043 */ 1044 if (biosadapters > 1) { 1045 if (!((biosadapter[0].va_flags ^ biosadapter[1].va_flags) 1046 & V_ADP_COLOR)) 1047 /* we have two mono or color adapters!! */ 1048 return (biosadapters = 0); 1049 } 1050#endif 1051 1052 /* 1053 * Ensure a zero start address. This is mainly to recover after 1054 * switching from pcvt using userconfig(). The registers are w/o 1055 * for old hardware so it's too hard to relocate the active screen 1056 * memory. 1057 * This must be done before vga_save_state() for VGA. 1058 */ 1059 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 12); 1060 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0); 1061 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 13); 1062 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0); 1063 1064 /* the video mode parameter table in EGA/VGA BIOS */ 1065 /* NOTE: there can be only one EGA/VGA, wheather color or mono, 1066 * recognized by the video BIOS. 1067 */ 1068 if ((biosadapter[V_ADP_PRIMARY].va_type == KD_EGA) || 1069 (biosadapter[V_ADP_PRIMARY].va_type == KD_VGA)) { 1070 adp = &biosadapter[V_ADP_PRIMARY]; 1071 } else if ((biosadapter[V_ADP_SECONDARY].va_type == KD_EGA) || 1072 (biosadapter[V_ADP_SECONDARY].va_type == KD_VGA)) { 1073 adp = &biosadapter[V_ADP_SECONDARY]; 1074 } else { 1075 adp = NULL; 1076 } 1077 bzero(mode_map, sizeof(mode_map)); 1078 if (adp != NULL) { 1079 if (adp->va_type == KD_VGA) { 1080 vga_save_state(adp, &adpstate, sizeof(adpstate)); 1081#if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE) 1082 mode_map[adp->va_initial_mode] = adpstate.regs; 1083 rows_offset = 1; 1084#else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1085 if (video_mode_ptr == NULL) { 1086 mode_map[adp->va_initial_mode] = adpstate.regs; 1087 rows_offset = 1; 1088 } else { 1089 /* discard the table if we are not familiar with it... */ 1090 map_mode_table(mode_map, video_mode_ptr, M_VGA_CG320 + 1); 1091 mp = get_mode_param(adp->va_initial_mode); 1092 if (mp != NULL) 1093 bcopy(mp, adpstate2.regs, sizeof(adpstate2.regs)); 1094 switch (comp_adpregs(adpstate.regs, mp)) { 1095 case COMP_IDENTICAL: 1096 /* 1097 * OK, this parameter table looks reasonably familiar 1098 * to us... 1099 */ 1100 /* 1101 * This is a kludge for Toshiba DynaBook SS433 1102 * whose BIOS video mode table entry has the actual # 1103 * of rows at the offset 1; BIOSes from other 1104 * manufacturers store the # of rows - 1 there. XXX 1105 */ 1106 rows_offset = adpstate.regs[1] + 1 - mp[1]; 1107 break; 1108 1109 case COMP_SIMILAR: 1110 /* 1111 * Not exactly the same, but similar enough to be 1112 * trusted. However, use the saved register values 1113 * for the initial mode and other modes which are 1114 * based on the initial mode. 1115 */ 1116 mode_map[adp->va_initial_mode] = adpstate.regs; 1117 rows_offset = adpstate.regs[1] + 1 - mp[1]; 1118 adpstate.regs[1] -= rows_offset - 1; 1119 break; 1120 1121 case COMP_DIFFERENT: 1122 default: 1123 /* 1124 * Don't use the paramter table in BIOS. It doesn't 1125 * look familiar to us. Video mode switching is allowed 1126 * only if the new mode is the same as or based on 1127 * the initial mode. 1128 */ 1129 video_mode_ptr = NULL; 1130 bzero(mode_map, sizeof(mode_map)); 1131 mode_map[adp->va_initial_mode] = adpstate.regs; 1132 rows_offset = 1; 1133 break; 1134 } 1135 } 1136#endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1137 1138#ifndef VGA_NO_MODE_CHANGE 1139 adp->va_flags |= V_ADP_MODECHANGE; 1140#endif 1141#ifndef VGA_NO_FONT_LOADING 1142 adp->va_flags |= V_ADP_FONT; 1143#endif 1144 } else if (adp->va_type == KD_EGA) { 1145#if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE) 1146 rows_offset = 1; 1147#else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1148 if (video_mode_ptr == NULL) { 1149 rows_offset = 1; 1150 } else { 1151 map_mode_table(mode_map, video_mode_ptr, M_ENH_C80x25 + 1); 1152 /* XXX how can one validate the EGA table... */ 1153 mp = get_mode_param(adp->va_initial_mode); 1154 if (mp != NULL) { 1155 adp->va_flags |= V_ADP_MODECHANGE; 1156#ifndef VGA_NO_FONT_LOADING 1157 adp->va_flags |= V_ADP_FONT; 1158#endif 1159 rows_offset = 1; 1160 } else { 1161 /* 1162 * This is serious. We will not be able to switch video 1163 * modes at all... 1164 */ 1165 video_mode_ptr = NULL; 1166 bzero(mode_map, sizeof(mode_map)); 1167 rows_offset = 1; 1168 } 1169 } 1170#endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1171 } 1172 } 1173 1174 /* remove conflicting modes if we have more than one adapter */ 1175 if (biosadapters > 0) { 1176 for (i = 0; i < biosadapters; ++i) { 1177 if (!(biosadapter[i].va_flags & V_ADP_MODECHANGE)) 1178 continue; 1179 clear_mode_map(&biosadapter[i], mode_map, M_VGA_CG320 + 1, 1180 (biosadapter[i].va_flags & V_ADP_COLOR) ? 1181 V_INFO_COLOR : 0); 1182 if ((biosadapter[i].va_type == KD_VGA) 1183 || (biosadapter[i].va_type == KD_EGA)) { 1184 biosadapter[i].va_io_base = 1185 (biosadapter[i].va_flags & V_ADP_COLOR) ? 1186 IO_VGA : IO_MDA; 1187 biosadapter[i].va_io_size = 32; 1188 } 1189 } 1190 } 1191 1192 /* buffer address */ 1193 vga_get_info(&biosadapter[V_ADP_PRIMARY], 1194 biosadapter[V_ADP_PRIMARY].va_initial_mode, &info); 1195 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1196 update_adapter_info(&biosadapter[V_ADP_PRIMARY], &info); 1197 1198 if (biosadapters > 1) { 1199 vga_get_info(&biosadapter[V_ADP_SECONDARY], 1200 biosadapter[V_ADP_SECONDARY].va_initial_mode, &info); 1201 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1202 update_adapter_info(&biosadapter[V_ADP_SECONDARY], &info); 1203 } 1204 1205 /* 1206 * XXX: we should verify the following values for the primary adapter... 1207 * crtc I/O port address: *(u_int16_t *)BIOS_PADDRTOVADDR(0x463); 1208 * color/mono display: (*(u_int8_t *)BIOS_PADDRTOVADDR(0x487) & 0x02) 1209 * ? 0 : V_ADP_COLOR; 1210 * columns: *(u_int8_t *)BIOS_PADDRTOVADDR(0x44a); 1211 * rows: *(u_int8_t *)BIOS_PADDRTOVADDR(0x484); 1212 * font size: *(u_int8_t *)BIOS_PADDRTOVADDR(0x485); 1213 * buffer size: *(u_int16_t *)BIOS_PADDRTOVADDR(0x44c); 1214 */ 1215 1216 return biosadapters; 1217} 1218 1219/* set the scan line length in pixel */ 1220static int 1221set_line_length(video_adapter_t *adp, int pixel) 1222{ 1223 u_char *mp; 1224 int ppw; /* pixels per word */ 1225 int bpl; /* bytes per line */ 1226 int count; 1227 1228 if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA)) 1229 return ENODEV; 1230 mp = get_mode_param(adp->va_mode); 1231 if (mp == NULL) 1232 return EINVAL; 1233 1234 switch (adp->va_info.vi_mem_model) { 1235 case V_INFO_MM_PLANAR: 1236 ppw = 16/(adp->va_info.vi_depth/adp->va_info.vi_planes); 1237 count = (pixel + ppw - 1)/ppw/2; 1238 bpl = ((pixel + ppw - 1)/ppw/2)*4; 1239 break; 1240 case V_INFO_MM_PACKED: 1241 count = (pixel + 7)/8; 1242 bpl = ((pixel + 7)/8)*8; 1243 break; 1244 case V_INFO_MM_TEXT: 1245 count = (pixel + 7)/8; /* columns */ 1246 bpl = (pixel + 7)/8; /* columns */ 1247 break; 1248 default: 1249 return ENODEV; 1250 } 1251 1252 if (mp[10 + 0x17] & 0x40) /* CRTC mode control reg */ 1253 count *= 2; /* byte mode */ 1254 outb(adp->va_crtc_addr, 0x13); 1255 outb(adp->va_crtc_addr + 1, count); 1256 adp->va_line_width = bpl; 1257 1258 return 0; 1259} 1260 1261static int 1262set_display_start(video_adapter_t *adp, int x, int y) 1263{ 1264 int off; /* byte offset (graphics mode)/word offset (text mode) */ 1265 int poff; /* pixel offset */ 1266 int roff; /* row offset */ 1267 int ppb; /* pixels per byte */ 1268 1269 if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA)) 1270 x &= ~7; 1271 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) { 1272 ppb = 8/(adp->va_info.vi_depth/adp->va_info.vi_planes); 1273 off = y*adp->va_line_width + x/ppb; 1274 roff = 0; 1275 poff = x%ppb; 1276 } else { 1277 if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) { 1278 outb(TSIDX, 1); 1279 if (inb(TSREG) & 1) 1280 ppb = 9; 1281 else 1282 ppb = 8; 1283 } else { 1284 ppb = 8; 1285 } 1286 off = y/adp->va_info.vi_cheight*adp->va_line_width + x/ppb; 1287 roff = y%adp->va_info.vi_cheight; 1288 /* FIXME: is this correct? XXX */ 1289 if (ppb == 8) 1290 poff = x%ppb; 1291 else 1292 poff = (x + 8)%ppb; 1293 } 1294 1295 /* start address */ 1296 outb(adp->va_crtc_addr, 0xc); /* high */ 1297 outb(adp->va_crtc_addr + 1, off >> 8); 1298 outb(adp->va_crtc_addr, 0xd); /* low */ 1299 outb(adp->va_crtc_addr + 1, off & 0xff); 1300 1301 /* horizontal pel pan */ 1302 if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) { 1303 inb(adp->va_crtc_addr + 6); 1304 outb(ATC, 0x13 | 0x20); 1305 outb(ATC, poff); 1306 inb(adp->va_crtc_addr + 6); 1307 outb(ATC, 0x20); 1308 } 1309 1310 /* preset raw scan */ 1311 outb(adp->va_crtc_addr, 8); 1312 outb(adp->va_crtc_addr + 1, roff); 1313 1314 adp->va_disp_start.x = x; 1315 adp->va_disp_start.y = y; 1316 return 0; 1317} 1318 1319#ifdef __i386__ /* XXX */ 1320static void 1321fill(int val, void *d, size_t size) 1322{ 1323 u_char *p = d; 1324 1325 while (size-- > 0) 1326 *p++ = val; 1327} 1328#endif /* __i386__ */ 1329 1330static void 1331filll_io(int val, vm_offset_t d, size_t size) 1332{ 1333 while (size-- > 0) { 1334 writel(d, val); 1335 d += sizeof(u_int32_t); 1336 } 1337} 1338 1339/* entry points */ 1340 1341#if 0 1342static int 1343vga_nop(void) 1344{ 1345 return 0; 1346} 1347#endif 1348 1349static int 1350vga_error(void) 1351{ 1352 return ENODEV; 1353} 1354 1355static int 1356vga_probe(int unit, video_adapter_t **adpp, void *arg, int flags) 1357{ 1358 probe_adapters(); 1359 if (unit >= biosadapters) 1360 return ENXIO; 1361 1362 *adpp = &biosadapter[unit]; 1363 1364 return 0; 1365} 1366 1367static int 1368vga_init(int unit, video_adapter_t *adp, int flags) 1369{ 1370 if ((unit >= biosadapters) || (adp == NULL) || !probe_done(adp)) 1371 return ENXIO; 1372 1373 if (!init_done(adp)) { 1374 /* nothing to do really... */ 1375 adp->va_flags |= V_ADP_INITIALIZED; 1376 } 1377 1378 if (!config_done(adp)) { 1379 if (vid_register(adp) < 0) 1380 return ENXIO; 1381 adp->va_flags |= V_ADP_REGISTERED; 1382 } 1383 if (vga_sub_configure != NULL) 1384 (*vga_sub_configure)(0); 1385 1386 return 0; 1387} 1388 1389/* 1390 * get_info(): 1391 * Return the video_info structure of the requested video mode. 1392 * 1393 * all adapters 1394 */ 1395static int 1396vga_get_info(video_adapter_t *adp, int mode, video_info_t *info) 1397{ 1398 int i; 1399 1400 if (!vga_init_done) 1401 return ENXIO; 1402 1403 mode = map_gen_mode_num(adp->va_type, adp->va_flags & V_ADP_COLOR, mode); 1404#ifndef VGA_NO_MODE_CHANGE 1405 if (adp->va_flags & V_ADP_MODECHANGE) { 1406 /* 1407 * If the parameter table entry for this mode is not found, 1408 * the mode is not supported... 1409 */ 1410 if (get_mode_param(mode) == NULL) 1411 return EINVAL; 1412 } else 1413#endif /* VGA_NO_MODE_CHANGE */ 1414 { 1415 /* 1416 * Even if we don't support video mode switching on this adapter, 1417 * the information on the initial (thus current) video mode 1418 * should be made available. 1419 */ 1420 if (mode != adp->va_initial_mode) 1421 return EINVAL; 1422 } 1423 1424 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 1425 if (bios_vmode[i].vi_mode == NA) 1426 continue; 1427 if (mode == bios_vmode[i].vi_mode) { 1428 *info = bios_vmode[i]; 1429 /* XXX */ 1430 info->vi_buffer_size = info->vi_window_size*info->vi_planes; 1431 return 0; 1432 } 1433 } 1434 return EINVAL; 1435} 1436 1437/* 1438 * query_mode(): 1439 * Find a video mode matching the requested parameters. 1440 * Fields filled with 0 are considered "don't care" fields and 1441 * match any modes. 1442 * 1443 * all adapters 1444 */ 1445static int 1446vga_query_mode(video_adapter_t *adp, video_info_t *info) 1447{ 1448 int i; 1449 1450 if (!vga_init_done) 1451 return ENXIO; 1452 1453 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 1454 if (bios_vmode[i].vi_mode == NA) 1455 continue; 1456 1457 if ((info->vi_width != 0) 1458 && (info->vi_width != bios_vmode[i].vi_width)) 1459 continue; 1460 if ((info->vi_height != 0) 1461 && (info->vi_height != bios_vmode[i].vi_height)) 1462 continue; 1463 if ((info->vi_cwidth != 0) 1464 && (info->vi_cwidth != bios_vmode[i].vi_cwidth)) 1465 continue; 1466 if ((info->vi_cheight != 0) 1467 && (info->vi_cheight != bios_vmode[i].vi_cheight)) 1468 continue; 1469 if ((info->vi_depth != 0) 1470 && (info->vi_depth != bios_vmode[i].vi_depth)) 1471 continue; 1472 if ((info->vi_planes != 0) 1473 && (info->vi_planes != bios_vmode[i].vi_planes)) 1474 continue; 1475 /* XXX: should check pixel format, memory model */ 1476 if ((info->vi_flags != 0) 1477 && (info->vi_flags != bios_vmode[i].vi_flags)) 1478 continue; 1479 1480 /* verify if this mode is supported on this adapter */ 1481 if (vga_get_info(adp, bios_vmode[i].vi_mode, info)) 1482 continue; 1483 return 0; 1484 } 1485 return ENODEV; 1486} 1487 1488/* 1489 * set_mode(): 1490 * Change the video mode. 1491 * 1492 * EGA/VGA 1493 */ 1494 1495#ifndef VGA_NO_MODE_CHANGE 1496#ifdef VGA_WIDTH90 1497static void 1498set_width90(adp_state_t *params) 1499{ 1500 /* 1501 * Based on code submitted by Kelly Yancey (kbyanc@freedomnet.com) 1502 * and alexv@sui.gda.itesm.mx. 1503 */ 1504 params->regs[5] |= 1; /* toggle 8 pixel wide fonts */ 1505 params->regs[10+0x0] = 0x6b; 1506 params->regs[10+0x1] = 0x59; 1507 params->regs[10+0x2] = 0x5a; 1508 params->regs[10+0x3] = 0x8e; 1509 params->regs[10+0x4] = 0x5e; 1510 params->regs[10+0x5] = 0x8a; 1511 params->regs[10+0x13] = 45; 1512 params->regs[35+0x13] = 0; 1513} 1514#endif /* VGA_WIDTH90 */ 1515#endif /* !VGA_NO_MODE_CHANGE */ 1516 1517static int 1518vga_set_mode(video_adapter_t *adp, int mode) 1519{ 1520#ifndef VGA_NO_MODE_CHANGE 1521 video_info_t info; 1522 adp_state_t params; 1523 1524 prologue(adp, V_ADP_MODECHANGE, ENODEV); 1525 1526 mode = map_gen_mode_num(adp->va_type, 1527 adp->va_flags & V_ADP_COLOR, mode); 1528 if (vga_get_info(adp, mode, &info)) 1529 return EINVAL; 1530 1531#if VGA_DEBUG > 1 1532 printf("vga_set_mode(): setting mode %d\n", mode); 1533#endif 1534 1535 params.sig = V_STATE_SIG; 1536 bcopy(get_mode_param(mode), params.regs, sizeof(params.regs)); 1537 1538 switch (mode) { 1539#ifdef VGA_WIDTH90 1540 case M_VGA_C90x60: case M_VGA_M90x60: 1541 set_width90(¶ms); 1542 /* FALL THROUGH */ 1543#endif 1544 case M_VGA_C80x60: case M_VGA_M80x60: 1545 params.regs[2] = 0x08; 1546 params.regs[19] = 0x47; 1547 goto special_480l; 1548 1549#ifdef VGA_WIDTH90 1550 case M_VGA_C90x30: case M_VGA_M90x30: 1551 set_width90(¶ms); 1552 /* FALL THROUGH */ 1553#endif 1554 case M_VGA_C80x30: case M_VGA_M80x30: 1555 params.regs[19] = 0x4f; 1556special_480l: 1557 params.regs[9] |= 0xc0; 1558 params.regs[16] = 0x08; 1559 params.regs[17] = 0x3e; 1560 params.regs[26] = 0xea; 1561 params.regs[28] = 0xdf; 1562 params.regs[31] = 0xe7; 1563 params.regs[32] = 0x04; 1564 goto setup_mode; 1565 1566#ifdef VGA_WIDTH90 1567 case M_VGA_C90x43: case M_VGA_M90x43: 1568 set_width90(¶ms); 1569 /* FALL THROUGH */ 1570#endif 1571 case M_ENH_C80x43: case M_ENH_B80x43: 1572 params.regs[28] = 87; 1573 goto special_80x50; 1574 1575#ifdef VGA_WIDTH90 1576 case M_VGA_C90x50: case M_VGA_M90x50: 1577 set_width90(¶ms); 1578 /* FALL THROUGH */ 1579#endif 1580 case M_VGA_C80x50: case M_VGA_M80x50: 1581special_80x50: 1582 params.regs[2] = 8; 1583 params.regs[19] = 7; 1584 goto setup_mode; 1585 1586#ifdef VGA_WIDTH90 1587 case M_VGA_C90x25: case M_VGA_M90x25: 1588 set_width90(¶ms); 1589 /* FALL THROUGH */ 1590#endif 1591 case M_VGA_C40x25: case M_VGA_C80x25: 1592 case M_VGA_M80x25: 1593 case M_B40x25: case M_C40x25: 1594 case M_B80x25: case M_C80x25: 1595 case M_ENH_B40x25: case M_ENH_C40x25: 1596 case M_ENH_B80x25: case M_ENH_C80x25: 1597 case M_EGAMONO80x25: 1598 1599setup_mode: 1600 vga_load_state(adp, ¶ms); 1601 break; 1602 1603 case M_VGA_MODEX: 1604 /* "unchain" the VGA mode */ 1605 params.regs[5-1+0x04] &= 0xf7; 1606 params.regs[5-1+0x04] |= 0x04; 1607 /* turn off doubleword mode */ 1608 params.regs[10+0x14] &= 0xbf; 1609 /* turn off word adressing */ 1610 params.regs[10+0x17] |= 0x40; 1611 /* set logical screen width */ 1612 params.regs[10+0x13] = 80; 1613 /* set 240 lines */ 1614 params.regs[10+0x11] = 0x2c; 1615 params.regs[10+0x06] = 0x0d; 1616 params.regs[10+0x07] = 0x3e; 1617 params.regs[10+0x10] = 0xea; 1618 params.regs[10+0x11] = 0xac; 1619 params.regs[10+0x12] = 0xdf; 1620 params.regs[10+0x15] = 0xe7; 1621 params.regs[10+0x16] = 0x06; 1622 /* set vertical sync polarity to reflect aspect ratio */ 1623 params.regs[9] = 0xe3; 1624 goto setup_grmode; 1625 1626 case M_BG320: case M_CG320: case M_BG640: 1627 case M_CG320_D: case M_CG640_E: 1628 case M_CG640x350: case M_ENH_CG640: 1629 case M_BG640x480: case M_CG640x480: case M_VGA_CG320: 1630 1631setup_grmode: 1632 vga_load_state(adp, ¶ms); 1633 break; 1634 1635 default: 1636 return EINVAL; 1637 } 1638 1639 adp->va_mode = mode; 1640 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1641 update_adapter_info(adp, &info); 1642 1643 /* move hardware cursor out of the way */ 1644 (*vidsw[adp->va_index]->set_hw_cursor)(adp, -1, -1); 1645 1646 return 0; 1647#else /* VGA_NO_MODE_CHANGE */ 1648 return ENODEV; 1649#endif /* VGA_NO_MODE_CHANGE */ 1650} 1651 1652#ifndef VGA_NO_FONT_LOADING 1653 1654static void 1655set_font_mode(video_adapter_t *adp, u_char *buf) 1656{ 1657 u_char *mp; 1658 int s; 1659 1660 s = splhigh(); 1661 1662 /* save register values */ 1663 if (adp->va_type == KD_VGA) { 1664 outb(TSIDX, 0x02); buf[0] = inb(TSREG); 1665 outb(TSIDX, 0x04); buf[1] = inb(TSREG); 1666 outb(GDCIDX, 0x04); buf[2] = inb(GDCREG); 1667 outb(GDCIDX, 0x05); buf[3] = inb(GDCREG); 1668 outb(GDCIDX, 0x06); buf[4] = inb(GDCREG); 1669 inb(adp->va_crtc_addr + 6); 1670 outb(ATC, 0x10); buf[5] = inb(ATC + 1); 1671 } else /* if (adp->va_type == KD_EGA) */ { 1672 /* 1673 * EGA cannot be read; copy parameters from the mode parameter 1674 * table. 1675 */ 1676 mp = get_mode_param(adp->va_mode); 1677 buf[0] = mp[5 + 0x02 - 1]; 1678 buf[1] = mp[5 + 0x04 - 1]; 1679 buf[2] = mp[55 + 0x04]; 1680 buf[3] = mp[55 + 0x05]; 1681 buf[4] = mp[55 + 0x06]; 1682 buf[5] = mp[35 + 0x10]; 1683 } 1684 1685 /* setup vga for loading fonts */ 1686 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1687 outb(ATC, 0x10); outb(ATC, buf[5] & ~0x01); 1688 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1689 outb(ATC, 0x20); /* enable palette */ 1690 1691#if VGA_SLOW_IOACCESS 1692#ifdef VGA_ALT_SEQACCESS 1693 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1694#endif 1695 outb(TSIDX, 0x02); outb(TSREG, 0x04); 1696 outb(TSIDX, 0x04); outb(TSREG, 0x07); 1697#ifdef VGA_ALT_SEQACCESS 1698 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1699#endif 1700 outb(GDCIDX, 0x04); outb(GDCREG, 0x02); 1701 outb(GDCIDX, 0x05); outb(GDCREG, 0x00); 1702 outb(GDCIDX, 0x06); outb(GDCREG, 0x04); 1703#else /* VGA_SLOW_IOACCESS */ 1704#ifdef VGA_ALT_SEQACCESS 1705 outw(TSIDX, 0x0100); 1706#endif 1707 outw(TSIDX, 0x0402); 1708 outw(TSIDX, 0x0704); 1709#ifdef VGA_ALT_SEQACCESS 1710 outw(TSIDX, 0x0300); 1711#endif 1712 outw(GDCIDX, 0x0204); 1713 outw(GDCIDX, 0x0005); 1714 outw(GDCIDX, 0x0406); /* addr = a0000, 64kb */ 1715#endif /* VGA_SLOW_IOACCESS */ 1716 1717 splx(s); 1718} 1719 1720static void 1721set_normal_mode(video_adapter_t *adp, u_char *buf) 1722{ 1723 int s; 1724 1725 s = splhigh(); 1726 1727 /* setup vga for normal operation mode again */ 1728 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1729 outb(ATC, 0x10); outb(ATC, buf[5]); 1730 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1731 outb(ATC, 0x20); /* enable palette */ 1732 1733#if VGA_SLOW_IOACCESS 1734#ifdef VGA_ALT_SEQACCESS 1735 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1736#endif 1737 outb(TSIDX, 0x02); outb(TSREG, buf[0]); 1738 outb(TSIDX, 0x04); outb(TSREG, buf[1]); 1739#ifdef VGA_ALT_SEQACCESS 1740 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1741#endif 1742 outb(GDCIDX, 0x04); outb(GDCREG, buf[2]); 1743 outb(GDCIDX, 0x05); outb(GDCREG, buf[3]); 1744 if (adp->va_crtc_addr == MONO_CRTC) { 1745 outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x08); 1746 } else { 1747 outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x0c); 1748 } 1749#else /* VGA_SLOW_IOACCESS */ 1750#ifdef VGA_ALT_SEQACCESS 1751 outw(TSIDX, 0x0100); 1752#endif 1753 outw(TSIDX, 0x0002 | (buf[0] << 8)); 1754 outw(TSIDX, 0x0004 | (buf[1] << 8)); 1755#ifdef VGA_ALT_SEQACCESS 1756 outw(TSIDX, 0x0300); 1757#endif 1758 outw(GDCIDX, 0x0004 | (buf[2] << 8)); 1759 outw(GDCIDX, 0x0005 | (buf[3] << 8)); 1760 if (adp->va_crtc_addr == MONO_CRTC) 1761 outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x08)<<8)); 1762 else 1763 outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x0c)<<8)); 1764#endif /* VGA_SLOW_IOACCESS */ 1765 1766 splx(s); 1767} 1768 1769#endif /* VGA_NO_FONT_LOADING */ 1770 1771/* 1772 * save_font(): 1773 * Read the font data in the requested font page from the video adapter. 1774 * 1775 * EGA/VGA 1776 */ 1777static int 1778vga_save_font(video_adapter_t *adp, int page, int fontsize, u_char *data, 1779 int ch, int count) 1780{ 1781#ifndef VGA_NO_FONT_LOADING 1782 u_char buf[PARAM_BUFSIZE]; 1783 u_int32_t segment; 1784 int c; 1785#ifdef VGA_ALT_SEQACCESS 1786 int s; 1787 u_char val = 0; 1788#endif 1789 1790 prologue(adp, V_ADP_FONT, ENODEV); 1791 1792 if (fontsize < 14) { 1793 /* FONT_8 */ 1794 fontsize = 8; 1795 } else if (fontsize >= 32) { 1796 fontsize = 32; 1797 } else if (fontsize >= 16) { 1798 /* FONT_16 */ 1799 fontsize = 16; 1800 } else { 1801 /* FONT_14 */ 1802 fontsize = 14; 1803 } 1804 1805 if (page < 0 || page >= 8) 1806 return EINVAL; 1807 segment = FONT_BUF + 0x4000*page; 1808 if (page > 3) 1809 segment -= 0xe000; 1810 1811#ifdef VGA_ALT_SEQACCESS 1812 if (adp->va_type == KD_VGA) { /* what about EGA? XXX */ 1813 s = splhigh(); 1814 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1815 outb(TSIDX, 0x01); val = inb(TSREG); /* disable screen */ 1816 outb(TSIDX, 0x01); outb(TSREG, val | 0x20); 1817 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1818 splx(s); 1819 } 1820#endif 1821 1822 set_font_mode(adp, buf); 1823 if (fontsize == 32) { 1824 bcopy_fromio(segment + ch*32, data, fontsize*count); 1825 } else { 1826 for (c = ch; count > 0; ++c, --count) { 1827 bcopy_fromio(segment + c*32, data, fontsize); 1828 data += fontsize; 1829 } 1830 } 1831 set_normal_mode(adp, buf); 1832 1833#ifdef VGA_ALT_SEQACCESS 1834 if (adp->va_type == KD_VGA) { 1835 s = splhigh(); 1836 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1837 outb(TSIDX, 0x01); outb(TSREG, val & 0xdf); /* enable screen */ 1838 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1839 splx(s); 1840 } 1841#endif 1842 1843 return 0; 1844#else /* VGA_NO_FONT_LOADING */ 1845 return ENODEV; 1846#endif /* VGA_NO_FONT_LOADING */ 1847} 1848 1849/* 1850 * load_font(): 1851 * Set the font data in the requested font page. 1852 * NOTE: it appears that some recent video adapters do not support 1853 * the font page other than 0... XXX 1854 * 1855 * EGA/VGA 1856 */ 1857static int 1858vga_load_font(video_adapter_t *adp, int page, int fontsize, u_char *data, 1859 int ch, int count) 1860{ 1861#ifndef VGA_NO_FONT_LOADING 1862 u_char buf[PARAM_BUFSIZE]; 1863 u_int32_t segment; 1864 int c; 1865#ifdef VGA_ALT_SEQACCESS 1866 int s; 1867 u_char val = 0; 1868#endif 1869 1870 prologue(adp, V_ADP_FONT, ENODEV); 1871 1872 if (fontsize < 14) { 1873 /* FONT_8 */ 1874 fontsize = 8; 1875 } else if (fontsize >= 32) { 1876 fontsize = 32; 1877 } else if (fontsize >= 16) { 1878 /* FONT_16 */ 1879 fontsize = 16; 1880 } else { 1881 /* FONT_14 */ 1882 fontsize = 14; 1883 } 1884 1885 if (page < 0 || page >= 8) 1886 return EINVAL; 1887 segment = FONT_BUF + 0x4000*page; 1888 if (page > 3) 1889 segment -= 0xe000; 1890 1891#ifdef VGA_ALT_SEQACCESS 1892 if (adp->va_type == KD_VGA) { /* what about EGA? XXX */ 1893 s = splhigh(); 1894 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1895 outb(TSIDX, 0x01); val = inb(TSREG); /* disable screen */ 1896 outb(TSIDX, 0x01); outb(TSREG, val | 0x20); 1897 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1898 splx(s); 1899 } 1900#endif 1901 1902 set_font_mode(adp, buf); 1903 if (fontsize == 32) { 1904 bcopy_toio(data, segment + ch*32, fontsize*count); 1905 } else { 1906 for (c = ch; count > 0; ++c, --count) { 1907 bcopy_toio(data, segment + c*32, fontsize); 1908 data += fontsize; 1909 } 1910 } 1911 set_normal_mode(adp, buf); 1912 1913#ifdef VGA_ALT_SEQACCESS 1914 if (adp->va_type == KD_VGA) { 1915 s = splhigh(); 1916 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1917 outb(TSIDX, 0x01); outb(TSREG, val & 0xdf); /* enable screen */ 1918 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1919 splx(s); 1920 } 1921#endif 1922 1923 return 0; 1924#else /* VGA_NO_FONT_LOADING */ 1925 return ENODEV; 1926#endif /* VGA_NO_FONT_LOADING */ 1927} 1928 1929/* 1930 * show_font(): 1931 * Activate the requested font page. 1932 * NOTE: it appears that some recent video adapters do not support 1933 * the font page other than 0... XXX 1934 * 1935 * EGA/VGA 1936 */ 1937static int 1938vga_show_font(video_adapter_t *adp, int page) 1939{ 1940#ifndef VGA_NO_FONT_LOADING 1941 static u_char cg[] = { 0x00, 0x05, 0x0a, 0x0f, 0x30, 0x35, 0x3a, 0x3f }; 1942 int s; 1943 1944 prologue(adp, V_ADP_FONT, ENODEV); 1945 if (page < 0 || page >= 8) 1946 return EINVAL; 1947 1948 s = splhigh(); 1949 outb(TSIDX, 0x03); outb(TSREG, cg[page]); 1950 splx(s); 1951 1952 return 0; 1953#else /* VGA_NO_FONT_LOADING */ 1954 return ENODEV; 1955#endif /* VGA_NO_FONT_LOADING */ 1956} 1957 1958/* 1959 * save_palette(): 1960 * Read DAC values. The values have expressed in 8 bits. 1961 * 1962 * VGA 1963 */ 1964static int 1965vga_save_palette(video_adapter_t *adp, u_char *palette) 1966{ 1967 int i; 1968 1969 prologue(adp, V_ADP_PALETTE, ENODEV); 1970 1971 /* 1972 * We store 8 bit values in the palette buffer, while the standard 1973 * VGA has 6 bit DAC . 1974 */ 1975 outb(PALRADR, 0x00); 1976 for (i = 0; i < 256*3; ++i) 1977 palette[i] = inb(PALDATA) << 2; 1978 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 1979 return 0; 1980} 1981 1982static int 1983vga_save_palette2(video_adapter_t *adp, int base, int count, 1984 u_char *r, u_char *g, u_char *b) 1985{ 1986 int i; 1987 1988 prologue(adp, V_ADP_PALETTE, ENODEV); 1989 1990 outb(PALRADR, base); 1991 for (i = 0; i < count; ++i) { 1992 r[i] = inb(PALDATA) << 2; 1993 g[i] = inb(PALDATA) << 2; 1994 b[i] = inb(PALDATA) << 2; 1995 } 1996 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 1997 return 0; 1998} 1999 2000/* 2001 * load_palette(): 2002 * Set DAC values. 2003 * 2004 * VGA 2005 */ 2006static int 2007vga_load_palette(video_adapter_t *adp, u_char *palette) 2008{ 2009 int i; 2010 2011 prologue(adp, V_ADP_PALETTE, ENODEV); 2012 2013 outb(PIXMASK, 0xff); /* no pixelmask */ 2014 outb(PALWADR, 0x00); 2015 for (i = 0; i < 256*3; ++i) 2016 outb(PALDATA, palette[i] >> 2); 2017 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 2018 outb(ATC, 0x20); /* enable palette */ 2019 return 0; 2020} 2021 2022static int 2023vga_load_palette2(video_adapter_t *adp, int base, int count, 2024 u_char *r, u_char *g, u_char *b) 2025{ 2026 int i; 2027 2028 prologue(adp, V_ADP_PALETTE, ENODEV); 2029 2030 outb(PIXMASK, 0xff); /* no pixelmask */ 2031 outb(PALWADR, base); 2032 for (i = 0; i < count; ++i) { 2033 outb(PALDATA, r[i] >> 2); 2034 outb(PALDATA, g[i] >> 2); 2035 outb(PALDATA, b[i] >> 2); 2036 } 2037 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 2038 outb(ATC, 0x20); /* enable palette */ 2039 return 0; 2040} 2041 2042/* 2043 * set_border(): 2044 * Change the border color. 2045 * 2046 * CGA/EGA/VGA 2047 */ 2048static int 2049vga_set_border(video_adapter_t *adp, int color) 2050{ 2051 prologue(adp, V_ADP_BORDER, ENODEV); 2052 2053 switch (adp->va_type) { 2054 case KD_EGA: 2055 case KD_VGA: 2056 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 2057 outb(ATC, 0x31); outb(ATC, color & 0xff); 2058 break; 2059 case KD_CGA: 2060 outb(adp->va_crtc_addr + 5, color & 0x0f); /* color select register */ 2061 break; 2062 case KD_MONO: 2063 case KD_HERCULES: 2064 default: 2065 break; 2066 } 2067 return 0; 2068} 2069 2070/* 2071 * save_state(): 2072 * Read video register values. 2073 * NOTE: this function only reads the standard EGA/VGA registers. 2074 * any extra/extended registers of SVGA adapters are not saved. 2075 * 2076 * VGA 2077 */ 2078static int 2079vga_save_state(video_adapter_t *adp, void *p, size_t size) 2080{ 2081 video_info_t info; 2082 u_char *buf; 2083 int crtc_addr; 2084 int i, j; 2085 int s; 2086 2087 if (size == 0) { 2088 /* return the required buffer size */ 2089 prologue(adp, V_ADP_STATESAVE, 0); 2090 return sizeof(adp_state_t); 2091 } else { 2092 prologue(adp, V_ADP_STATESAVE, ENODEV); 2093 if (size < sizeof(adp_state_t)) 2094 return EINVAL; 2095 } 2096 2097 ((adp_state_t *)p)->sig = V_STATE_SIG; 2098 buf = ((adp_state_t *)p)->regs; 2099 bzero(buf, V_MODE_PARAM_SIZE); 2100 crtc_addr = adp->va_crtc_addr; 2101 2102 s = splhigh(); 2103 2104 outb(TSIDX, 0x00); outb(TSREG, 0x01); /* stop sequencer */ 2105 for (i = 0, j = 5; i < 4; i++) { 2106 outb(TSIDX, i + 1); 2107 buf[j++] = inb(TSREG); 2108 } 2109 buf[9] = inb(MISC + 10); /* dot-clock */ 2110 outb(TSIDX, 0x00); outb(TSREG, 0x03); /* start sequencer */ 2111 2112 for (i = 0, j = 10; i < 25; i++) { /* crtc */ 2113 outb(crtc_addr, i); 2114 buf[j++] = inb(crtc_addr + 1); 2115 } 2116 for (i = 0, j = 35; i < 20; i++) { /* attribute ctrl */ 2117 inb(crtc_addr + 6); /* reset flip-flop */ 2118 outb(ATC, i); 2119 buf[j++] = inb(ATC + 1); 2120 } 2121 for (i = 0, j = 55; i < 9; i++) { /* graph data ctrl */ 2122 outb(GDCIDX, i); 2123 buf[j++] = inb(GDCREG); 2124 } 2125 inb(crtc_addr + 6); /* reset flip-flop */ 2126 outb(ATC, 0x20); /* enable palette */ 2127 2128 splx(s); 2129 2130#if 1 2131 if (vga_get_info(adp, adp->va_mode, &info) == 0) { 2132 if (info.vi_flags & V_INFO_GRAPHICS) { 2133 buf[0] = info.vi_width/info.vi_cwidth; /* COLS */ 2134 buf[1] = info.vi_height/info.vi_cheight - 1; /* ROWS */ 2135 } else { 2136 buf[0] = info.vi_width; /* COLS */ 2137 buf[1] = info.vi_height - 1; /* ROWS */ 2138 } 2139 buf[2] = info.vi_cheight; /* POINTS */ 2140 } else { 2141 /* XXX: shouldn't be happening... */ 2142 printf("vga%d: %s: failed to obtain mode info. (vga_save_state())\n", 2143 adp->va_unit, adp->va_name); 2144 } 2145#else 2146 buf[0] = readb(BIOS_PADDRTOVADDR(0x44a)); /* COLS */ 2147 buf[1] = readb(BIOS_PADDRTOVADDR(0x484)); /* ROWS */ 2148 buf[2] = readb(BIOS_PADDRTOVADDR(0x485)); /* POINTS */ 2149 buf[3] = readb(BIOS_PADDRTOVADDR(0x44c)); 2150 buf[4] = readb(BIOS_PADDRTOVADDR(0x44d)); 2151#endif 2152 2153 return 0; 2154} 2155 2156/* 2157 * load_state(): 2158 * Set video registers at once. 2159 * NOTE: this function only updates the standard EGA/VGA registers. 2160 * any extra/extended registers of SVGA adapters are not changed. 2161 * 2162 * EGA/VGA 2163 */ 2164static int 2165vga_load_state(video_adapter_t *adp, void *p) 2166{ 2167 u_char *buf; 2168 int crtc_addr; 2169 int s; 2170 int i; 2171 2172 prologue(adp, V_ADP_STATELOAD, ENODEV); 2173 if (((adp_state_t *)p)->sig != V_STATE_SIG) 2174 return EINVAL; 2175 2176 buf = ((adp_state_t *)p)->regs; 2177 crtc_addr = adp->va_crtc_addr; 2178 2179#if VGA_DEBUG > 1 2180 dump_buffer(buf, V_MODE_PARAM_SIZE); 2181#endif 2182 2183 s = splhigh(); 2184 2185 outb(TSIDX, 0x00); outb(TSREG, 0x01); /* stop sequencer */ 2186 for (i = 0; i < 4; ++i) { /* program sequencer */ 2187 outb(TSIDX, i + 1); 2188 outb(TSREG, buf[i + 5]); 2189 } 2190 outb(MISC, buf[9]); /* set dot-clock */ 2191 outb(TSIDX, 0x00); outb(TSREG, 0x03); /* start sequencer */ 2192 outb(crtc_addr, 0x11); 2193 outb(crtc_addr + 1, inb(crtc_addr + 1) & 0x7F); 2194 for (i = 0; i < 25; ++i) { /* program crtc */ 2195 outb(crtc_addr, i); 2196 outb(crtc_addr + 1, buf[i + 10]); 2197 } 2198 inb(crtc_addr+6); /* reset flip-flop */ 2199 for (i = 0; i < 20; ++i) { /* program attribute ctrl */ 2200 outb(ATC, i); 2201 outb(ATC, buf[i + 35]); 2202 } 2203 for (i = 0; i < 9; ++i) { /* program graph data ctrl */ 2204 outb(GDCIDX, i); 2205 outb(GDCREG, buf[i + 55]); 2206 } 2207 inb(crtc_addr + 6); /* reset flip-flop */ 2208 outb(ATC, 0x20); /* enable palette */ 2209 2210#if notyet /* a temporary workaround for kernel panic, XXX */ 2211#ifndef VGA_NO_BIOS 2212 if (adp->va_unit == V_ADP_PRIMARY) { 2213 writeb(BIOS_PADDRTOVADDR(0x44a), buf[0]); /* COLS */ 2214 writeb(BIOS_PADDRTOVADDR(0x484), buf[1] + rows_offset - 1); /* ROWS */ 2215 writeb(BIOS_PADDRTOVADDR(0x485), buf[2]); /* POINTS */ 2216#if 0 2217 writeb(BIOS_PADDRTOVADDR(0x44c), buf[3]); 2218 writeb(BIOS_PADDRTOVADDR(0x44d), buf[4]); 2219#endif 2220 } 2221#endif /* VGA_NO_BIOS */ 2222#endif /* notyet */ 2223 2224 splx(s); 2225 return 0; 2226} 2227 2228/* 2229 * set_origin(): 2230 * Change the origin (window mapping) of the banked frame buffer. 2231 */ 2232static int 2233vga_set_origin(video_adapter_t *adp, off_t offset) 2234{ 2235 /* 2236 * The standard video modes do not require window mapping; 2237 * always return error. 2238 */ 2239 return ENODEV; 2240} 2241 2242/* 2243 * read_hw_cursor(): 2244 * Read the position of the hardware text cursor. 2245 * 2246 * all adapters 2247 */ 2248static int 2249vga_read_hw_cursor(video_adapter_t *adp, int *col, int *row) 2250{ 2251 u_int16_t off; 2252 int s; 2253 2254 if (!vga_init_done) 2255 return ENXIO; 2256 2257 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) 2258 return ENODEV; 2259 2260 s = spltty(); 2261 outb(adp->va_crtc_addr, 14); 2262 off = inb(adp->va_crtc_addr + 1); 2263 outb(adp->va_crtc_addr, 15); 2264 off = (off << 8) | inb(adp->va_crtc_addr + 1); 2265 splx(s); 2266 2267 *row = off / adp->va_info.vi_width; 2268 *col = off % adp->va_info.vi_width; 2269 2270 return 0; 2271} 2272 2273/* 2274 * set_hw_cursor(): 2275 * Move the hardware text cursor. If col and row are both -1, 2276 * the cursor won't be shown. 2277 * 2278 * all adapters 2279 */ 2280static int 2281vga_set_hw_cursor(video_adapter_t *adp, int col, int row) 2282{ 2283 u_int16_t off; 2284 int s; 2285 2286 if (!vga_init_done) 2287 return ENXIO; 2288 2289 if ((col == -1) && (row == -1)) { 2290 off = -1; 2291 } else { 2292 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) 2293 return ENODEV; 2294 off = row*adp->va_info.vi_width + col; 2295 } 2296 2297 s = spltty(); 2298 outb(adp->va_crtc_addr, 14); 2299 outb(adp->va_crtc_addr + 1, off >> 8); 2300 outb(adp->va_crtc_addr, 15); 2301 outb(adp->va_crtc_addr + 1, off & 0x00ff); 2302 splx(s); 2303 2304 return 0; 2305} 2306 2307/* 2308 * set_hw_cursor_shape(): 2309 * Change the shape of the hardware text cursor. If the height is 2310 * zero or negative, the cursor won't be shown. 2311 * 2312 * all adapters 2313 */ 2314static int 2315vga_set_hw_cursor_shape(video_adapter_t *adp, int base, int height, 2316 int celsize, int blink) 2317{ 2318 int s; 2319 2320 if (!vga_init_done) 2321 return ENXIO; 2322 2323 s = spltty(); 2324 switch (adp->va_type) { 2325 case KD_VGA: 2326 case KD_CGA: 2327 case KD_MONO: 2328 case KD_HERCULES: 2329 default: 2330 if (height <= 0) { 2331 /* make the cursor invisible */ 2332 outb(adp->va_crtc_addr, 10); 2333 outb(adp->va_crtc_addr + 1, 32); 2334 outb(adp->va_crtc_addr, 11); 2335 outb(adp->va_crtc_addr + 1, 0); 2336 } else { 2337 outb(adp->va_crtc_addr, 10); 2338 outb(adp->va_crtc_addr + 1, celsize - base - height); 2339 outb(adp->va_crtc_addr, 11); 2340 outb(adp->va_crtc_addr + 1, celsize - base - 1); 2341 } 2342 break; 2343 case KD_EGA: 2344 if (height <= 0) { 2345 /* make the cursor invisible */ 2346 outb(adp->va_crtc_addr, 10); 2347 outb(adp->va_crtc_addr + 1, celsize); 2348 outb(adp->va_crtc_addr, 11); 2349 outb(adp->va_crtc_addr + 1, 0); 2350 } else { 2351 outb(adp->va_crtc_addr, 10); 2352 outb(adp->va_crtc_addr + 1, celsize - base - height); 2353 outb(adp->va_crtc_addr, 11); 2354 outb(adp->va_crtc_addr + 1, celsize - base); 2355 } 2356 break; 2357 } 2358 splx(s); 2359 2360 return 0; 2361} 2362 2363/* 2364 * blank_display() 2365 * Put the display in power save/power off mode. 2366 * 2367 * all adapters 2368 */ 2369static int 2370vga_blank_display(video_adapter_t *adp, int mode) 2371{ 2372 u_char val; 2373 int s; 2374 2375 s = splhigh(); 2376 switch (adp->va_type) { 2377 case KD_VGA: 2378 switch (mode) { 2379 case V_DISPLAY_SUSPEND: 2380 case V_DISPLAY_STAND_BY: 2381 outb(TSIDX, 0x01); 2382 val = inb(TSREG); 2383 outb(TSIDX, 0x01); 2384 outb(TSREG, val | 0x20); 2385 outb(adp->va_crtc_addr, 0x17); 2386 val = inb(adp->va_crtc_addr + 1); 2387 outb(adp->va_crtc_addr + 1, val & ~0x80); 2388 break; 2389 case V_DISPLAY_BLANK: 2390 outb(TSIDX, 0x01); 2391 val = inb(TSREG); 2392 outb(TSIDX, 0x01); 2393 outb(TSREG, val | 0x20); 2394 break; 2395 case V_DISPLAY_ON: 2396 outb(TSIDX, 0x01); 2397 val = inb(TSREG); 2398 outb(TSIDX, 0x01); 2399 outb(TSREG, val & 0xDF); 2400 outb(adp->va_crtc_addr, 0x17); 2401 val = inb(adp->va_crtc_addr + 1); 2402 outb(adp->va_crtc_addr + 1, val | 0x80); 2403 break; 2404 } 2405 break; 2406 2407 case KD_EGA: 2408 /* no support yet */ 2409 return ENODEV; 2410 2411 case KD_CGA: 2412 switch (mode) { 2413 case V_DISPLAY_SUSPEND: 2414 case V_DISPLAY_STAND_BY: 2415 case V_DISPLAY_BLANK: 2416 outb(adp->va_crtc_addr + 4, 0x25); 2417 break; 2418 case V_DISPLAY_ON: 2419 outb(adp->va_crtc_addr + 4, 0x2d); 2420 break; 2421 } 2422 break; 2423 2424 case KD_MONO: 2425 case KD_HERCULES: 2426 switch (mode) { 2427 case V_DISPLAY_SUSPEND: 2428 case V_DISPLAY_STAND_BY: 2429 case V_DISPLAY_BLANK: 2430 outb(adp->va_crtc_addr + 4, 0x21); 2431 break; 2432 case V_DISPLAY_ON: 2433 outb(adp->va_crtc_addr + 4, 0x29); 2434 break; 2435 } 2436 break; 2437 default: 2438 break; 2439 } 2440 splx(s); 2441 2442 return 0; 2443} 2444 2445/* 2446 * mmap(): 2447 * Mmap frame buffer. 2448 * 2449 * all adapters 2450 */ 2451static int 2452vga_mmap_buf(video_adapter_t *adp, vm_offset_t offset, int prot) 2453{ 2454 if (adp->va_info.vi_flags & V_INFO_LINEAR) 2455 return -1; 2456 2457#if VGA_DEBUG > 0 2458 printf("vga_mmap_buf(): window:0x%x, offset:0x%x\n", 2459 adp->va_info.vi_window, offset); 2460#endif 2461 2462 /* XXX: is this correct? */ 2463 if (offset > adp->va_window_size - PAGE_SIZE) 2464 return -1; 2465 2466#ifdef __i386__ 2467 return i386_btop(adp->va_info.vi_window + offset); 2468#endif 2469#ifdef __alpha__ 2470 return alpha_btop(adp->va_info.vi_window + offset); 2471#endif 2472} 2473 2474#ifndef VGA_NO_MODE_CHANGE 2475 2476static void 2477planar_fill(video_adapter_t *adp, int val) 2478{ 2479 int length; 2480 int at; /* position in the frame buffer */ 2481 int l; 2482 2483 outw(GDCIDX, 0x0005); /* read mode 0, write mode 0 */ 2484 outw(GDCIDX, 0x0003); /* data rotate/function select */ 2485 outw(GDCIDX, 0x0f01); /* set/reset enable */ 2486 outw(GDCIDX, 0xff08); /* bit mask */ 2487 outw(GDCIDX, (val << 8) | 0x00); /* set/reset */ 2488 at = 0; 2489 length = adp->va_line_width*adp->va_info.vi_height; 2490 while (length > 0) { 2491 l = imin(length, adp->va_window_size); 2492 (*vidsw[adp->va_index]->set_win_org)(adp, at); 2493 bzero_io(adp->va_window, l); 2494 length -= l; 2495 at += l; 2496 } 2497 outw(GDCIDX, 0x0000); /* set/reset */ 2498 outw(GDCIDX, 0x0001); /* set/reset enable */ 2499} 2500 2501static void 2502packed_fill(video_adapter_t *adp, int val) 2503{ 2504 int length; 2505 int at; /* position in the frame buffer */ 2506 int l; 2507 2508 at = 0; 2509 length = adp->va_line_width*adp->va_info.vi_height; 2510 while (length > 0) { 2511 l = imin(length, adp->va_window_size); 2512 (*vidsw[adp->va_index]->set_win_org)(adp, at); 2513 fill_io(val, adp->va_window, l); 2514 length -= l; 2515 at += l; 2516 } 2517} 2518 2519static void 2520direct_fill(video_adapter_t *adp, int val) 2521{ 2522 int length; 2523 int at; /* position in the frame buffer */ 2524 int l; 2525 2526 at = 0; 2527 length = adp->va_line_width*adp->va_info.vi_height; 2528 while (length > 0) { 2529 l = imin(length, adp->va_window_size); 2530 (*vidsw[adp->va_index]->set_win_org)(adp, at); 2531 switch (adp->va_info.vi_pixel_size) { 2532 case sizeof(u_int16_t): 2533 fillw_io(val, adp->va_window, l/sizeof(u_int16_t)); 2534 break; 2535 case 3: 2536 /* FIXME */ 2537 break; 2538 case sizeof(u_int32_t): 2539 filll_io(val, adp->va_window, l/sizeof(u_int32_t)); 2540 break; 2541 } 2542 length -= l; 2543 at += l; 2544 } 2545} 2546 2547static int 2548vga_clear(video_adapter_t *adp) 2549{ 2550 switch (adp->va_info.vi_mem_model) { 2551 case V_INFO_MM_TEXT: 2552 /* do nothing? XXX */ 2553 break; 2554 case V_INFO_MM_PLANAR: 2555 planar_fill(adp, 0); 2556 break; 2557 case V_INFO_MM_PACKED: 2558 packed_fill(adp, 0); 2559 break; 2560 case V_INFO_MM_DIRECT: 2561 direct_fill(adp, 0); 2562 break; 2563 } 2564 return 0; 2565} 2566 2567#ifdef notyet 2568static void 2569planar_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2570{ 2571 int banksize; 2572 int bank; 2573 int pos; 2574 int offset; /* offset within window */ 2575 int bx; 2576 int l; 2577 2578 outw(GDCIDX, 0x0005); /* read mode 0, write mode 0 */ 2579 outw(GDCIDX, 0x0003); /* data rotate/function select */ 2580 outw(GDCIDX, 0x0f01); /* set/reset enable */ 2581 outw(GDCIDX, 0xff08); /* bit mask */ 2582 outw(GDCIDX, (val << 8) | 0x00); /* set/reset */ 2583 2584 banksize = adp->va_window_size; 2585 bank = -1; 2586 while (cy > 0) { 2587 pos = adp->va_line_width*y + x/8; 2588 if (bank != pos/banksize) { 2589 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2590 bank = pos/banksize; 2591 } 2592 offset = pos%banksize; 2593 bx = (x + cx)/8 - x/8; 2594 if (x % 8) { 2595 outw(GDCIDX, ((0xff00 >> (x % 8)) & 0xff00) | 0x08); 2596 writeb(adp->va_window + offset, 0); 2597 ++offset; 2598 --bx; 2599 if (offset >= banksize) { 2600 offset = 0; 2601 ++bank; /* next bank */ 2602 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2603 } 2604 outw(GDCIDX, 0xff08); /* bit mask */ 2605 } 2606 while (bx > 0) { 2607 l = imin(bx, banksize); 2608 bzero_io(adp->va_window + offset, l); 2609 offset += l; 2610 bx -= l; 2611 if (offset >= banksize) { 2612 offset = 0; 2613 ++bank; /* next bank */ 2614 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2615 } 2616 } 2617 if ((x + cx) % 8) { 2618 outw(GDCIDX, (~(0xff00 >> ((x + cx) % 8)) & 0xff00) | 0x08); 2619 writeb(adp->va_window + offset, 0); 2620 ++offset; 2621 if (offset >= banksize) { 2622 offset = 0; 2623 ++bank; /* next bank */ 2624 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2625 } 2626 outw(GDCIDX, 0xff08); /* bit mask */ 2627 } 2628 ++y; 2629 --cy; 2630 } 2631 2632 outw(GDCIDX, 0xff08); /* bit mask */ 2633 outw(GDCIDX, 0x0000); /* set/reset */ 2634 outw(GDCIDX, 0x0001); /* set/reset enable */ 2635} 2636 2637static void 2638packed_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2639{ 2640 int banksize; 2641 int bank; 2642 int pos; 2643 int offset; /* offset within window */ 2644 int end; 2645 2646 banksize = adp->va_window_size; 2647 bank = -1; 2648 cx *= adp->va_info.vi_pixel_size; 2649 while (cy > 0) { 2650 pos = adp->va_line_width*y + x*adp->va_info.vi_pixel_size; 2651 if (bank != pos/banksize) { 2652 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2653 bank = pos/banksize; 2654 } 2655 offset = pos%banksize; 2656 end = imin(offset + cx, banksize); 2657 fill_io(val, adp->va_window + offset, 2658 (end - offset)/adp->va_info.vi_pixel_size); 2659 /* the line may cross the window boundary */ 2660 if (offset + cx > banksize) { 2661 ++bank; /* next bank */ 2662 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2663 end = offset + cx - banksize; 2664 fill_io(val, adp->va_window, end/adp->va_info.vi_pixel_size); 2665 } 2666 ++y; 2667 --cy; 2668 } 2669} 2670 2671static void 2672direct_fill_rect16(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2673{ 2674 int banksize; 2675 int bank; 2676 int pos; 2677 int offset; /* offset within window */ 2678 int end; 2679 2680 /* 2681 * XXX: the function assumes that banksize is a muliple of 2682 * sizeof(u_int16_t). 2683 */ 2684 banksize = adp->va_window_size; 2685 bank = -1; 2686 cx *= sizeof(u_int16_t); 2687 while (cy > 0) { 2688 pos = adp->va_line_width*y + x*sizeof(u_int16_t); 2689 if (bank != pos/banksize) { 2690 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2691 bank = pos/banksize; 2692 } 2693 offset = pos%banksize; 2694 end = imin(offset + cx, banksize); 2695 fillw_io(val, adp->va_window + offset, 2696 (end - offset)/sizeof(u_int16_t)); 2697 /* the line may cross the window boundary */ 2698 if (offset + cx > banksize) { 2699 ++bank; /* next bank */ 2700 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2701 end = offset + cx - banksize; 2702 fillw_io(val, adp->va_window, end/sizeof(u_int16_t)); 2703 } 2704 ++y; 2705 --cy; 2706 } 2707} 2708 2709static void 2710direct_fill_rect24(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2711{ 2712 int banksize; 2713 int bank; 2714 int pos; 2715 int offset; /* offset within window */ 2716 int end; 2717 int i; 2718 int j; 2719 u_int8_t b[3]; 2720 2721 b[0] = val & 0x0000ff; 2722 b[1] = (val >> 8) & 0x0000ff; 2723 b[2] = (val >> 16) & 0x0000ff; 2724 banksize = adp->va_window_size; 2725 bank = -1; 2726 cx *= 3; 2727 while (cy > 0) { 2728 pos = adp->va_line_width*y + x*3; 2729 if (bank != pos/banksize) { 2730 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2731 bank = pos/banksize; 2732 } 2733 offset = pos%banksize; 2734 end = imin(offset + cx, banksize); 2735 for (i = 0, j = offset; j < end; i = (++i)%3, ++j) { 2736 writeb(adp->va_window + j, b[i]); 2737 } 2738 /* the line may cross the window boundary */ 2739 if (offset + cx >= banksize) { 2740 ++bank; /* next bank */ 2741 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2742 j = 0; 2743 end = offset + cx - banksize; 2744 for (; j < end; i = (++i)%3, ++j) { 2745 writeb(adp->va_window + j, b[i]); 2746 } 2747 } 2748 ++y; 2749 --cy; 2750 } 2751} 2752 2753static void 2754direct_fill_rect32(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2755{ 2756 int banksize; 2757 int bank; 2758 int pos; 2759 int offset; /* offset within window */ 2760 int end; 2761 2762 /* 2763 * XXX: the function assumes that banksize is a muliple of 2764 * sizeof(u_int32_t). 2765 */ 2766 banksize = adp->va_window_size; 2767 bank = -1; 2768 cx *= sizeof(u_int32_t); 2769 while (cy > 0) { 2770 pos = adp->va_line_width*y + x*sizeof(u_int32_t); 2771 if (bank != pos/banksize) { 2772 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2773 bank = pos/banksize; 2774 } 2775 offset = pos%banksize; 2776 end = imin(offset + cx, banksize); 2777 filll_io(val, adp->va_window + offset, 2778 (end - offset)/sizeof(u_int32_t)); 2779 /* the line may cross the window boundary */ 2780 if (offset + cx > banksize) { 2781 ++bank; /* next bank */ 2782 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2783 end = offset + cx - banksize; 2784 filll_io(val, adp->va_window, end/sizeof(u_int32_t)); 2785 } 2786 ++y; 2787 --cy; 2788 } 2789} 2790 2791static int 2792vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2793{ 2794 switch (adp->va_info.vi_mem_model) { 2795 case V_INFO_MM_TEXT: 2796 /* do nothing? XXX */ 2797 break; 2798 case V_INFO_MM_PLANAR: 2799 planar_fill_rect(adp, val, x, y, cx, cy); 2800 break; 2801 case V_INFO_MM_PACKED: 2802 packed_fill_rect(adp, val, x, y, cx, cy); 2803 break; 2804 case V_INFO_MM_DIRECT: 2805 switch (adp->va_info.vi_pixel_size) { 2806 case sizeof(u_int16_t): 2807 direct_fill_rect16(adp, val, x, y, cx, cy); 2808 break; 2809 case 3: 2810 direct_fill_rect24(adp, val, x, y, cx, cy); 2811 break; 2812 case sizeof(u_int32_t): 2813 direct_fill_rect32(adp, val, x, y, cx, cy); 2814 break; 2815 } 2816 break; 2817 } 2818 return 0; 2819} 2820#else /* !notyet */ 2821static int 2822vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2823{ 2824 return ENODEV; 2825} 2826#endif /* notyet */ 2827 2828static int 2829vga_bitblt(video_adapter_t *adp,...) 2830{ 2831 /* FIXME */ 2832 return ENODEV; 2833} 2834 2835#endif /* !VGA_NO_MODE_CHANGE */ 2836 2837static int 2838get_palette(video_adapter_t *adp, int base, int count, 2839 u_char *red, u_char *green, u_char *blue, u_char *trans) 2840{ 2841 u_char *r; 2842 u_char *g; 2843 u_char *b; 2844 2845 if ((base < 0) || (base >= 256) || (base + count > 256)) 2846 return EINVAL; 2847 2848 r = malloc(count*3, M_DEVBUF, M_WAITOK); 2849 g = r + count; 2850 b = g + count; 2851 if (vga_save_palette2(adp, base, count, r, g, b)) 2852 return ENODEV; 2853 copyout(r, red, count); 2854 copyout(g, green, count); 2855 copyout(b, blue, count); 2856 if (trans != NULL) { 2857 bzero(r, count); 2858 copyout(r, trans, count); 2859 } 2860 free(r, M_DEVBUF); 2861 2862 return 0; 2863} 2864 2865static int 2866set_palette(video_adapter_t *adp, int base, int count, 2867 u_char *red, u_char *green, u_char *blue, u_char *trans) 2868{ 2869 u_char *r; 2870 u_char *g; 2871 u_char *b; 2872 int err; 2873 2874 if ((base < 0) || (base >= 256) || (base + count > 256)) 2875 return EINVAL; 2876 2877 r = malloc(count*3, M_DEVBUF, M_WAITOK); 2878 g = r + count; 2879 b = g + count; 2880 copyin(red, r, count); 2881 copyin(green, g, count); 2882 copyin(blue, b, count); 2883 err = vga_load_palette2(adp, base, count, r, g, b); 2884 free(r, M_DEVBUF); 2885 2886 return (err ? ENODEV : 0); 2887} 2888 2889static int 2890vga_dev_ioctl(video_adapter_t *adp, u_long cmd, caddr_t arg) 2891{ 2892 switch (cmd) { 2893 case FBIO_GETWINORG: /* get frame buffer window origin */ 2894 *(u_int *)arg = 0; 2895 return 0; 2896 2897 case FBIO_SETWINORG: /* set frame buffer window origin */ 2898 return ENODEV; 2899 2900 case FBIO_SETDISPSTART: /* set display start address */ 2901 return (set_display_start(adp, 2902 ((video_display_start_t *)arg)->x, 2903 ((video_display_start_t *)arg)->y) 2904 ? ENODEV : 0); 2905 2906 case FBIO_SETLINEWIDTH: /* set scan line length in pixel */ 2907 return (set_line_length(adp, *(u_int *)arg) ? ENODEV : 0); 2908 2909 case FBIO_GETPALETTE: /* get color palette */ 2910 return get_palette(adp, ((video_color_palette_t *)arg)->index, 2911 ((video_color_palette_t *)arg)->count, 2912 ((video_color_palette_t *)arg)->red, 2913 ((video_color_palette_t *)arg)->green, 2914 ((video_color_palette_t *)arg)->blue, 2915 ((video_color_palette_t *)arg)->transparent); 2916 2917 case FBIO_SETPALETTE: /* set color palette */ 2918 return set_palette(adp, ((video_color_palette_t *)arg)->index, 2919 ((video_color_palette_t *)arg)->count, 2920 ((video_color_palette_t *)arg)->red, 2921 ((video_color_palette_t *)arg)->green, 2922 ((video_color_palette_t *)arg)->blue, 2923 ((video_color_palette_t *)arg)->transparent); 2924 2925 case FBIOGTYPE: /* get frame buffer type info. */ 2926 ((struct fbtype *)arg)->fb_type = fb_type(adp->va_type); 2927 ((struct fbtype *)arg)->fb_height = adp->va_info.vi_height; 2928 ((struct fbtype *)arg)->fb_width = adp->va_info.vi_width; 2929 ((struct fbtype *)arg)->fb_depth = adp->va_info.vi_depth; 2930 if ((adp->va_info.vi_depth <= 1) || (adp->va_info.vi_depth > 8)) 2931 ((struct fbtype *)arg)->fb_cmsize = 0; 2932 else 2933 ((struct fbtype *)arg)->fb_cmsize = 1 << adp->va_info.vi_depth; 2934 ((struct fbtype *)arg)->fb_size = adp->va_buffer_size; 2935 return 0; 2936 2937 case FBIOGETCMAP: /* get color palette */ 2938 return get_palette(adp, ((struct fbcmap *)arg)->index, 2939 ((struct fbcmap *)arg)->count, 2940 ((struct fbcmap *)arg)->red, 2941 ((struct fbcmap *)arg)->green, 2942 ((struct fbcmap *)arg)->blue, NULL); 2943 2944 case FBIOPUTCMAP: /* set color palette */ 2945 return set_palette(adp, ((struct fbcmap *)arg)->index, 2946 ((struct fbcmap *)arg)->count, 2947 ((struct fbcmap *)arg)->red, 2948 ((struct fbcmap *)arg)->green, 2949 ((struct fbcmap *)arg)->blue, NULL); 2950 2951 default: 2952 return fb_commonioctl(adp, cmd, arg); 2953 } 2954} 2955 2956static void 2957dump_buffer(u_char *buf, size_t len) 2958{ 2959 int i; 2960 2961 for(i = 0; i < len;) { 2962 printf("%02x ", buf[i]); 2963 if ((++i % 16) == 0) 2964 printf("\n"); 2965 } 2966} 2967 2968/* 2969 * diag(): 2970 * Print some information about the video adapter and video modes, 2971 * with requested level of details. 2972 * 2973 * all adapters 2974 */ 2975static int 2976vga_diag(video_adapter_t *adp, int level) 2977{ 2978 u_char *mp; 2979#if FB_DEBUG > 1 2980 video_info_t info; 2981 int i; 2982#endif 2983 2984 if (!vga_init_done) 2985 return ENXIO; 2986 2987#if FB_DEBUG > 1 2988#ifndef VGA_NO_BIOS 2989 printf("vga: RTC equip. code:0x%02x, DCC code:0x%02x\n", 2990 rtcin(RTC_EQUIPMENT), readb(BIOS_PADDRTOVADDR(0x488))); 2991 printf("vga: CRTC:0x%x, video option:0x%02x, ", 2992 readw(BIOS_PADDRTOVADDR(0x463)), 2993 readb(BIOS_PADDRTOVADDR(0x487))); 2994 printf("rows:%d, cols:%d, font height:%d\n", 2995 readb(BIOS_PADDRTOVADDR(0x44a)), 2996 readb(BIOS_PADDRTOVADDR(0x484)) + 1, 2997 readb(BIOS_PADDRTOVADDR(0x485))); 2998#endif /* VGA_NO_BIOS */ 2999#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 3000 printf("vga: param table EGA/VGA:%p", video_mode_ptr); 3001 printf(", CGA/MDA:%p\n", video_mode_ptr2); 3002 printf("vga: rows_offset:%d\n", rows_offset); 3003#endif 3004#endif /* FB_DEBUG > 1 */ 3005 3006 fb_dump_adp_info(VGA_DRIVER_NAME, adp, level); 3007 3008#if FB_DEBUG > 1 3009 if (adp->va_flags & V_ADP_MODECHANGE) { 3010 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 3011 if (bios_vmode[i].vi_mode == NA) 3012 continue; 3013 if (get_mode_param(bios_vmode[i].vi_mode) == NULL) 3014 continue; 3015 fb_dump_mode_info(VGA_DRIVER_NAME, adp, &bios_vmode[i], level); 3016 } 3017 } else { 3018 vga_get_info(adp, adp->va_initial_mode, &info); /* shouldn't fail */ 3019 fb_dump_mode_info(VGA_DRIVER_NAME, adp, &info, level); 3020 } 3021#endif /* FB_DEBUG > 1 */ 3022 3023 if ((adp->va_type != KD_EGA) && (adp->va_type != KD_VGA)) 3024 return 0; 3025#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 3026 if (video_mode_ptr == NULL) 3027 printf("vga%d: %s: WARNING: video mode switching is not " 3028 "fully supported on this adapter\n", 3029 adp->va_unit, adp->va_name); 3030#endif 3031 if (level <= 0) 3032 return 0; 3033 3034 if (adp->va_type == KD_VGA) { 3035 printf("VGA parameters upon power-up\n"); 3036 dump_buffer(adpstate.regs, sizeof(adpstate.regs)); 3037 printf("VGA parameters in BIOS for mode %d\n", adp->va_initial_mode); 3038 dump_buffer(adpstate2.regs, sizeof(adpstate2.regs)); 3039 } 3040 3041 mp = get_mode_param(adp->va_initial_mode); 3042 if (mp == NULL) /* this shouldn't be happening */ 3043 return 0; 3044 printf("EGA/VGA parameters to be used for mode %d\n", adp->va_initial_mode); 3045 dump_buffer(mp, V_MODE_PARAM_SIZE); 3046 3047 return 0; 3048} 3049