vga.c revision 56522
1/*- 2 * Copyright (c) 1999 Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp> 3 * Copyright (c) 1992-1998 S�ren Schmidt 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer as 11 * the first lines of this file unmodified. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * $FreeBSD: head/sys/dev/fb/vga.c 56522 2000-01-24 09:22:51Z dfr $ 30 */ 31 32#include "vga.h" 33#include "opt_vga.h" 34#include "opt_fb.h" 35#include "opt_syscons.h" /* should be removed in the future, XXX */ 36 37#if NVGA > 0 38 39#include <sys/param.h> 40#include <sys/systm.h> 41#include <sys/kernel.h> 42#include <sys/conf.h> 43#include <sys/proc.h> 44#include <sys/fcntl.h> 45#include <sys/malloc.h> 46#include <sys/fbio.h> 47 48#include <vm/vm.h> 49#include <vm/vm_param.h> 50#include <vm/pmap.h> 51 52#include <machine/md_var.h> 53#include <machine/pc/bios.h> 54 55#include <dev/fb/fbreg.h> 56#include <dev/fb/vgareg.h> 57 58#include <isa/isareg.h> 59 60#ifndef VGA_DEBUG 61#define VGA_DEBUG 0 62#endif 63 64int 65vga_probe_unit(int unit, video_adapter_t *buf, int flags) 66{ 67 video_adapter_t *adp; 68 video_switch_t *sw; 69 int error; 70 71 sw = vid_get_switch(VGA_DRIVER_NAME); 72 if (sw == NULL) 73 return 0; 74 error = (*sw->probe)(unit, &adp, NULL, flags); 75 if (error) 76 return error; 77 bcopy(adp, buf, sizeof(*buf)); 78 return 0; 79} 80 81int 82vga_attach_unit(int unit, vga_softc_t *sc, int flags) 83{ 84 video_switch_t *sw; 85 int error; 86 87 sw = vid_get_switch(VGA_DRIVER_NAME); 88 if (sw == NULL) 89 return ENXIO; 90 91 error = (*sw->probe)(unit, &sc->adp, NULL, flags); 92 if (error) 93 return error; 94 return (*sw->init)(unit, sc->adp, flags); 95} 96 97/* cdev driver functions */ 98 99#ifdef FB_INSTALL_CDEV 100 101int 102vga_open(dev_t dev, vga_softc_t *sc, int flag, int mode, struct proc *p) 103{ 104 if (sc == NULL) 105 return ENXIO; 106 if (mode & (O_CREAT | O_APPEND | O_TRUNC)) 107 return ENODEV; 108 109 return genfbopen(&sc->gensc, sc->adp, flag, mode, p); 110} 111 112int 113vga_close(dev_t dev, vga_softc_t *sc, int flag, int mode, struct proc *p) 114{ 115 return genfbclose(&sc->gensc, sc->adp, flag, mode, p); 116} 117 118int 119vga_read(dev_t dev, vga_softc_t *sc, struct uio *uio, int flag) 120{ 121 return genfbread(&sc->gensc, sc->adp, uio, flag); 122} 123 124int 125vga_write(dev_t dev, vga_softc_t *sc, struct uio *uio, int flag) 126{ 127 return genfbread(&sc->gensc, sc->adp, uio, flag); 128} 129 130int 131vga_ioctl(dev_t dev, vga_softc_t *sc, u_long cmd, caddr_t arg, int flag, 132 struct proc *p) 133{ 134 return genfbioctl(&sc->gensc, sc->adp, cmd, arg, flag, p); 135} 136 137int 138vga_mmap(dev_t dev, vga_softc_t *sc, vm_offset_t offset, int prot) 139{ 140 return genfbmmap(&sc->gensc, sc->adp, offset, prot); 141} 142 143#endif /* FB_INSTALL_CDEV */ 144 145/* LOW-LEVEL */ 146 147#include <machine/clock.h> 148#include <machine/pc/vesa.h> 149 150#define probe_done(adp) ((adp)->va_flags & V_ADP_PROBED) 151#define init_done(adp) ((adp)->va_flags & V_ADP_INITIALIZED) 152#define config_done(adp) ((adp)->va_flags & V_ADP_REGISTERED) 153 154/* for compatibility with old kernel options */ 155#ifdef SC_ALT_SEQACCESS 156#undef SC_ALT_SEQACCESS 157#undef VGA_ALT_SEQACCESS 158#define VGA_ALT_SEQACCESS 1 159#endif 160 161#ifdef SLOW_VGA 162#undef SLOW_VGA 163#undef VGA_SLOW_IOACCESS 164#define VGA_SLOW_IOACCESS 1 165#endif 166 167/* architecture dependent option */ 168#ifdef __alpha__ 169#define VGA_NO_BIOS 1 170#endif 171 172/* this should really be in `rtc.h' */ 173#define RTC_EQUIPMENT 0x14 174 175/* various sizes */ 176#define V_MODE_MAP_SIZE (M_VGA_CG320 + 1) 177#define V_MODE_PARAM_SIZE 64 178 179/* video adapter state buffer */ 180struct adp_state { 181 int sig; 182#define V_STATE_SIG 0x736f6962 183 u_char regs[V_MODE_PARAM_SIZE]; 184}; 185typedef struct adp_state adp_state_t; 186 187/* video adapter information */ 188#define DCC_MONO 0 189#define DCC_CGA40 1 190#define DCC_CGA80 2 191#define DCC_EGAMONO 3 192#define DCC_EGA40 4 193#define DCC_EGA80 5 194 195/* 196 * NOTE: `va_window' should have a virtual address, but is initialized 197 * with a physical address in the following table, as verify_adapter() 198 * will perform address conversion at run-time. 199 */ 200static video_adapter_t adapter_init_value[] = { 201 /* DCC_MONO */ 202 { 0, KD_MONO, "mda", 0, 0, 0, IO_MDA, IO_MDASIZE, MONO_CRTC, 203 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 204 0, 0, 0, 0, 7, 0, }, 205 /* DCC_CGA40 */ 206 { 0, KD_CGA, "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC, 207 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 208 0, 0, 0, 0, 3, 0, }, 209 /* DCC_CGA80 */ 210 { 0, KD_CGA, "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC, 211 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 212 0, 0, 0, 0, 3, 0, }, 213 /* DCC_EGAMONO */ 214 { 0, KD_EGA, "ega", 0, 0, 0, IO_MDA, 48, MONO_CRTC, 215 EGA_BUF_BASE, EGA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 216 0, 0, 0, 0, 7, 0, }, 217 /* DCC_EGA40 */ 218 { 0, KD_EGA, "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48, COLOR_CRTC, 219 EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 220 0, 0, 0, 0, 3, 0, }, 221 /* DCC_EGA80 */ 222 { 0, KD_EGA, "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48, COLOR_CRTC, 223 EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 224 0, 0, 0, 0, 3, 0, }, 225}; 226 227static video_adapter_t biosadapter[2]; 228static int biosadapters = 0; 229 230/* video driver declarations */ 231static int vga_configure(int flags); 232 int (*vga_sub_configure)(int flags); 233#if 0 234static int vga_nop(void); 235#endif 236static int vga_error(void); 237static vi_probe_t vga_probe; 238static vi_init_t vga_init; 239static vi_get_info_t vga_get_info; 240static vi_query_mode_t vga_query_mode; 241static vi_set_mode_t vga_set_mode; 242static vi_save_font_t vga_save_font; 243static vi_load_font_t vga_load_font; 244static vi_show_font_t vga_show_font; 245static vi_save_palette_t vga_save_palette; 246static vi_load_palette_t vga_load_palette; 247static vi_set_border_t vga_set_border; 248static vi_save_state_t vga_save_state; 249static vi_load_state_t vga_load_state; 250static vi_set_win_org_t vga_set_origin; 251static vi_read_hw_cursor_t vga_read_hw_cursor; 252static vi_set_hw_cursor_t vga_set_hw_cursor; 253static vi_set_hw_cursor_shape_t vga_set_hw_cursor_shape; 254static vi_blank_display_t vga_blank_display; 255static vi_mmap_t vga_mmap_buf; 256static vi_ioctl_t vga_dev_ioctl; 257#ifndef VGA_NO_MODE_CHANGE 258static vi_clear_t vga_clear; 259static vi_fill_rect_t vga_fill_rect; 260static vi_bitblt_t vga_bitblt; 261#else /* VGA_NO_MODE_CHANGE */ 262#define vga_clear (vi_clear_t *)vga_error 263#define vga_fill_rect (vi_fill_rect_t *)vga_error 264#define vga_bitblt (vi_bitblt_t *)vga_error 265#endif 266static vi_diag_t vga_diag; 267 268static video_switch_t vgavidsw = { 269 vga_probe, 270 vga_init, 271 vga_get_info, 272 vga_query_mode, 273 vga_set_mode, 274 vga_save_font, 275 vga_load_font, 276 vga_show_font, 277 vga_save_palette, 278 vga_load_palette, 279 vga_set_border, 280 vga_save_state, 281 vga_load_state, 282 vga_set_origin, 283 vga_read_hw_cursor, 284 vga_set_hw_cursor, 285 vga_set_hw_cursor_shape, 286 vga_blank_display, 287 vga_mmap_buf, 288 vga_dev_ioctl, 289 vga_clear, 290 vga_fill_rect, 291 vga_bitblt, 292 vga_error, 293 vga_error, 294 vga_diag, 295}; 296 297VIDEO_DRIVER(mda, vgavidsw, NULL); 298VIDEO_DRIVER(cga, vgavidsw, NULL); 299VIDEO_DRIVER(ega, vgavidsw, NULL); 300VIDEO_DRIVER(vga, vgavidsw, vga_configure); 301 302/* VGA BIOS standard video modes */ 303#define EOT (-1) 304#define NA (-2) 305 306static video_info_t bios_vmode[] = { 307 /* CGA */ 308 { M_B40x25, V_INFO_COLOR, 40, 25, 8, 8, 2, 1, 309 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 310 { M_C40x25, V_INFO_COLOR, 40, 25, 8, 8, 4, 1, 311 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 312 { M_B80x25, V_INFO_COLOR, 80, 25, 8, 8, 2, 1, 313 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 314 { M_C80x25, V_INFO_COLOR, 80, 25, 8, 8, 4, 1, 315 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 316 /* EGA */ 317 { M_ENH_B40x25, V_INFO_COLOR, 40, 25, 8, 14, 2, 1, 318 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 319 { M_ENH_C40x25, V_INFO_COLOR, 40, 25, 8, 14, 4, 1, 320 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 321 { M_ENH_B80x25, V_INFO_COLOR, 80, 25, 8, 14, 2, 1, 322 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 323 { M_ENH_C80x25, V_INFO_COLOR, 80, 25, 8, 14, 4, 1, 324 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 325 /* VGA */ 326 { M_VGA_C40x25, V_INFO_COLOR, 40, 25, 8, 16, 4, 1, 327 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 328 { M_VGA_M80x25, 0, 80, 25, 8, 16, 2, 1, 329 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 330 { M_VGA_C80x25, V_INFO_COLOR, 80, 25, 8, 16, 4, 1, 331 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 332 /* MDA */ 333 { M_EGAMONO80x25, 0, 80, 25, 8, 14, 2, 1, 334 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 335 /* EGA */ 336 { M_ENH_B80x43, 0, 80, 43, 8, 8, 2, 1, 337 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 338 { M_ENH_C80x43, V_INFO_COLOR, 80, 43, 8, 8, 4, 1, 339 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 340 /* VGA */ 341 { M_VGA_M80x30, 0, 80, 30, 8, 16, 2, 1, 342 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 343 { M_VGA_C80x30, V_INFO_COLOR, 80, 30, 8, 16, 4, 1, 344 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 345 { M_VGA_M80x50, 0, 80, 50, 8, 8, 2, 1, 346 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 347 { M_VGA_C80x50, V_INFO_COLOR, 80, 50, 8, 8, 4, 1, 348 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 349 { M_VGA_M80x60, 0, 80, 60, 8, 8, 2, 1, 350 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 351 { M_VGA_C80x60, V_INFO_COLOR, 80, 60, 8, 8, 4, 1, 352 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 353 354#ifndef VGA_NO_MODE_CHANGE 355 356#ifdef VGA_WIDTH90 357 { M_VGA_M90x25, 0, 90, 25, 8, 16, 2, 1, 358 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 359 { M_VGA_C90x25, V_INFO_COLOR, 90, 25, 8, 16, 4, 1, 360 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 361 { M_VGA_M90x30, 0, 90, 30, 8, 16, 2, 1, 362 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 363 { M_VGA_C90x30, V_INFO_COLOR, 90, 30, 8, 16, 4, 1, 364 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 365 { M_VGA_M90x43, 0, 90, 43, 8, 8, 2, 1, 366 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 367 { M_VGA_C90x43, V_INFO_COLOR, 90, 43, 8, 8, 4, 1, 368 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 369 { M_VGA_M90x50, 0, 90, 50, 8, 8, 2, 1, 370 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 371 { M_VGA_C90x50, V_INFO_COLOR, 90, 50, 8, 8, 4, 1, 372 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 373 { M_VGA_M90x60, 0, 90, 60, 8, 8, 2, 1, 374 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 375 { M_VGA_C90x60, V_INFO_COLOR, 90, 60, 8, 8, 4, 1, 376 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 377#endif /* VGA_WIDTH90 */ 378 379 /* CGA */ 380 { M_BG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 2, 1, 381 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 382 { M_CG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 2, 1, 383 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 384 { M_BG640, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8, 8, 1, 1, 385 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 386 /* EGA */ 387 { M_CG320_D, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 4, 4, 388 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 389 V_INFO_MM_PLANAR }, 390 { M_CG640_E, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8, 8, 4, 4, 391 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 392 V_INFO_MM_PLANAR }, 393 { M_EGAMONOAPA, V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 394 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, 64*1024, 0, 0 , 395 V_INFO_MM_PLANAR }, 396 { M_ENHMONOAPA2,V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 397 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 398 V_INFO_MM_PLANAR }, 399 { M_CG640x350, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 2, 2, 400 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 401 V_INFO_MM_PLANAR }, 402 { M_ENH_CG640, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 403 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 404 V_INFO_MM_PLANAR }, 405 /* VGA */ 406 { M_BG640x480, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4, 407 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 408 V_INFO_MM_PLANAR }, 409 { M_CG640x480, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4, 410 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 411 V_INFO_MM_PLANAR }, 412 { M_VGA_CG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 8, 1, 413 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 414 V_INFO_MM_PACKED, 1 }, 415 { M_VGA_MODEX, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 240, 8, 8, 8, 4, 416 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 417 V_INFO_MM_VGAX, 1 }, 418#endif /* VGA_NO_MODE_CHANGE */ 419 420 { EOT }, 421}; 422 423static int vga_init_done = FALSE; 424#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 425static u_char *video_mode_ptr = NULL; /* EGA/VGA */ 426static u_char *video_mode_ptr2 = NULL; /* CGA/MDA */ 427#endif 428static u_char *mode_map[V_MODE_MAP_SIZE]; 429static adp_state_t adpstate; 430static adp_state_t adpstate2; 431static int rows_offset = 1; 432 433/* local macros and functions */ 434#define BIOS_SADDRTOLADDR(p) ((((p) & 0xffff0000) >> 12) + ((p) & 0x0000ffff)) 435 436#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 437static void map_mode_table(u_char *map[], u_char *table, int max); 438#endif 439static void clear_mode_map(video_adapter_t *adp, u_char *map[], int max, 440 int color); 441#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 442static int map_mode_num(int mode); 443#endif 444static int map_gen_mode_num(int type, int color, int mode); 445static int map_bios_mode_num(int type, int color, int bios_mode); 446static u_char *get_mode_param(int mode); 447#ifndef VGA_NO_BIOS 448static void fill_adapter_param(int code, video_adapter_t *adp); 449#endif 450static int verify_adapter(video_adapter_t *adp); 451static void update_adapter_info(video_adapter_t *adp, video_info_t *info); 452#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 453#define COMP_IDENTICAL 0 454#define COMP_SIMILAR 1 455#define COMP_DIFFERENT 2 456static int comp_adpregs(u_char *buf1, u_char *buf2); 457#endif 458static int probe_adapters(void); 459static int set_line_length(video_adapter_t *adp, int pixel); 460static int set_display_start(video_adapter_t *adp, int x, int y); 461static void filll_io(int val, vm_offset_t d, size_t size); 462 463#ifndef VGA_NO_MODE_CHANGE 464#ifdef VGA_WIDTH90 465static void set_width90(adp_state_t *params); 466#endif 467#endif /* !VGA_NO_MODE_CHANGE */ 468 469#ifndef VGA_NO_FONT_LOADING 470#define PARAM_BUFSIZE 6 471static void set_font_mode(video_adapter_t *adp, u_char *buf); 472static void set_normal_mode(video_adapter_t *adp, u_char *buf); 473#endif 474 475#ifndef VGA_NO_MODE_CHANGE 476static void planar_fill(video_adapter_t *adp, int val); 477static void packed_fill(video_adapter_t *adp, int val); 478static void direct_fill(video_adapter_t *adp, int val); 479#ifdef notyet 480static void planar_fill_rect(video_adapter_t *adp, int val, int x, int y, 481 int cx, int cy); 482static void packed_fill_rect(video_adapter_t *adp, int val, int x, int y, 483 int cx, int cy); 484static void direct_fill_rect16(video_adapter_t *adp, int val, int x, int y, 485 int cx, int cy); 486static void direct_fill_rect24(video_adapter_t *adp, int val, int x, int y, 487 int cx, int cy); 488static void direct_fill_rect32(video_adapter_t *adp, int val, int x, int y, 489 int cx, int cy); 490#endif /* notyet */ 491#endif /* !VGA_NO_MODE_CHANGE */ 492 493static void dump_buffer(u_char *buf, size_t len); 494 495#define ISMAPPED(pa, width) \ 496 (((pa) <= (u_long)0x1000 - (width)) \ 497 || ((pa) >= ISA_HOLE_START && (pa) <= 0x100000 - (width))) 498 499#define prologue(adp, flag, err) \ 500 if (!vga_init_done || !((adp)->va_flags & (flag))) \ 501 return (err) 502 503/* a backdoor for the console driver */ 504static int 505vga_configure(int flags) 506{ 507 int i; 508 509 probe_adapters(); 510 for (i = 0; i < biosadapters; ++i) { 511 if (!probe_done(&biosadapter[i])) 512 continue; 513 biosadapter[i].va_flags |= V_ADP_INITIALIZED; 514 if (!config_done(&biosadapter[i])) { 515 if (vid_register(&biosadapter[i]) < 0) 516 continue; 517 biosadapter[i].va_flags |= V_ADP_REGISTERED; 518 } 519 } 520 if (vga_sub_configure != NULL) 521 (*vga_sub_configure)(flags); 522 523 return biosadapters; 524} 525 526/* local subroutines */ 527 528#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 529/* construct the mode parameter map */ 530static void 531map_mode_table(u_char *map[], u_char *table, int max) 532{ 533 int i; 534 535 for(i = 0; i < max; ++i) 536 map[i] = table + i*V_MODE_PARAM_SIZE; 537 for(; i < V_MODE_MAP_SIZE; ++i) 538 map[i] = NULL; 539} 540#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 541 542static void 543clear_mode_map(video_adapter_t *adp, u_char *map[], int max, int color) 544{ 545 video_info_t info; 546 int i; 547 548 /* 549 * NOTE: we don't touch `bios_vmode[]' because it is shared 550 * by all adapters. 551 */ 552 for(i = 0; i < max; ++i) { 553 if (vga_get_info(adp, i, &info)) 554 continue; 555 if ((info.vi_flags & V_INFO_COLOR) != color) 556 map[i] = NULL; 557 } 558} 559 560#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 561/* map the non-standard video mode to a known mode number */ 562static int 563map_mode_num(int mode) 564{ 565 static struct { 566 int from; 567 int to; 568 } mode_map[] = { 569 { M_ENH_B80x43, M_ENH_B80x25 }, 570 { M_ENH_C80x43, M_ENH_C80x25 }, 571 { M_VGA_M80x30, M_VGA_M80x25 }, 572 { M_VGA_C80x30, M_VGA_C80x25 }, 573 { M_VGA_M80x50, M_VGA_M80x25 }, 574 { M_VGA_C80x50, M_VGA_C80x25 }, 575 { M_VGA_M80x60, M_VGA_M80x25 }, 576 { M_VGA_C80x60, M_VGA_C80x25 }, 577#ifdef VGA_WIDTH90 578 { M_VGA_M90x25, M_VGA_M80x25 }, 579 { M_VGA_C90x25, M_VGA_C80x25 }, 580 { M_VGA_M90x30, M_VGA_M80x25 }, 581 { M_VGA_C90x30, M_VGA_C80x25 }, 582 { M_VGA_M90x43, M_ENH_B80x25 }, 583 { M_VGA_C90x43, M_ENH_C80x25 }, 584 { M_VGA_M90x50, M_VGA_M80x25 }, 585 { M_VGA_C90x50, M_VGA_C80x25 }, 586 { M_VGA_M90x60, M_VGA_M80x25 }, 587 { M_VGA_C90x60, M_VGA_C80x25 }, 588#endif 589 { M_VGA_MODEX, M_VGA_CG320 }, 590 }; 591 int i; 592 593 for (i = 0; i < sizeof(mode_map)/sizeof(mode_map[0]); ++i) { 594 if (mode_map[i].from == mode) 595 return mode_map[i].to; 596 } 597 return mode; 598} 599#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 600 601/* map a generic video mode to a known mode number */ 602static int 603map_gen_mode_num(int type, int color, int mode) 604{ 605 static struct { 606 int from; 607 int to_color; 608 int to_mono; 609 } mode_map[] = { 610 { M_TEXT_80x30, M_VGA_C80x30, M_VGA_M80x30, }, 611 { M_TEXT_80x43, M_ENH_C80x43, M_ENH_B80x43, }, 612 { M_TEXT_80x50, M_VGA_C80x50, M_VGA_M80x50, }, 613 { M_TEXT_80x60, M_VGA_C80x60, M_VGA_M80x60, }, 614 }; 615 int i; 616 617 if (mode == M_TEXT_80x25) { 618 switch (type) { 619 620 case KD_VGA: 621 if (color) 622 return M_VGA_C80x25; 623 else 624 return M_VGA_M80x25; 625 break; 626 627 case KD_EGA: 628 if (color) 629 return M_ENH_C80x25; 630 else 631 return M_EGAMONO80x25; 632 break; 633 634 case KD_CGA: 635 return M_C80x25; 636 637 case KD_MONO: 638 case KD_HERCULES: 639 return M_EGAMONO80x25; /* XXX: this name is confusing */ 640 641 default: 642 return -1; 643 } 644 } 645 646 for (i = 0; i < sizeof(mode_map)/sizeof(mode_map[0]); ++i) { 647 if (mode_map[i].from == mode) 648 return ((color) ? mode_map[i].to_color : mode_map[i].to_mono); 649 } 650 return mode; 651} 652 653/* turn the BIOS video number into our video mode number */ 654static int 655map_bios_mode_num(int type, int color, int bios_mode) 656{ 657 static int cga_modes[7] = { 658 M_B40x25, M_C40x25, /* 0, 1 */ 659 M_B80x25, M_C80x25, /* 2, 3 */ 660 M_BG320, M_CG320, 661 M_BG640, 662 }; 663 static int ega_modes[17] = { 664 M_ENH_B40x25, M_ENH_C40x25, /* 0, 1 */ 665 M_ENH_B80x25, M_ENH_C80x25, /* 2, 3 */ 666 M_BG320, M_CG320, 667 M_BG640, 668 M_EGAMONO80x25, /* 7 */ 669 8, 9, 10, 11, 12, 670 M_CG320_D, 671 M_CG640_E, 672 M_ENHMONOAPA2, /* XXX: video momery > 64K */ 673 M_ENH_CG640, /* XXX: video momery > 64K */ 674 }; 675 static int vga_modes[20] = { 676 M_VGA_C40x25, M_VGA_C40x25, /* 0, 1 */ 677 M_VGA_C80x25, M_VGA_C80x25, /* 2, 3 */ 678 M_BG320, M_CG320, 679 M_BG640, 680 M_VGA_M80x25, /* 7 */ 681 8, 9, 10, 11, 12, 682 M_CG320_D, 683 M_CG640_E, 684 M_ENHMONOAPA2, 685 M_ENH_CG640, 686 M_BG640x480, M_CG640x480, 687 M_VGA_CG320, 688 }; 689 690 switch (type) { 691 692 case KD_VGA: 693 if (bios_mode < sizeof(vga_modes)/sizeof(vga_modes[0])) 694 return vga_modes[bios_mode]; 695 else if (color) 696 return M_VGA_C80x25; 697 else 698 return M_VGA_M80x25; 699 break; 700 701 case KD_EGA: 702 if (bios_mode < sizeof(ega_modes)/sizeof(ega_modes[0])) 703 return ega_modes[bios_mode]; 704 else if (color) 705 return M_ENH_C80x25; 706 else 707 return M_EGAMONO80x25; 708 break; 709 710 case KD_CGA: 711 if (bios_mode < sizeof(cga_modes)/sizeof(cga_modes[0])) 712 return cga_modes[bios_mode]; 713 else 714 return M_C80x25; 715 break; 716 717 case KD_MONO: 718 case KD_HERCULES: 719 return M_EGAMONO80x25; /* XXX: this name is confusing */ 720 721 default: 722 break; 723 } 724 return -1; 725} 726 727/* look up a parameter table entry */ 728static u_char 729*get_mode_param(int mode) 730{ 731#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 732 if (mode >= V_MODE_MAP_SIZE) 733 mode = map_mode_num(mode); 734#endif 735 if ((mode >= 0) && (mode < V_MODE_MAP_SIZE)) 736 return mode_map[mode]; 737 else 738 return NULL; 739} 740 741#ifndef VGA_NO_BIOS 742static void 743fill_adapter_param(int code, video_adapter_t *adp) 744{ 745 static struct { 746 int primary; 747 int secondary; 748 } dcc[] = { 749 { DCC_MONO, DCC_EGA40 /* CGA monitor */ }, 750 { DCC_MONO, DCC_EGA80 /* CGA monitor */ }, 751 { DCC_MONO, DCC_EGA80 }, 752 { DCC_MONO, DCC_EGA80 }, 753 { DCC_CGA40, DCC_EGAMONO }, 754 { DCC_CGA80, DCC_EGAMONO }, 755 { DCC_EGA40 /* CGA monitor */, DCC_MONO}, 756 { DCC_EGA80 /* CGA monitor */, DCC_MONO}, 757 { DCC_EGA80, DCC_MONO }, 758 { DCC_EGA80, DCC_MONO }, 759 { DCC_EGAMONO, DCC_CGA40 }, 760 { DCC_EGAMONO, DCC_CGA80 }, 761 }; 762 763 if ((code < 0) || (code >= sizeof(dcc)/sizeof(dcc[0]))) { 764 adp[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO]; 765 adp[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80]; 766 } else { 767 adp[V_ADP_PRIMARY] = adapter_init_value[dcc[code].primary]; 768 adp[V_ADP_SECONDARY] = adapter_init_value[dcc[code].secondary]; 769 } 770} 771#endif /* VGA_NO_BIOS */ 772 773static int 774verify_adapter(video_adapter_t *adp) 775{ 776 vm_offset_t buf; 777 u_int16_t v; 778#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 779 u_int32_t p; 780#endif 781 782 buf = BIOS_PADDRTOVADDR(adp->va_window); 783 v = readw(buf); 784 writew(buf, 0xA55A); 785 if (readw(buf) != 0xA55A) 786 return ENXIO; 787 writew(buf, v); 788 789 switch (adp->va_type) { 790 791 case KD_EGA: 792 outb(adp->va_crtc_addr, 7); 793 if (inb(adp->va_crtc_addr) == 7) { 794 adp->va_type = KD_VGA; 795 adp->va_name = "vga"; 796 adp->va_flags |= V_ADP_STATESAVE | V_ADP_PALETTE; 797 } 798 adp->va_flags |= V_ADP_STATELOAD | V_ADP_BORDER; 799 /* the color adapter may be in the 40x25 mode... XXX */ 800 801#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 802 /* get the BIOS video mode pointer */ 803 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8); 804 p = BIOS_SADDRTOLADDR(p); 805 if (ISMAPPED(p, sizeof(u_int32_t))) { 806 p = *(u_int32_t *)BIOS_PADDRTOVADDR(p); 807 p = BIOS_SADDRTOLADDR(p); 808 if (ISMAPPED(p, V_MODE_PARAM_SIZE)) 809 video_mode_ptr = (u_char *)BIOS_PADDRTOVADDR(p); 810 } 811#endif 812 break; 813 814 case KD_CGA: 815 adp->va_flags |= V_ADP_COLOR | V_ADP_BORDER; 816 /* may be in the 40x25 mode... XXX */ 817#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 818 /* get the BIOS video mode pointer */ 819 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4); 820 p = BIOS_SADDRTOLADDR(p); 821 video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p); 822#endif 823 break; 824 825 case KD_MONO: 826#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 827 /* get the BIOS video mode pointer */ 828 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4); 829 p = BIOS_SADDRTOLADDR(p); 830 video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p); 831#endif 832 break; 833 } 834 835 return 0; 836} 837 838static void 839update_adapter_info(video_adapter_t *adp, video_info_t *info) 840{ 841 adp->va_flags &= ~V_ADP_COLOR; 842 adp->va_flags |= 843 (info->vi_flags & V_INFO_COLOR) ? V_ADP_COLOR : 0; 844 adp->va_crtc_addr = 845 (adp->va_flags & V_ADP_COLOR) ? COLOR_CRTC : MONO_CRTC; 846 adp->va_window = BIOS_PADDRTOVADDR(info->vi_window); 847 adp->va_window_size = info->vi_window_size; 848 adp->va_window_gran = info->vi_window_gran; 849 adp->va_window_orig = 0; 850 /* XXX */ 851 adp->va_buffer = info->vi_buffer; 852 adp->va_buffer_size = info->vi_buffer_size; 853 if (info->vi_mem_model == V_INFO_MM_VGAX) { 854 adp->va_line_width = info->vi_width/2; 855 } else if (info->vi_flags & V_INFO_GRAPHICS) { 856 switch (info->vi_depth/info->vi_planes) { 857 case 1: 858 adp->va_line_width = info->vi_width/8; 859 break; 860 case 2: 861 adp->va_line_width = info->vi_width/4; 862 break; 863 case 4: 864 adp->va_line_width = info->vi_width/2; 865 break; 866 case 8: 867 default: /* shouldn't happen */ 868 adp->va_line_width = info->vi_width; 869 break; 870 } 871 } else { 872 adp->va_line_width = info->vi_width; 873 } 874 adp->va_disp_start.x = 0; 875 adp->va_disp_start.y = 0; 876 bcopy(info, &adp->va_info, sizeof(adp->va_info)); 877} 878 879#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 880/* compare two parameter table entries */ 881static int 882comp_adpregs(u_char *buf1, u_char *buf2) 883{ 884 static struct { 885 u_char mask; 886 } params[V_MODE_PARAM_SIZE] = { 887 {0xff}, {0x00}, {0xff}, /* COLS}, ROWS}, POINTS */ 888 {0x00}, {0x00}, /* page length */ 889 {0xfe}, {0xff}, {0xff}, {0xff}, /* sequencer registers */ 890 {0xf3}, /* misc register */ 891 {0xff}, {0xff}, {0xff}, {0x7f}, {0xff}, /* CRTC */ 892 {0xff}, {0xff}, {0xff}, {0x7f}, {0xff}, 893 {0x00}, {0x00}, {0x00}, {0x00}, {0x00}, 894 {0x00}, {0xff}, {0x7f}, {0xff}, {0xff}, 895 {0x7f}, {0xff}, {0xff}, {0xef}, {0xff}, 896 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, /* attribute controller regs */ 897 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, 898 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, 899 {0xff}, {0xff}, {0xff}, {0xff}, {0xf0}, 900 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, /* GDC register */ 901 {0xff}, {0xff}, {0xff}, {0xff}, 902 }; 903 int identical = TRUE; 904 int i; 905 906 if ((buf1 == NULL) || (buf2 == NULL)) 907 return COMP_DIFFERENT; 908 909 for (i = 0; i < sizeof(params)/sizeof(params[0]); ++i) { 910 if (params[i].mask == 0) /* don't care */ 911 continue; 912 if ((buf1[i] & params[i].mask) != (buf2[i] & params[i].mask)) 913 return COMP_DIFFERENT; 914 if (buf1[i] != buf2[i]) 915 identical = FALSE; 916 } 917 return (identical) ? COMP_IDENTICAL : COMP_SIMILAR; 918} 919#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 920 921/* probe video adapters and return the number of detected adapters */ 922static int 923probe_adapters(void) 924{ 925 video_adapter_t *adp; 926 video_info_t info; 927#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 928 u_char *mp; 929#endif 930 int i; 931 932 /* do this test only once */ 933 if (vga_init_done) 934 return biosadapters; 935 vga_init_done = TRUE; 936 937 /* 938 * Locate display adapters. 939 * The AT architecture supports upto two adapters. `syscons' allows 940 * the following combinations of adapters: 941 * 1) MDA + CGA 942 * 2) MDA + EGA/VGA color 943 * 3) CGA + EGA/VGA mono 944 * Note that `syscons' doesn't bother with MCGA as it is only 945 * avaiable for low end PS/2 models which has 80286 or earlier CPUs, 946 * thus, they are not running FreeBSD! 947 * When there are two adapaters in the system, one becomes `primary' 948 * and the other `secondary'. The EGA adapter has a set of DIP 949 * switches on board for this information and the EGA BIOS copies 950 * it in the BIOS data area BIOSDATA_VIDEOSWITCH (40:88). 951 * The VGA BIOS has more sophisticated mechanism and has this 952 * information in BIOSDATA_DCCINDEX (40:8a), but it also maintains 953 * compatibility with the EGA BIOS by updating BIOSDATA_VIDEOSWITCH. 954 */ 955 956 /* 957 * Check rtc and BIOS data area. 958 * XXX: we don't use BIOSDATA_EQUIPMENT, since it is not a dead 959 * copy of RTC_EQUIPMENT. Bits 4 and 5 of ETC_EQUIPMENT are 960 * zeros for EGA and VGA. However, the EGA/VGA BIOS sets 961 * these bits in BIOSDATA_EQUIPMENT according to the monitor 962 * type detected. 963 */ 964#ifndef VGA_NO_BIOS 965 if (*(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8)) { 966 /* EGA/VGA BIOS is present */ 967 fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f, 968 biosadapter); 969 } else { 970 switch ((rtcin(RTC_EQUIPMENT) >> 4) & 3) { /* bit 4 and 5 */ 971 case 0: 972 /* EGA/VGA: shouldn't be happening */ 973 fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f, 974 biosadapter); 975 break; 976 case 1: 977 /* CGA 40x25 */ 978 /* FIXME: switch to the 80x25 mode? XXX */ 979 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA40]; 980 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 981 break; 982 case 2: 983 /* CGA 80x25 */ 984 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA80]; 985 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 986 break; 987 case 3: 988 /* MDA */ 989 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO]; 990 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80]; 991 break; 992 } 993 } 994#else 995 /* assume EGA/VGA? XXX */ 996 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_EGA80]; 997 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 998#endif /* VGA_NO_BIOS */ 999 1000 biosadapters = 0; 1001 if (verify_adapter(&biosadapter[V_ADP_SECONDARY]) == 0) { 1002 ++biosadapters; 1003 biosadapter[V_ADP_SECONDARY].va_flags |= V_ADP_PROBED; 1004 biosadapter[V_ADP_SECONDARY].va_mode = 1005 biosadapter[V_ADP_SECONDARY].va_initial_mode = 1006 map_bios_mode_num(biosadapter[V_ADP_SECONDARY].va_type, 1007 biosadapter[V_ADP_SECONDARY].va_flags 1008 & V_ADP_COLOR, 1009 biosadapter[V_ADP_SECONDARY].va_initial_bios_mode); 1010 } else { 1011 biosadapter[V_ADP_SECONDARY].va_type = -1; 1012 } 1013 if (verify_adapter(&biosadapter[V_ADP_PRIMARY]) == 0) { 1014 ++biosadapters; 1015 biosadapter[V_ADP_PRIMARY].va_flags |= V_ADP_PROBED; 1016#ifndef VGA_NO_BIOS 1017 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode = 1018 readb(BIOS_PADDRTOVADDR(0x449)); 1019#else 1020 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode = 3; /* XXX */ 1021#endif 1022 biosadapter[V_ADP_PRIMARY].va_mode = 1023 biosadapter[V_ADP_PRIMARY].va_initial_mode = 1024 map_bios_mode_num(biosadapter[V_ADP_PRIMARY].va_type, 1025 biosadapter[V_ADP_PRIMARY].va_flags & V_ADP_COLOR, 1026 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode); 1027 } else { 1028 biosadapter[V_ADP_PRIMARY] = biosadapter[V_ADP_SECONDARY]; 1029 biosadapter[V_ADP_SECONDARY].va_type = -1; 1030 } 1031 if (biosadapters == 0) 1032 return biosadapters; 1033 biosadapter[V_ADP_PRIMARY].va_unit = V_ADP_PRIMARY; 1034 biosadapter[V_ADP_SECONDARY].va_unit = V_ADP_SECONDARY; 1035 1036#if 0 /* we don't need these... */ 1037 fb_init_struct(&biosadapter[V_ADP_PRIMARY], ...); 1038 fb_init_struct(&biosadapter[V_ADP_SECONDARY], ...); 1039#endif 1040 1041#if notyet 1042 /* 1043 * We cannot have two video adapter of the same type; there must be 1044 * only one of color or mono adapter, or one each of them. 1045 */ 1046 if (biosadapters > 1) { 1047 if (!((biosadapter[0].va_flags ^ biosadapter[1].va_flags) 1048 & V_ADP_COLOR)) 1049 /* we have two mono or color adapters!! */ 1050 return (biosadapters = 0); 1051 } 1052#endif 1053 1054 /* 1055 * Ensure a zero start address. This is mainly to recover after 1056 * switching from pcvt using userconfig(). The registers are w/o 1057 * for old hardware so it's too hard to relocate the active screen 1058 * memory. 1059 * This must be done before vga_save_state() for VGA. 1060 */ 1061 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 12); 1062 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0); 1063 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 13); 1064 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0); 1065 1066 /* the video mode parameter table in EGA/VGA BIOS */ 1067 /* NOTE: there can be only one EGA/VGA, wheather color or mono, 1068 * recognized by the video BIOS. 1069 */ 1070 if ((biosadapter[V_ADP_PRIMARY].va_type == KD_EGA) || 1071 (biosadapter[V_ADP_PRIMARY].va_type == KD_VGA)) { 1072 adp = &biosadapter[V_ADP_PRIMARY]; 1073 } else if ((biosadapter[V_ADP_SECONDARY].va_type == KD_EGA) || 1074 (biosadapter[V_ADP_SECONDARY].va_type == KD_VGA)) { 1075 adp = &biosadapter[V_ADP_SECONDARY]; 1076 } else { 1077 adp = NULL; 1078 } 1079 bzero(mode_map, sizeof(mode_map)); 1080 if (adp != NULL) { 1081 if (adp->va_type == KD_VGA) { 1082 vga_save_state(adp, &adpstate, sizeof(adpstate)); 1083#if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE) 1084 mode_map[adp->va_initial_mode] = adpstate.regs; 1085 rows_offset = 1; 1086#else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1087 if (video_mode_ptr == NULL) { 1088 mode_map[adp->va_initial_mode] = adpstate.regs; 1089 rows_offset = 1; 1090 } else { 1091 /* discard the table if we are not familiar with it... */ 1092 map_mode_table(mode_map, video_mode_ptr, M_VGA_CG320 + 1); 1093 mp = get_mode_param(adp->va_initial_mode); 1094 if (mp != NULL) 1095 bcopy(mp, adpstate2.regs, sizeof(adpstate2.regs)); 1096 switch (comp_adpregs(adpstate.regs, mp)) { 1097 case COMP_IDENTICAL: 1098 /* 1099 * OK, this parameter table looks reasonably familiar 1100 * to us... 1101 */ 1102 /* 1103 * This is a kludge for Toshiba DynaBook SS433 1104 * whose BIOS video mode table entry has the actual # 1105 * of rows at the offset 1; BIOSes from other 1106 * manufacturers store the # of rows - 1 there. XXX 1107 */ 1108 rows_offset = adpstate.regs[1] + 1 - mp[1]; 1109 break; 1110 1111 case COMP_SIMILAR: 1112 /* 1113 * Not exactly the same, but similar enough to be 1114 * trusted. However, use the saved register values 1115 * for the initial mode and other modes which are 1116 * based on the initial mode. 1117 */ 1118 mode_map[adp->va_initial_mode] = adpstate.regs; 1119 rows_offset = adpstate.regs[1] + 1 - mp[1]; 1120 adpstate.regs[1] -= rows_offset - 1; 1121 break; 1122 1123 case COMP_DIFFERENT: 1124 default: 1125 /* 1126 * Don't use the paramter table in BIOS. It doesn't 1127 * look familiar to us. Video mode switching is allowed 1128 * only if the new mode is the same as or based on 1129 * the initial mode. 1130 */ 1131 video_mode_ptr = NULL; 1132 bzero(mode_map, sizeof(mode_map)); 1133 mode_map[adp->va_initial_mode] = adpstate.regs; 1134 rows_offset = 1; 1135 break; 1136 } 1137 } 1138#endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1139 1140#ifndef VGA_NO_MODE_CHANGE 1141 adp->va_flags |= V_ADP_MODECHANGE; 1142#endif 1143#ifndef VGA_NO_FONT_LOADING 1144 adp->va_flags |= V_ADP_FONT; 1145#endif 1146 } else if (adp->va_type == KD_EGA) { 1147#if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE) 1148 rows_offset = 1; 1149#else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1150 if (video_mode_ptr == NULL) { 1151 rows_offset = 1; 1152 } else { 1153 map_mode_table(mode_map, video_mode_ptr, M_ENH_C80x25 + 1); 1154 /* XXX how can one validate the EGA table... */ 1155 mp = get_mode_param(adp->va_initial_mode); 1156 if (mp != NULL) { 1157 adp->va_flags |= V_ADP_MODECHANGE; 1158#ifndef VGA_NO_FONT_LOADING 1159 adp->va_flags |= V_ADP_FONT; 1160#endif 1161 rows_offset = 1; 1162 } else { 1163 /* 1164 * This is serious. We will not be able to switch video 1165 * modes at all... 1166 */ 1167 video_mode_ptr = NULL; 1168 bzero(mode_map, sizeof(mode_map)); 1169 rows_offset = 1; 1170 } 1171 } 1172#endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1173 } 1174 } 1175 1176 /* remove conflicting modes if we have more than one adapter */ 1177 if (biosadapters > 0) { 1178 for (i = 0; i < biosadapters; ++i) { 1179 if (!(biosadapter[i].va_flags & V_ADP_MODECHANGE)) 1180 continue; 1181 clear_mode_map(&biosadapter[i], mode_map, M_VGA_CG320 + 1, 1182 (biosadapter[i].va_flags & V_ADP_COLOR) ? 1183 V_INFO_COLOR : 0); 1184 if ((biosadapter[i].va_type == KD_VGA) 1185 || (biosadapter[i].va_type == KD_EGA)) { 1186 biosadapter[i].va_io_base = 1187 (biosadapter[i].va_flags & V_ADP_COLOR) ? 1188 IO_VGA : IO_MDA; 1189 biosadapter[i].va_io_size = 32; 1190 } 1191 } 1192 } 1193 1194 /* buffer address */ 1195 vga_get_info(&biosadapter[V_ADP_PRIMARY], 1196 biosadapter[V_ADP_PRIMARY].va_initial_mode, &info); 1197 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1198 update_adapter_info(&biosadapter[V_ADP_PRIMARY], &info); 1199 1200 if (biosadapters > 1) { 1201 vga_get_info(&biosadapter[V_ADP_SECONDARY], 1202 biosadapter[V_ADP_SECONDARY].va_initial_mode, &info); 1203 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1204 update_adapter_info(&biosadapter[V_ADP_SECONDARY], &info); 1205 } 1206 1207 /* 1208 * XXX: we should verify the following values for the primary adapter... 1209 * crtc I/O port address: *(u_int16_t *)BIOS_PADDRTOVADDR(0x463); 1210 * color/mono display: (*(u_int8_t *)BIOS_PADDRTOVADDR(0x487) & 0x02) 1211 * ? 0 : V_ADP_COLOR; 1212 * columns: *(u_int8_t *)BIOS_PADDRTOVADDR(0x44a); 1213 * rows: *(u_int8_t *)BIOS_PADDRTOVADDR(0x484); 1214 * font size: *(u_int8_t *)BIOS_PADDRTOVADDR(0x485); 1215 * buffer size: *(u_int16_t *)BIOS_PADDRTOVADDR(0x44c); 1216 */ 1217 1218 return biosadapters; 1219} 1220 1221/* set the scan line length in pixel */ 1222static int 1223set_line_length(video_adapter_t *adp, int pixel) 1224{ 1225 u_char *mp; 1226 int ppw; /* pixels per word */ 1227 int bpl; /* bytes per line */ 1228 int count; 1229 1230 if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA)) 1231 return ENODEV; 1232 mp = get_mode_param(adp->va_mode); 1233 if (mp == NULL) 1234 return EINVAL; 1235 1236 switch (adp->va_info.vi_mem_model) { 1237 case V_INFO_MM_PLANAR: 1238 ppw = 16/(adp->va_info.vi_depth/adp->va_info.vi_planes); 1239 count = (pixel + ppw - 1)/ppw/2; 1240 bpl = ((pixel + ppw - 1)/ppw/2)*4; 1241 break; 1242 case V_INFO_MM_PACKED: 1243 count = (pixel + 7)/8; 1244 bpl = ((pixel + 7)/8)*8; 1245 break; 1246 case V_INFO_MM_TEXT: 1247 count = (pixel + 7)/8; /* columns */ 1248 bpl = (pixel + 7)/8; /* columns */ 1249 break; 1250 default: 1251 return ENODEV; 1252 } 1253 1254 if (mp[10 + 0x17] & 0x40) /* CRTC mode control reg */ 1255 count *= 2; /* byte mode */ 1256 outb(adp->va_crtc_addr, 0x13); 1257 outb(adp->va_crtc_addr + 1, count); 1258 adp->va_line_width = bpl; 1259 1260 return 0; 1261} 1262 1263static int 1264set_display_start(video_adapter_t *adp, int x, int y) 1265{ 1266 int off; /* byte offset (graphics mode)/word offset (text mode) */ 1267 int poff; /* pixel offset */ 1268 int roff; /* row offset */ 1269 int ppb; /* pixels per byte */ 1270 1271 if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA)) 1272 x &= ~7; 1273 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) { 1274 ppb = 8/(adp->va_info.vi_depth/adp->va_info.vi_planes); 1275 off = y*adp->va_line_width + x/ppb; 1276 roff = 0; 1277 poff = x%ppb; 1278 } else { 1279 if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) { 1280 outb(TSIDX, 1); 1281 if (inb(TSREG) & 1) 1282 ppb = 9; 1283 else 1284 ppb = 8; 1285 } else { 1286 ppb = 8; 1287 } 1288 off = y/adp->va_info.vi_cheight*adp->va_line_width + x/ppb; 1289 roff = y%adp->va_info.vi_cheight; 1290 /* FIXME: is this correct? XXX */ 1291 if (ppb == 8) 1292 poff = x%ppb; 1293 else 1294 poff = (x + 8)%ppb; 1295 } 1296 1297 /* start address */ 1298 outb(adp->va_crtc_addr, 0xc); /* high */ 1299 outb(adp->va_crtc_addr + 1, off >> 8); 1300 outb(adp->va_crtc_addr, 0xd); /* low */ 1301 outb(adp->va_crtc_addr + 1, off & 0xff); 1302 1303 /* horizontal pel pan */ 1304 if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) { 1305 inb(adp->va_crtc_addr + 6); 1306 outb(ATC, 0x13 | 0x20); 1307 outb(ATC, poff); 1308 inb(adp->va_crtc_addr + 6); 1309 outb(ATC, 0x20); 1310 } 1311 1312 /* preset raw scan */ 1313 outb(adp->va_crtc_addr, 8); 1314 outb(adp->va_crtc_addr + 1, roff); 1315 1316 adp->va_disp_start.x = x; 1317 adp->va_disp_start.y = y; 1318 return 0; 1319} 1320 1321#ifdef __i386__ /* XXX */ 1322static void 1323fill(int val, void *d, size_t size) 1324{ 1325 u_char *p = d; 1326 1327 while (size-- > 0) 1328 *p++ = val; 1329} 1330#endif /* __i386__ */ 1331 1332static void 1333filll_io(int val, vm_offset_t d, size_t size) 1334{ 1335 while (size-- > 0) { 1336 writel(d, val); 1337 d += sizeof(u_int32_t); 1338 } 1339} 1340 1341/* entry points */ 1342 1343#if 0 1344static int 1345vga_nop(void) 1346{ 1347 return 0; 1348} 1349#endif 1350 1351static int 1352vga_error(void) 1353{ 1354 return ENODEV; 1355} 1356 1357static int 1358vga_probe(int unit, video_adapter_t **adpp, void *arg, int flags) 1359{ 1360 probe_adapters(); 1361 if (unit >= biosadapters) 1362 return ENXIO; 1363 1364 *adpp = &biosadapter[unit]; 1365 1366 return 0; 1367} 1368 1369static int 1370vga_init(int unit, video_adapter_t *adp, int flags) 1371{ 1372 if ((unit >= biosadapters) || (adp == NULL) || !probe_done(adp)) 1373 return ENXIO; 1374 1375 if (!init_done(adp)) { 1376 /* nothing to do really... */ 1377 adp->va_flags |= V_ADP_INITIALIZED; 1378 } 1379 1380 if (!config_done(adp)) { 1381 if (vid_register(adp) < 0) 1382 return ENXIO; 1383 adp->va_flags |= V_ADP_REGISTERED; 1384 } 1385 if (vga_sub_configure != NULL) 1386 (*vga_sub_configure)(0); 1387 1388 return 0; 1389} 1390 1391/* 1392 * get_info(): 1393 * Return the video_info structure of the requested video mode. 1394 * 1395 * all adapters 1396 */ 1397static int 1398vga_get_info(video_adapter_t *adp, int mode, video_info_t *info) 1399{ 1400 int i; 1401 1402 if (!vga_init_done) 1403 return ENXIO; 1404 1405 mode = map_gen_mode_num(adp->va_type, adp->va_flags & V_ADP_COLOR, mode); 1406#ifndef VGA_NO_MODE_CHANGE 1407 if (adp->va_flags & V_ADP_MODECHANGE) { 1408 /* 1409 * If the parameter table entry for this mode is not found, 1410 * the mode is not supported... 1411 */ 1412 if (get_mode_param(mode) == NULL) 1413 return EINVAL; 1414 } else 1415#endif /* VGA_NO_MODE_CHANGE */ 1416 { 1417 /* 1418 * Even if we don't support video mode switching on this adapter, 1419 * the information on the initial (thus current) video mode 1420 * should be made available. 1421 */ 1422 if (mode != adp->va_initial_mode) 1423 return EINVAL; 1424 } 1425 1426 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 1427 if (bios_vmode[i].vi_mode == NA) 1428 continue; 1429 if (mode == bios_vmode[i].vi_mode) { 1430 *info = bios_vmode[i]; 1431 /* XXX */ 1432 info->vi_buffer_size = info->vi_window_size*info->vi_planes; 1433 return 0; 1434 } 1435 } 1436 return EINVAL; 1437} 1438 1439/* 1440 * query_mode(): 1441 * Find a video mode matching the requested parameters. 1442 * Fields filled with 0 are considered "don't care" fields and 1443 * match any modes. 1444 * 1445 * all adapters 1446 */ 1447static int 1448vga_query_mode(video_adapter_t *adp, video_info_t *info) 1449{ 1450 int i; 1451 1452 if (!vga_init_done) 1453 return ENXIO; 1454 1455 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 1456 if (bios_vmode[i].vi_mode == NA) 1457 continue; 1458 1459 if ((info->vi_width != 0) 1460 && (info->vi_width != bios_vmode[i].vi_width)) 1461 continue; 1462 if ((info->vi_height != 0) 1463 && (info->vi_height != bios_vmode[i].vi_height)) 1464 continue; 1465 if ((info->vi_cwidth != 0) 1466 && (info->vi_cwidth != bios_vmode[i].vi_cwidth)) 1467 continue; 1468 if ((info->vi_cheight != 0) 1469 && (info->vi_cheight != bios_vmode[i].vi_cheight)) 1470 continue; 1471 if ((info->vi_depth != 0) 1472 && (info->vi_depth != bios_vmode[i].vi_depth)) 1473 continue; 1474 if ((info->vi_planes != 0) 1475 && (info->vi_planes != bios_vmode[i].vi_planes)) 1476 continue; 1477 /* XXX: should check pixel format, memory model */ 1478 if ((info->vi_flags != 0) 1479 && (info->vi_flags != bios_vmode[i].vi_flags)) 1480 continue; 1481 1482 /* verify if this mode is supported on this adapter */ 1483 if (vga_get_info(adp, bios_vmode[i].vi_mode, info)) 1484 continue; 1485 return 0; 1486 } 1487 return ENODEV; 1488} 1489 1490/* 1491 * set_mode(): 1492 * Change the video mode. 1493 * 1494 * EGA/VGA 1495 */ 1496 1497#ifndef VGA_NO_MODE_CHANGE 1498#ifdef VGA_WIDTH90 1499static void 1500set_width90(adp_state_t *params) 1501{ 1502 /* 1503 * Based on code submitted by Kelly Yancey (kbyanc@freedomnet.com) 1504 * and alexv@sui.gda.itesm.mx. 1505 */ 1506 params->regs[5] |= 1; /* toggle 8 pixel wide fonts */ 1507 params->regs[10+0x0] = 0x6b; 1508 params->regs[10+0x1] = 0x59; 1509 params->regs[10+0x2] = 0x5a; 1510 params->regs[10+0x3] = 0x8e; 1511 params->regs[10+0x4] = 0x5e; 1512 params->regs[10+0x5] = 0x8a; 1513 params->regs[10+0x13] = 45; 1514 params->regs[35+0x13] = 0; 1515} 1516#endif /* VGA_WIDTH90 */ 1517#endif /* !VGA_NO_MODE_CHANGE */ 1518 1519static int 1520vga_set_mode(video_adapter_t *adp, int mode) 1521{ 1522#ifndef VGA_NO_MODE_CHANGE 1523 video_info_t info; 1524 adp_state_t params; 1525 1526 prologue(adp, V_ADP_MODECHANGE, ENODEV); 1527 1528 mode = map_gen_mode_num(adp->va_type, 1529 adp->va_flags & V_ADP_COLOR, mode); 1530 if (vga_get_info(adp, mode, &info)) 1531 return EINVAL; 1532 1533#if VGA_DEBUG > 1 1534 printf("vga_set_mode(): setting mode %d\n", mode); 1535#endif 1536 1537 params.sig = V_STATE_SIG; 1538 bcopy(get_mode_param(mode), params.regs, sizeof(params.regs)); 1539 1540 switch (mode) { 1541#ifdef VGA_WIDTH90 1542 case M_VGA_C90x60: case M_VGA_M90x60: 1543 set_width90(¶ms); 1544 /* FALL THROUGH */ 1545#endif 1546 case M_VGA_C80x60: case M_VGA_M80x60: 1547 params.regs[2] = 0x08; 1548 params.regs[19] = 0x47; 1549 goto special_480l; 1550 1551#ifdef VGA_WIDTH90 1552 case M_VGA_C90x30: case M_VGA_M90x30: 1553 set_width90(¶ms); 1554 /* FALL THROUGH */ 1555#endif 1556 case M_VGA_C80x30: case M_VGA_M80x30: 1557 params.regs[19] = 0x4f; 1558special_480l: 1559 params.regs[9] |= 0xc0; 1560 params.regs[16] = 0x08; 1561 params.regs[17] = 0x3e; 1562 params.regs[26] = 0xea; 1563 params.regs[28] = 0xdf; 1564 params.regs[31] = 0xe7; 1565 params.regs[32] = 0x04; 1566 goto setup_mode; 1567 1568#ifdef VGA_WIDTH90 1569 case M_VGA_C90x43: case M_VGA_M90x43: 1570 set_width90(¶ms); 1571 /* FALL THROUGH */ 1572#endif 1573 case M_ENH_C80x43: case M_ENH_B80x43: 1574 params.regs[28] = 87; 1575 goto special_80x50; 1576 1577#ifdef VGA_WIDTH90 1578 case M_VGA_C90x50: case M_VGA_M90x50: 1579 set_width90(¶ms); 1580 /* FALL THROUGH */ 1581#endif 1582 case M_VGA_C80x50: case M_VGA_M80x50: 1583special_80x50: 1584 params.regs[2] = 8; 1585 params.regs[19] = 7; 1586 goto setup_mode; 1587 1588#ifdef VGA_WIDTH90 1589 case M_VGA_C90x25: case M_VGA_M90x25: 1590 set_width90(¶ms); 1591 /* FALL THROUGH */ 1592#endif 1593 case M_VGA_C40x25: case M_VGA_C80x25: 1594 case M_VGA_M80x25: 1595 case M_B40x25: case M_C40x25: 1596 case M_B80x25: case M_C80x25: 1597 case M_ENH_B40x25: case M_ENH_C40x25: 1598 case M_ENH_B80x25: case M_ENH_C80x25: 1599 case M_EGAMONO80x25: 1600 1601setup_mode: 1602 vga_load_state(adp, ¶ms); 1603 break; 1604 1605 case M_VGA_MODEX: 1606 /* "unchain" the VGA mode */ 1607 params.regs[5-1+0x04] &= 0xf7; 1608 params.regs[5-1+0x04] |= 0x04; 1609 /* turn off doubleword mode */ 1610 params.regs[10+0x14] &= 0xbf; 1611 /* turn off word adressing */ 1612 params.regs[10+0x17] |= 0x40; 1613 /* set logical screen width */ 1614 params.regs[10+0x13] = 80; 1615 /* set 240 lines */ 1616 params.regs[10+0x11] = 0x2c; 1617 params.regs[10+0x06] = 0x0d; 1618 params.regs[10+0x07] = 0x3e; 1619 params.regs[10+0x10] = 0xea; 1620 params.regs[10+0x11] = 0xac; 1621 params.regs[10+0x12] = 0xdf; 1622 params.regs[10+0x15] = 0xe7; 1623 params.regs[10+0x16] = 0x06; 1624 /* set vertical sync polarity to reflect aspect ratio */ 1625 params.regs[9] = 0xe3; 1626 goto setup_grmode; 1627 1628 case M_BG320: case M_CG320: case M_BG640: 1629 case M_CG320_D: case M_CG640_E: 1630 case M_CG640x350: case M_ENH_CG640: 1631 case M_BG640x480: case M_CG640x480: case M_VGA_CG320: 1632 1633setup_grmode: 1634 vga_load_state(adp, ¶ms); 1635 break; 1636 1637 default: 1638 return EINVAL; 1639 } 1640 1641 adp->va_mode = mode; 1642 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1643 update_adapter_info(adp, &info); 1644 1645 /* move hardware cursor out of the way */ 1646 (*vidsw[adp->va_index]->set_hw_cursor)(adp, -1, -1); 1647 1648 return 0; 1649#else /* VGA_NO_MODE_CHANGE */ 1650 return ENODEV; 1651#endif /* VGA_NO_MODE_CHANGE */ 1652} 1653 1654#ifndef VGA_NO_FONT_LOADING 1655 1656static void 1657set_font_mode(video_adapter_t *adp, u_char *buf) 1658{ 1659 u_char *mp; 1660 int s; 1661 1662 s = splhigh(); 1663 1664 /* save register values */ 1665 if (adp->va_type == KD_VGA) { 1666 outb(TSIDX, 0x02); buf[0] = inb(TSREG); 1667 outb(TSIDX, 0x04); buf[1] = inb(TSREG); 1668 outb(GDCIDX, 0x04); buf[2] = inb(GDCREG); 1669 outb(GDCIDX, 0x05); buf[3] = inb(GDCREG); 1670 outb(GDCIDX, 0x06); buf[4] = inb(GDCREG); 1671 inb(adp->va_crtc_addr + 6); 1672 outb(ATC, 0x10); buf[5] = inb(ATC + 1); 1673 } else /* if (adp->va_type == KD_EGA) */ { 1674 /* 1675 * EGA cannot be read; copy parameters from the mode parameter 1676 * table. 1677 */ 1678 mp = get_mode_param(adp->va_mode); 1679 buf[0] = mp[5 + 0x02 - 1]; 1680 buf[1] = mp[5 + 0x04 - 1]; 1681 buf[2] = mp[55 + 0x04]; 1682 buf[3] = mp[55 + 0x05]; 1683 buf[4] = mp[55 + 0x06]; 1684 buf[5] = mp[35 + 0x10]; 1685 } 1686 1687 /* setup vga for loading fonts */ 1688 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1689 outb(ATC, 0x10); outb(ATC, buf[5] & ~0x01); 1690 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1691 outb(ATC, 0x20); /* enable palette */ 1692 1693#if VGA_SLOW_IOACCESS 1694#ifdef VGA_ALT_SEQACCESS 1695 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1696#endif 1697 outb(TSIDX, 0x02); outb(TSREG, 0x04); 1698 outb(TSIDX, 0x04); outb(TSREG, 0x07); 1699#ifdef VGA_ALT_SEQACCESS 1700 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1701#endif 1702 outb(GDCIDX, 0x04); outb(GDCREG, 0x02); 1703 outb(GDCIDX, 0x05); outb(GDCREG, 0x00); 1704 outb(GDCIDX, 0x06); outb(GDCREG, 0x04); 1705#else /* VGA_SLOW_IOACCESS */ 1706#ifdef VGA_ALT_SEQACCESS 1707 outw(TSIDX, 0x0100); 1708#endif 1709 outw(TSIDX, 0x0402); 1710 outw(TSIDX, 0x0704); 1711#ifdef VGA_ALT_SEQACCESS 1712 outw(TSIDX, 0x0300); 1713#endif 1714 outw(GDCIDX, 0x0204); 1715 outw(GDCIDX, 0x0005); 1716 outw(GDCIDX, 0x0406); /* addr = a0000, 64kb */ 1717#endif /* VGA_SLOW_IOACCESS */ 1718 1719 splx(s); 1720} 1721 1722static void 1723set_normal_mode(video_adapter_t *adp, u_char *buf) 1724{ 1725 int s; 1726 1727 s = splhigh(); 1728 1729 /* setup vga for normal operation mode again */ 1730 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1731 outb(ATC, 0x10); outb(ATC, buf[5]); 1732 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1733 outb(ATC, 0x20); /* enable palette */ 1734 1735#if VGA_SLOW_IOACCESS 1736#ifdef VGA_ALT_SEQACCESS 1737 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1738#endif 1739 outb(TSIDX, 0x02); outb(TSREG, buf[0]); 1740 outb(TSIDX, 0x04); outb(TSREG, buf[1]); 1741#ifdef VGA_ALT_SEQACCESS 1742 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1743#endif 1744 outb(GDCIDX, 0x04); outb(GDCREG, buf[2]); 1745 outb(GDCIDX, 0x05); outb(GDCREG, buf[3]); 1746 if (adp->va_crtc_addr == MONO_CRTC) { 1747 outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x08); 1748 } else { 1749 outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x0c); 1750 } 1751#else /* VGA_SLOW_IOACCESS */ 1752#ifdef VGA_ALT_SEQACCESS 1753 outw(TSIDX, 0x0100); 1754#endif 1755 outw(TSIDX, 0x0002 | (buf[0] << 8)); 1756 outw(TSIDX, 0x0004 | (buf[1] << 8)); 1757#ifdef VGA_ALT_SEQACCESS 1758 outw(TSIDX, 0x0300); 1759#endif 1760 outw(GDCIDX, 0x0004 | (buf[2] << 8)); 1761 outw(GDCIDX, 0x0005 | (buf[3] << 8)); 1762 if (adp->va_crtc_addr == MONO_CRTC) 1763 outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x08)<<8)); 1764 else 1765 outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x0c)<<8)); 1766#endif /* VGA_SLOW_IOACCESS */ 1767 1768 splx(s); 1769} 1770 1771#endif /* VGA_NO_FONT_LOADING */ 1772 1773/* 1774 * save_font(): 1775 * Read the font data in the requested font page from the video adapter. 1776 * 1777 * EGA/VGA 1778 */ 1779static int 1780vga_save_font(video_adapter_t *adp, int page, int fontsize, u_char *data, 1781 int ch, int count) 1782{ 1783#ifndef VGA_NO_FONT_LOADING 1784 u_char buf[PARAM_BUFSIZE]; 1785 u_int32_t segment; 1786 int c; 1787#ifdef VGA_ALT_SEQACCESS 1788 int s; 1789 u_char val = 0; 1790#endif 1791 1792 prologue(adp, V_ADP_FONT, ENODEV); 1793 1794 if (fontsize < 14) { 1795 /* FONT_8 */ 1796 fontsize = 8; 1797 } else if (fontsize >= 32) { 1798 fontsize = 32; 1799 } else if (fontsize >= 16) { 1800 /* FONT_16 */ 1801 fontsize = 16; 1802 } else { 1803 /* FONT_14 */ 1804 fontsize = 14; 1805 } 1806 1807 if (page < 0 || page >= 8) 1808 return EINVAL; 1809 segment = FONT_BUF + 0x4000*page; 1810 if (page > 3) 1811 segment -= 0xe000; 1812 1813#ifdef VGA_ALT_SEQACCESS 1814 if (adp->va_type == KD_VGA) { /* what about EGA? XXX */ 1815 s = splhigh(); 1816 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1817 outb(TSIDX, 0x01); val = inb(TSREG); /* disable screen */ 1818 outb(TSIDX, 0x01); outb(TSREG, val | 0x20); 1819 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1820 splx(s); 1821 } 1822#endif 1823 1824 set_font_mode(adp, buf); 1825 if (fontsize == 32) { 1826 bcopy_fromio(segment + ch*32, data, fontsize*count); 1827 } else { 1828 for (c = ch; count > 0; ++c, --count) { 1829 bcopy_fromio(segment + c*32, data, fontsize); 1830 data += fontsize; 1831 } 1832 } 1833 set_normal_mode(adp, buf); 1834 1835#ifdef VGA_ALT_SEQACCESS 1836 if (adp->va_type == KD_VGA) { 1837 s = splhigh(); 1838 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1839 outb(TSIDX, 0x01); outb(TSREG, val & 0xdf); /* enable screen */ 1840 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1841 splx(s); 1842 } 1843#endif 1844 1845 return 0; 1846#else /* VGA_NO_FONT_LOADING */ 1847 return ENODEV; 1848#endif /* VGA_NO_FONT_LOADING */ 1849} 1850 1851/* 1852 * load_font(): 1853 * Set the font data in the requested font page. 1854 * NOTE: it appears that some recent video adapters do not support 1855 * the font page other than 0... XXX 1856 * 1857 * EGA/VGA 1858 */ 1859static int 1860vga_load_font(video_adapter_t *adp, int page, int fontsize, u_char *data, 1861 int ch, int count) 1862{ 1863#ifndef VGA_NO_FONT_LOADING 1864 u_char buf[PARAM_BUFSIZE]; 1865 u_int32_t segment; 1866 int c; 1867#ifdef VGA_ALT_SEQACCESS 1868 int s; 1869 u_char val = 0; 1870#endif 1871 1872 prologue(adp, V_ADP_FONT, ENODEV); 1873 1874 if (fontsize < 14) { 1875 /* FONT_8 */ 1876 fontsize = 8; 1877 } else if (fontsize >= 32) { 1878 fontsize = 32; 1879 } else if (fontsize >= 16) { 1880 /* FONT_16 */ 1881 fontsize = 16; 1882 } else { 1883 /* FONT_14 */ 1884 fontsize = 14; 1885 } 1886 1887 if (page < 0 || page >= 8) 1888 return EINVAL; 1889 segment = FONT_BUF + 0x4000*page; 1890 if (page > 3) 1891 segment -= 0xe000; 1892 1893#ifdef VGA_ALT_SEQACCESS 1894 if (adp->va_type == KD_VGA) { /* what about EGA? XXX */ 1895 s = splhigh(); 1896 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1897 outb(TSIDX, 0x01); val = inb(TSREG); /* disable screen */ 1898 outb(TSIDX, 0x01); outb(TSREG, val | 0x20); 1899 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1900 splx(s); 1901 } 1902#endif 1903 1904 set_font_mode(adp, buf); 1905 if (fontsize == 32) { 1906 bcopy_toio(data, segment + ch*32, fontsize*count); 1907 } else { 1908 for (c = ch; count > 0; ++c, --count) { 1909 bcopy_toio(data, segment + c*32, fontsize); 1910 data += fontsize; 1911 } 1912 } 1913 set_normal_mode(adp, buf); 1914 1915#ifdef VGA_ALT_SEQACCESS 1916 if (adp->va_type == KD_VGA) { 1917 s = splhigh(); 1918 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1919 outb(TSIDX, 0x01); outb(TSREG, val & 0xdf); /* enable screen */ 1920 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1921 splx(s); 1922 } 1923#endif 1924 1925 return 0; 1926#else /* VGA_NO_FONT_LOADING */ 1927 return ENODEV; 1928#endif /* VGA_NO_FONT_LOADING */ 1929} 1930 1931/* 1932 * show_font(): 1933 * Activate the requested font page. 1934 * NOTE: it appears that some recent video adapters do not support 1935 * the font page other than 0... XXX 1936 * 1937 * EGA/VGA 1938 */ 1939static int 1940vga_show_font(video_adapter_t *adp, int page) 1941{ 1942#ifndef VGA_NO_FONT_LOADING 1943 static u_char cg[] = { 0x00, 0x05, 0x0a, 0x0f, 0x30, 0x35, 0x3a, 0x3f }; 1944 int s; 1945 1946 prologue(adp, V_ADP_FONT, ENODEV); 1947 if (page < 0 || page >= 8) 1948 return EINVAL; 1949 1950 s = splhigh(); 1951 outb(TSIDX, 0x03); outb(TSREG, cg[page]); 1952 splx(s); 1953 1954 return 0; 1955#else /* VGA_NO_FONT_LOADING */ 1956 return ENODEV; 1957#endif /* VGA_NO_FONT_LOADING */ 1958} 1959 1960/* 1961 * save_palette(): 1962 * Read DAC values. The values have expressed in 8 bits. 1963 * 1964 * VGA 1965 */ 1966static int 1967vga_save_palette(video_adapter_t *adp, u_char *palette) 1968{ 1969 int i; 1970 1971 prologue(adp, V_ADP_PALETTE, ENODEV); 1972 1973 /* 1974 * We store 8 bit values in the palette buffer, while the standard 1975 * VGA has 6 bit DAC . 1976 */ 1977 outb(PALRADR, 0x00); 1978 for (i = 0; i < 256*3; ++i) 1979 palette[i] = inb(PALDATA) << 2; 1980 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 1981 return 0; 1982} 1983 1984static int 1985vga_save_palette2(video_adapter_t *adp, int base, int count, 1986 u_char *r, u_char *g, u_char *b) 1987{ 1988 int i; 1989 1990 prologue(adp, V_ADP_PALETTE, ENODEV); 1991 1992 outb(PALRADR, base); 1993 for (i = 0; i < count; ++i) { 1994 r[i] = inb(PALDATA) << 2; 1995 g[i] = inb(PALDATA) << 2; 1996 b[i] = inb(PALDATA) << 2; 1997 } 1998 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 1999 return 0; 2000} 2001 2002/* 2003 * load_palette(): 2004 * Set DAC values. 2005 * 2006 * VGA 2007 */ 2008static int 2009vga_load_palette(video_adapter_t *adp, u_char *palette) 2010{ 2011 int i; 2012 2013 prologue(adp, V_ADP_PALETTE, ENODEV); 2014 2015 outb(PIXMASK, 0xff); /* no pixelmask */ 2016 outb(PALWADR, 0x00); 2017 for (i = 0; i < 256*3; ++i) 2018 outb(PALDATA, palette[i] >> 2); 2019 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 2020 outb(ATC, 0x20); /* enable palette */ 2021 return 0; 2022} 2023 2024static int 2025vga_load_palette2(video_adapter_t *adp, int base, int count, 2026 u_char *r, u_char *g, u_char *b) 2027{ 2028 int i; 2029 2030 prologue(adp, V_ADP_PALETTE, ENODEV); 2031 2032 outb(PIXMASK, 0xff); /* no pixelmask */ 2033 outb(PALWADR, base); 2034 for (i = 0; i < count; ++i) { 2035 outb(PALDATA, r[i] >> 2); 2036 outb(PALDATA, g[i] >> 2); 2037 outb(PALDATA, b[i] >> 2); 2038 } 2039 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 2040 outb(ATC, 0x20); /* enable palette */ 2041 return 0; 2042} 2043 2044/* 2045 * set_border(): 2046 * Change the border color. 2047 * 2048 * CGA/EGA/VGA 2049 */ 2050static int 2051vga_set_border(video_adapter_t *adp, int color) 2052{ 2053 prologue(adp, V_ADP_BORDER, ENODEV); 2054 2055 switch (adp->va_type) { 2056 case KD_EGA: 2057 case KD_VGA: 2058 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 2059 outb(ATC, 0x31); outb(ATC, color & 0xff); 2060 break; 2061 case KD_CGA: 2062 outb(adp->va_crtc_addr + 5, color & 0x0f); /* color select register */ 2063 break; 2064 case KD_MONO: 2065 case KD_HERCULES: 2066 default: 2067 break; 2068 } 2069 return 0; 2070} 2071 2072/* 2073 * save_state(): 2074 * Read video register values. 2075 * NOTE: this function only reads the standard EGA/VGA registers. 2076 * any extra/extended registers of SVGA adapters are not saved. 2077 * 2078 * VGA 2079 */ 2080static int 2081vga_save_state(video_adapter_t *adp, void *p, size_t size) 2082{ 2083 video_info_t info; 2084 u_char *buf; 2085 int crtc_addr; 2086 int i, j; 2087 int s; 2088 2089 if (size == 0) { 2090 /* return the required buffer size */ 2091 prologue(adp, V_ADP_STATESAVE, 0); 2092 return sizeof(adp_state_t); 2093 } else { 2094 prologue(adp, V_ADP_STATESAVE, ENODEV); 2095 if (size < sizeof(adp_state_t)) 2096 return EINVAL; 2097 } 2098 2099 ((adp_state_t *)p)->sig = V_STATE_SIG; 2100 buf = ((adp_state_t *)p)->regs; 2101 bzero(buf, V_MODE_PARAM_SIZE); 2102 crtc_addr = adp->va_crtc_addr; 2103 2104 s = splhigh(); 2105 2106 outb(TSIDX, 0x00); outb(TSREG, 0x01); /* stop sequencer */ 2107 for (i = 0, j = 5; i < 4; i++) { 2108 outb(TSIDX, i + 1); 2109 buf[j++] = inb(TSREG); 2110 } 2111 buf[9] = inb(MISC + 10); /* dot-clock */ 2112 outb(TSIDX, 0x00); outb(TSREG, 0x03); /* start sequencer */ 2113 2114 for (i = 0, j = 10; i < 25; i++) { /* crtc */ 2115 outb(crtc_addr, i); 2116 buf[j++] = inb(crtc_addr + 1); 2117 } 2118 for (i = 0, j = 35; i < 20; i++) { /* attribute ctrl */ 2119 inb(crtc_addr + 6); /* reset flip-flop */ 2120 outb(ATC, i); 2121 buf[j++] = inb(ATC + 1); 2122 } 2123 for (i = 0, j = 55; i < 9; i++) { /* graph data ctrl */ 2124 outb(GDCIDX, i); 2125 buf[j++] = inb(GDCREG); 2126 } 2127 inb(crtc_addr + 6); /* reset flip-flop */ 2128 outb(ATC, 0x20); /* enable palette */ 2129 2130 splx(s); 2131 2132#if 1 2133 if (vga_get_info(adp, adp->va_mode, &info) == 0) { 2134 if (info.vi_flags & V_INFO_GRAPHICS) { 2135 buf[0] = info.vi_width/info.vi_cwidth; /* COLS */ 2136 buf[1] = info.vi_height/info.vi_cheight - 1; /* ROWS */ 2137 } else { 2138 buf[0] = info.vi_width; /* COLS */ 2139 buf[1] = info.vi_height - 1; /* ROWS */ 2140 } 2141 buf[2] = info.vi_cheight; /* POINTS */ 2142 } else { 2143 /* XXX: shouldn't be happening... */ 2144 printf("vga%d: %s: failed to obtain mode info. (vga_save_state())\n", 2145 adp->va_unit, adp->va_name); 2146 } 2147#else 2148 buf[0] = readb(BIOS_PADDRTOVADDR(0x44a)); /* COLS */ 2149 buf[1] = readb(BIOS_PADDRTOVADDR(0x484)); /* ROWS */ 2150 buf[2] = readb(BIOS_PADDRTOVADDR(0x485)); /* POINTS */ 2151 buf[3] = readb(BIOS_PADDRTOVADDR(0x44c)); 2152 buf[4] = readb(BIOS_PADDRTOVADDR(0x44d)); 2153#endif 2154 2155 return 0; 2156} 2157 2158/* 2159 * load_state(): 2160 * Set video registers at once. 2161 * NOTE: this function only updates the standard EGA/VGA registers. 2162 * any extra/extended registers of SVGA adapters are not changed. 2163 * 2164 * EGA/VGA 2165 */ 2166static int 2167vga_load_state(video_adapter_t *adp, void *p) 2168{ 2169 u_char *buf; 2170 int crtc_addr; 2171 int s; 2172 int i; 2173 2174 prologue(adp, V_ADP_STATELOAD, ENODEV); 2175 if (((adp_state_t *)p)->sig != V_STATE_SIG) 2176 return EINVAL; 2177 2178 buf = ((adp_state_t *)p)->regs; 2179 crtc_addr = adp->va_crtc_addr; 2180 2181#if VGA_DEBUG > 1 2182 dump_buffer(buf, V_MODE_PARAM_SIZE); 2183#endif 2184 2185 s = splhigh(); 2186 2187 outb(TSIDX, 0x00); outb(TSREG, 0x01); /* stop sequencer */ 2188 for (i = 0; i < 4; ++i) { /* program sequencer */ 2189 outb(TSIDX, i + 1); 2190 outb(TSREG, buf[i + 5]); 2191 } 2192 outb(MISC, buf[9]); /* set dot-clock */ 2193 outb(TSIDX, 0x00); outb(TSREG, 0x03); /* start sequencer */ 2194 outb(crtc_addr, 0x11); 2195 outb(crtc_addr + 1, inb(crtc_addr + 1) & 0x7F); 2196 for (i = 0; i < 25; ++i) { /* program crtc */ 2197 outb(crtc_addr, i); 2198 outb(crtc_addr + 1, buf[i + 10]); 2199 } 2200 inb(crtc_addr+6); /* reset flip-flop */ 2201 for (i = 0; i < 20; ++i) { /* program attribute ctrl */ 2202 outb(ATC, i); 2203 outb(ATC, buf[i + 35]); 2204 } 2205 for (i = 0; i < 9; ++i) { /* program graph data ctrl */ 2206 outb(GDCIDX, i); 2207 outb(GDCREG, buf[i + 55]); 2208 } 2209 inb(crtc_addr + 6); /* reset flip-flop */ 2210 outb(ATC, 0x20); /* enable palette */ 2211 2212#if notyet /* a temporary workaround for kernel panic, XXX */ 2213#ifndef VGA_NO_BIOS 2214 if (adp->va_unit == V_ADP_PRIMARY) { 2215 writeb(BIOS_PADDRTOVADDR(0x44a), buf[0]); /* COLS */ 2216 writeb(BIOS_PADDRTOVADDR(0x484), buf[1] + rows_offset - 1); /* ROWS */ 2217 writeb(BIOS_PADDRTOVADDR(0x485), buf[2]); /* POINTS */ 2218#if 0 2219 writeb(BIOS_PADDRTOVADDR(0x44c), buf[3]); 2220 writeb(BIOS_PADDRTOVADDR(0x44d), buf[4]); 2221#endif 2222 } 2223#endif /* VGA_NO_BIOS */ 2224#endif /* notyet */ 2225 2226 splx(s); 2227 return 0; 2228} 2229 2230/* 2231 * set_origin(): 2232 * Change the origin (window mapping) of the banked frame buffer. 2233 */ 2234static int 2235vga_set_origin(video_adapter_t *adp, off_t offset) 2236{ 2237 /* 2238 * The standard video modes do not require window mapping; 2239 * always return error. 2240 */ 2241 return ENODEV; 2242} 2243 2244/* 2245 * read_hw_cursor(): 2246 * Read the position of the hardware text cursor. 2247 * 2248 * all adapters 2249 */ 2250static int 2251vga_read_hw_cursor(video_adapter_t *adp, int *col, int *row) 2252{ 2253 u_int16_t off; 2254 int s; 2255 2256 if (!vga_init_done) 2257 return ENXIO; 2258 2259 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) 2260 return ENODEV; 2261 2262 s = spltty(); 2263 outb(adp->va_crtc_addr, 14); 2264 off = inb(adp->va_crtc_addr + 1); 2265 outb(adp->va_crtc_addr, 15); 2266 off = (off << 8) | inb(adp->va_crtc_addr + 1); 2267 splx(s); 2268 2269 *row = off / adp->va_info.vi_width; 2270 *col = off % adp->va_info.vi_width; 2271 2272 return 0; 2273} 2274 2275/* 2276 * set_hw_cursor(): 2277 * Move the hardware text cursor. If col and row are both -1, 2278 * the cursor won't be shown. 2279 * 2280 * all adapters 2281 */ 2282static int 2283vga_set_hw_cursor(video_adapter_t *adp, int col, int row) 2284{ 2285 u_int16_t off; 2286 int s; 2287 2288 if (!vga_init_done) 2289 return ENXIO; 2290 2291 if ((col == -1) && (row == -1)) { 2292 off = -1; 2293 } else { 2294 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) 2295 return ENODEV; 2296 off = row*adp->va_info.vi_width + col; 2297 } 2298 2299 s = spltty(); 2300 outb(adp->va_crtc_addr, 14); 2301 outb(adp->va_crtc_addr + 1, off >> 8); 2302 outb(adp->va_crtc_addr, 15); 2303 outb(adp->va_crtc_addr + 1, off & 0x00ff); 2304 splx(s); 2305 2306 return 0; 2307} 2308 2309/* 2310 * set_hw_cursor_shape(): 2311 * Change the shape of the hardware text cursor. If the height is 2312 * zero or negative, the cursor won't be shown. 2313 * 2314 * all adapters 2315 */ 2316static int 2317vga_set_hw_cursor_shape(video_adapter_t *adp, int base, int height, 2318 int celsize, int blink) 2319{ 2320 int s; 2321 2322 if (!vga_init_done) 2323 return ENXIO; 2324 2325 s = spltty(); 2326 switch (adp->va_type) { 2327 case KD_VGA: 2328 case KD_CGA: 2329 case KD_MONO: 2330 case KD_HERCULES: 2331 default: 2332 if (height <= 0) { 2333 /* make the cursor invisible */ 2334 outb(adp->va_crtc_addr, 10); 2335 outb(adp->va_crtc_addr + 1, 32); 2336 outb(adp->va_crtc_addr, 11); 2337 outb(adp->va_crtc_addr + 1, 0); 2338 } else { 2339 outb(adp->va_crtc_addr, 10); 2340 outb(adp->va_crtc_addr + 1, celsize - base - height); 2341 outb(adp->va_crtc_addr, 11); 2342 outb(adp->va_crtc_addr + 1, celsize - base - 1); 2343 } 2344 break; 2345 case KD_EGA: 2346 if (height <= 0) { 2347 /* make the cursor invisible */ 2348 outb(adp->va_crtc_addr, 10); 2349 outb(adp->va_crtc_addr + 1, celsize); 2350 outb(adp->va_crtc_addr, 11); 2351 outb(adp->va_crtc_addr + 1, 0); 2352 } else { 2353 outb(adp->va_crtc_addr, 10); 2354 outb(adp->va_crtc_addr + 1, celsize - base - height); 2355 outb(adp->va_crtc_addr, 11); 2356 outb(adp->va_crtc_addr + 1, celsize - base); 2357 } 2358 break; 2359 } 2360 splx(s); 2361 2362 return 0; 2363} 2364 2365/* 2366 * blank_display() 2367 * Put the display in power save/power off mode. 2368 * 2369 * all adapters 2370 */ 2371static int 2372vga_blank_display(video_adapter_t *adp, int mode) 2373{ 2374 u_char val; 2375 int s; 2376 2377 s = splhigh(); 2378 switch (adp->va_type) { 2379 case KD_VGA: 2380 switch (mode) { 2381 case V_DISPLAY_SUSPEND: 2382 case V_DISPLAY_STAND_BY: 2383 outb(TSIDX, 0x01); 2384 val = inb(TSREG); 2385 outb(TSIDX, 0x01); 2386 outb(TSREG, val | 0x20); 2387 outb(adp->va_crtc_addr, 0x17); 2388 val = inb(adp->va_crtc_addr + 1); 2389 outb(adp->va_crtc_addr + 1, val & ~0x80); 2390 break; 2391 case V_DISPLAY_BLANK: 2392 outb(TSIDX, 0x01); 2393 val = inb(TSREG); 2394 outb(TSIDX, 0x01); 2395 outb(TSREG, val | 0x20); 2396 break; 2397 case V_DISPLAY_ON: 2398 outb(TSIDX, 0x01); 2399 val = inb(TSREG); 2400 outb(TSIDX, 0x01); 2401 outb(TSREG, val & 0xDF); 2402 outb(adp->va_crtc_addr, 0x17); 2403 val = inb(adp->va_crtc_addr + 1); 2404 outb(adp->va_crtc_addr + 1, val | 0x80); 2405 break; 2406 } 2407 break; 2408 2409 case KD_EGA: 2410 /* no support yet */ 2411 return ENODEV; 2412 2413 case KD_CGA: 2414 switch (mode) { 2415 case V_DISPLAY_SUSPEND: 2416 case V_DISPLAY_STAND_BY: 2417 case V_DISPLAY_BLANK: 2418 outb(adp->va_crtc_addr + 4, 0x25); 2419 break; 2420 case V_DISPLAY_ON: 2421 outb(adp->va_crtc_addr + 4, 0x2d); 2422 break; 2423 } 2424 break; 2425 2426 case KD_MONO: 2427 case KD_HERCULES: 2428 switch (mode) { 2429 case V_DISPLAY_SUSPEND: 2430 case V_DISPLAY_STAND_BY: 2431 case V_DISPLAY_BLANK: 2432 outb(adp->va_crtc_addr + 4, 0x21); 2433 break; 2434 case V_DISPLAY_ON: 2435 outb(adp->va_crtc_addr + 4, 0x29); 2436 break; 2437 } 2438 break; 2439 default: 2440 break; 2441 } 2442 splx(s); 2443 2444 return 0; 2445} 2446 2447/* 2448 * mmap(): 2449 * Mmap frame buffer. 2450 * 2451 * all adapters 2452 */ 2453static int 2454vga_mmap_buf(video_adapter_t *adp, vm_offset_t offset, int prot) 2455{ 2456 if (adp->va_info.vi_flags & V_INFO_LINEAR) 2457 return -1; 2458 2459#if VGA_DEBUG > 0 2460 printf("vga_mmap_buf(): window:0x%x, offset:0x%x\n", 2461 adp->va_info.vi_window, offset); 2462#endif 2463 2464 /* XXX: is this correct? */ 2465 if (offset > adp->va_window_size - PAGE_SIZE) 2466 return -1; 2467 2468#ifdef __i386__ 2469 return i386_btop(adp->va_info.vi_window + offset); 2470#endif 2471#ifdef __alpha__ 2472 return alpha_btop(adp->va_info.vi_window + offset); 2473#endif 2474} 2475 2476#ifndef VGA_NO_MODE_CHANGE 2477 2478static void 2479planar_fill(video_adapter_t *adp, int val) 2480{ 2481 int length; 2482 int at; /* position in the frame buffer */ 2483 int l; 2484 2485 outw(GDCIDX, 0x0005); /* read mode 0, write mode 0 */ 2486 outw(GDCIDX, 0x0003); /* data rotate/function select */ 2487 outw(GDCIDX, 0x0f01); /* set/reset enable */ 2488 outw(GDCIDX, 0xff08); /* bit mask */ 2489 outw(GDCIDX, (val << 8) | 0x00); /* set/reset */ 2490 at = 0; 2491 length = adp->va_line_width*adp->va_info.vi_height; 2492 while (length > 0) { 2493 l = imin(length, adp->va_window_size); 2494 (*vidsw[adp->va_index]->set_win_org)(adp, at); 2495 bzero_io(adp->va_window, l); 2496 length -= l; 2497 at += l; 2498 } 2499 outw(GDCIDX, 0x0000); /* set/reset */ 2500 outw(GDCIDX, 0x0001); /* set/reset enable */ 2501} 2502 2503static void 2504packed_fill(video_adapter_t *adp, int val) 2505{ 2506 int length; 2507 int at; /* position in the frame buffer */ 2508 int l; 2509 2510 at = 0; 2511 length = adp->va_line_width*adp->va_info.vi_height; 2512 while (length > 0) { 2513 l = imin(length, adp->va_window_size); 2514 (*vidsw[adp->va_index]->set_win_org)(adp, at); 2515 fill_io(val, adp->va_window, l); 2516 length -= l; 2517 at += l; 2518 } 2519} 2520 2521static void 2522direct_fill(video_adapter_t *adp, int val) 2523{ 2524 int length; 2525 int at; /* position in the frame buffer */ 2526 int l; 2527 2528 at = 0; 2529 length = adp->va_line_width*adp->va_info.vi_height; 2530 while (length > 0) { 2531 l = imin(length, adp->va_window_size); 2532 (*vidsw[adp->va_index]->set_win_org)(adp, at); 2533 switch (adp->va_info.vi_pixel_size) { 2534 case sizeof(u_int16_t): 2535 fillw_io(val, adp->va_window, l/sizeof(u_int16_t)); 2536 break; 2537 case 3: 2538 /* FIXME */ 2539 break; 2540 case sizeof(u_int32_t): 2541 filll_io(val, adp->va_window, l/sizeof(u_int32_t)); 2542 break; 2543 } 2544 length -= l; 2545 at += l; 2546 } 2547} 2548 2549static int 2550vga_clear(video_adapter_t *adp) 2551{ 2552 switch (adp->va_info.vi_mem_model) { 2553 case V_INFO_MM_TEXT: 2554 /* do nothing? XXX */ 2555 break; 2556 case V_INFO_MM_PLANAR: 2557 planar_fill(adp, 0); 2558 break; 2559 case V_INFO_MM_PACKED: 2560 packed_fill(adp, 0); 2561 break; 2562 case V_INFO_MM_DIRECT: 2563 direct_fill(adp, 0); 2564 break; 2565 } 2566 return 0; 2567} 2568 2569#ifdef notyet 2570static void 2571planar_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2572{ 2573 int banksize; 2574 int bank; 2575 int pos; 2576 int offset; /* offset within window */ 2577 int bx; 2578 int l; 2579 2580 outw(GDCIDX, 0x0005); /* read mode 0, write mode 0 */ 2581 outw(GDCIDX, 0x0003); /* data rotate/function select */ 2582 outw(GDCIDX, 0x0f01); /* set/reset enable */ 2583 outw(GDCIDX, 0xff08); /* bit mask */ 2584 outw(GDCIDX, (val << 8) | 0x00); /* set/reset */ 2585 2586 banksize = adp->va_window_size; 2587 bank = -1; 2588 while (cy > 0) { 2589 pos = adp->va_line_width*y + x/8; 2590 if (bank != pos/banksize) { 2591 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2592 bank = pos/banksize; 2593 } 2594 offset = pos%banksize; 2595 bx = (x + cx)/8 - x/8; 2596 if (x % 8) { 2597 outw(GDCIDX, ((0xff00 >> (x % 8)) & 0xff00) | 0x08); 2598 writeb(adp->va_window + offset, 0); 2599 ++offset; 2600 --bx; 2601 if (offset >= banksize) { 2602 offset = 0; 2603 ++bank; /* next bank */ 2604 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2605 } 2606 outw(GDCIDX, 0xff08); /* bit mask */ 2607 } 2608 while (bx > 0) { 2609 l = imin(bx, banksize); 2610 bzero_io(adp->va_window + offset, l); 2611 offset += l; 2612 bx -= l; 2613 if (offset >= banksize) { 2614 offset = 0; 2615 ++bank; /* next bank */ 2616 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2617 } 2618 } 2619 if ((x + cx) % 8) { 2620 outw(GDCIDX, (~(0xff00 >> ((x + cx) % 8)) & 0xff00) | 0x08); 2621 writeb(adp->va_window + offset, 0); 2622 ++offset; 2623 if (offset >= banksize) { 2624 offset = 0; 2625 ++bank; /* next bank */ 2626 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2627 } 2628 outw(GDCIDX, 0xff08); /* bit mask */ 2629 } 2630 ++y; 2631 --cy; 2632 } 2633 2634 outw(GDCIDX, 0xff08); /* bit mask */ 2635 outw(GDCIDX, 0x0000); /* set/reset */ 2636 outw(GDCIDX, 0x0001); /* set/reset enable */ 2637} 2638 2639static void 2640packed_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2641{ 2642 int banksize; 2643 int bank; 2644 int pos; 2645 int offset; /* offset within window */ 2646 int end; 2647 2648 banksize = adp->va_window_size; 2649 bank = -1; 2650 cx *= adp->va_info.vi_pixel_size; 2651 while (cy > 0) { 2652 pos = adp->va_line_width*y + x*adp->va_info.vi_pixel_size; 2653 if (bank != pos/banksize) { 2654 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2655 bank = pos/banksize; 2656 } 2657 offset = pos%banksize; 2658 end = imin(offset + cx, banksize); 2659 fill_io(val, adp->va_window + offset, 2660 (end - offset)/adp->va_info.vi_pixel_size); 2661 /* the line may cross the window boundary */ 2662 if (offset + cx > banksize) { 2663 ++bank; /* next bank */ 2664 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2665 end = offset + cx - banksize; 2666 fill_io(val, adp->va_window, end/adp->va_info.vi_pixel_size); 2667 } 2668 ++y; 2669 --cy; 2670 } 2671} 2672 2673static void 2674direct_fill_rect16(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2675{ 2676 int banksize; 2677 int bank; 2678 int pos; 2679 int offset; /* offset within window */ 2680 int end; 2681 2682 /* 2683 * XXX: the function assumes that banksize is a muliple of 2684 * sizeof(u_int16_t). 2685 */ 2686 banksize = adp->va_window_size; 2687 bank = -1; 2688 cx *= sizeof(u_int16_t); 2689 while (cy > 0) { 2690 pos = adp->va_line_width*y + x*sizeof(u_int16_t); 2691 if (bank != pos/banksize) { 2692 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2693 bank = pos/banksize; 2694 } 2695 offset = pos%banksize; 2696 end = imin(offset + cx, banksize); 2697 fillw_io(val, adp->va_window + offset, 2698 (end - offset)/sizeof(u_int16_t)); 2699 /* the line may cross the window boundary */ 2700 if (offset + cx > banksize) { 2701 ++bank; /* next bank */ 2702 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2703 end = offset + cx - banksize; 2704 fillw_io(val, adp->va_window, end/sizeof(u_int16_t)); 2705 } 2706 ++y; 2707 --cy; 2708 } 2709} 2710 2711static void 2712direct_fill_rect24(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2713{ 2714 int banksize; 2715 int bank; 2716 int pos; 2717 int offset; /* offset within window */ 2718 int end; 2719 int i; 2720 int j; 2721 u_int8_t b[3]; 2722 2723 b[0] = val & 0x0000ff; 2724 b[1] = (val >> 8) & 0x0000ff; 2725 b[2] = (val >> 16) & 0x0000ff; 2726 banksize = adp->va_window_size; 2727 bank = -1; 2728 cx *= 3; 2729 while (cy > 0) { 2730 pos = adp->va_line_width*y + x*3; 2731 if (bank != pos/banksize) { 2732 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2733 bank = pos/banksize; 2734 } 2735 offset = pos%banksize; 2736 end = imin(offset + cx, banksize); 2737 for (i = 0, j = offset; j < end; i = (++i)%3, ++j) { 2738 writeb(adp->va_window + j, b[i]); 2739 } 2740 /* the line may cross the window boundary */ 2741 if (offset + cx >= banksize) { 2742 ++bank; /* next bank */ 2743 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2744 j = 0; 2745 end = offset + cx - banksize; 2746 for (; j < end; i = (++i)%3, ++j) { 2747 writeb(adp->va_window + j, b[i]); 2748 } 2749 } 2750 ++y; 2751 --cy; 2752 } 2753} 2754 2755static void 2756direct_fill_rect32(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2757{ 2758 int banksize; 2759 int bank; 2760 int pos; 2761 int offset; /* offset within window */ 2762 int end; 2763 2764 /* 2765 * XXX: the function assumes that banksize is a muliple of 2766 * sizeof(u_int32_t). 2767 */ 2768 banksize = adp->va_window_size; 2769 bank = -1; 2770 cx *= sizeof(u_int32_t); 2771 while (cy > 0) { 2772 pos = adp->va_line_width*y + x*sizeof(u_int32_t); 2773 if (bank != pos/banksize) { 2774 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2775 bank = pos/banksize; 2776 } 2777 offset = pos%banksize; 2778 end = imin(offset + cx, banksize); 2779 filll_io(val, adp->va_window + offset, 2780 (end - offset)/sizeof(u_int32_t)); 2781 /* the line may cross the window boundary */ 2782 if (offset + cx > banksize) { 2783 ++bank; /* next bank */ 2784 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2785 end = offset + cx - banksize; 2786 filll_io(val, adp->va_window, end/sizeof(u_int32_t)); 2787 } 2788 ++y; 2789 --cy; 2790 } 2791} 2792 2793static int 2794vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2795{ 2796 switch (adp->va_info.vi_mem_model) { 2797 case V_INFO_MM_TEXT: 2798 /* do nothing? XXX */ 2799 break; 2800 case V_INFO_MM_PLANAR: 2801 planar_fill_rect(adp, val, x, y, cx, cy); 2802 break; 2803 case V_INFO_MM_PACKED: 2804 packed_fill_rect(adp, val, x, y, cx, cy); 2805 break; 2806 case V_INFO_MM_DIRECT: 2807 switch (adp->va_info.vi_pixel_size) { 2808 case sizeof(u_int16_t): 2809 direct_fill_rect16(adp, val, x, y, cx, cy); 2810 break; 2811 case 3: 2812 direct_fill_rect24(adp, val, x, y, cx, cy); 2813 break; 2814 case sizeof(u_int32_t): 2815 direct_fill_rect32(adp, val, x, y, cx, cy); 2816 break; 2817 } 2818 break; 2819 } 2820 return 0; 2821} 2822#else /* !notyet */ 2823static int 2824vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2825{ 2826 return ENODEV; 2827} 2828#endif /* notyet */ 2829 2830static int 2831vga_bitblt(video_adapter_t *adp,...) 2832{ 2833 /* FIXME */ 2834 return ENODEV; 2835} 2836 2837#endif /* !VGA_NO_MODE_CHANGE */ 2838 2839static int 2840get_palette(video_adapter_t *adp, int base, int count, 2841 u_char *red, u_char *green, u_char *blue, u_char *trans) 2842{ 2843 u_char *r; 2844 u_char *g; 2845 u_char *b; 2846 2847 if ((base < 0) || (base >= 256) || (base + count > 256)) 2848 return EINVAL; 2849 2850 r = malloc(count*3, M_DEVBUF, M_WAITOK); 2851 g = r + count; 2852 b = g + count; 2853 if (vga_save_palette2(adp, base, count, r, g, b)) 2854 return ENODEV; 2855 copyout(r, red, count); 2856 copyout(g, green, count); 2857 copyout(b, blue, count); 2858 if (trans != NULL) { 2859 bzero(r, count); 2860 copyout(r, trans, count); 2861 } 2862 free(r, M_DEVBUF); 2863 2864 return 0; 2865} 2866 2867static int 2868set_palette(video_adapter_t *adp, int base, int count, 2869 u_char *red, u_char *green, u_char *blue, u_char *trans) 2870{ 2871 u_char *r; 2872 u_char *g; 2873 u_char *b; 2874 int err; 2875 2876 if ((base < 0) || (base >= 256) || (base + count > 256)) 2877 return EINVAL; 2878 2879 r = malloc(count*3, M_DEVBUF, M_WAITOK); 2880 g = r + count; 2881 b = g + count; 2882 copyin(red, r, count); 2883 copyin(green, g, count); 2884 copyin(blue, b, count); 2885 err = vga_load_palette2(adp, base, count, r, g, b); 2886 free(r, M_DEVBUF); 2887 2888 return (err ? ENODEV : 0); 2889} 2890 2891static int 2892vga_dev_ioctl(video_adapter_t *adp, u_long cmd, caddr_t arg) 2893{ 2894 switch (cmd) { 2895 case FBIO_GETWINORG: /* get frame buffer window origin */ 2896 *(u_int *)arg = 0; 2897 return 0; 2898 2899 case FBIO_SETWINORG: /* set frame buffer window origin */ 2900 return ENODEV; 2901 2902 case FBIO_SETDISPSTART: /* set display start address */ 2903 return (set_display_start(adp, 2904 ((video_display_start_t *)arg)->x, 2905 ((video_display_start_t *)arg)->y) 2906 ? ENODEV : 0); 2907 2908 case FBIO_SETLINEWIDTH: /* set scan line length in pixel */ 2909 return (set_line_length(adp, *(u_int *)arg) ? ENODEV : 0); 2910 2911 case FBIO_GETPALETTE: /* get color palette */ 2912 return get_palette(adp, ((video_color_palette_t *)arg)->index, 2913 ((video_color_palette_t *)arg)->count, 2914 ((video_color_palette_t *)arg)->red, 2915 ((video_color_palette_t *)arg)->green, 2916 ((video_color_palette_t *)arg)->blue, 2917 ((video_color_palette_t *)arg)->transparent); 2918 2919 case FBIO_SETPALETTE: /* set color palette */ 2920 return set_palette(adp, ((video_color_palette_t *)arg)->index, 2921 ((video_color_palette_t *)arg)->count, 2922 ((video_color_palette_t *)arg)->red, 2923 ((video_color_palette_t *)arg)->green, 2924 ((video_color_palette_t *)arg)->blue, 2925 ((video_color_palette_t *)arg)->transparent); 2926 2927 case FBIOGTYPE: /* get frame buffer type info. */ 2928 ((struct fbtype *)arg)->fb_type = fb_type(adp->va_type); 2929 ((struct fbtype *)arg)->fb_height = adp->va_info.vi_height; 2930 ((struct fbtype *)arg)->fb_width = adp->va_info.vi_width; 2931 ((struct fbtype *)arg)->fb_depth = adp->va_info.vi_depth; 2932 if ((adp->va_info.vi_depth <= 1) || (adp->va_info.vi_depth > 8)) 2933 ((struct fbtype *)arg)->fb_cmsize = 0; 2934 else 2935 ((struct fbtype *)arg)->fb_cmsize = 1 << adp->va_info.vi_depth; 2936 ((struct fbtype *)arg)->fb_size = adp->va_buffer_size; 2937 return 0; 2938 2939 case FBIOGETCMAP: /* get color palette */ 2940 return get_palette(adp, ((struct fbcmap *)arg)->index, 2941 ((struct fbcmap *)arg)->count, 2942 ((struct fbcmap *)arg)->red, 2943 ((struct fbcmap *)arg)->green, 2944 ((struct fbcmap *)arg)->blue, NULL); 2945 2946 case FBIOPUTCMAP: /* set color palette */ 2947 return set_palette(adp, ((struct fbcmap *)arg)->index, 2948 ((struct fbcmap *)arg)->count, 2949 ((struct fbcmap *)arg)->red, 2950 ((struct fbcmap *)arg)->green, 2951 ((struct fbcmap *)arg)->blue, NULL); 2952 2953 default: 2954 return fb_commonioctl(adp, cmd, arg); 2955 } 2956} 2957 2958static void 2959dump_buffer(u_char *buf, size_t len) 2960{ 2961 int i; 2962 2963 for(i = 0; i < len;) { 2964 printf("%02x ", buf[i]); 2965 if ((++i % 16) == 0) 2966 printf("\n"); 2967 } 2968} 2969 2970/* 2971 * diag(): 2972 * Print some information about the video adapter and video modes, 2973 * with requested level of details. 2974 * 2975 * all adapters 2976 */ 2977static int 2978vga_diag(video_adapter_t *adp, int level) 2979{ 2980 u_char *mp; 2981#if FB_DEBUG > 1 2982 video_info_t info; 2983 int i; 2984#endif 2985 2986 if (!vga_init_done) 2987 return ENXIO; 2988 2989#if FB_DEBUG > 1 2990#ifndef VGA_NO_BIOS 2991 printf("vga: RTC equip. code:0x%02x, DCC code:0x%02x\n", 2992 rtcin(RTC_EQUIPMENT), readb(BIOS_PADDRTOVADDR(0x488))); 2993 printf("vga: CRTC:0x%x, video option:0x%02x, ", 2994 readw(BIOS_PADDRTOVADDR(0x463)), 2995 readb(BIOS_PADDRTOVADDR(0x487))); 2996 printf("rows:%d, cols:%d, font height:%d\n", 2997 readb(BIOS_PADDRTOVADDR(0x44a)), 2998 readb(BIOS_PADDRTOVADDR(0x484)) + 1, 2999 readb(BIOS_PADDRTOVADDR(0x485))); 3000#endif /* VGA_NO_BIOS */ 3001#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 3002 printf("vga: param table EGA/VGA:%p", video_mode_ptr); 3003 printf(", CGA/MDA:%p\n", video_mode_ptr2); 3004 printf("vga: rows_offset:%d\n", rows_offset); 3005#endif 3006#endif /* FB_DEBUG > 1 */ 3007 3008 fb_dump_adp_info(VGA_DRIVER_NAME, adp, level); 3009 3010#if FB_DEBUG > 1 3011 if (adp->va_flags & V_ADP_MODECHANGE) { 3012 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 3013 if (bios_vmode[i].vi_mode == NA) 3014 continue; 3015 if (get_mode_param(bios_vmode[i].vi_mode) == NULL) 3016 continue; 3017 fb_dump_mode_info(VGA_DRIVER_NAME, adp, &bios_vmode[i], level); 3018 } 3019 } else { 3020 vga_get_info(adp, adp->va_initial_mode, &info); /* shouldn't fail */ 3021 fb_dump_mode_info(VGA_DRIVER_NAME, adp, &info, level); 3022 } 3023#endif /* FB_DEBUG > 1 */ 3024 3025 if ((adp->va_type != KD_EGA) && (adp->va_type != KD_VGA)) 3026 return 0; 3027#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 3028 if (video_mode_ptr == NULL) 3029 printf("vga%d: %s: WARNING: video mode switching is not " 3030 "fully supported on this adapter\n", 3031 adp->va_unit, adp->va_name); 3032#endif 3033 if (level <= 0) 3034 return 0; 3035 3036 if (adp->va_type == KD_VGA) { 3037 printf("VGA parameters upon power-up\n"); 3038 dump_buffer(adpstate.regs, sizeof(adpstate.regs)); 3039 printf("VGA parameters in BIOS for mode %d\n", adp->va_initial_mode); 3040 dump_buffer(adpstate2.regs, sizeof(adpstate2.regs)); 3041 } 3042 3043 mp = get_mode_param(adp->va_initial_mode); 3044 if (mp == NULL) /* this shouldn't be happening */ 3045 return 0; 3046 printf("EGA/VGA parameters to be used for mode %d\n", adp->va_initial_mode); 3047 dump_buffer(mp, V_MODE_PARAM_SIZE); 3048 3049 return 0; 3050} 3051 3052#endif /* NVGA > 0 */ 3053