vga.c revision 50299
1/*- 2 * Copyright (c) 1999 Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp> 3 * Copyright (c) 1992-1998 S�ren Schmidt 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer as 11 * the first lines of this file unmodified. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * $Id: vga.c,v 1.2 1999/06/26 10:52:54 peter Exp $ 30 */ 31 32#include "vga.h" 33#include "opt_vga.h" 34#include "opt_fb.h" 35#include "opt_syscons.h" /* should be removed in the future, XXX */ 36 37#if NVGA > 0 38 39#include <sys/param.h> 40#include <sys/systm.h> 41#include <sys/kernel.h> 42#include <sys/conf.h> 43#include <sys/proc.h> 44#include <sys/fcntl.h> 45#include <sys/malloc.h> 46#include <sys/fbio.h> 47 48#include <vm/vm.h> 49#include <vm/vm_param.h> 50#include <vm/pmap.h> 51 52#include <machine/md_var.h> 53#include <machine/pc/bios.h> 54 55#include <dev/fb/fbreg.h> 56#include <dev/fb/vgareg.h> 57 58#include <isa/isareg.h> 59 60#ifndef VGA_DEBUG 61#define VGA_DEBUG 0 62#endif 63 64int 65vga_probe_unit(int unit, video_adapter_t *buf, int flags) 66{ 67 video_adapter_t *adp; 68 video_switch_t *sw; 69 int error; 70 71 sw = vid_get_switch(VGA_DRIVER_NAME); 72 if (sw == NULL) 73 return 0; 74 error = (*sw->probe)(unit, &adp, NULL, flags); 75 if (error) 76 return error; 77 bcopy(adp, buf, sizeof(*buf)); 78 return 0; 79} 80 81int 82vga_attach_unit(int unit, vga_softc_t *sc, int flags) 83{ 84 video_switch_t *sw; 85 int error; 86 87 sw = vid_get_switch(VGA_DRIVER_NAME); 88 if (sw == NULL) 89 return ENXIO; 90 91 error = (*sw->probe)(unit, &sc->adp, NULL, flags); 92 if (error) 93 return error; 94 return (*sw->init)(unit, sc->adp, flags); 95} 96 97/* cdev driver functions */ 98 99#ifdef FB_INSTALL_CDEV 100 101int 102vga_open(dev_t dev, vga_softc_t *sc, int flag, int mode, struct proc *p) 103{ 104 if (sc == NULL) 105 return ENXIO; 106 if (mode & (O_CREAT | O_APPEND | O_TRUNC)) 107 return ENODEV; 108 109 return genfbopen(&sc->gensc, sc->adp, flag, mode, p); 110} 111 112int 113vga_close(dev_t dev, vga_softc_t *sc, int flag, int mode, struct proc *p) 114{ 115 return genfbclose(&sc->gensc, sc->adp, flag, mode, p); 116} 117 118int 119vga_read(dev_t dev, vga_softc_t *sc, struct uio *uio, int flag) 120{ 121 return genfbread(&sc->gensc, sc->adp, uio, flag); 122} 123 124int 125vga_write(dev_t dev, vga_softc_t *sc, struct uio *uio, int flag) 126{ 127 return genfbread(&sc->gensc, sc->adp, uio, flag); 128} 129 130int 131vga_ioctl(dev_t dev, vga_softc_t *sc, u_long cmd, caddr_t arg, int flag, 132 struct proc *p) 133{ 134 return genfbioctl(&sc->gensc, sc->adp, cmd, arg, flag, p); 135} 136 137int 138vga_mmap(dev_t dev, vga_softc_t *sc, vm_offset_t offset, int prot) 139{ 140 return genfbmmap(&sc->gensc, sc->adp, offset, prot); 141} 142 143#endif /* FB_INSTALL_CDEV */ 144 145/* LOW-LEVEL */ 146 147#include <machine/clock.h> 148#include <machine/pc/vesa.h> 149 150#define probe_done(adp) ((adp)->va_flags & V_ADP_PROBED) 151#define init_done(adp) ((adp)->va_flags & V_ADP_INITIALIZED) 152#define config_done(adp) ((adp)->va_flags & V_ADP_REGISTERED) 153 154/* for compatibility with old kernel options */ 155#ifdef SC_ALT_SEQACCESS 156#undef SC_ALT_SEQACCESS 157#undef VGA_ALT_SEQACCESS 158#define VGA_ALT_SEQACCESS 1 159#endif 160 161#ifdef SLOW_VGA 162#undef SLOW_VGA 163#undef VGA_SLOW_IOACCESS 164#define VGA_SLOW_IOACCESS 1 165#endif 166 167/* architecture dependent option */ 168#ifdef __alpha__ 169#define VGA_NO_BIOS 1 170#endif 171 172/* this should really be in `rtc.h' */ 173#define RTC_EQUIPMENT 0x14 174 175/* various sizes */ 176#define V_MODE_MAP_SIZE (M_VGA_CG320 + 1) 177#define V_MODE_PARAM_SIZE 64 178 179/* video adapter state buffer */ 180struct adp_state { 181 int sig; 182#define V_STATE_SIG 0x736f6962 183 u_char regs[V_MODE_PARAM_SIZE]; 184}; 185typedef struct adp_state adp_state_t; 186 187/* video adapter information */ 188#define DCC_MONO 0 189#define DCC_CGA40 1 190#define DCC_CGA80 2 191#define DCC_EGAMONO 3 192#define DCC_EGA40 4 193#define DCC_EGA80 5 194 195/* 196 * NOTE: `va_window' should have a virtual address, but is initialized 197 * with a physical address in the following table, as verify_adapter() 198 * will perform address conversion at run-time. 199 */ 200static video_adapter_t adapter_init_value[] = { 201 /* DCC_MONO */ 202 { 0, KD_MONO, "mda", 0, 0, 0, IO_MDA, IO_MDASIZE, MONO_CRTC, 203 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 204 0, 0, 0, 0, 7, 0, }, 205 /* DCC_CGA40 */ 206 { 0, KD_CGA, "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC, 207 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 208 0, 0, 0, 0, 3, 0, }, 209 /* DCC_CGA80 */ 210 { 0, KD_CGA, "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC, 211 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 212 0, 0, 0, 0, 3, 0, }, 213 /* DCC_EGAMONO */ 214 { 0, KD_EGA, "ega", 0, 0, 0, IO_MDA, 48, MONO_CRTC, 215 EGA_BUF_BASE, EGA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 216 0, 0, 0, 0, 7, 0, }, 217 /* DCC_EGA40 */ 218 { 0, KD_EGA, "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48, COLOR_CRTC, 219 EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 220 0, 0, 0, 0, 3, 0, }, 221 /* DCC_EGA80 */ 222 { 0, KD_EGA, "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48, COLOR_CRTC, 223 EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 224 0, 0, 0, 0, 3, 0, }, 225}; 226 227static video_adapter_t biosadapter[2]; 228static int biosadapters = 0; 229 230/* video driver declarations */ 231static int vga_configure(int flags); 232 int (*vga_sub_configure)(int flags); 233#if 0 234static int vga_nop(void); 235#endif 236static int vga_error(void); 237static vi_probe_t vga_probe; 238static vi_init_t vga_init; 239static vi_get_info_t vga_get_info; 240static vi_query_mode_t vga_query_mode; 241static vi_set_mode_t vga_set_mode; 242static vi_save_font_t vga_save_font; 243static vi_load_font_t vga_load_font; 244static vi_show_font_t vga_show_font; 245static vi_save_palette_t vga_save_palette; 246static vi_load_palette_t vga_load_palette; 247static vi_set_border_t vga_set_border; 248static vi_save_state_t vga_save_state; 249static vi_load_state_t vga_load_state; 250static vi_set_win_org_t vga_set_origin; 251static vi_read_hw_cursor_t vga_read_hw_cursor; 252static vi_set_hw_cursor_t vga_set_hw_cursor; 253static vi_set_hw_cursor_shape_t vga_set_hw_cursor_shape; 254static vi_blank_display_t vga_blank_display; 255static vi_mmap_t vga_mmap_buf; 256static vi_ioctl_t vga_dev_ioctl; 257#ifndef VGA_NO_MODE_CHANGE 258static vi_clear_t vga_clear; 259static vi_fill_rect_t vga_fill_rect; 260static vi_bitblt_t vga_bitblt; 261#else /* VGA_NO_MODE_CHANGE */ 262#define vga_clear (vi_clear_t *)vga_error 263#define vga_fill_rect (vi_fill_rect_t *)vga_error 264#define vga_bitblt (vi_bitblt_t *)vga_error 265#endif 266static vi_diag_t vga_diag; 267 268static video_switch_t vgavidsw = { 269 vga_probe, 270 vga_init, 271 vga_get_info, 272 vga_query_mode, 273 vga_set_mode, 274 vga_save_font, 275 vga_load_font, 276 vga_show_font, 277 vga_save_palette, 278 vga_load_palette, 279 vga_set_border, 280 vga_save_state, 281 vga_load_state, 282 vga_set_origin, 283 vga_read_hw_cursor, 284 vga_set_hw_cursor, 285 vga_set_hw_cursor_shape, 286 vga_blank_display, 287 vga_mmap_buf, 288 vga_dev_ioctl, 289 vga_clear, 290 vga_fill_rect, 291 vga_bitblt, 292 vga_error, 293 vga_error, 294 vga_diag, 295}; 296 297VIDEO_DRIVER(mda, vgavidsw, NULL); 298VIDEO_DRIVER(cga, vgavidsw, NULL); 299VIDEO_DRIVER(ega, vgavidsw, NULL); 300VIDEO_DRIVER(vga, vgavidsw, vga_configure); 301 302/* VGA BIOS standard video modes */ 303#define EOT (-1) 304#define NA (-2) 305 306static video_info_t bios_vmode[] = { 307 /* CGA */ 308 { M_B40x25, V_INFO_COLOR, 40, 25, 8, 8, 2, 1, 309 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 310 { M_C40x25, V_INFO_COLOR, 40, 25, 8, 8, 4, 1, 311 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 312 { M_B80x25, V_INFO_COLOR, 80, 25, 8, 8, 2, 1, 313 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 314 { M_C80x25, V_INFO_COLOR, 80, 25, 8, 8, 4, 1, 315 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 316 /* EGA */ 317 { M_ENH_B40x25, V_INFO_COLOR, 40, 25, 8, 14, 2, 1, 318 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 319 { M_ENH_C40x25, V_INFO_COLOR, 40, 25, 8, 14, 4, 1, 320 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 321 { M_ENH_B80x25, V_INFO_COLOR, 80, 25, 8, 14, 2, 1, 322 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 323 { M_ENH_C80x25, V_INFO_COLOR, 80, 25, 8, 14, 4, 1, 324 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 325 /* VGA */ 326 { M_VGA_C40x25, V_INFO_COLOR, 40, 25, 8, 16, 4, 1, 327 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 328 { M_VGA_M80x25, 0, 80, 25, 8, 16, 2, 1, 329 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 330 { M_VGA_C80x25, V_INFO_COLOR, 80, 25, 8, 16, 4, 1, 331 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 332 /* MDA */ 333 { M_EGAMONO80x25, 0, 80, 25, 8, 14, 2, 1, 334 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 335 /* EGA */ 336 { M_ENH_B80x43, 0, 80, 43, 8, 8, 2, 1, 337 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 338 { M_ENH_C80x43, V_INFO_COLOR, 80, 43, 8, 8, 4, 1, 339 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 340 /* VGA */ 341 { M_VGA_M80x30, 0, 80, 30, 8, 16, 2, 1, 342 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 343 { M_VGA_C80x30, V_INFO_COLOR, 80, 30, 8, 16, 4, 1, 344 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 345 { M_VGA_M80x50, 0, 80, 50, 8, 8, 2, 1, 346 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 347 { M_VGA_C80x50, V_INFO_COLOR, 80, 50, 8, 8, 4, 1, 348 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 349 { M_VGA_M80x60, 0, 80, 60, 8, 8, 2, 1, 350 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 351 { M_VGA_C80x60, V_INFO_COLOR, 80, 60, 8, 8, 4, 1, 352 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 353 354#ifndef VGA_NO_MODE_CHANGE 355 356#ifdef VGA_WIDTH90 357 { M_VGA_M90x25, 0, 90, 25, 8, 16, 2, 1, 358 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 359 { M_VGA_C90x25, V_INFO_COLOR, 90, 25, 8, 16, 4, 1, 360 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 361 { M_VGA_M90x30, 0, 90, 30, 8, 16, 2, 1, 362 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 363 { M_VGA_C90x30, V_INFO_COLOR, 90, 30, 8, 16, 4, 1, 364 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 365 { M_VGA_M90x43, 0, 90, 43, 8, 8, 2, 1, 366 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 367 { M_VGA_C90x43, V_INFO_COLOR, 90, 43, 8, 8, 4, 1, 368 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 369 { M_VGA_M90x50, 0, 90, 50, 8, 8, 2, 1, 370 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 371 { M_VGA_C90x50, V_INFO_COLOR, 90, 50, 8, 8, 4, 1, 372 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 373 { M_VGA_M90x60, 0, 90, 60, 8, 8, 2, 1, 374 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 375 { M_VGA_C90x60, V_INFO_COLOR, 90, 60, 8, 8, 4, 1, 376 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 377#endif /* VGA_WIDTH90 */ 378 379 /* CGA */ 380 { M_BG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 2, 1, 381 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 382 { M_CG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 2, 1, 383 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 384 { M_BG640, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8, 8, 1, 1, 385 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 386 /* EGA */ 387 { M_CG320_D, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 4, 4, 388 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 389 V_INFO_MM_PLANAR }, 390 { M_CG640_E, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8, 8, 4, 4, 391 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 392 V_INFO_MM_PLANAR }, 393 { M_EGAMONOAPA, V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 394 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, 64*1024, 0, 0 , 395 V_INFO_MM_PLANAR }, 396 { M_ENHMONOAPA2,V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 397 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 398 V_INFO_MM_PLANAR }, 399 { M_CG640x350, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 2, 2, 400 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 401 V_INFO_MM_PLANAR }, 402 { M_ENH_CG640, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 403 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 404 V_INFO_MM_PLANAR }, 405 /* VGA */ 406 { M_BG640x480, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4, 407 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 408 V_INFO_MM_PLANAR }, 409 { M_CG640x480, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4, 410 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 411 V_INFO_MM_PLANAR }, 412 { M_VGA_CG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 8, 1, 413 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 414 V_INFO_MM_PACKED, 1 }, 415 { M_VGA_MODEX, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 240, 8, 8, 8, 4, 416 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 417 V_INFO_MM_VGAX, 1 }, 418#endif /* VGA_NO_MODE_CHANGE */ 419 420 { EOT }, 421}; 422 423static int vga_init_done = FALSE; 424#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 425static u_char *video_mode_ptr = NULL; /* EGA/VGA */ 426static u_char *video_mode_ptr2 = NULL; /* CGA/MDA */ 427#endif 428static u_char *mode_map[V_MODE_MAP_SIZE]; 429static adp_state_t adpstate; 430static adp_state_t adpstate2; 431static int rows_offset = 1; 432 433/* local macros and functions */ 434#define BIOS_SADDRTOLADDR(p) ((((p) & 0xffff0000) >> 12) + ((p) & 0x0000ffff)) 435 436#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 437static void map_mode_table(u_char *map[], u_char *table, int max); 438#endif 439static void clear_mode_map(video_adapter_t *adp, u_char *map[], int max, 440 int color); 441#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 442static int map_mode_num(int mode); 443#endif 444static int map_gen_mode_num(int type, int color, int mode); 445static int map_bios_mode_num(int type, int color, int bios_mode); 446static u_char *get_mode_param(int mode); 447#ifndef VGA_NO_BIOS 448static void fill_adapter_param(int code, video_adapter_t *adp); 449#endif 450static int verify_adapter(video_adapter_t *adp); 451static void update_adapter_info(video_adapter_t *adp, video_info_t *info); 452#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 453#define COMP_IDENTICAL 0 454#define COMP_SIMILAR 1 455#define COMP_DIFFERENT 2 456static int comp_adpregs(u_char *buf1, u_char *buf2); 457#endif 458static int probe_adapters(void); 459static int set_line_length(video_adapter_t *adp, int pixel); 460static int set_display_start(video_adapter_t *adp, int x, int y); 461static void filll_io(int val, vm_offset_t d, size_t size); 462 463#ifndef VGA_NO_MODE_CHANGE 464#ifdef VGA_WIDTH90 465static void set_width90(adp_state_t *params); 466#endif 467#endif /* !VGA_NO_MODE_CHANGE */ 468 469#ifndef VGA_NO_FONT_LOADING 470#define PARAM_BUFSIZE 6 471static void set_font_mode(video_adapter_t *adp, u_char *buf); 472static void set_normal_mode(video_adapter_t *adp, u_char *buf); 473#endif 474 475#ifndef VGA_NO_MODE_CHANGE 476static void planar_fill(video_adapter_t *adp, int val); 477static void packed_fill(video_adapter_t *adp, int val); 478static void direct_fill(video_adapter_t *adp, int val); 479#ifdef notyet 480static void planar_fill_rect(video_adapter_t *adp, int val, int x, int y, 481 int cx, int cy); 482static void packed_fill_rect(video_adapter_t *adp, int val, int x, int y, 483 int cx, int cy); 484static void direct_fill_rect16(video_adapter_t *adp, int val, int x, int y, 485 int cx, int cy); 486static void direct_fill_rect24(video_adapter_t *adp, int val, int x, int y, 487 int cx, int cy); 488static void direct_fill_rect32(video_adapter_t *adp, int val, int x, int y, 489 int cx, int cy); 490#endif /* notyet */ 491#endif /* !VGA_NO_MODE_CHANGE */ 492 493static void dump_buffer(u_char *buf, size_t len); 494 495#define ISMAPPED(pa, width) \ 496 (((pa) <= (u_long)0x1000 - (width)) \ 497 || ((pa) >= ISA_HOLE_START && (pa) <= 0x100000 - (width))) 498 499#define prologue(adp, flag, err) \ 500 if (!vga_init_done || !((adp)->va_flags & (flag))) \ 501 return (err) 502 503/* a backdoor for the console driver */ 504static int 505vga_configure(int flags) 506{ 507 int i; 508 509 probe_adapters(); 510 for (i = 0; i < biosadapters; ++i) { 511 if (!probe_done(&biosadapter[i])) 512 continue; 513 biosadapter[i].va_flags |= V_ADP_INITIALIZED; 514 if (!config_done(&biosadapter[i])) { 515 if (vid_register(&biosadapter[i]) < 0) 516 continue; 517 biosadapter[i].va_flags |= V_ADP_REGISTERED; 518 } 519 } 520 if (vga_sub_configure != NULL) 521 (*vga_sub_configure)(flags); 522 523 return biosadapters; 524} 525 526/* local subroutines */ 527 528#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 529/* construct the mode parameter map */ 530static void 531map_mode_table(u_char *map[], u_char *table, int max) 532{ 533 int i; 534 535 for(i = 0; i < max; ++i) 536 map[i] = table + i*V_MODE_PARAM_SIZE; 537 for(; i < V_MODE_MAP_SIZE; ++i) 538 map[i] = NULL; 539} 540#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 541 542static void 543clear_mode_map(video_adapter_t *adp, u_char *map[], int max, int color) 544{ 545 video_info_t info; 546 int i; 547 548 /* 549 * NOTE: we don't touch `bios_vmode[]' because it is shared 550 * by all adapters. 551 */ 552 for(i = 0; i < max; ++i) { 553 if (vga_get_info(adp, i, &info)) 554 continue; 555 if ((info.vi_flags & V_INFO_COLOR) != color) 556 map[i] = NULL; 557 } 558} 559 560#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 561/* map the non-standard video mode to a known mode number */ 562static int 563map_mode_num(int mode) 564{ 565 static struct { 566 int from; 567 int to; 568 } mode_map[] = { 569 { M_ENH_B80x43, M_ENH_B80x25 }, 570 { M_ENH_C80x43, M_ENH_C80x25 }, 571 { M_VGA_M80x30, M_VGA_M80x25 }, 572 { M_VGA_C80x30, M_VGA_C80x25 }, 573 { M_VGA_M80x50, M_VGA_M80x25 }, 574 { M_VGA_C80x50, M_VGA_C80x25 }, 575 { M_VGA_M80x60, M_VGA_M80x25 }, 576 { M_VGA_C80x60, M_VGA_C80x25 }, 577#ifdef VGA_WIDTH90 578 { M_VGA_M90x25, M_VGA_M80x25 }, 579 { M_VGA_C90x25, M_VGA_C80x25 }, 580 { M_VGA_M90x30, M_VGA_M80x25 }, 581 { M_VGA_C90x30, M_VGA_C80x25 }, 582 { M_VGA_M90x43, M_ENH_B80x25 }, 583 { M_VGA_C90x43, M_ENH_C80x25 }, 584 { M_VGA_M90x50, M_VGA_M80x25 }, 585 { M_VGA_C90x50, M_VGA_C80x25 }, 586 { M_VGA_M90x60, M_VGA_M80x25 }, 587 { M_VGA_C90x60, M_VGA_C80x25 }, 588#endif 589 { M_VGA_MODEX, M_VGA_CG320 }, 590 }; 591 int i; 592 593 for (i = 0; i < sizeof(mode_map)/sizeof(mode_map[0]); ++i) { 594 if (mode_map[i].from == mode) 595 return mode_map[i].to; 596 } 597 return mode; 598} 599#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 600 601/* map a generic video mode to a known mode number */ 602static int 603map_gen_mode_num(int type, int color, int mode) 604{ 605 static struct { 606 int from; 607 int to_color; 608 int to_mono; 609 } mode_map[] = { 610 { M_TEXT_80x30, M_VGA_C80x30, M_VGA_M80x30, }, 611 { M_TEXT_80x43, M_ENH_C80x43, M_ENH_B80x43, }, 612 { M_TEXT_80x50, M_VGA_C80x50, M_VGA_M80x50, }, 613 { M_TEXT_80x60, M_VGA_C80x60, M_VGA_M80x60, }, 614 }; 615 int i; 616 617 if (mode == M_TEXT_80x25) { 618 switch (type) { 619 620 case KD_VGA: 621 if (color) 622 return M_VGA_C80x25; 623 else 624 return M_VGA_M80x25; 625 break; 626 627 case KD_EGA: 628 if (color) 629 return M_ENH_C80x25; 630 else 631 return M_EGAMONO80x25; 632 break; 633 634 case KD_CGA: 635 return M_C80x25; 636 637 case KD_MONO: 638 case KD_HERCULES: 639 return M_EGAMONO80x25; /* XXX: this name is confusing */ 640 641 default: 642 return -1; 643 } 644 } 645 646 for (i = 0; i < sizeof(mode_map)/sizeof(mode_map[0]); ++i) { 647 if (mode_map[i].from == mode) 648 return ((color) ? mode_map[i].to_color : mode_map[i].to_mono); 649 } 650 return mode; 651} 652 653/* turn the BIOS video number into our video mode number */ 654static int 655map_bios_mode_num(int type, int color, int bios_mode) 656{ 657 static int cga_modes[7] = { 658 M_B40x25, M_C40x25, /* 0, 1 */ 659 M_B80x25, M_C80x25, /* 2, 3 */ 660 M_BG320, M_CG320, 661 M_BG640, 662 }; 663 static int ega_modes[17] = { 664 M_ENH_B40x25, M_ENH_C40x25, /* 0, 1 */ 665 M_ENH_B80x25, M_ENH_C80x25, /* 2, 3 */ 666 M_BG320, M_CG320, 667 M_BG640, 668 M_EGAMONO80x25, /* 7 */ 669 8, 9, 10, 11, 12, 670 M_CG320_D, 671 M_CG640_E, 672 M_ENHMONOAPA2, /* XXX: video momery > 64K */ 673 M_ENH_CG640, /* XXX: video momery > 64K */ 674 }; 675 static int vga_modes[20] = { 676 M_VGA_C40x25, M_VGA_C40x25, /* 0, 1 */ 677 M_VGA_C80x25, M_VGA_C80x25, /* 2, 3 */ 678 M_BG320, M_CG320, 679 M_BG640, 680 M_VGA_M80x25, /* 7 */ 681 8, 9, 10, 11, 12, 682 M_CG320_D, 683 M_CG640_E, 684 M_ENHMONOAPA2, 685 M_ENH_CG640, 686 M_BG640x480, M_CG640x480, 687 M_VGA_CG320, 688 }; 689 690 switch (type) { 691 692 case KD_VGA: 693 if (bios_mode < sizeof(vga_modes)/sizeof(vga_modes[0])) 694 return vga_modes[bios_mode]; 695 else if (color) 696 return M_VGA_C80x25; 697 else 698 return M_VGA_M80x25; 699 break; 700 701 case KD_EGA: 702 if (bios_mode < sizeof(ega_modes)/sizeof(ega_modes[0])) 703 return ega_modes[bios_mode]; 704 else if (color) 705 return M_ENH_C80x25; 706 else 707 return M_EGAMONO80x25; 708 break; 709 710 case KD_CGA: 711 if (bios_mode < sizeof(cga_modes)/sizeof(cga_modes[0])) 712 return cga_modes[bios_mode]; 713 else 714 return M_C80x25; 715 break; 716 717 case KD_MONO: 718 case KD_HERCULES: 719 return M_EGAMONO80x25; /* XXX: this name is confusing */ 720 721 default: 722 break; 723 } 724 return -1; 725} 726 727/* look up a parameter table entry */ 728static u_char 729*get_mode_param(int mode) 730{ 731#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 732 if (mode >= V_MODE_MAP_SIZE) 733 mode = map_mode_num(mode); 734#endif 735 if ((mode >= 0) && (mode < V_MODE_MAP_SIZE)) 736 return mode_map[mode]; 737 else 738 return NULL; 739} 740 741#ifndef VGA_NO_BIOS 742static void 743fill_adapter_param(int code, video_adapter_t *adp) 744{ 745 static struct { 746 int primary; 747 int secondary; 748 } dcc[] = { 749 { DCC_MONO, DCC_EGA40 /* CGA monitor */ }, 750 { DCC_MONO, DCC_EGA80 /* CGA monitor */ }, 751 { DCC_MONO, DCC_EGA80 /* CGA emulation */ }, 752 { DCC_MONO, DCC_EGA80 }, 753 { DCC_CGA40, DCC_EGAMONO }, 754 { DCC_CGA80, DCC_EGAMONO }, 755 { DCC_EGA40 /* CGA monitor */, DCC_MONO}, 756 { DCC_EGA80 /* CGA monitor */, DCC_MONO}, 757 { DCC_EGA80 /* CGA emulation */,DCC_MONO }, 758 { DCC_EGA80, DCC_MONO }, 759 { DCC_EGAMONO, DCC_CGA40 }, 760 { DCC_EGAMONO, DCC_CGA40 }, 761 }; 762 763 if ((code < 0) || (code >= sizeof(dcc)/sizeof(dcc[0]))) { 764 adp[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO]; 765 adp[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80]; 766 } else { 767 adp[V_ADP_PRIMARY] = adapter_init_value[dcc[code].primary]; 768 adp[V_ADP_SECONDARY] = adapter_init_value[dcc[code].secondary]; 769 } 770} 771#endif /* VGA_NO_BIOS */ 772 773static int 774verify_adapter(video_adapter_t *adp) 775{ 776 vm_offset_t buf; 777 u_int16_t v; 778#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 779 u_int32_t p; 780#endif 781 782 buf = BIOS_PADDRTOVADDR(adp->va_window); 783 v = readw(buf); 784 writew(buf, 0xA55A); 785 if (readw(buf) != 0xA55A) 786 return ENXIO; 787 writew(buf, v); 788 789 switch (adp->va_type) { 790 791 case KD_EGA: 792 outb(adp->va_crtc_addr, 7); 793 if (inb(adp->va_crtc_addr) == 7) { 794 adp->va_type = KD_VGA; 795 adp->va_name = "vga"; 796 adp->va_flags |= V_ADP_STATESAVE | V_ADP_PALETTE; 797 } 798 adp->va_flags |= V_ADP_STATELOAD | V_ADP_BORDER; 799 /* the color adapter may be in the 40x25 mode... XXX */ 800 801#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 802 /* get the BIOS video mode pointer */ 803 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8); 804 p = BIOS_SADDRTOLADDR(p); 805 if (ISMAPPED(p, sizeof(u_int32_t))) { 806 p = *(u_int32_t *)BIOS_PADDRTOVADDR(p); 807 p = BIOS_SADDRTOLADDR(p); 808 if (ISMAPPED(p, V_MODE_PARAM_SIZE)) 809 video_mode_ptr = (u_char *)BIOS_PADDRTOVADDR(p); 810 } 811#endif 812 break; 813 814 case KD_CGA: 815 adp->va_flags |= V_ADP_COLOR | V_ADP_BORDER; 816 /* may be in the 40x25 mode... XXX */ 817#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 818 /* get the BIOS video mode pointer */ 819 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4); 820 p = BIOS_SADDRTOLADDR(p); 821 video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p); 822#endif 823 break; 824 825 case KD_MONO: 826#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 827 /* get the BIOS video mode pointer */ 828 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4); 829 p = BIOS_SADDRTOLADDR(p); 830 video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p); 831#endif 832 break; 833 } 834 835 return 0; 836} 837 838static void 839update_adapter_info(video_adapter_t *adp, video_info_t *info) 840{ 841 adp->va_flags &= ~V_ADP_COLOR; 842 adp->va_flags |= 843 (info->vi_flags & V_INFO_COLOR) ? V_ADP_COLOR : 0; 844 adp->va_crtc_addr = 845 (adp->va_flags & V_ADP_COLOR) ? COLOR_CRTC : MONO_CRTC; 846 adp->va_window = BIOS_PADDRTOVADDR(info->vi_window); 847 adp->va_window_size = info->vi_window_size; 848 adp->va_window_gran = info->vi_window_gran; 849 adp->va_window_orig = 0; 850 /* XXX */ 851 adp->va_buffer = info->vi_buffer; 852 adp->va_buffer_size = info->vi_buffer_size; 853 if (info->vi_mem_model == V_INFO_MM_VGAX) { 854 adp->va_line_width = info->vi_width/2; 855 } else if (info->vi_flags & V_INFO_GRAPHICS) { 856 switch (info->vi_depth/info->vi_planes) { 857 case 1: 858 adp->va_line_width = info->vi_width/8; 859 break; 860 case 2: 861 adp->va_line_width = info->vi_width/4; 862 break; 863 case 4: 864 adp->va_line_width = info->vi_width/2; 865 break; 866 case 8: 867 default: /* shouldn't happen */ 868 adp->va_line_width = info->vi_width; 869 break; 870 } 871 } else { 872 adp->va_line_width = info->vi_width; 873 } 874 adp->va_disp_start.x = 0; 875 adp->va_disp_start.y = 0; 876 bcopy(info, &adp->va_info, sizeof(adp->va_info)); 877} 878 879#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 880/* compare two parameter table entries */ 881static int 882comp_adpregs(u_char *buf1, u_char *buf2) 883{ 884 static struct { 885 u_char mask; 886 } params[V_MODE_PARAM_SIZE] = { 887 {0xff}, {0x00}, {0xff}, /* COLS}, ROWS}, POINTS */ 888 {0x00}, {0x00}, /* page length */ 889 {0xfe}, {0xff}, {0xff}, {0xff}, /* sequencer registers */ 890 {0xf3}, /* misc register */ 891 {0xff}, {0xff}, {0xff}, {0x7f}, {0xff}, /* CRTC */ 892 {0xff}, {0xff}, {0xff}, {0x7f}, {0xff}, 893 {0x00}, {0x00}, {0x00}, {0x00}, {0x00}, 894 {0x00}, {0xff}, {0x7f}, {0xff}, {0xff}, 895 {0x7f}, {0xff}, {0xff}, {0xef}, {0xff}, 896 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, /* attribute controller regs */ 897 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, 898 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, 899 {0xff}, {0xff}, {0xff}, {0xff}, {0xf0}, 900 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, /* GDC register */ 901 {0xff}, {0xff}, {0xff}, {0xff}, 902 }; 903 int identical = TRUE; 904 int i; 905 906 if ((buf1 == NULL) || (buf2 == NULL)) 907 return COMP_DIFFERENT; 908 909 for (i = 0; i < sizeof(params)/sizeof(params[0]); ++i) { 910 if (params[i].mask == 0) /* don't care */ 911 continue; 912 if ((buf1[i] & params[i].mask) != (buf2[i] & params[i].mask)) 913 return COMP_DIFFERENT; 914 if (buf1[i] != buf2[i]) 915 identical = FALSE; 916 } 917 return (identical) ? COMP_IDENTICAL : COMP_SIMILAR; 918} 919#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 920 921/* probe video adapters and return the number of detected adapters */ 922static int 923probe_adapters(void) 924{ 925 video_adapter_t *adp; 926 video_info_t info; 927#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 928 u_char *mp; 929#endif 930 int i; 931 932 /* do this test only once */ 933 if (vga_init_done) 934 return biosadapters; 935 vga_init_done = TRUE; 936 937 /* 938 * Locate display adapters. 939 * The AT architecture supports upto two adapters. `syscons' allows 940 * the following combinations of adapters: 941 * 1) MDA + CGA 942 * 2) MDA + EGA/VGA color 943 * 3) CGA + EGA/VGA mono 944 * Note that `syscons' doesn't bother with MCGA as it is only 945 * avaiable for low end PS/2 models which has 80286 or earlier CPUs, 946 * thus, they are not running FreeBSD! 947 * When there are two adapaters in the system, one becomes `primary' 948 * and the other `secondary'. The EGA adapter has a set of DIP 949 * switches on board for this information and the EGA BIOS copies 950 * it in the BIOS data area BIOSDATA_VIDEOSWITCH (40:88). 951 * The VGA BIOS has more sophisticated mechanism and has this 952 * information in BIOSDATA_DCCINDEX (40:8a), but it also maintains 953 * compatibility with the EGA BIOS by updating BIOSDATA_VIDEOSWITCH. 954 */ 955 956 /* 957 * Check rtc and BIOS data area. 958 * XXX: we don't use BIOSDATA_EQUIPMENT, since it is not a dead 959 * copy of RTC_EQUIPMENT. Bits 4 and 5 of ETC_EQUIPMENT are 960 * zeros for EGA and VGA. However, the EGA/VGA BIOS sets 961 * these bits in BIOSDATA_EQUIPMENT according to the monitor 962 * type detected. 963 */ 964#ifndef VGA_NO_BIOS 965 switch ((rtcin(RTC_EQUIPMENT) >> 4) & 3) { /* bit 4 and 5 */ 966 case 0: 967 /* EGA/VGA */ 968 fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f, 969 biosadapter); 970 break; 971 case 1: 972 /* CGA 40x25 */ 973 /* FIXME: switch to the 80x25 mode? XXX */ 974 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA40]; 975 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 976 break; 977 case 2: 978 /* CGA 80x25 */ 979 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA80]; 980 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 981 break; 982 case 3: 983 /* MDA */ 984 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO]; 985 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80]; 986 break; 987 } 988#else 989 /* assume EGA/VGA? XXX */ 990 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_EGA80]; 991 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 992#endif /* VGA_NO_BIOS */ 993 994 biosadapters = 0; 995 if (verify_adapter(&biosadapter[V_ADP_SECONDARY]) == 0) { 996 ++biosadapters; 997 biosadapter[V_ADP_SECONDARY].va_flags |= V_ADP_PROBED; 998 biosadapter[V_ADP_SECONDARY].va_mode = 999 biosadapter[V_ADP_SECONDARY].va_initial_mode = 1000 map_bios_mode_num(biosadapter[V_ADP_SECONDARY].va_type, 1001 biosadapter[V_ADP_SECONDARY].va_flags 1002 & V_ADP_COLOR, 1003 biosadapter[V_ADP_SECONDARY].va_initial_bios_mode); 1004 } else { 1005 biosadapter[V_ADP_SECONDARY].va_type = -1; 1006 } 1007 if (verify_adapter(&biosadapter[V_ADP_PRIMARY]) == 0) { 1008 ++biosadapters; 1009 biosadapter[V_ADP_PRIMARY].va_flags |= V_ADP_PROBED; 1010#ifndef VGA_NO_BIOS 1011 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode = 1012 readb(BIOS_PADDRTOVADDR(0x449)); 1013#else 1014 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode = 3; /* XXX */ 1015#endif 1016 biosadapter[V_ADP_PRIMARY].va_mode = 1017 biosadapter[V_ADP_PRIMARY].va_initial_mode = 1018 map_bios_mode_num(biosadapter[V_ADP_PRIMARY].va_type, 1019 biosadapter[V_ADP_PRIMARY].va_flags & V_ADP_COLOR, 1020 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode); 1021 } else { 1022 biosadapter[V_ADP_PRIMARY] = biosadapter[V_ADP_SECONDARY]; 1023 biosadapter[V_ADP_SECONDARY].va_type = -1; 1024 } 1025 if (biosadapters == 0) 1026 return biosadapters; 1027 biosadapter[V_ADP_PRIMARY].va_unit = V_ADP_PRIMARY; 1028 biosadapter[V_ADP_SECONDARY].va_unit = V_ADP_SECONDARY; 1029 1030#if 0 /* we don't need these... */ 1031 fb_init_struct(&biosadapter[V_ADP_PRIMARY], ...); 1032 fb_init_struct(&biosadapter[V_ADP_SECONDARY], ...); 1033#endif 1034 1035#if notyet 1036 /* 1037 * We cannot have two video adapter of the same type; there must be 1038 * only one of color or mono adapter, or one each of them. 1039 */ 1040 if (biosadapters > 1) { 1041 if (!((biosadapter[0].va_flags ^ biosadapter[1].va_flags) 1042 & V_ADP_COLOR)) 1043 /* we have two mono or color adapters!! */ 1044 return (biosadapters = 0); 1045 } 1046#endif 1047 1048 /* 1049 * Ensure a zero start address. This is mainly to recover after 1050 * switching from pcvt using userconfig(). The registers are w/o 1051 * for old hardware so it's too hard to relocate the active screen 1052 * memory. 1053 * This must be done before vga_save_state() for VGA. 1054 */ 1055 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 12); 1056 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0); 1057 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 13); 1058 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0); 1059 1060 /* the video mode parameter table in EGA/VGA BIOS */ 1061 /* NOTE: there can be only one EGA/VGA, wheather color or mono, 1062 * recognized by the video BIOS. 1063 */ 1064 if ((biosadapter[V_ADP_PRIMARY].va_type == KD_EGA) || 1065 (biosadapter[V_ADP_PRIMARY].va_type == KD_VGA)) { 1066 adp = &biosadapter[V_ADP_PRIMARY]; 1067 } else if ((biosadapter[V_ADP_SECONDARY].va_type == KD_EGA) || 1068 (biosadapter[V_ADP_SECONDARY].va_type == KD_VGA)) { 1069 adp = &biosadapter[V_ADP_SECONDARY]; 1070 } else { 1071 adp = NULL; 1072 } 1073 bzero(mode_map, sizeof(mode_map)); 1074 if (adp != NULL) { 1075 if (adp->va_type == KD_VGA) { 1076 vga_save_state(adp, &adpstate, sizeof(adpstate)); 1077#if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE) 1078 mode_map[adp->va_initial_mode] = adpstate.regs; 1079 rows_offset = 1; 1080#else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1081 if (video_mode_ptr == NULL) { 1082 mode_map[adp->va_initial_mode] = adpstate.regs; 1083 rows_offset = 1; 1084 } else { 1085 /* discard the table if we are not familiar with it... */ 1086 map_mode_table(mode_map, video_mode_ptr, M_VGA_CG320 + 1); 1087 mp = get_mode_param(adp->va_initial_mode); 1088 if (mp != NULL) 1089 bcopy(mp, adpstate2.regs, sizeof(adpstate2.regs)); 1090 switch (comp_adpregs(adpstate.regs, mp)) { 1091 case COMP_IDENTICAL: 1092 /* 1093 * OK, this parameter table looks reasonably familiar 1094 * to us... 1095 */ 1096 /* 1097 * This is a kludge for Toshiba DynaBook SS433 1098 * whose BIOS video mode table entry has the actual # 1099 * of rows at the offset 1; BIOSes from other 1100 * manufacturers store the # of rows - 1 there. XXX 1101 */ 1102 rows_offset = adpstate.regs[1] + 1 - mp[1]; 1103 break; 1104 1105 case COMP_SIMILAR: 1106 /* 1107 * Not exactly the same, but similar enough to be 1108 * trusted. However, use the saved register values 1109 * for the initial mode and other modes which are 1110 * based on the initial mode. 1111 */ 1112 mode_map[adp->va_initial_mode] = adpstate.regs; 1113 rows_offset = adpstate.regs[1] + 1 - mp[1]; 1114 adpstate.regs[1] -= rows_offset - 1; 1115 break; 1116 1117 case COMP_DIFFERENT: 1118 default: 1119 /* 1120 * Don't use the paramter table in BIOS. It doesn't 1121 * look familiar to us. Video mode switching is allowed 1122 * only if the new mode is the same as or based on 1123 * the initial mode. 1124 */ 1125 video_mode_ptr = NULL; 1126 bzero(mode_map, sizeof(mode_map)); 1127 mode_map[adp->va_initial_mode] = adpstate.regs; 1128 rows_offset = 1; 1129 break; 1130 } 1131 } 1132#endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1133 1134#ifndef VGA_NO_MODE_CHANGE 1135 adp->va_flags |= V_ADP_MODECHANGE; 1136#endif 1137#ifndef VGA_NO_FONT_LOADING 1138 adp->va_flags |= V_ADP_FONT; 1139#endif 1140 } else if (adp->va_type == KD_EGA) { 1141#if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE) 1142 rows_offset = 1; 1143#else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1144 if (video_mode_ptr == NULL) { 1145 rows_offset = 1; 1146 } else { 1147 map_mode_table(mode_map, video_mode_ptr, M_ENH_C80x25 + 1); 1148 /* XXX how can one validate the EGA table... */ 1149 mp = get_mode_param(adp->va_initial_mode); 1150 if (mp != NULL) { 1151 adp->va_flags |= V_ADP_MODECHANGE; 1152#ifndef VGA_NO_FONT_LOADING 1153 adp->va_flags |= V_ADP_FONT; 1154#endif 1155 rows_offset = 1; 1156 } else { 1157 /* 1158 * This is serious. We will not be able to switch video 1159 * modes at all... 1160 */ 1161 video_mode_ptr = NULL; 1162 bzero(mode_map, sizeof(mode_map)); 1163 rows_offset = 1; 1164 } 1165 } 1166#endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1167 } 1168 } 1169 1170 /* remove conflicting modes if we have more than one adapter */ 1171 if (biosadapters > 1) { 1172 for (i = 0; i < biosadapters; ++i) { 1173 if (!(biosadapter[i].va_flags & V_ADP_MODECHANGE)) 1174 continue; 1175 clear_mode_map(&biosadapter[i], mode_map, M_VGA_CG320 + 1, 1176 (biosadapter[i].va_flags & V_ADP_COLOR) ? 1177 V_INFO_COLOR : 0); 1178 if ((biosadapter[i].va_type == KD_VGA) 1179 || (biosadapter[i].va_type == KD_EGA)) { 1180 biosadapter[i].va_io_base = 1181 (biosadapter[i].va_flags & V_ADP_COLOR) ? 1182 IO_VGA : IO_MDA; 1183 biosadapter[i].va_io_size = 32; 1184 } 1185 } 1186 } 1187 1188 /* buffer address */ 1189 vga_get_info(&biosadapter[V_ADP_PRIMARY], 1190 biosadapter[V_ADP_PRIMARY].va_initial_mode, &info); 1191 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1192 update_adapter_info(&biosadapter[V_ADP_PRIMARY], &info); 1193 1194 if (biosadapters > 1) { 1195 vga_get_info(&biosadapter[V_ADP_SECONDARY], 1196 biosadapter[V_ADP_SECONDARY].va_initial_mode, &info); 1197 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1198 update_adapter_info(&biosadapter[V_ADP_SECONDARY], &info); 1199 } 1200 1201 /* 1202 * XXX: we should verify the following values for the primary adapter... 1203 * crtc I/O port address: *(u_int16_t *)BIOS_PADDRTOVADDR(0x463); 1204 * color/mono display: (*(u_int8_t *)BIOS_PADDRTOVADDR(0x487) & 0x02) 1205 * ? 0 : V_ADP_COLOR; 1206 * columns: *(u_int8_t *)BIOS_PADDRTOVADDR(0x44a); 1207 * rows: *(u_int8_t *)BIOS_PADDRTOVADDR(0x484); 1208 * font size: *(u_int8_t *)BIOS_PADDRTOVADDR(0x485); 1209 * buffer size: *(u_int16_t *)BIOS_PADDRTOVADDR(0x44c); 1210 */ 1211 1212 return biosadapters; 1213} 1214 1215/* set the scan line length in pixel */ 1216static int 1217set_line_length(video_adapter_t *adp, int pixel) 1218{ 1219 u_char *mp; 1220 int ppw; /* pixels per word */ 1221 int bpl; /* bytes per line */ 1222 int count; 1223 1224 if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA)) 1225 return ENODEV; 1226 mp = get_mode_param(adp->va_mode); 1227 if (mp == NULL) 1228 return EINVAL; 1229 1230 switch (adp->va_info.vi_mem_model) { 1231 case V_INFO_MM_PLANAR: 1232 ppw = 16/(adp->va_info.vi_depth/adp->va_info.vi_planes); 1233 count = (pixel + ppw - 1)/ppw/2; 1234 bpl = ((pixel + ppw - 1)/ppw/2)*4; 1235 break; 1236 case V_INFO_MM_PACKED: 1237 count = (pixel + 7)/8; 1238 bpl = ((pixel + 7)/8)*8; 1239 break; 1240 case V_INFO_MM_TEXT: 1241 count = (pixel + 7)/8; /* columns */ 1242 bpl = (pixel + 7)/8; /* columns */ 1243 break; 1244 default: 1245 return ENODEV; 1246 } 1247 1248 if (mp[10 + 0x17] & 0x40) /* CRTC mode control reg */ 1249 count *= 2; /* byte mode */ 1250 outb(adp->va_crtc_addr, 0x13); 1251 outb(adp->va_crtc_addr + 1, count); 1252 adp->va_line_width = bpl; 1253 1254 return 0; 1255} 1256 1257static int 1258set_display_start(video_adapter_t *adp, int x, int y) 1259{ 1260 int off; /* byte offset (graphics mode)/word offset (text mode) */ 1261 int poff; /* pixel offset */ 1262 int roff; /* row offset */ 1263 int ppb; /* pixels per byte */ 1264 1265 if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA)) 1266 x &= ~7; 1267 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) { 1268 ppb = 8/(adp->va_info.vi_depth/adp->va_info.vi_planes); 1269 off = y*adp->va_line_width + x/ppb; 1270 roff = 0; 1271 poff = x%ppb; 1272 } else { 1273 if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) { 1274 outb(TSIDX, 1); 1275 if (inb(TSREG) & 1) 1276 ppb = 9; 1277 else 1278 ppb = 8; 1279 } else { 1280 ppb = 8; 1281 } 1282 off = y/adp->va_info.vi_cheight*adp->va_line_width + x/ppb; 1283 roff = y%adp->va_info.vi_cheight; 1284 /* FIXME: is this correct? XXX */ 1285 if (ppb == 8) 1286 poff = x%ppb; 1287 else 1288 poff = (x + 8)%ppb; 1289 } 1290 1291 /* start address */ 1292 outb(adp->va_crtc_addr, 0xc); /* high */ 1293 outb(adp->va_crtc_addr + 1, off >> 8); 1294 outb(adp->va_crtc_addr, 0xd); /* low */ 1295 outb(adp->va_crtc_addr + 1, off & 0xff); 1296 1297 /* horizontal pel pan */ 1298 if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) { 1299 inb(adp->va_crtc_addr + 6); 1300 outb(ATC, 0x13 | 0x20); 1301 outb(ATC, poff); 1302 inb(adp->va_crtc_addr + 6); 1303 outb(ATC, 0x20); 1304 } 1305 1306 /* preset raw scan */ 1307 outb(adp->va_crtc_addr, 8); 1308 outb(adp->va_crtc_addr + 1, roff); 1309 1310 adp->va_disp_start.x = x; 1311 adp->va_disp_start.y = y; 1312 return 0; 1313} 1314 1315#ifdef __i386__ /* XXX */ 1316static void 1317fill(int val, void *d, size_t size) 1318{ 1319 u_char *p = d; 1320 1321 while (size-- > 0) 1322 *p++ = val; 1323} 1324#endif /* __i386__ */ 1325 1326static void 1327filll_io(int val, vm_offset_t d, size_t size) 1328{ 1329 while (size-- > 0) { 1330 writel(d, val); 1331 d += sizeof(u_int32_t); 1332 } 1333} 1334 1335/* entry points */ 1336 1337#if 0 1338static int 1339vga_nop(void) 1340{ 1341 return 0; 1342} 1343#endif 1344 1345static int 1346vga_error(void) 1347{ 1348 return ENODEV; 1349} 1350 1351static int 1352vga_probe(int unit, video_adapter_t **adpp, void *arg, int flags) 1353{ 1354 probe_adapters(); 1355 if (unit >= biosadapters) 1356 return ENXIO; 1357 1358 *adpp = &biosadapter[unit]; 1359 1360 return 0; 1361} 1362 1363static int 1364vga_init(int unit, video_adapter_t *adp, int flags) 1365{ 1366 if ((unit >= biosadapters) || (adp == NULL) || !probe_done(adp)) 1367 return ENXIO; 1368 1369 if (!init_done(adp)) { 1370 /* nothing to do really... */ 1371 adp->va_flags |= V_ADP_INITIALIZED; 1372 } 1373 1374 if (!config_done(adp)) { 1375 if (vid_register(adp) < 0) 1376 return ENXIO; 1377 adp->va_flags |= V_ADP_REGISTERED; 1378 } 1379 if (vga_sub_configure != NULL) 1380 (*vga_sub_configure)(0); 1381 1382 return 0; 1383} 1384 1385/* 1386 * get_info(): 1387 * Return the video_info structure of the requested video mode. 1388 * 1389 * all adapters 1390 */ 1391static int 1392vga_get_info(video_adapter_t *adp, int mode, video_info_t *info) 1393{ 1394 int i; 1395 1396 if (!vga_init_done) 1397 return ENXIO; 1398 1399 mode = map_gen_mode_num(adp->va_type, adp->va_flags & V_ADP_COLOR, mode); 1400#ifndef VGA_NO_MODE_CHANGE 1401 if (adp->va_flags & V_ADP_MODECHANGE) { 1402 /* 1403 * If the parameter table entry for this mode is not found, 1404 * the mode is not supported... 1405 */ 1406 if (get_mode_param(mode) == NULL) 1407 return EINVAL; 1408 } else 1409#endif /* VGA_NO_MODE_CHANGE */ 1410 { 1411 /* 1412 * Even if we don't support video mode switching on this adapter, 1413 * the information on the initial (thus current) video mode 1414 * should be made available. 1415 */ 1416 if (mode != adp->va_initial_mode) 1417 return EINVAL; 1418 } 1419 1420 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 1421 if (bios_vmode[i].vi_mode == NA) 1422 continue; 1423 if (mode == bios_vmode[i].vi_mode) { 1424 *info = bios_vmode[i]; 1425 /* XXX */ 1426 info->vi_buffer_size = info->vi_window_size*info->vi_planes; 1427 return 0; 1428 } 1429 } 1430 return EINVAL; 1431} 1432 1433/* 1434 * query_mode(): 1435 * Find a video mode matching the requested parameters. 1436 * Fields filled with 0 are considered "don't care" fields and 1437 * match any modes. 1438 * 1439 * all adapters 1440 */ 1441static int 1442vga_query_mode(video_adapter_t *adp, video_info_t *info) 1443{ 1444 video_info_t buf; 1445 int i; 1446 1447 if (!vga_init_done) 1448 return -1; 1449 1450 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 1451 if (bios_vmode[i].vi_mode == NA) 1452 continue; 1453 1454 if ((info->vi_width != 0) 1455 && (info->vi_width != bios_vmode[i].vi_width)) 1456 continue; 1457 if ((info->vi_height != 0) 1458 && (info->vi_height != bios_vmode[i].vi_height)) 1459 continue; 1460 if ((info->vi_cwidth != 0) 1461 && (info->vi_cwidth != bios_vmode[i].vi_cwidth)) 1462 continue; 1463 if ((info->vi_cheight != 0) 1464 && (info->vi_cheight != bios_vmode[i].vi_cheight)) 1465 continue; 1466 if ((info->vi_depth != 0) 1467 && (info->vi_depth != bios_vmode[i].vi_depth)) 1468 continue; 1469 if ((info->vi_planes != 0) 1470 && (info->vi_planes != bios_vmode[i].vi_planes)) 1471 continue; 1472 /* XXX: should check pixel format, memory model */ 1473 if ((info->vi_flags != 0) 1474 && (info->vi_flags != bios_vmode[i].vi_flags)) 1475 continue; 1476 1477 /* verify if this mode is supported on this adapter */ 1478 if (vga_get_info(adp, bios_vmode[i].vi_mode, &buf)) 1479 continue; 1480 return bios_vmode[i].vi_mode; 1481 } 1482 return -1; 1483} 1484 1485/* 1486 * set_mode(): 1487 * Change the video mode. 1488 * 1489 * EGA/VGA 1490 */ 1491 1492#ifndef VGA_NO_MODE_CHANGE 1493#ifdef VGA_WIDTH90 1494static void 1495set_width90(adp_state_t *params) 1496{ 1497 /* 1498 * Based on code submitted by Kelly Yancey (kbyanc@freedomnet.com) 1499 * and alexv@sui.gda.itesm.mx. 1500 */ 1501 params->regs[5] |= 1; /* toggle 8 pixel wide fonts */ 1502 params->regs[10+0x0] = 0x6b; 1503 params->regs[10+0x1] = 0x59; 1504 params->regs[10+0x2] = 0x5a; 1505 params->regs[10+0x3] = 0x8e; 1506 params->regs[10+0x4] = 0x5e; 1507 params->regs[10+0x5] = 0x8a; 1508 params->regs[10+0x13] = 45; 1509 params->regs[35+0x13] = 0; 1510} 1511#endif /* VGA_WIDTH90 */ 1512#endif /* !VGA_NO_MODE_CHANGE */ 1513 1514static int 1515vga_set_mode(video_adapter_t *adp, int mode) 1516{ 1517#ifndef VGA_NO_MODE_CHANGE 1518 video_info_t info; 1519 adp_state_t params; 1520 1521 prologue(adp, V_ADP_MODECHANGE, ENODEV); 1522 1523 mode = map_gen_mode_num(adp->va_type, 1524 adp->va_flags & V_ADP_COLOR, mode); 1525 if (vga_get_info(adp, mode, &info)) 1526 return EINVAL; 1527 1528#if VGA_DEBUG > 1 1529 printf("vga_set_mode(): setting mode %d\n", mode); 1530#endif 1531 1532 params.sig = V_STATE_SIG; 1533 bcopy(get_mode_param(mode), params.regs, sizeof(params.regs)); 1534 1535 switch (mode) { 1536#ifdef VGA_WIDTH90 1537 case M_VGA_C90x60: case M_VGA_M90x60: 1538 set_width90(¶ms); 1539 /* FALL THROUGH */ 1540#endif 1541 case M_VGA_C80x60: case M_VGA_M80x60: 1542 params.regs[2] = 0x08; 1543 params.regs[19] = 0x47; 1544 goto special_480l; 1545 1546#ifdef VGA_WIDTH90 1547 case M_VGA_C90x30: case M_VGA_M90x30: 1548 set_width90(¶ms); 1549 /* FALL THROUGH */ 1550#endif 1551 case M_VGA_C80x30: case M_VGA_M80x30: 1552 params.regs[19] = 0x4f; 1553special_480l: 1554 params.regs[9] |= 0xc0; 1555 params.regs[16] = 0x08; 1556 params.regs[17] = 0x3e; 1557 params.regs[26] = 0xea; 1558 params.regs[28] = 0xdf; 1559 params.regs[31] = 0xe7; 1560 params.regs[32] = 0x04; 1561 goto setup_mode; 1562 1563#ifdef VGA_WIDTH90 1564 case M_VGA_C90x43: case M_VGA_M90x43: 1565 set_width90(¶ms); 1566 /* FALL THROUGH */ 1567#endif 1568 case M_ENH_C80x43: case M_ENH_B80x43: 1569 params.regs[28] = 87; 1570 goto special_80x50; 1571 1572#ifdef VGA_WIDTH90 1573 case M_VGA_C90x50: case M_VGA_M90x50: 1574 set_width90(¶ms); 1575 /* FALL THROUGH */ 1576#endif 1577 case M_VGA_C80x50: case M_VGA_M80x50: 1578special_80x50: 1579 params.regs[2] = 8; 1580 params.regs[19] = 7; 1581 goto setup_mode; 1582 1583#ifdef VGA_WIDTH90 1584 case M_VGA_C90x25: case M_VGA_M90x25: 1585 set_width90(¶ms); 1586 /* FALL THROUGH */ 1587#endif 1588 case M_VGA_C40x25: case M_VGA_C80x25: 1589 case M_VGA_M80x25: 1590 case M_B40x25: case M_C40x25: 1591 case M_B80x25: case M_C80x25: 1592 case M_ENH_B40x25: case M_ENH_C40x25: 1593 case M_ENH_B80x25: case M_ENH_C80x25: 1594 case M_EGAMONO80x25: 1595 1596setup_mode: 1597 vga_load_state(adp, ¶ms); 1598 break; 1599 1600 case M_VGA_MODEX: 1601 /* "unchain" the VGA mode */ 1602 params.regs[5-1+0x04] &= 0xf7; 1603 params.regs[5-1+0x04] |= 0x04; 1604 /* turn off doubleword mode */ 1605 params.regs[10+0x14] &= 0xbf; 1606 /* turn off word adressing */ 1607 params.regs[10+0x17] |= 0x40; 1608 /* set logical screen width */ 1609 params.regs[10+0x13] = 80; 1610 /* set 240 lines */ 1611 params.regs[10+0x11] = 0x2c; 1612 params.regs[10+0x06] = 0x0d; 1613 params.regs[10+0x07] = 0x3e; 1614 params.regs[10+0x10] = 0xea; 1615 params.regs[10+0x11] = 0xac; 1616 params.regs[10+0x12] = 0xdf; 1617 params.regs[10+0x15] = 0xe7; 1618 params.regs[10+0x16] = 0x06; 1619 /* set vertical sync polarity to reflect aspect ratio */ 1620 params.regs[9] = 0xe3; 1621 goto setup_grmode; 1622 1623 case M_BG320: case M_CG320: case M_BG640: 1624 case M_CG320_D: case M_CG640_E: 1625 case M_CG640x350: case M_ENH_CG640: 1626 case M_BG640x480: case M_CG640x480: case M_VGA_CG320: 1627 1628setup_grmode: 1629 vga_load_state(adp, ¶ms); 1630 break; 1631 1632 default: 1633 return EINVAL; 1634 } 1635 1636 adp->va_mode = mode; 1637 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1638 update_adapter_info(adp, &info); 1639 1640 /* move hardware cursor out of the way */ 1641 (*vidsw[adp->va_index]->set_hw_cursor)(adp, -1, -1); 1642 1643 return 0; 1644#else /* VGA_NO_MODE_CHANGE */ 1645 return ENODEV; 1646#endif /* VGA_NO_MODE_CHANGE */ 1647} 1648 1649#ifndef VGA_NO_FONT_LOADING 1650 1651static void 1652set_font_mode(video_adapter_t *adp, u_char *buf) 1653{ 1654 u_char *mp; 1655 int s; 1656 1657 s = splhigh(); 1658 1659 /* save register values */ 1660 if (adp->va_type == KD_VGA) { 1661 outb(TSIDX, 0x02); buf[0] = inb(TSREG); 1662 outb(TSIDX, 0x04); buf[1] = inb(TSREG); 1663 outb(GDCIDX, 0x04); buf[2] = inb(GDCREG); 1664 outb(GDCIDX, 0x05); buf[3] = inb(GDCREG); 1665 outb(GDCIDX, 0x06); buf[4] = inb(GDCREG); 1666 inb(adp->va_crtc_addr + 6); 1667 outb(ATC, 0x10); buf[5] = inb(ATC + 1); 1668 } else /* if (adp->va_type == KD_EGA) */ { 1669 /* 1670 * EGA cannot be read; copy parameters from the mode parameter 1671 * table. 1672 */ 1673 mp = get_mode_param(adp->va_mode); 1674 buf[0] = mp[5 + 0x02 - 1]; 1675 buf[1] = mp[5 + 0x04 - 1]; 1676 buf[2] = mp[55 + 0x04]; 1677 buf[3] = mp[55 + 0x05]; 1678 buf[4] = mp[55 + 0x06]; 1679 buf[5] = mp[35 + 0x10]; 1680 } 1681 1682 /* setup vga for loading fonts */ 1683 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1684 outb(ATC, 0x10); outb(ATC, buf[5] & ~0x01); 1685 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1686 outb(ATC, 0x20); /* enable palette */ 1687 1688#if VGA_SLOW_IOACCESS 1689#ifdef VGA_ALT_SEQACCESS 1690 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1691#endif 1692 outb(TSIDX, 0x02); outb(TSREG, 0x04); 1693 outb(TSIDX, 0x04); outb(TSREG, 0x07); 1694#ifdef VGA_ALT_SEQACCESS 1695 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1696#endif 1697 outb(GDCIDX, 0x04); outb(GDCREG, 0x02); 1698 outb(GDCIDX, 0x05); outb(GDCREG, 0x00); 1699 outb(GDCIDX, 0x06); outb(GDCREG, 0x04); 1700#else /* VGA_SLOW_IOACCESS */ 1701#ifdef VGA_ALT_SEQACCESS 1702 outw(TSIDX, 0x0100); 1703#endif 1704 outw(TSIDX, 0x0402); 1705 outw(TSIDX, 0x0704); 1706#ifdef VGA_ALT_SEQACCESS 1707 outw(TSIDX, 0x0300); 1708#endif 1709 outw(GDCIDX, 0x0204); 1710 outw(GDCIDX, 0x0005); 1711 outw(GDCIDX, 0x0406); /* addr = a0000, 64kb */ 1712#endif /* VGA_SLOW_IOACCESS */ 1713 1714 splx(s); 1715} 1716 1717static void 1718set_normal_mode(video_adapter_t *adp, u_char *buf) 1719{ 1720 int s; 1721 1722 s = splhigh(); 1723 1724 /* setup vga for normal operation mode again */ 1725 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1726 outb(ATC, 0x10); outb(ATC, buf[5]); 1727 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1728 outb(ATC, 0x20); /* enable palette */ 1729 1730#if VGA_SLOW_IOACCESS 1731#ifdef VGA_ALT_SEQACCESS 1732 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1733#endif 1734 outb(TSIDX, 0x02); outb(TSREG, buf[0]); 1735 outb(TSIDX, 0x04); outb(TSREG, buf[1]); 1736#ifdef VGA_ALT_SEQACCESS 1737 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1738#endif 1739 outb(GDCIDX, 0x04); outb(GDCREG, buf[2]); 1740 outb(GDCIDX, 0x05); outb(GDCREG, buf[3]); 1741 if (adp->va_crtc_addr == MONO_CRTC) { 1742 outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x08); 1743 } else { 1744 outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x0c); 1745 } 1746#else /* VGA_SLOW_IOACCESS */ 1747#ifdef VGA_ALT_SEQACCESS 1748 outw(TSIDX, 0x0100); 1749#endif 1750 outw(TSIDX, 0x0002 | (buf[0] << 8)); 1751 outw(TSIDX, 0x0004 | (buf[1] << 8)); 1752#ifdef VGA_ALT_SEQACCESS 1753 outw(TSIDX, 0x0300); 1754#endif 1755 outw(GDCIDX, 0x0004 | (buf[2] << 8)); 1756 outw(GDCIDX, 0x0005 | (buf[3] << 8)); 1757 if (adp->va_crtc_addr == MONO_CRTC) 1758 outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x08)<<8)); 1759 else 1760 outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x0c)<<8)); 1761#endif /* VGA_SLOW_IOACCESS */ 1762 1763 splx(s); 1764} 1765 1766#endif /* VGA_NO_FONT_LOADING */ 1767 1768/* 1769 * save_font(): 1770 * Read the font data in the requested font page from the video adapter. 1771 * 1772 * EGA/VGA 1773 */ 1774static int 1775vga_save_font(video_adapter_t *adp, int page, int fontsize, u_char *data, 1776 int ch, int count) 1777{ 1778#ifndef VGA_NO_FONT_LOADING 1779 u_char buf[PARAM_BUFSIZE]; 1780 u_int32_t segment; 1781 int c; 1782#ifdef VGA_ALT_SEQACCESS 1783 int s; 1784 u_char val = 0; 1785#endif 1786 1787 prologue(adp, V_ADP_FONT, ENODEV); 1788 1789 if (fontsize < 14) { 1790 /* FONT_8 */ 1791 fontsize = 8; 1792 } else if (fontsize >= 32) { 1793 fontsize = 32; 1794 } else if (fontsize >= 16) { 1795 /* FONT_16 */ 1796 fontsize = 16; 1797 } else { 1798 /* FONT_14 */ 1799 fontsize = 14; 1800 } 1801 1802 if (page < 0 || page >= 8) 1803 return EINVAL; 1804 segment = FONT_BUF + 0x4000*page; 1805 if (page > 3) 1806 segment -= 0xe000; 1807 1808#ifdef VGA_ALT_SEQACCESS 1809 if (adp->va_type == KD_VGA) { /* what about EGA? XXX */ 1810 s = splhigh(); 1811 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1812 outb(TSIDX, 0x01); val = inb(TSREG); /* disable screen */ 1813 outb(TSIDX, 0x01); outb(TSREG, val | 0x20); 1814 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1815 splx(s); 1816 } 1817#endif 1818 1819 set_font_mode(adp, buf); 1820 if (fontsize == 32) { 1821 bcopy_fromio(segment + ch*32, data, fontsize*count); 1822 } else { 1823 for (c = ch; count > 0; ++c, --count) { 1824 bcopy_fromio(segment + c*32, data, fontsize); 1825 data += fontsize; 1826 } 1827 } 1828 set_normal_mode(adp, buf); 1829 1830#ifdef VGA_ALT_SEQACCESS 1831 if (adp->va_type == KD_VGA) { 1832 s = splhigh(); 1833 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1834 outb(TSIDX, 0x01); outb(TSREG, val & 0xdf); /* enable screen */ 1835 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1836 splx(s); 1837 } 1838#endif 1839 1840 return 0; 1841#else /* VGA_NO_FONT_LOADING */ 1842 return ENODEV; 1843#endif /* VGA_NO_FONT_LOADING */ 1844} 1845 1846/* 1847 * load_font(): 1848 * Set the font data in the requested font page. 1849 * NOTE: it appears that some recent video adapters do not support 1850 * the font page other than 0... XXX 1851 * 1852 * EGA/VGA 1853 */ 1854static int 1855vga_load_font(video_adapter_t *adp, int page, int fontsize, u_char *data, 1856 int ch, int count) 1857{ 1858#ifndef VGA_NO_FONT_LOADING 1859 u_char buf[PARAM_BUFSIZE]; 1860 u_int32_t segment; 1861 int c; 1862#ifdef VGA_ALT_SEQACCESS 1863 int s; 1864 u_char val = 0; 1865#endif 1866 1867 prologue(adp, V_ADP_FONT, ENODEV); 1868 1869 if (fontsize < 14) { 1870 /* FONT_8 */ 1871 fontsize = 8; 1872 } else if (fontsize >= 32) { 1873 fontsize = 32; 1874 } else if (fontsize >= 16) { 1875 /* FONT_16 */ 1876 fontsize = 16; 1877 } else { 1878 /* FONT_14 */ 1879 fontsize = 14; 1880 } 1881 1882 if (page < 0 || page >= 8) 1883 return EINVAL; 1884 segment = FONT_BUF + 0x4000*page; 1885 if (page > 3) 1886 segment -= 0xe000; 1887 1888#ifdef VGA_ALT_SEQACCESS 1889 if (adp->va_type == KD_VGA) { /* what about EGA? XXX */ 1890 s = splhigh(); 1891 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1892 outb(TSIDX, 0x01); val = inb(TSREG); /* disable screen */ 1893 outb(TSIDX, 0x01); outb(TSREG, val | 0x20); 1894 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1895 splx(s); 1896 } 1897#endif 1898 1899 set_font_mode(adp, buf); 1900 if (fontsize == 32) { 1901 bcopy_toio(data, segment + ch*32, fontsize*count); 1902 } else { 1903 for (c = ch; count > 0; ++c, --count) { 1904 bcopy_toio(data, segment + c*32, fontsize); 1905 data += fontsize; 1906 } 1907 } 1908 set_normal_mode(adp, buf); 1909 1910#ifdef VGA_ALT_SEQACCESS 1911 if (adp->va_type == KD_VGA) { 1912 s = splhigh(); 1913 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1914 outb(TSIDX, 0x01); outb(TSREG, val & 0xdf); /* enable screen */ 1915 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1916 splx(s); 1917 } 1918#endif 1919 1920 return 0; 1921#else /* VGA_NO_FONT_LOADING */ 1922 return ENODEV; 1923#endif /* VGA_NO_FONT_LOADING */ 1924} 1925 1926/* 1927 * show_font(): 1928 * Activate the requested font page. 1929 * NOTE: it appears that some recent video adapters do not support 1930 * the font page other than 0... XXX 1931 * 1932 * EGA/VGA 1933 */ 1934static int 1935vga_show_font(video_adapter_t *adp, int page) 1936{ 1937#ifndef VGA_NO_FONT_LOADING 1938 static u_char cg[] = { 0x00, 0x05, 0x0a, 0x0f, 0x30, 0x35, 0x3a, 0x3f }; 1939 int s; 1940 1941 prologue(adp, V_ADP_FONT, ENODEV); 1942 if (page < 0 || page >= 8) 1943 return EINVAL; 1944 1945 s = splhigh(); 1946 outb(TSIDX, 0x03); outb(TSREG, cg[page]); 1947 splx(s); 1948 1949 return 0; 1950#else /* VGA_NO_FONT_LOADING */ 1951 return ENODEV; 1952#endif /* VGA_NO_FONT_LOADING */ 1953} 1954 1955/* 1956 * save_palette(): 1957 * Read DAC values. The values have expressed in 8 bits. 1958 * 1959 * VGA 1960 */ 1961static int 1962vga_save_palette(video_adapter_t *adp, u_char *palette) 1963{ 1964 int i; 1965 1966 prologue(adp, V_ADP_PALETTE, ENODEV); 1967 1968 /* 1969 * We store 8 bit values in the palette buffer, while the standard 1970 * VGA has 6 bit DAC . 1971 */ 1972 outb(PALRADR, 0x00); 1973 for (i = 0; i < 256*3; ++i) 1974 palette[i] = inb(PALDATA) << 2; 1975 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 1976 return 0; 1977} 1978 1979static int 1980vga_save_palette2(video_adapter_t *adp, int base, int count, 1981 u_char *r, u_char *g, u_char *b) 1982{ 1983 int i; 1984 1985 prologue(adp, V_ADP_PALETTE, ENODEV); 1986 1987 outb(PALRADR, base); 1988 for (i = 0; i < count; ++i) { 1989 r[i] = inb(PALDATA) << 2; 1990 g[i] = inb(PALDATA) << 2; 1991 b[i] = inb(PALDATA) << 2; 1992 } 1993 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 1994 return 0; 1995} 1996 1997/* 1998 * load_palette(): 1999 * Set DAC values. 2000 * 2001 * VGA 2002 */ 2003static int 2004vga_load_palette(video_adapter_t *adp, u_char *palette) 2005{ 2006 int i; 2007 2008 prologue(adp, V_ADP_PALETTE, ENODEV); 2009 2010 outb(PIXMASK, 0xff); /* no pixelmask */ 2011 outb(PALWADR, 0x00); 2012 for (i = 0; i < 256*3; ++i) 2013 outb(PALDATA, palette[i] >> 2); 2014 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 2015 outb(ATC, 0x20); /* enable palette */ 2016 return 0; 2017} 2018 2019static int 2020vga_load_palette2(video_adapter_t *adp, int base, int count, 2021 u_char *r, u_char *g, u_char *b) 2022{ 2023 int i; 2024 2025 prologue(adp, V_ADP_PALETTE, ENODEV); 2026 2027 outb(PIXMASK, 0xff); /* no pixelmask */ 2028 outb(PALWADR, base); 2029 for (i = 0; i < count; ++i) { 2030 outb(PALDATA, r[i] >> 2); 2031 outb(PALDATA, g[i] >> 2); 2032 outb(PALDATA, b[i] >> 2); 2033 } 2034 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 2035 outb(ATC, 0x20); /* enable palette */ 2036 return 0; 2037} 2038 2039/* 2040 * set_border(): 2041 * Change the border color. 2042 * 2043 * CGA/EGA/VGA 2044 */ 2045static int 2046vga_set_border(video_adapter_t *adp, int color) 2047{ 2048 prologue(adp, V_ADP_BORDER, ENODEV); 2049 2050 switch (adp->va_type) { 2051 case KD_EGA: 2052 case KD_VGA: 2053 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 2054 outb(ATC, 0x31); outb(ATC, color & 0xff); 2055 break; 2056 case KD_CGA: 2057 outb(adp->va_crtc_addr + 5, color & 0x0f); /* color select register */ 2058 break; 2059 case KD_MONO: 2060 case KD_HERCULES: 2061 default: 2062 break; 2063 } 2064 return 0; 2065} 2066 2067/* 2068 * save_state(): 2069 * Read video register values. 2070 * NOTE: this function only reads the standard EGA/VGA registers. 2071 * any extra/extended registers of SVGA adapters are not saved. 2072 * 2073 * VGA 2074 */ 2075static int 2076vga_save_state(video_adapter_t *adp, void *p, size_t size) 2077{ 2078 video_info_t info; 2079 u_char *buf; 2080 int crtc_addr; 2081 int i, j; 2082 int s; 2083 2084 if (size == 0) { 2085 /* return the required buffer size */ 2086 prologue(adp, V_ADP_STATESAVE, 0); 2087 return sizeof(adp_state_t); 2088 } else { 2089 prologue(adp, V_ADP_STATESAVE, ENODEV); 2090 if (size < sizeof(adp_state_t)) 2091 return EINVAL; 2092 } 2093 2094 ((adp_state_t *)p)->sig = V_STATE_SIG; 2095 buf = ((adp_state_t *)p)->regs; 2096 bzero(buf, V_MODE_PARAM_SIZE); 2097 crtc_addr = adp->va_crtc_addr; 2098 2099 s = splhigh(); 2100 2101 outb(TSIDX, 0x00); outb(TSREG, 0x01); /* stop sequencer */ 2102 for (i = 0, j = 5; i < 4; i++) { 2103 outb(TSIDX, i + 1); 2104 buf[j++] = inb(TSREG); 2105 } 2106 buf[9] = inb(MISC + 10); /* dot-clock */ 2107 outb(TSIDX, 0x00); outb(TSREG, 0x03); /* start sequencer */ 2108 2109 for (i = 0, j = 10; i < 25; i++) { /* crtc */ 2110 outb(crtc_addr, i); 2111 buf[j++] = inb(crtc_addr + 1); 2112 } 2113 for (i = 0, j = 35; i < 20; i++) { /* attribute ctrl */ 2114 inb(crtc_addr + 6); /* reset flip-flop */ 2115 outb(ATC, i); 2116 buf[j++] = inb(ATC + 1); 2117 } 2118 for (i = 0, j = 55; i < 9; i++) { /* graph data ctrl */ 2119 outb(GDCIDX, i); 2120 buf[j++] = inb(GDCREG); 2121 } 2122 inb(crtc_addr + 6); /* reset flip-flop */ 2123 outb(ATC, 0x20); /* enable palette */ 2124 2125 splx(s); 2126 2127#if 1 2128 if (vga_get_info(adp, adp->va_mode, &info) == 0) { 2129 if (info.vi_flags & V_INFO_GRAPHICS) { 2130 buf[0] = info.vi_width/info.vi_cwidth; /* COLS */ 2131 buf[1] = info.vi_height/info.vi_cheight - 1; /* ROWS */ 2132 } else { 2133 buf[0] = info.vi_width; /* COLS */ 2134 buf[1] = info.vi_height - 1; /* ROWS */ 2135 } 2136 buf[2] = info.vi_cheight; /* POINTS */ 2137 } else { 2138 /* XXX: shouldn't be happening... */ 2139 printf("vga%d: %s: failed to obtain mode info. (vga_save_state())\n", 2140 adp->va_unit, adp->va_name); 2141 } 2142#else 2143 buf[0] = readb(BIOS_PADDRTOVADDR(0x44a)); /* COLS */ 2144 buf[1] = readb(BIOS_PADDRTOVADDR(0x484)); /* ROWS */ 2145 buf[2] = readb(BIOS_PADDRTOVADDR(0x485)); /* POINTS */ 2146 buf[3] = readb(BIOS_PADDRTOVADDR(0x44c)); 2147 buf[4] = readb(BIOS_PADDRTOVADDR(0x44d)); 2148#endif 2149 2150 return 0; 2151} 2152 2153/* 2154 * load_state(): 2155 * Set video registers at once. 2156 * NOTE: this function only updates the standard EGA/VGA registers. 2157 * any extra/extended registers of SVGA adapters are not changed. 2158 * 2159 * EGA/VGA 2160 */ 2161static int 2162vga_load_state(video_adapter_t *adp, void *p) 2163{ 2164 u_char *buf; 2165 int crtc_addr; 2166 int s; 2167 int i; 2168 2169 prologue(adp, V_ADP_STATELOAD, ENODEV); 2170 if (((adp_state_t *)p)->sig != V_STATE_SIG) 2171 return EINVAL; 2172 2173 buf = ((adp_state_t *)p)->regs; 2174 crtc_addr = adp->va_crtc_addr; 2175 2176#if VGA_DEBUG > 1 2177 dump_buffer(buf, V_MODE_PARAM_SIZE); 2178#endif 2179 2180 s = splhigh(); 2181 2182 outb(TSIDX, 0x00); outb(TSREG, 0x01); /* stop sequencer */ 2183 for (i = 0; i < 4; ++i) { /* program sequencer */ 2184 outb(TSIDX, i + 1); 2185 outb(TSREG, buf[i + 5]); 2186 } 2187 outb(MISC, buf[9]); /* set dot-clock */ 2188 outb(TSIDX, 0x00); outb(TSREG, 0x03); /* start sequencer */ 2189 outb(crtc_addr, 0x11); 2190 outb(crtc_addr + 1, inb(crtc_addr + 1) & 0x7F); 2191 for (i = 0; i < 25; ++i) { /* program crtc */ 2192 outb(crtc_addr, i); 2193 outb(crtc_addr + 1, buf[i + 10]); 2194 } 2195 inb(crtc_addr+6); /* reset flip-flop */ 2196 for (i = 0; i < 20; ++i) { /* program attribute ctrl */ 2197 outb(ATC, i); 2198 outb(ATC, buf[i + 35]); 2199 } 2200 for (i = 0; i < 9; ++i) { /* program graph data ctrl */ 2201 outb(GDCIDX, i); 2202 outb(GDCREG, buf[i + 55]); 2203 } 2204 inb(crtc_addr + 6); /* reset flip-flop */ 2205 outb(ATC, 0x20); /* enable palette */ 2206 2207#if notyet /* a temporary workaround for kernel panic, XXX */ 2208#ifndef VGA_NO_BIOS 2209 if (adp->va_unit == V_ADP_PRIMARY) { 2210 writeb(BIOS_PADDRTOVADDR(0x44a), buf[0]); /* COLS */ 2211 writeb(BIOS_PADDRTOVADDR(0x484), buf[1] + rows_offset - 1); /* ROWS */ 2212 writeb(BIOS_PADDRTOVADDR(0x485), buf[2]); /* POINTS */ 2213#if 0 2214 writeb(BIOS_PADDRTOVADDR(0x44c), buf[3]); 2215 writeb(BIOS_PADDRTOVADDR(0x44d), buf[4]); 2216#endif 2217 } 2218#endif /* VGA_NO_BIOS */ 2219#endif /* notyet */ 2220 2221 splx(s); 2222 return 0; 2223} 2224 2225/* 2226 * set_origin(): 2227 * Change the origin (window mapping) of the banked frame buffer. 2228 */ 2229static int 2230vga_set_origin(video_adapter_t *adp, off_t offset) 2231{ 2232 /* 2233 * The standard video modes do not require window mapping; 2234 * always return error. 2235 */ 2236 return ENODEV; 2237} 2238 2239/* 2240 * read_hw_cursor(): 2241 * Read the position of the hardware text cursor. 2242 * 2243 * all adapters 2244 */ 2245static int 2246vga_read_hw_cursor(video_adapter_t *adp, int *col, int *row) 2247{ 2248 u_int16_t off; 2249 int s; 2250 2251 if (!vga_init_done) 2252 return ENXIO; 2253 2254 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) 2255 return ENODEV; 2256 2257 s = spltty(); 2258 outb(adp->va_crtc_addr, 14); 2259 off = inb(adp->va_crtc_addr + 1); 2260 outb(adp->va_crtc_addr, 15); 2261 off = (off << 8) | inb(adp->va_crtc_addr + 1); 2262 splx(s); 2263 2264 *row = off / adp->va_info.vi_width; 2265 *col = off % adp->va_info.vi_width; 2266 2267 return 0; 2268} 2269 2270/* 2271 * set_hw_cursor(): 2272 * Move the hardware text cursor. If col and row are both -1, 2273 * the cursor won't be shown. 2274 * 2275 * all adapters 2276 */ 2277static int 2278vga_set_hw_cursor(video_adapter_t *adp, int col, int row) 2279{ 2280 u_int16_t off; 2281 int s; 2282 2283 if (!vga_init_done) 2284 return ENXIO; 2285 2286 if ((col == -1) && (row == -1)) { 2287 off = -1; 2288 } else { 2289 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) 2290 return ENODEV; 2291 off = row*adp->va_info.vi_width + col; 2292 } 2293 2294 s = spltty(); 2295 outb(adp->va_crtc_addr, 14); 2296 outb(adp->va_crtc_addr + 1, off >> 8); 2297 outb(adp->va_crtc_addr, 15); 2298 outb(adp->va_crtc_addr + 1, off & 0x00ff); 2299 splx(s); 2300 2301 return 0; 2302} 2303 2304/* 2305 * set_hw_cursor_shape(): 2306 * Change the shape of the hardware text cursor. If the height is 2307 * zero or negative, the cursor won't be shown. 2308 * 2309 * all adapters 2310 */ 2311static int 2312vga_set_hw_cursor_shape(video_adapter_t *adp, int base, int height, 2313 int celsize, int blink) 2314{ 2315 int s; 2316 2317 if (!vga_init_done) 2318 return ENXIO; 2319 2320 s = spltty(); 2321 switch (adp->va_type) { 2322 case KD_VGA: 2323 case KD_CGA: 2324 case KD_MONO: 2325 case KD_HERCULES: 2326 default: 2327 if (height <= 0) { 2328 /* make the cursor invisible */ 2329 outb(adp->va_crtc_addr, 10); 2330 outb(adp->va_crtc_addr + 1, 32); 2331 outb(adp->va_crtc_addr, 11); 2332 outb(adp->va_crtc_addr + 1, 0); 2333 } else { 2334 outb(adp->va_crtc_addr, 10); 2335 outb(adp->va_crtc_addr + 1, celsize - base - height); 2336 outb(adp->va_crtc_addr, 11); 2337 outb(adp->va_crtc_addr + 1, celsize - base - 1); 2338 } 2339 break; 2340 case KD_EGA: 2341 if (height <= 0) { 2342 /* make the cursor invisible */ 2343 outb(adp->va_crtc_addr, 10); 2344 outb(adp->va_crtc_addr + 1, celsize); 2345 outb(adp->va_crtc_addr, 11); 2346 outb(adp->va_crtc_addr + 1, 0); 2347 } else { 2348 outb(adp->va_crtc_addr, 10); 2349 outb(adp->va_crtc_addr + 1, celsize - base - height); 2350 outb(adp->va_crtc_addr, 11); 2351 outb(adp->va_crtc_addr + 1, celsize - base); 2352 } 2353 break; 2354 } 2355 splx(s); 2356 2357 return 0; 2358} 2359 2360/* 2361 * blank_display() 2362 * Put the display in power save/power off mode. 2363 * 2364 * all adapters 2365 */ 2366static int 2367vga_blank_display(video_adapter_t *adp, int mode) 2368{ 2369 u_char val; 2370 int s; 2371 2372 s = splhigh(); 2373 switch (adp->va_type) { 2374 case KD_VGA: 2375 switch (mode) { 2376 case V_DISPLAY_SUSPEND: 2377 case V_DISPLAY_STAND_BY: 2378 outb(TSIDX, 0x01); 2379 val = inb(TSREG); 2380 outb(TSIDX, 0x01); 2381 outb(TSREG, val | 0x20); 2382 outb(adp->va_crtc_addr, 0x17); 2383 val = inb(adp->va_crtc_addr + 1); 2384 outb(adp->va_crtc_addr + 1, val & ~0x80); 2385 break; 2386 case V_DISPLAY_BLANK: 2387 outb(TSIDX, 0x01); 2388 val = inb(TSREG); 2389 outb(TSIDX, 0x01); 2390 outb(TSREG, val | 0x20); 2391 break; 2392 case V_DISPLAY_ON: 2393 outb(TSIDX, 0x01); 2394 val = inb(TSREG); 2395 outb(TSIDX, 0x01); 2396 outb(TSREG, val & 0xDF); 2397 outb(adp->va_crtc_addr, 0x17); 2398 val = inb(adp->va_crtc_addr + 1); 2399 outb(adp->va_crtc_addr + 1, val | 0x80); 2400 break; 2401 } 2402 break; 2403 2404 case KD_EGA: 2405 /* no support yet */ 2406 return ENODEV; 2407 2408 case KD_CGA: 2409 switch (mode) { 2410 case V_DISPLAY_SUSPEND: 2411 case V_DISPLAY_STAND_BY: 2412 case V_DISPLAY_BLANK: 2413 outb(adp->va_crtc_addr + 4, 0x25); 2414 break; 2415 case V_DISPLAY_ON: 2416 outb(adp->va_crtc_addr + 4, 0x2d); 2417 break; 2418 } 2419 break; 2420 2421 case KD_MONO: 2422 case KD_HERCULES: 2423 switch (mode) { 2424 case V_DISPLAY_SUSPEND: 2425 case V_DISPLAY_STAND_BY: 2426 case V_DISPLAY_BLANK: 2427 outb(adp->va_crtc_addr + 4, 0x21); 2428 break; 2429 case V_DISPLAY_ON: 2430 outb(adp->va_crtc_addr + 4, 0x29); 2431 break; 2432 } 2433 break; 2434 default: 2435 break; 2436 } 2437 splx(s); 2438 2439 return 0; 2440} 2441 2442/* 2443 * mmap(): 2444 * Mmap frame buffer. 2445 * 2446 * all adapters 2447 */ 2448static int 2449vga_mmap_buf(video_adapter_t *adp, vm_offset_t offset, int prot) 2450{ 2451 if (adp->va_info.vi_flags & V_INFO_LINEAR) 2452 return -1; 2453 2454#if VGA_DEBUG > 0 2455 printf("vga_mmap_buf(): window:0x%x, offset:0x%x\n", 2456 adp->va_info.vi_window, offset); 2457#endif 2458 2459 /* XXX: is this correct? */ 2460 if (offset > adp->va_window_size - PAGE_SIZE) 2461 return -1; 2462 2463#ifdef __i386__ 2464 return i386_btop(adp->va_info.vi_window + offset); 2465#endif 2466#ifdef __alpha__ 2467 return alpha_btop(adp->va_info.vi_window + offset); 2468#endif 2469} 2470 2471#ifndef VGA_NO_MODE_CHANGE 2472 2473static void 2474planar_fill(video_adapter_t *adp, int val) 2475{ 2476 int length; 2477 int at; /* position in the frame buffer */ 2478 int l; 2479 2480 outw(GDCIDX, 0x0005); /* read mode 0, write mode 0 */ 2481 outw(GDCIDX, 0x0003); /* data rotate/function select */ 2482 outw(GDCIDX, 0x0f01); /* set/reset enable */ 2483 outw(GDCIDX, 0xff08); /* bit mask */ 2484 outw(GDCIDX, (val << 8) | 0x00); /* set/reset */ 2485 at = 0; 2486 length = adp->va_line_width*adp->va_info.vi_height; 2487 while (length > 0) { 2488 l = imin(length, adp->va_window_size); 2489 (*vidsw[adp->va_index]->set_win_org)(adp, at); 2490 bzero_io(adp->va_window, l); 2491 length -= l; 2492 at += l; 2493 } 2494 outw(GDCIDX, 0x0000); /* set/reset */ 2495 outw(GDCIDX, 0x0001); /* set/reset enable */ 2496} 2497 2498static void 2499packed_fill(video_adapter_t *adp, int val) 2500{ 2501 int length; 2502 int at; /* position in the frame buffer */ 2503 int l; 2504 2505 at = 0; 2506 length = adp->va_line_width*adp->va_info.vi_height; 2507 while (length > 0) { 2508 l = imin(length, adp->va_window_size); 2509 (*vidsw[adp->va_index]->set_win_org)(adp, at); 2510 fill_io(val, adp->va_window, l); 2511 length -= l; 2512 at += l; 2513 } 2514} 2515 2516static void 2517direct_fill(video_adapter_t *adp, int val) 2518{ 2519 int length; 2520 int at; /* position in the frame buffer */ 2521 int l; 2522 2523 at = 0; 2524 length = adp->va_line_width*adp->va_info.vi_height; 2525 while (length > 0) { 2526 l = imin(length, adp->va_window_size); 2527 (*vidsw[adp->va_index]->set_win_org)(adp, at); 2528 switch (adp->va_info.vi_pixel_size) { 2529 case sizeof(u_int16_t): 2530 fillw_io(val, adp->va_window, l/sizeof(u_int16_t)); 2531 break; 2532 case 3: 2533 /* FIXME */ 2534 break; 2535 case sizeof(u_int32_t): 2536 filll_io(val, adp->va_window, l/sizeof(u_int32_t)); 2537 break; 2538 } 2539 length -= l; 2540 at += l; 2541 } 2542} 2543 2544static int 2545vga_clear(video_adapter_t *adp) 2546{ 2547 switch (adp->va_info.vi_mem_model) { 2548 case V_INFO_MM_TEXT: 2549 /* do nothing? XXX */ 2550 break; 2551 case V_INFO_MM_PLANAR: 2552 planar_fill(adp, 0); 2553 break; 2554 case V_INFO_MM_PACKED: 2555 packed_fill(adp, 0); 2556 break; 2557 case V_INFO_MM_DIRECT: 2558 direct_fill(adp, 0); 2559 break; 2560 } 2561 return 0; 2562} 2563 2564#ifdef notyet 2565static void 2566planar_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2567{ 2568 int banksize; 2569 int bank; 2570 int pos; 2571 int offset; /* offset within window */ 2572 int bx; 2573 int l; 2574 2575 outw(GDCIDX, 0x0005); /* read mode 0, write mode 0 */ 2576 outw(GDCIDX, 0x0003); /* data rotate/function select */ 2577 outw(GDCIDX, 0x0f01); /* set/reset enable */ 2578 outw(GDCIDX, 0xff08); /* bit mask */ 2579 outw(GDCIDX, (val << 8) | 0x00); /* set/reset */ 2580 2581 banksize = adp->va_window_size; 2582 bank = -1; 2583 while (cy > 0) { 2584 pos = adp->va_line_width*y + x/8; 2585 if (bank != pos/banksize) { 2586 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2587 bank = pos/banksize; 2588 } 2589 offset = pos%banksize; 2590 bx = (x + cx)/8 - x/8; 2591 if (x % 8) { 2592 outw(GDCIDX, ((0xff00 >> (x % 8)) & 0xff00) | 0x08); 2593 writeb(adp->va_window + offset, 0); 2594 ++offset; 2595 --bx; 2596 if (offset >= banksize) { 2597 offset = 0; 2598 ++bank; /* next bank */ 2599 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2600 } 2601 outw(GDCIDX, 0xff08); /* bit mask */ 2602 } 2603 while (bx > 0) { 2604 l = imin(bx, banksize); 2605 bzero_io(adp->va_window + offset, l); 2606 offset += l; 2607 bx -= l; 2608 if (offset >= banksize) { 2609 offset = 0; 2610 ++bank; /* next bank */ 2611 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2612 } 2613 } 2614 if ((x + cx) % 8) { 2615 outw(GDCIDX, (~(0xff00 >> ((x + cx) % 8)) & 0xff00) | 0x08); 2616 writeb(adp->va_window + offset, 0); 2617 ++offset; 2618 if (offset >= banksize) { 2619 offset = 0; 2620 ++bank; /* next bank */ 2621 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2622 } 2623 outw(GDCIDX, 0xff08); /* bit mask */ 2624 } 2625 ++y; 2626 --cy; 2627 } 2628 2629 outw(GDCIDX, 0xff08); /* bit mask */ 2630 outw(GDCIDX, 0x0000); /* set/reset */ 2631 outw(GDCIDX, 0x0001); /* set/reset enable */ 2632} 2633 2634static void 2635packed_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2636{ 2637 int banksize; 2638 int bank; 2639 int pos; 2640 int offset; /* offset within window */ 2641 int end; 2642 2643 banksize = adp->va_window_size; 2644 bank = -1; 2645 cx *= adp->va_info.vi_pixel_size; 2646 while (cy > 0) { 2647 pos = adp->va_line_width*y + x*adp->va_info.vi_pixel_size; 2648 if (bank != pos/banksize) { 2649 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2650 bank = pos/banksize; 2651 } 2652 offset = pos%banksize; 2653 end = imin(offset + cx, banksize); 2654 fill_io(val, adp->va_window + offset, 2655 (end - offset)/adp->va_info.vi_pixel_size); 2656 /* the line may cross the window boundary */ 2657 if (offset + cx > banksize) { 2658 ++bank; /* next bank */ 2659 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2660 end = offset + cx - banksize; 2661 fill_io(val, adp->va_window, end/adp->va_info.vi_pixel_size); 2662 } 2663 ++y; 2664 --cy; 2665 } 2666} 2667 2668static void 2669direct_fill_rect16(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2670{ 2671 int banksize; 2672 int bank; 2673 int pos; 2674 int offset; /* offset within window */ 2675 int end; 2676 2677 /* 2678 * XXX: the function assumes that banksize is a muliple of 2679 * sizeof(u_int16_t). 2680 */ 2681 banksize = adp->va_window_size; 2682 bank = -1; 2683 cx *= sizeof(u_int16_t); 2684 while (cy > 0) { 2685 pos = adp->va_line_width*y + x*sizeof(u_int16_t); 2686 if (bank != pos/banksize) { 2687 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2688 bank = pos/banksize; 2689 } 2690 offset = pos%banksize; 2691 end = imin(offset + cx, banksize); 2692 fillw_io(val, adp->va_window + offset, 2693 (end - offset)/sizeof(u_int16_t)); 2694 /* the line may cross the window boundary */ 2695 if (offset + cx > banksize) { 2696 ++bank; /* next bank */ 2697 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2698 end = offset + cx - banksize; 2699 fillw_io(val, adp->va_window, end/sizeof(u_int16_t)); 2700 } 2701 ++y; 2702 --cy; 2703 } 2704} 2705 2706static void 2707direct_fill_rect24(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2708{ 2709 int banksize; 2710 int bank; 2711 int pos; 2712 int offset; /* offset within window */ 2713 int end; 2714 int i; 2715 int j; 2716 u_int8_t b[3]; 2717 2718 b[0] = val & 0x0000ff; 2719 b[1] = (val >> 8) & 0x0000ff; 2720 b[2] = (val >> 16) & 0x0000ff; 2721 banksize = adp->va_window_size; 2722 bank = -1; 2723 cx *= 3; 2724 while (cy > 0) { 2725 pos = adp->va_line_width*y + x*3; 2726 if (bank != pos/banksize) { 2727 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2728 bank = pos/banksize; 2729 } 2730 offset = pos%banksize; 2731 end = imin(offset + cx, banksize); 2732 for (i = 0, j = offset; j < end; i = (++i)%3, ++j) { 2733 writeb(adp->va_window + j, b[i]); 2734 } 2735 /* the line may cross the window boundary */ 2736 if (offset + cx >= banksize) { 2737 ++bank; /* next bank */ 2738 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2739 j = 0; 2740 end = offset + cx - banksize; 2741 for (; j < end; i = (++i)%3, ++j) { 2742 writeb(adp->va_window + j, b[i]); 2743 } 2744 } 2745 ++y; 2746 --cy; 2747 } 2748} 2749 2750static void 2751direct_fill_rect32(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2752{ 2753 int banksize; 2754 int bank; 2755 int pos; 2756 int offset; /* offset within window */ 2757 int end; 2758 2759 /* 2760 * XXX: the function assumes that banksize is a muliple of 2761 * sizeof(u_int32_t). 2762 */ 2763 banksize = adp->va_window_size; 2764 bank = -1; 2765 cx *= sizeof(u_int32_t); 2766 while (cy > 0) { 2767 pos = adp->va_line_width*y + x*sizeof(u_int32_t); 2768 if (bank != pos/banksize) { 2769 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2770 bank = pos/banksize; 2771 } 2772 offset = pos%banksize; 2773 end = imin(offset + cx, banksize); 2774 filll_io(val, adp->va_window + offset, 2775 (end - offset)/sizeof(u_int32_t)); 2776 /* the line may cross the window boundary */ 2777 if (offset + cx > banksize) { 2778 ++bank; /* next bank */ 2779 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2780 end = offset + cx - banksize; 2781 filll_io(val, adp->va_window, end/sizeof(u_int32_t)); 2782 } 2783 ++y; 2784 --cy; 2785 } 2786} 2787 2788static int 2789vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2790{ 2791 switch (adp->va_info.vi_mem_model) { 2792 case V_INFO_MM_TEXT: 2793 /* do nothing? XXX */ 2794 break; 2795 case V_INFO_MM_PLANAR: 2796 planar_fill_rect(adp, val, x, y, cx, cy); 2797 break; 2798 case V_INFO_MM_PACKED: 2799 packed_fill_rect(adp, val, x, y, cx, cy); 2800 break; 2801 case V_INFO_MM_DIRECT: 2802 switch (adp->va_info.vi_pixel_size) { 2803 case sizeof(u_int16_t): 2804 direct_fill_rect16(adp, val, x, y, cx, cy); 2805 break; 2806 case 3: 2807 direct_fill_rect24(adp, val, x, y, cx, cy); 2808 break; 2809 case sizeof(u_int32_t): 2810 direct_fill_rect32(adp, val, x, y, cx, cy); 2811 break; 2812 } 2813 break; 2814 } 2815 return 0; 2816} 2817#else /* !notyet */ 2818static int 2819vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2820{ 2821 return ENODEV; 2822} 2823#endif /* notyet */ 2824 2825static int 2826vga_bitblt(video_adapter_t *adp,...) 2827{ 2828 /* FIXME */ 2829 return ENODEV; 2830} 2831 2832#endif /* !VGA_NO_MODE_CHANGE */ 2833 2834static int 2835get_palette(video_adapter_t *adp, int base, int count, 2836 u_char *red, u_char *green, u_char *blue, u_char *trans) 2837{ 2838 u_char *r; 2839 u_char *g; 2840 u_char *b; 2841 2842 if ((base < 0) || (base >= 256) || (base + count > 256)) 2843 return EINVAL; 2844 2845 r = malloc(count*3, M_DEVBUF, M_WAITOK); 2846 g = r + count; 2847 b = g + count; 2848 if (vga_save_palette2(adp, base, count, r, g, b)) 2849 return ENODEV; 2850 copyout(r, red, count); 2851 copyout(g, green, count); 2852 copyout(b, blue, count); 2853 if (trans != NULL) { 2854 bzero(r, count); 2855 copyout(r, trans, count); 2856 } 2857 free(r, M_DEVBUF); 2858 2859 return 0; 2860} 2861 2862static int 2863set_palette(video_adapter_t *adp, int base, int count, 2864 u_char *red, u_char *green, u_char *blue, u_char *trans) 2865{ 2866 u_char *r; 2867 u_char *g; 2868 u_char *b; 2869 int err; 2870 2871 if ((base < 0) || (base >= 256) || (base + count > 256)) 2872 return EINVAL; 2873 2874 r = malloc(count*3, M_DEVBUF, M_WAITOK); 2875 g = r + count; 2876 b = g + count; 2877 copyin(red, r, count); 2878 copyin(green, g, count); 2879 copyin(blue, b, count); 2880 err = vga_load_palette2(adp, base, count, r, g, b); 2881 free(r, M_DEVBUF); 2882 2883 return (err ? ENODEV : 0); 2884} 2885 2886static int 2887vga_dev_ioctl(video_adapter_t *adp, u_long cmd, caddr_t arg) 2888{ 2889 switch (cmd) { 2890 case FBIO_GETWINORG: /* get frame buffer window origin */ 2891 *(u_int *)arg = 0; 2892 return 0; 2893 2894 case FBIO_SETWINORG: /* set frame buffer window origin */ 2895 return ENODEV; 2896 2897 case FBIO_SETDISPSTART: /* set display start address */ 2898 return (set_display_start(adp, 2899 ((video_display_start_t *)arg)->x, 2900 ((video_display_start_t *)arg)->y) 2901 ? ENODEV : 0); 2902 2903 case FBIO_SETLINEWIDTH: /* set scan line length in pixel */ 2904 return (set_line_length(adp, *(u_int *)arg) ? ENODEV : 0); 2905 2906 case FBIO_GETPALETTE: /* get color palette */ 2907 return get_palette(adp, ((video_color_palette_t *)arg)->index, 2908 ((video_color_palette_t *)arg)->count, 2909 ((video_color_palette_t *)arg)->red, 2910 ((video_color_palette_t *)arg)->green, 2911 ((video_color_palette_t *)arg)->blue, 2912 ((video_color_palette_t *)arg)->transparent); 2913 2914 case FBIO_SETPALETTE: /* set color palette */ 2915 return set_palette(adp, ((video_color_palette_t *)arg)->index, 2916 ((video_color_palette_t *)arg)->count, 2917 ((video_color_palette_t *)arg)->red, 2918 ((video_color_palette_t *)arg)->green, 2919 ((video_color_palette_t *)arg)->blue, 2920 ((video_color_palette_t *)arg)->transparent); 2921 2922 case FBIOGTYPE: /* get frame buffer type info. */ 2923 ((struct fbtype *)arg)->fb_type = fb_type(adp->va_type); 2924 ((struct fbtype *)arg)->fb_height = adp->va_info.vi_height; 2925 ((struct fbtype *)arg)->fb_width = adp->va_info.vi_width; 2926 ((struct fbtype *)arg)->fb_depth = adp->va_info.vi_depth; 2927 if ((adp->va_info.vi_depth <= 1) || (adp->va_info.vi_depth > 8)) 2928 ((struct fbtype *)arg)->fb_cmsize = 0; 2929 else 2930 ((struct fbtype *)arg)->fb_cmsize = 1 << adp->va_info.vi_depth; 2931 ((struct fbtype *)arg)->fb_size = adp->va_buffer_size; 2932 return 0; 2933 2934 case FBIOGETCMAP: /* get color palette */ 2935 return get_palette(adp, ((struct fbcmap *)arg)->index, 2936 ((struct fbcmap *)arg)->count, 2937 ((struct fbcmap *)arg)->red, 2938 ((struct fbcmap *)arg)->green, 2939 ((struct fbcmap *)arg)->blue, NULL); 2940 2941 case FBIOPUTCMAP: /* set color palette */ 2942 return set_palette(adp, ((struct fbcmap *)arg)->index, 2943 ((struct fbcmap *)arg)->count, 2944 ((struct fbcmap *)arg)->red, 2945 ((struct fbcmap *)arg)->green, 2946 ((struct fbcmap *)arg)->blue, NULL); 2947 2948 default: 2949 return fb_commonioctl(adp, cmd, arg); 2950 } 2951} 2952 2953static void 2954dump_buffer(u_char *buf, size_t len) 2955{ 2956 int i; 2957 2958 for(i = 0; i < len;) { 2959 printf("%02x ", buf[i]); 2960 if ((++i % 16) == 0) 2961 printf("\n"); 2962 } 2963} 2964 2965/* 2966 * diag(): 2967 * Print some information about the video adapter and video modes, 2968 * with requested level of details. 2969 * 2970 * all adapters 2971 */ 2972static int 2973vga_diag(video_adapter_t *adp, int level) 2974{ 2975 u_char *mp; 2976#if FB_DEBUG > 1 2977 video_info_t info; 2978 int i; 2979#endif 2980 2981 if (!vga_init_done) 2982 return ENXIO; 2983 2984#if FB_DEBUG > 1 2985#ifndef VGA_NO_BIOS 2986 printf("vga: RTC equip. code:0x%02x, DCC code:0x%02x\n", 2987 rtcin(RTC_EQUIPMENT), readb(BIOS_PADDRTOVADDR(0x488))); 2988 printf("vga: CRTC:0x%x, video option:0x%02x, ", 2989 readw(BIOS_PADDRTOVADDR(0x463)), 2990 readb(BIOS_PADDRTOVADDR(0x487))); 2991 printf("rows:%d, cols:%d, font height:%d\n", 2992 readb(BIOS_PADDRTOVADDR(0x44a)), 2993 readb(BIOS_PADDRTOVADDR(0x484)) + 1, 2994 readb(BIOS_PADDRTOVADDR(0x485))); 2995#endif /* VGA_NO_BIOS */ 2996#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 2997 printf("vga: param table EGA/VGA:%p", video_mode_ptr); 2998 printf(", CGA/MDA:%p\n", video_mode_ptr2); 2999 printf("vga: rows_offset:%d\n", rows_offset); 3000#endif 3001#endif /* FB_DEBUG > 1 */ 3002 3003 fb_dump_adp_info(VGA_DRIVER_NAME, adp, level); 3004 3005#if FB_DEBUG > 1 3006 if (adp->va_flags & V_ADP_MODECHANGE) { 3007 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 3008 if (bios_vmode[i].vi_mode == NA) 3009 continue; 3010 if (get_mode_param(bios_vmode[i].vi_mode) == NULL) 3011 continue; 3012 fb_dump_mode_info(VGA_DRIVER_NAME, adp, &bios_vmode[i], level); 3013 } 3014 } else { 3015 vga_get_info(adp, adp->va_initial_mode, &info); /* shouldn't fail */ 3016 fb_dump_mode_info(VGA_DRIVER_NAME, adp, &info, level); 3017 } 3018#endif /* FB_DEBUG > 1 */ 3019 3020 if ((adp->va_type != KD_EGA) && (adp->va_type != KD_VGA)) 3021 return 0; 3022#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 3023 if (video_mode_ptr == NULL) 3024 printf("vga%d: %s: WARNING: video mode switching is not " 3025 "fully supported on this adapter\n", 3026 adp->va_unit, adp->va_name); 3027#endif 3028 if (level <= 0) 3029 return 0; 3030 3031 if (adp->va_type == KD_VGA) { 3032 printf("VGA parameters upon power-up\n"); 3033 dump_buffer(adpstate.regs, sizeof(adpstate.regs)); 3034 printf("VGA parameters in BIOS for mode %d\n", adp->va_initial_mode); 3035 dump_buffer(adpstate2.regs, sizeof(adpstate2.regs)); 3036 } 3037 3038 mp = get_mode_param(adp->va_initial_mode); 3039 if (mp == NULL) /* this shouldn't be happening */ 3040 return 0; 3041 printf("EGA/VGA parameters to be used for mode %d\n", adp->va_initial_mode); 3042 dump_buffer(mp, V_MODE_PARAM_SIZE); 3043 3044 return 0; 3045} 3046 3047#endif /* NVGA > 0 */ 3048