vga.c revision 48104
1/*- 2 * Copyright (c) 1999 Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp> 3 * Copyright (c) 1992-1998 S�ren Schmidt 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer as 11 * the first lines of this file unmodified. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * $Id: $ 30 */ 31 32#include "vga.h" 33#include "opt_vga.h" 34#include "opt_fb.h" 35#include "opt_syscons.h" /* should be removed in the future, XXX */ 36 37#if NVGA > 0 38 39#include <sys/param.h> 40#include <sys/systm.h> 41#include <sys/kernel.h> 42#include <sys/conf.h> 43#include <sys/proc.h> 44#include <sys/fcntl.h> 45#include <sys/malloc.h> 46#include <sys/fbio.h> 47 48#include <vm/vm.h> 49#include <vm/vm_param.h> 50#include <vm/pmap.h> 51 52#include <machine/md_var.h> 53#include <machine/pc/bios.h> 54 55#include <dev/fb/fbreg.h> 56#include <dev/fb/vgareg.h> 57 58#include <isa/isareg.h> 59 60#ifndef VGA_DEBUG 61#define VGA_DEBUG 0 62#endif 63 64int 65vga_probe_unit(int unit, video_adapter_t *buf, int flags) 66{ 67 video_adapter_t *adp; 68 video_switch_t *sw; 69 int error; 70 71 sw = vid_get_switch(VGA_DRIVER_NAME); 72 if (sw == NULL) 73 return 0; 74 error = (*sw->probe)(unit, &adp, NULL, flags); 75 if (error) 76 return error; 77 bcopy(adp, buf, sizeof(*buf)); 78 return 0; 79} 80 81int 82vga_attach_unit(int unit, vga_softc_t *sc, int flags) 83{ 84 video_switch_t *sw; 85 int error; 86 87 sw = vid_get_switch(VGA_DRIVER_NAME); 88 if (sw == NULL) 89 return ENXIO; 90 91 error = (*sw->probe)(unit, &sc->adp, NULL, flags); 92 if (error) 93 return error; 94 return (*sw->init)(unit, sc->adp, flags); 95} 96 97/* cdev driver functions */ 98 99#ifdef FB_INSTALL_CDEV 100 101int 102vga_open(dev_t dev, vga_softc_t *sc, int flag, int mode, struct proc *p) 103{ 104 if (sc == NULL) 105 return ENXIO; 106 if (mode & (O_CREAT | O_APPEND | O_TRUNC)) 107 return ENODEV; 108 109 return genfbopen(&sc->gensc, sc->adp, flag, mode, p); 110} 111 112int 113vga_close(dev_t dev, vga_softc_t *sc, int flag, int mode, struct proc *p) 114{ 115 return genfbclose(&sc->gensc, sc->adp, flag, mode, p); 116} 117 118int 119vga_read(dev_t dev, vga_softc_t *sc, struct uio *uio, int flag) 120{ 121 return genfbread(&sc->gensc, sc->adp, uio, flag); 122} 123 124int 125vga_write(dev_t dev, vga_softc_t *sc, struct uio *uio, int flag) 126{ 127 return genfbread(&sc->gensc, sc->adp, uio, flag); 128} 129 130int 131vga_ioctl(dev_t dev, vga_softc_t *sc, u_long cmd, caddr_t arg, int flag, 132 struct proc *p) 133{ 134 return genfbioctl(&sc->gensc, sc->adp, cmd, arg, flag, p); 135} 136 137int 138vga_mmap(dev_t dev, vga_softc_t *sc, vm_offset_t offset, int prot) 139{ 140 return genfbmmap(&sc->gensc, sc->adp, offset, prot); 141} 142 143#endif /* FB_INSTALL_CDEV */ 144 145/* LOW-LEVEL */ 146 147#include <machine/clock.h> 148#include <machine/pc/vesa.h> 149 150#define probe_done(adp) ((adp)->va_flags & V_ADP_PROBED) 151#define init_done(adp) ((adp)->va_flags & V_ADP_INITIALIZED) 152#define config_done(adp) ((adp)->va_flags & V_ADP_REGISTERED) 153 154/* for compatibility with old kernel options */ 155#ifdef SC_ALT_SEQACCESS 156#undef SC_ALT_SEQACCESS 157#undef VGA_ALT_SEQACCESS 158#define VGA_ALT_SEQACCESS 1 159#endif 160 161#ifdef SLOW_VGA 162#undef SLOW_VGA 163#undef VGA_SLOW_IOACCESS 164#define VGA_SLOW_IOACCESS 1 165#endif 166 167/* architecture dependent option */ 168#ifdef __alpha__ 169#define VGA_NO_BIOS 1 170#endif 171 172/* this should really be in `rtc.h' */ 173#define RTC_EQUIPMENT 0x14 174 175/* various sizes */ 176#define V_MODE_MAP_SIZE (M_VGA_CG320 + 1) 177#define V_MODE_PARAM_SIZE 64 178 179/* video adapter state buffer */ 180struct adp_state { 181 int sig; 182#define V_STATE_SIG 0x736f6962 183 u_char regs[V_MODE_PARAM_SIZE]; 184}; 185typedef struct adp_state adp_state_t; 186 187/* video adapter information */ 188#define DCC_MONO 0 189#define DCC_CGA40 1 190#define DCC_CGA80 2 191#define DCC_EGAMONO 3 192#define DCC_EGA40 4 193#define DCC_EGA80 5 194 195/* 196 * NOTE: `va_window' should have a virtual address, but is initialized 197 * with a physical address in the following table, as verify_adapter() 198 * will perform address conversion at run-time. 199 */ 200static video_adapter_t adapter_init_value[] = { 201 /* DCC_MONO */ 202 { 0, KD_MONO, "mda", 0, 0, 0, IO_MDA, IO_MDASIZE, MONO_CRTC, 203 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 204 0, 0, 0, 0, 7, 0, }, 205 /* DCC_CGA40 */ 206 { 0, KD_CGA, "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC, 207 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 208 0, 0, 0, 0, 3, 0, }, 209 /* DCC_CGA80 */ 210 { 0, KD_CGA, "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC, 211 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 212 0, 0, 0, 0, 3, 0, }, 213 /* DCC_EGAMONO */ 214 { 0, KD_EGA, "ega", 0, 0, 0, IO_MDA, 48, MONO_CRTC, 215 EGA_BUF_BASE, EGA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 216 0, 0, 0, 0, 7, 0, }, 217 /* DCC_EGA40 */ 218 { 0, KD_EGA, "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48, COLOR_CRTC, 219 EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 220 0, 0, 0, 0, 3, 0, }, 221 /* DCC_EGA80 */ 222 { 0, KD_EGA, "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48, COLOR_CRTC, 223 EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 224 0, 0, 0, 0, 3, 0, }, 225}; 226 227static video_adapter_t biosadapter[2]; 228static int biosadapters = 0; 229 230/* video driver declarations */ 231static int vga_configure(int flags); 232 int (*vga_sub_configure)(int flags); 233static int vga_nop(void); 234static int vga_error(void); 235static vi_probe_t vga_probe; 236static vi_init_t vga_init; 237static vi_get_info_t vga_get_info; 238static vi_query_mode_t vga_query_mode; 239static vi_set_mode_t vga_set_mode; 240static vi_save_font_t vga_save_font; 241static vi_load_font_t vga_load_font; 242static vi_show_font_t vga_show_font; 243static vi_save_palette_t vga_save_palette; 244static vi_load_palette_t vga_load_palette; 245static vi_set_border_t vga_set_border; 246static vi_save_state_t vga_save_state; 247static vi_load_state_t vga_load_state; 248static vi_set_win_org_t vga_set_origin; 249static vi_read_hw_cursor_t vga_read_hw_cursor; 250static vi_set_hw_cursor_t vga_set_hw_cursor; 251static vi_set_hw_cursor_shape_t vga_set_hw_cursor_shape; 252static vi_blank_display_t vga_blank_display; 253static vi_mmap_t vga_mmap_buf; 254static vi_ioctl_t vga_dev_ioctl; 255#ifndef VGA_NO_MODE_CHANGE 256static vi_clear_t vga_clear; 257static vi_fill_rect_t vga_fill_rect; 258static vi_bitblt_t vga_bitblt; 259#else /* VGA_NO_MODE_CHANGE */ 260#define vga_clear (vi_clear_t *)vga_error 261#define vga_fill_rect (vi_fill_rect_t *)vga_error 262#define vga_bitblt (vi_bitblt_t *)vga_error 263#endif 264static vi_diag_t vga_diag; 265 266static video_switch_t vgavidsw = { 267 vga_probe, 268 vga_init, 269 vga_get_info, 270 vga_query_mode, 271 vga_set_mode, 272 vga_save_font, 273 vga_load_font, 274 vga_show_font, 275 vga_save_palette, 276 vga_load_palette, 277 vga_set_border, 278 vga_save_state, 279 vga_load_state, 280 vga_set_origin, 281 vga_read_hw_cursor, 282 vga_set_hw_cursor, 283 vga_set_hw_cursor_shape, 284 vga_blank_display, 285 vga_mmap_buf, 286 vga_dev_ioctl, 287 vga_clear, 288 vga_fill_rect, 289 vga_bitblt, 290 vga_error, 291 vga_error, 292 vga_diag, 293}; 294 295VIDEO_DRIVER(mda, vgavidsw, NULL); 296VIDEO_DRIVER(cga, vgavidsw, NULL); 297VIDEO_DRIVER(ega, vgavidsw, NULL); 298VIDEO_DRIVER(vga, vgavidsw, vga_configure); 299 300/* VGA BIOS standard video modes */ 301#define EOT (-1) 302#define NA (-2) 303 304static video_info_t bios_vmode[] = { 305 /* CGA */ 306 { M_B40x25, V_INFO_COLOR, 40, 25, 8, 8, 2, 1, 307 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 308 { M_C40x25, V_INFO_COLOR, 40, 25, 8, 8, 4, 1, 309 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 310 { M_B80x25, V_INFO_COLOR, 80, 25, 8, 8, 2, 1, 311 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 312 { M_C80x25, V_INFO_COLOR, 80, 25, 8, 8, 4, 1, 313 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 314 /* EGA */ 315 { M_ENH_B40x25, V_INFO_COLOR, 40, 25, 8, 14, 2, 1, 316 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 317 { M_ENH_C40x25, V_INFO_COLOR, 40, 25, 8, 14, 4, 1, 318 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 319 { M_ENH_B80x25, V_INFO_COLOR, 80, 25, 8, 14, 2, 1, 320 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 321 { M_ENH_C80x25, V_INFO_COLOR, 80, 25, 8, 14, 4, 1, 322 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 323 /* VGA */ 324 { M_VGA_C40x25, V_INFO_COLOR, 40, 25, 8, 16, 4, 1, 325 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 326 { M_VGA_M80x25, 0, 80, 25, 8, 16, 2, 1, 327 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 328 { M_VGA_C80x25, V_INFO_COLOR, 80, 25, 8, 16, 4, 1, 329 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 330 /* MDA */ 331 { M_EGAMONO80x25, 0, 80, 25, 8, 14, 2, 1, 332 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 333 /* EGA */ 334 { M_ENH_B80x43, 0, 80, 43, 8, 8, 2, 1, 335 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 336 { M_ENH_C80x43, V_INFO_COLOR, 80, 43, 8, 8, 4, 1, 337 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 338 /* VGA */ 339 { M_VGA_M80x30, 0, 80, 30, 8, 16, 2, 1, 340 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 341 { M_VGA_C80x30, V_INFO_COLOR, 80, 30, 8, 16, 4, 1, 342 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 343 { M_VGA_M80x50, 0, 80, 50, 8, 8, 2, 1, 344 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 345 { M_VGA_C80x50, V_INFO_COLOR, 80, 50, 8, 8, 4, 1, 346 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 347 { M_VGA_M80x60, 0, 80, 60, 8, 8, 2, 1, 348 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 349 { M_VGA_C80x60, V_INFO_COLOR, 80, 60, 8, 8, 4, 1, 350 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 351 352#ifndef VGA_NO_MODE_CHANGE 353 354#ifdef VGA_WIDTH90 355 { M_VGA_M90x25, 0, 90, 25, 8, 16, 2, 1, 356 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 357 { M_VGA_C90x25, V_INFO_COLOR, 90, 25, 8, 16, 4, 1, 358 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 359 { M_VGA_M90x30, 0, 90, 30, 8, 16, 2, 1, 360 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 361 { M_VGA_C90x30, V_INFO_COLOR, 90, 30, 8, 16, 4, 1, 362 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 363 { M_VGA_M90x43, 0, 90, 43, 8, 8, 2, 1, 364 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 365 { M_VGA_C90x43, V_INFO_COLOR, 90, 43, 8, 8, 4, 1, 366 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 367 { M_VGA_M90x50, 0, 90, 50, 8, 8, 2, 1, 368 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 369 { M_VGA_C90x50, V_INFO_COLOR, 90, 50, 8, 8, 4, 1, 370 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 371 { M_VGA_M90x60, 0, 90, 60, 8, 8, 2, 1, 372 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 373 { M_VGA_C90x60, V_INFO_COLOR, 90, 60, 8, 8, 4, 1, 374 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 375#endif /* VGA_WIDTH90 */ 376 377 /* CGA */ 378 { M_BG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 2, 1, 379 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 380 { M_CG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 2, 1, 381 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 382 { M_BG640, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8, 8, 1, 1, 383 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 384 /* EGA */ 385 { M_CG320_D, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 4, 4, 386 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 387 V_INFO_MM_PLANAR }, 388 { M_CG640_E, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8, 8, 4, 4, 389 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 390 V_INFO_MM_PLANAR }, 391 { M_EGAMONOAPA, V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 392 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, 64*1024, 0, 0 , 393 V_INFO_MM_PLANAR }, 394 { M_ENHMONOAPA2,V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 395 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 396 V_INFO_MM_PLANAR }, 397 { M_CG640x350, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 2, 2, 398 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 399 V_INFO_MM_PLANAR }, 400 { M_ENH_CG640, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 401 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 402 V_INFO_MM_PLANAR }, 403 /* VGA */ 404 { M_BG640x480, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4, 405 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 406 V_INFO_MM_PLANAR }, 407 { M_CG640x480, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4, 408 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 409 V_INFO_MM_PLANAR }, 410 { M_VGA_CG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 8, 1, 411 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 412 V_INFO_MM_PACKED, 1 }, 413 { M_VGA_MODEX, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 240, 8, 8, 8, 1, 414 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 415 V_INFO_MM_PACKED, 1 }, 416#endif /* VGA_NO_MODE_CHANGE */ 417 418 { EOT }, 419}; 420 421static int vga_init_done = FALSE; 422#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 423static u_char *video_mode_ptr = NULL; /* EGA/VGA */ 424static u_char *video_mode_ptr2 = NULL; /* CGA/MDA */ 425#endif 426static u_char *mode_map[V_MODE_MAP_SIZE]; 427static adp_state_t adpstate; 428static adp_state_t adpstate2; 429static int rows_offset = 1; 430 431/* local macros and functions */ 432#define BIOS_SADDRTOLADDR(p) ((((p) & 0xffff0000) >> 12) + ((p) & 0x0000ffff)) 433 434#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 435static void map_mode_table(u_char *map[], u_char *table, int max); 436#endif 437static void clear_mode_map(video_adapter_t *adp, u_char *map[], int max, 438 int color); 439#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 440static int map_mode_num(int mode); 441#endif 442static int map_gen_mode_num(int type, int color, int mode); 443static int map_bios_mode_num(int type, int color, int bios_mode); 444static u_char *get_mode_param(int mode); 445#ifndef VGA_NO_BIOS 446static void fill_adapter_param(int code, video_adapter_t *adp); 447#endif 448static int verify_adapter(video_adapter_t *adp); 449static void update_adapter_info(video_adapter_t *adp, video_info_t *info); 450#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 451#define COMP_IDENTICAL 0 452#define COMP_SIMILAR 1 453#define COMP_DIFFERENT 2 454static int comp_adpregs(u_char *buf1, u_char *buf2); 455#endif 456static int probe_adapters(void); 457static int set_line_length(video_adapter_t *adp, int pixel); 458static int set_display_start(video_adapter_t *adp, int x, int y); 459static void filll_io(int val, vm_offset_t d, size_t size); 460 461#ifndef VGA_NO_MODE_CHANGE 462#ifdef VGA_WIDTH90 463static void set_width90(adp_state_t *params); 464#endif 465#endif /* !VGA_NO_MODE_CHANGE */ 466 467#ifndef VGA_NO_FONT_LOADING 468#define PARAM_BUFSIZE 6 469static void set_font_mode(video_adapter_t *adp, u_char *buf); 470static void set_normal_mode(video_adapter_t *adp, u_char *buf); 471#endif 472 473#ifndef VGA_NO_MODE_CHANGE 474static void planar_fill(video_adapter_t *adp, int val); 475static void packed_fill(video_adapter_t *adp, int val); 476static void direct_fill(video_adapter_t *adp, int val); 477#ifdef notyet 478static void planar_fill_rect(video_adapter_t *adp, int val, int x, int y, 479 int cx, int cy); 480static void packed_fill_rect(video_adapter_t *adp, int val, int x, int y, 481 int cx, int cy); 482static void direct_fill_rect16(video_adapter_t *adp, int val, int x, int y, 483 int cx, int cy); 484static void direct_fill_rect24(video_adapter_t *adp, int val, int x, int y, 485 int cx, int cy); 486static void direct_fill_rect32(video_adapter_t *adp, int val, int x, int y, 487 int cx, int cy); 488#endif /* notyet */ 489#endif /* !VGA_NO_MODE_CHANGE */ 490 491static void dump_buffer(u_char *buf, size_t len); 492 493#define ISMAPPED(pa, width) \ 494 (((pa) <= (u_long)0x1000 - (width)) \ 495 || ((pa) >= ISA_HOLE_START && (pa) <= 0x100000 - (width))) 496 497#define prologue(adp, flag, err) \ 498 if (!vga_init_done || !((adp)->va_flags & (flag))) \ 499 return (err) 500 501/* a backdoor for the console driver */ 502static int 503vga_configure(int flags) 504{ 505 int i; 506 507 probe_adapters(); 508 for (i = 0; i < biosadapters; ++i) { 509 if (!probe_done(&biosadapter[i])) 510 continue; 511 biosadapter[i].va_flags |= V_ADP_INITIALIZED; 512 if (!config_done(&biosadapter[i])) { 513 if (vid_register(&biosadapter[i]) < 0) 514 continue; 515 biosadapter[i].va_flags |= V_ADP_REGISTERED; 516 } 517 } 518 if (vga_sub_configure != NULL) 519 (*vga_sub_configure)(flags); 520 521 return biosadapters; 522} 523 524/* local subroutines */ 525 526#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 527/* construct the mode parameter map */ 528static void 529map_mode_table(u_char *map[], u_char *table, int max) 530{ 531 int i; 532 533 for(i = 0; i < max; ++i) 534 map[i] = table + i*V_MODE_PARAM_SIZE; 535 for(; i < V_MODE_MAP_SIZE; ++i) 536 map[i] = NULL; 537} 538#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 539 540static void 541clear_mode_map(video_adapter_t *adp, u_char *map[], int max, int color) 542{ 543 video_info_t info; 544 int i; 545 546 /* 547 * NOTE: we don't touch `bios_vmode[]' because it is shared 548 * by all adapters. 549 */ 550 for(i = 0; i < max; ++i) { 551 if (vga_get_info(adp, i, &info)) 552 continue; 553 if ((info.vi_flags & V_INFO_COLOR) != color) 554 map[i] = NULL; 555 } 556} 557 558#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 559/* map the non-standard video mode to a known mode number */ 560static int 561map_mode_num(int mode) 562{ 563 static struct { 564 int from; 565 int to; 566 } mode_map[] = { 567 { M_ENH_B80x43, M_ENH_B80x25 }, 568 { M_ENH_C80x43, M_ENH_C80x25 }, 569 { M_VGA_M80x30, M_VGA_M80x25 }, 570 { M_VGA_C80x30, M_VGA_C80x25 }, 571 { M_VGA_M80x50, M_VGA_M80x25 }, 572 { M_VGA_C80x50, M_VGA_C80x25 }, 573 { M_VGA_M80x60, M_VGA_M80x25 }, 574 { M_VGA_C80x60, M_VGA_C80x25 }, 575#ifdef VGA_WIDTH90 576 { M_VGA_M90x25, M_VGA_M80x25 }, 577 { M_VGA_C90x25, M_VGA_C80x25 }, 578 { M_VGA_M90x30, M_VGA_M80x25 }, 579 { M_VGA_C90x30, M_VGA_C80x25 }, 580 { M_VGA_M90x43, M_ENH_B80x25 }, 581 { M_VGA_C90x43, M_ENH_C80x25 }, 582 { M_VGA_M90x50, M_VGA_M80x25 }, 583 { M_VGA_C90x50, M_VGA_C80x25 }, 584 { M_VGA_M90x60, M_VGA_M80x25 }, 585 { M_VGA_C90x60, M_VGA_C80x25 }, 586#endif 587 { M_VGA_MODEX, M_VGA_CG320 }, 588 }; 589 int i; 590 591 for (i = 0; i < sizeof(mode_map)/sizeof(mode_map[0]); ++i) { 592 if (mode_map[i].from == mode) 593 return mode_map[i].to; 594 } 595 return mode; 596} 597#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 598 599/* map a generic video mode to a known mode number */ 600static int 601map_gen_mode_num(int type, int color, int mode) 602{ 603 static struct { 604 int from; 605 int to_color; 606 int to_mono; 607 } mode_map[] = { 608 { M_TEXT_80x30, M_VGA_C80x30, M_VGA_M80x30, }, 609 { M_TEXT_80x43, M_ENH_C80x43, M_ENH_B80x43, }, 610 { M_TEXT_80x50, M_VGA_C80x50, M_VGA_M80x50, }, 611 { M_TEXT_80x60, M_VGA_C80x60, M_VGA_M80x60, }, 612 }; 613 int i; 614 615 if (mode == M_TEXT_80x25) { 616 switch (type) { 617 618 case KD_VGA: 619 if (color) 620 return M_VGA_C80x25; 621 else 622 return M_VGA_M80x25; 623 break; 624 625 case KD_EGA: 626 if (color) 627 return M_ENH_C80x25; 628 else 629 return M_EGAMONO80x25; 630 break; 631 632 case KD_CGA: 633 return M_C80x25; 634 635 case KD_MONO: 636 case KD_HERCULES: 637 return M_EGAMONO80x25; /* XXX: this name is confusing */ 638 639 default: 640 return -1; 641 } 642 } 643 644 for (i = 0; i < sizeof(mode_map)/sizeof(mode_map[0]); ++i) { 645 if (mode_map[i].from == mode) 646 return ((color) ? mode_map[i].to_color : mode_map[i].to_mono); 647 } 648 return mode; 649} 650 651/* turn the BIOS video number into our video mode number */ 652static int 653map_bios_mode_num(int type, int color, int bios_mode) 654{ 655 static int cga_modes[7] = { 656 M_B40x25, M_C40x25, /* 0, 1 */ 657 M_B80x25, M_C80x25, /* 2, 3 */ 658 M_BG320, M_CG320, 659 M_BG640, 660 }; 661 static int ega_modes[17] = { 662 M_ENH_B40x25, M_ENH_C40x25, /* 0, 1 */ 663 M_ENH_B80x25, M_ENH_C80x25, /* 2, 3 */ 664 M_BG320, M_CG320, 665 M_BG640, 666 M_EGAMONO80x25, /* 7 */ 667 8, 9, 10, 11, 12, 668 M_CG320_D, 669 M_CG640_E, 670 M_ENHMONOAPA2, /* XXX: video momery > 64K */ 671 M_ENH_CG640, /* XXX: video momery > 64K */ 672 }; 673 static int vga_modes[20] = { 674 M_VGA_C40x25, M_VGA_C40x25, /* 0, 1 */ 675 M_VGA_C80x25, M_VGA_C80x25, /* 2, 3 */ 676 M_BG320, M_CG320, 677 M_BG640, 678 M_VGA_M80x25, /* 7 */ 679 8, 9, 10, 11, 12, 680 M_CG320_D, 681 M_CG640_E, 682 M_ENHMONOAPA2, 683 M_ENH_CG640, 684 M_BG640x480, M_CG640x480, 685 M_VGA_CG320, 686 }; 687 688 switch (type) { 689 690 case KD_VGA: 691 if (bios_mode < sizeof(vga_modes)/sizeof(vga_modes[0])) 692 return vga_modes[bios_mode]; 693 else if (color) 694 return M_VGA_C80x25; 695 else 696 return M_VGA_M80x25; 697 break; 698 699 case KD_EGA: 700 if (bios_mode < sizeof(ega_modes)/sizeof(ega_modes[0])) 701 return ega_modes[bios_mode]; 702 else if (color) 703 return M_ENH_C80x25; 704 else 705 return M_EGAMONO80x25; 706 break; 707 708 case KD_CGA: 709 if (bios_mode < sizeof(cga_modes)/sizeof(cga_modes[0])) 710 return cga_modes[bios_mode]; 711 else 712 return M_C80x25; 713 break; 714 715 case KD_MONO: 716 case KD_HERCULES: 717 return M_EGAMONO80x25; /* XXX: this name is confusing */ 718 719 default: 720 break; 721 } 722 return -1; 723} 724 725/* look up a parameter table entry */ 726static u_char 727*get_mode_param(int mode) 728{ 729#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 730 if (mode >= V_MODE_MAP_SIZE) 731 mode = map_mode_num(mode); 732#endif 733 if ((mode >= 0) && (mode < V_MODE_MAP_SIZE)) 734 return mode_map[mode]; 735 else 736 return NULL; 737} 738 739#ifndef VGA_NO_BIOS 740static void 741fill_adapter_param(int code, video_adapter_t *adp) 742{ 743 static struct { 744 int primary; 745 int secondary; 746 } dcc[] = { 747 { DCC_MONO, DCC_EGA40 /* CGA monitor */ }, 748 { DCC_MONO, DCC_EGA80 /* CGA monitor */ }, 749 { DCC_MONO, DCC_EGA80 /* CGA emulation */ }, 750 { DCC_MONO, DCC_EGA80 }, 751 { DCC_CGA40, DCC_EGAMONO }, 752 { DCC_CGA80, DCC_EGAMONO }, 753 { DCC_EGA40 /* CGA monitor */, DCC_MONO}, 754 { DCC_EGA80 /* CGA monitor */, DCC_MONO}, 755 { DCC_EGA80 /* CGA emulation */,DCC_MONO }, 756 { DCC_EGA80, DCC_MONO }, 757 { DCC_EGAMONO, DCC_CGA40 }, 758 { DCC_EGAMONO, DCC_CGA40 }, 759 }; 760 761 if ((code < 0) || (code >= sizeof(dcc)/sizeof(dcc[0]))) { 762 adp[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO]; 763 adp[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80]; 764 } else { 765 adp[V_ADP_PRIMARY] = adapter_init_value[dcc[code].primary]; 766 adp[V_ADP_SECONDARY] = adapter_init_value[dcc[code].secondary]; 767 } 768} 769#endif /* VGA_NO_BIOS */ 770 771static int 772verify_adapter(video_adapter_t *adp) 773{ 774 vm_offset_t buf; 775 u_int16_t v; 776#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 777 u_int32_t p; 778#endif 779 780 buf = BIOS_PADDRTOVADDR(adp->va_window); 781 v = readw(buf); 782 writew(buf, 0xA55A); 783 if (readw(buf) != 0xA55A) 784 return ENXIO; 785 writew(buf, v); 786 787 switch (adp->va_type) { 788 789 case KD_EGA: 790 outb(adp->va_crtc_addr, 7); 791 if (inb(adp->va_crtc_addr) == 7) { 792 adp->va_type = KD_VGA; 793 adp->va_name = "vga"; 794 adp->va_flags |= V_ADP_STATESAVE | V_ADP_PALETTE; 795 } 796 adp->va_flags |= V_ADP_STATELOAD | V_ADP_BORDER; 797 /* the color adapter may be in the 40x25 mode... XXX */ 798 799#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 800 /* get the BIOS video mode pointer */ 801 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8); 802 p = BIOS_SADDRTOLADDR(p); 803 if (ISMAPPED(p, sizeof(u_int32_t))) { 804 p = *(u_int32_t *)BIOS_PADDRTOVADDR(p); 805 p = BIOS_SADDRTOLADDR(p); 806 if (ISMAPPED(p, V_MODE_PARAM_SIZE)) 807 video_mode_ptr = (u_char *)BIOS_PADDRTOVADDR(p); 808 } 809#endif 810 break; 811 812 case KD_CGA: 813 adp->va_flags |= V_ADP_COLOR | V_ADP_BORDER; 814 /* may be in the 40x25 mode... XXX */ 815#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 816 /* get the BIOS video mode pointer */ 817 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4); 818 p = BIOS_SADDRTOLADDR(p); 819 video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p); 820#endif 821 break; 822 823 case KD_MONO: 824#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 825 /* get the BIOS video mode pointer */ 826 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4); 827 p = BIOS_SADDRTOLADDR(p); 828 video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p); 829#endif 830 break; 831 } 832 833 return 0; 834} 835 836static void 837update_adapter_info(video_adapter_t *adp, video_info_t *info) 838{ 839 adp->va_flags &= ~V_ADP_COLOR; 840 adp->va_flags |= 841 (info->vi_flags & V_INFO_COLOR) ? V_ADP_COLOR : 0; 842 adp->va_crtc_addr = 843 (adp->va_flags & V_ADP_COLOR) ? COLOR_CRTC : MONO_CRTC; 844 adp->va_window = BIOS_PADDRTOVADDR(info->vi_window); 845 adp->va_window_size = info->vi_window_size; 846 adp->va_window_gran = info->vi_window_gran; 847 adp->va_window_orig = 0; 848 /* XXX */ 849 adp->va_buffer = info->vi_buffer; 850 adp->va_buffer_size = info->vi_buffer_size; 851 if (info->vi_flags & V_INFO_GRAPHICS) { 852 switch (info->vi_depth/info->vi_planes) { 853 case 1: 854 adp->va_line_width = info->vi_width/8; 855 break; 856 case 2: 857 adp->va_line_width = info->vi_width/4; 858 break; 859 case 4: 860 adp->va_line_width = info->vi_width/2; 861 break; 862 case 8: 863 default: /* shouldn't happen */ 864 adp->va_line_width = info->vi_width; 865 break; 866 } 867 } else { 868 adp->va_line_width = info->vi_width; 869 } 870 adp->va_disp_start.x = 0; 871 adp->va_disp_start.y = 0; 872 bcopy(info, &adp->va_info, sizeof(adp->va_info)); 873} 874 875#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 876/* compare two parameter table entries */ 877static int 878comp_adpregs(u_char *buf1, u_char *buf2) 879{ 880 static struct { 881 u_char mask; 882 } params[V_MODE_PARAM_SIZE] = { 883 {0xff}, {0x00}, {0xff}, /* COLS}, ROWS}, POINTS */ 884 {0x00}, {0x00}, /* page length */ 885 {0xfe}, {0xff}, {0xff}, {0xff}, /* sequencer registers */ 886 {0xf3}, /* misc register */ 887 {0xff}, {0xff}, {0xff}, {0x7f}, {0xff}, /* CRTC */ 888 {0xff}, {0xff}, {0xff}, {0x7f}, {0xff}, 889 {0x00}, {0x00}, {0x00}, {0x00}, {0x00}, 890 {0x00}, {0xff}, {0x7f}, {0xff}, {0xff}, 891 {0x7f}, {0xff}, {0xff}, {0xef}, {0xff}, 892 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, /* attribute controller regs */ 893 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, 894 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, 895 {0xff}, {0xff}, {0xff}, {0xff}, {0xf0}, 896 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, /* GDC register */ 897 {0xff}, {0xff}, {0xff}, {0xff}, 898 }; 899 int identical = TRUE; 900 int i; 901 902 if ((buf1 == NULL) || (buf2 == NULL)) 903 return COMP_DIFFERENT; 904 905 for (i = 0; i < sizeof(params)/sizeof(params[0]); ++i) { 906 if (params[i].mask == 0) /* don't care */ 907 continue; 908 if ((buf1[i] & params[i].mask) != (buf2[i] & params[i].mask)) 909 return COMP_DIFFERENT; 910 if (buf1[i] != buf2[i]) 911 identical = FALSE; 912 } 913 return (identical) ? COMP_IDENTICAL : COMP_SIMILAR; 914} 915#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 916 917/* probe video adapters and return the number of detected adapters */ 918static int 919probe_adapters(void) 920{ 921 video_adapter_t *adp; 922 video_info_t info; 923#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 924 u_char *mp; 925#endif 926 int i; 927 928 /* do this test only once */ 929 if (vga_init_done) 930 return biosadapters; 931 vga_init_done = TRUE; 932 933 /* 934 * Locate display adapters. 935 * The AT architecture supports upto two adapters. `syscons' allows 936 * the following combinations of adapters: 937 * 1) MDA + CGA 938 * 2) MDA + EGA/VGA color 939 * 3) CGA + EGA/VGA mono 940 * Note that `syscons' doesn't bother with MCGA as it is only 941 * avaiable for low end PS/2 models which has 80286 or earlier CPUs, 942 * thus, they are not running FreeBSD! 943 * When there are two adapaters in the system, one becomes `primary' 944 * and the other `secondary'. The EGA adapter has a set of DIP 945 * switches on board for this information and the EGA BIOS copies 946 * it in the BIOS data area BIOSDATA_VIDEOSWITCH (40:88). 947 * The VGA BIOS has more sophisticated mechanism and has this 948 * information in BIOSDATA_DCCINDEX (40:8a), but it also maintains 949 * compatibility with the EGA BIOS by updating BIOSDATA_VIDEOSWITCH. 950 */ 951 952 /* 953 * Check rtc and BIOS data area. 954 * XXX: we don't use BIOSDATA_EQUIPMENT, since it is not a dead 955 * copy of RTC_EQUIPMENT. Bits 4 and 5 of ETC_EQUIPMENT are 956 * zeros for EGA and VGA. However, the EGA/VGA BIOS sets 957 * these bits in BIOSDATA_EQUIPMENT according to the monitor 958 * type detected. 959 */ 960#ifndef VGA_NO_BIOS 961 switch ((rtcin(RTC_EQUIPMENT) >> 4) & 3) { /* bit 4 and 5 */ 962 case 0: 963 /* EGA/VGA */ 964 fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f, 965 biosadapter); 966 break; 967 case 1: 968 /* CGA 40x25 */ 969 /* FIXME: switch to the 80x25 mode? XXX */ 970 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA40]; 971 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 972 break; 973 case 2: 974 /* CGA 80x25 */ 975 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA80]; 976 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 977 break; 978 case 3: 979 /* MDA */ 980 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO]; 981 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80]; 982 break; 983 } 984#else 985 /* assume EGA/VGA? XXX */ 986 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_EGA80]; 987 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 988#endif /* VGA_NO_BIOS */ 989 990 biosadapters = 0; 991 if (verify_adapter(&biosadapter[V_ADP_SECONDARY]) == 0) { 992 ++biosadapters; 993 biosadapter[V_ADP_SECONDARY].va_flags |= V_ADP_PROBED; 994 biosadapter[V_ADP_SECONDARY].va_mode = 995 biosadapter[V_ADP_SECONDARY].va_initial_mode = 996 map_bios_mode_num(biosadapter[V_ADP_SECONDARY].va_type, 997 biosadapter[V_ADP_SECONDARY].va_flags 998 & V_ADP_COLOR, 999 biosadapter[V_ADP_SECONDARY].va_initial_bios_mode); 1000 } else { 1001 biosadapter[V_ADP_SECONDARY].va_type = -1; 1002 } 1003 if (verify_adapter(&biosadapter[V_ADP_PRIMARY]) == 0) { 1004 ++biosadapters; 1005 biosadapter[V_ADP_PRIMARY].va_flags |= V_ADP_PROBED; 1006#ifndef VGA_NO_BIOS 1007 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode = 1008 readb(BIOS_PADDRTOVADDR(0x449)); 1009#else 1010 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode = 3; /* XXX */ 1011#endif 1012 biosadapter[V_ADP_PRIMARY].va_mode = 1013 biosadapter[V_ADP_PRIMARY].va_initial_mode = 1014 map_bios_mode_num(biosadapter[V_ADP_PRIMARY].va_type, 1015 biosadapter[V_ADP_PRIMARY].va_flags & V_ADP_COLOR, 1016 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode); 1017 } else { 1018 biosadapter[V_ADP_PRIMARY] = biosadapter[V_ADP_SECONDARY]; 1019 biosadapter[V_ADP_SECONDARY].va_type = -1; 1020 } 1021 if (biosadapters == 0) 1022 return biosadapters; 1023 biosadapter[V_ADP_PRIMARY].va_unit = V_ADP_PRIMARY; 1024 biosadapter[V_ADP_SECONDARY].va_unit = V_ADP_SECONDARY; 1025 1026#if 0 /* we don't need these... */ 1027 fb_init_struct(&biosadapter[V_ADP_PRIMARY], ...); 1028 fb_init_struct(&biosadapter[V_ADP_SECONDARY], ...); 1029#endif 1030 1031#if notyet 1032 /* 1033 * We cannot have two video adapter of the same type; there must be 1034 * only one of color or mono adapter, or one each of them. 1035 */ 1036 if (biosadapters > 1) { 1037 if (!((biosadapter[0].va_flags ^ biosadapter[1].va_flags) 1038 & V_ADP_COLOR)) 1039 /* we have two mono or color adapters!! */ 1040 return (biosadapters = 0); 1041 } 1042#endif 1043 1044 /* 1045 * Ensure a zero start address. This is mainly to recover after 1046 * switching from pcvt using userconfig(). The registers are w/o 1047 * for old hardware so it's too hard to relocate the active screen 1048 * memory. 1049 * This must be done before vga_save_state() for VGA. 1050 */ 1051 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 12); 1052 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0); 1053 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 13); 1054 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0); 1055 1056 /* the video mode parameter table in EGA/VGA BIOS */ 1057 /* NOTE: there can be only one EGA/VGA, wheather color or mono, 1058 * recognized by the video BIOS. 1059 */ 1060 if ((biosadapter[V_ADP_PRIMARY].va_type == KD_EGA) || 1061 (biosadapter[V_ADP_PRIMARY].va_type == KD_VGA)) { 1062 adp = &biosadapter[V_ADP_PRIMARY]; 1063 } else if ((biosadapter[V_ADP_SECONDARY].va_type == KD_EGA) || 1064 (biosadapter[V_ADP_SECONDARY].va_type == KD_VGA)) { 1065 adp = &biosadapter[V_ADP_SECONDARY]; 1066 } else { 1067 adp = NULL; 1068 } 1069 bzero(mode_map, sizeof(mode_map)); 1070 if (adp != NULL) { 1071 if (adp->va_type == KD_VGA) { 1072 vga_save_state(adp, &adpstate, sizeof(adpstate)); 1073#if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE) 1074 mode_map[adp->va_initial_mode] = adpstate.regs; 1075 rows_offset = 1; 1076#else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1077 if (video_mode_ptr == NULL) { 1078 mode_map[adp->va_initial_mode] = adpstate.regs; 1079 rows_offset = 1; 1080 } else { 1081 /* discard the table if we are not familiar with it... */ 1082 map_mode_table(mode_map, video_mode_ptr, M_VGA_CG320 + 1); 1083 mp = get_mode_param(adp->va_initial_mode); 1084 if (mp != NULL) 1085 bcopy(mp, adpstate2.regs, sizeof(adpstate2.regs)); 1086 switch (comp_adpregs(adpstate.regs, mp)) { 1087 case COMP_IDENTICAL: 1088 /* 1089 * OK, this parameter table looks reasonably familiar 1090 * to us... 1091 */ 1092 /* 1093 * This is a kludge for Toshiba DynaBook SS433 1094 * whose BIOS video mode table entry has the actual # 1095 * of rows at the offset 1; BIOSes from other 1096 * manufacturers store the # of rows - 1 there. XXX 1097 */ 1098 rows_offset = adpstate.regs[1] + 1 - mp[1]; 1099 break; 1100 1101 case COMP_SIMILAR: 1102 /* 1103 * Not exactly the same, but similar enough to be 1104 * trusted. However, use the saved register values 1105 * for the initial mode and other modes which are 1106 * based on the initial mode. 1107 */ 1108 mode_map[adp->va_initial_mode] = adpstate.regs; 1109 rows_offset = adpstate.regs[1] + 1 - mp[1]; 1110 adpstate.regs[1] -= rows_offset - 1; 1111 break; 1112 1113 case COMP_DIFFERENT: 1114 default: 1115 /* 1116 * Don't use the paramter table in BIOS. It doesn't 1117 * look familiar to us. Video mode switching is allowed 1118 * only if the new mode is the same as or based on 1119 * the initial mode. 1120 */ 1121 video_mode_ptr = NULL; 1122 bzero(mode_map, sizeof(mode_map)); 1123 mode_map[adp->va_initial_mode] = adpstate.regs; 1124 rows_offset = 1; 1125 break; 1126 } 1127 } 1128#endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1129 1130#ifndef VGA_NO_MODE_CHANGE 1131 adp->va_flags |= V_ADP_MODECHANGE; 1132#endif 1133#ifndef VGA_NO_FONT_LOADING 1134 adp->va_flags |= V_ADP_FONT; 1135#endif 1136 } else if (adp->va_type == KD_EGA) { 1137#if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE) 1138 rows_offset = 1; 1139#else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1140 if (video_mode_ptr == NULL) { 1141 rows_offset = 1; 1142 } else { 1143 map_mode_table(mode_map, video_mode_ptr, M_ENH_C80x25 + 1); 1144 /* XXX how can one validate the EGA table... */ 1145 mp = get_mode_param(adp->va_initial_mode); 1146 if (mp != NULL) { 1147 adp->va_flags |= V_ADP_MODECHANGE; 1148#ifndef VGA_NO_FONT_LOADING 1149 adp->va_flags |= V_ADP_FONT; 1150#endif 1151 rows_offset = 1; 1152 } else { 1153 /* 1154 * This is serious. We will not be able to switch video 1155 * modes at all... 1156 */ 1157 video_mode_ptr = NULL; 1158 bzero(mode_map, sizeof(mode_map)); 1159 rows_offset = 1; 1160 } 1161 } 1162#endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1163 } 1164 } 1165 1166 /* remove conflicting modes if we have more than one adapter */ 1167 if (biosadapters > 1) { 1168 for (i = 0; i < biosadapters; ++i) { 1169 if (!(biosadapter[i].va_flags & V_ADP_MODECHANGE)) 1170 continue; 1171 clear_mode_map(&biosadapter[i], mode_map, M_VGA_CG320 + 1, 1172 (biosadapter[i].va_flags & V_ADP_COLOR) ? 1173 V_INFO_COLOR : 0); 1174 if ((biosadapter[i].va_type == KD_VGA) 1175 || (biosadapter[i].va_type == KD_EGA)) { 1176 biosadapter[i].va_io_base = 1177 (biosadapter[i].va_flags & V_ADP_COLOR) ? 1178 IO_VGA : IO_MDA; 1179 biosadapter[i].va_io_size = 32; 1180 } 1181 } 1182 } 1183 1184 /* buffer address */ 1185 vga_get_info(&biosadapter[V_ADP_PRIMARY], 1186 biosadapter[V_ADP_PRIMARY].va_initial_mode, &info); 1187 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1188 update_adapter_info(&biosadapter[V_ADP_PRIMARY], &info); 1189 1190 if (biosadapters > 1) { 1191 vga_get_info(&biosadapter[V_ADP_SECONDARY], 1192 biosadapter[V_ADP_SECONDARY].va_initial_mode, &info); 1193 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1194 update_adapter_info(&biosadapter[V_ADP_SECONDARY], &info); 1195 } 1196 1197 /* 1198 * XXX: we should verify the following values for the primary adapter... 1199 * crtc I/O port address: *(u_int16_t *)BIOS_PADDRTOVADDR(0x463); 1200 * color/mono display: (*(u_int8_t *)BIOS_PADDRTOVADDR(0x487) & 0x02) 1201 * ? 0 : V_ADP_COLOR; 1202 * columns: *(u_int8_t *)BIOS_PADDRTOVADDR(0x44a); 1203 * rows: *(u_int8_t *)BIOS_PADDRTOVADDR(0x484); 1204 * font size: *(u_int8_t *)BIOS_PADDRTOVADDR(0x485); 1205 * buffer size: *(u_int16_t *)BIOS_PADDRTOVADDR(0x44c); 1206 */ 1207 1208 return biosadapters; 1209} 1210 1211/* set the scan line length in pixel */ 1212static int 1213set_line_length(video_adapter_t *adp, int pixel) 1214{ 1215 u_char *mp; 1216 int ppw; /* pixels per word */ 1217 int bpl; /* bytes per line */ 1218 int count; 1219 1220 if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA)) 1221 return ENODEV; 1222 mp = get_mode_param(adp->va_mode); 1223 if (mp == NULL) 1224 return EINVAL; 1225 1226 switch (adp->va_info.vi_mem_model) { 1227 case V_INFO_MM_PLANAR: 1228 ppw = 16/(adp->va_info.vi_depth/adp->va_info.vi_planes); 1229 count = (pixel + ppw - 1)/ppw/2; 1230 bpl = ((pixel + ppw - 1)/ppw/2)*4; 1231 break; 1232 case V_INFO_MM_PACKED: 1233 count = (pixel + 7)/8; 1234 bpl = ((pixel + 7)/8)*8; 1235 break; 1236 case V_INFO_MM_TEXT: 1237 count = (pixel + 7)/8; /* columns */ 1238 bpl = (pixel + 7)/8; /* columns */ 1239 break; 1240 default: 1241 return ENODEV; 1242 } 1243 1244 if (mp[10 + 0x17] & 0x40) /* CRTC mode control reg */ 1245 count *= 2; /* byte mode */ 1246 outb(adp->va_crtc_addr, 0x13); 1247 outb(adp->va_crtc_addr + 1, count); 1248 adp->va_line_width = bpl; 1249 1250 return 0; 1251} 1252 1253static int 1254set_display_start(video_adapter_t *adp, int x, int y) 1255{ 1256 int off; /* byte offset (graphics mode)/word offset (text mode) */ 1257 int poff; /* pixel offset */ 1258 int roff; /* row offset */ 1259 int ppb; /* pixels per byte */ 1260 1261 if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA)) 1262 x &= ~7; 1263 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) { 1264 ppb = 8/(adp->va_info.vi_depth/adp->va_info.vi_planes); 1265 off = y*adp->va_line_width + x/ppb; 1266 roff = 0; 1267 poff = x%ppb; 1268 } else { 1269 if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) { 1270 outb(TSIDX, 1); 1271 if (inb(TSREG) & 1) 1272 ppb = 9; 1273 else 1274 ppb = 8; 1275 } else { 1276 ppb = 8; 1277 } 1278 off = y/adp->va_info.vi_cheight*adp->va_line_width + x/ppb; 1279 roff = y%adp->va_info.vi_cheight; 1280 /* FIXME: is this correct? XXX */ 1281 if (ppb == 8) 1282 poff = x%ppb; 1283 else 1284 poff = (x + 8)%ppb; 1285 } 1286 1287 /* start address */ 1288 outb(adp->va_crtc_addr, 0xc); /* high */ 1289 outb(adp->va_crtc_addr + 1, off >> 8); 1290 outb(adp->va_crtc_addr, 0xd); /* low */ 1291 outb(adp->va_crtc_addr + 1, off & 0xff); 1292 1293 /* horizontal pel pan */ 1294 if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) { 1295 inb(adp->va_crtc_addr + 6); 1296 outb(ATC, 0x13 | 0x20); 1297 outb(ATC, poff); 1298 inb(adp->va_crtc_addr + 6); 1299 outb(ATC, 0x20); 1300 } 1301 1302 /* preset raw scan */ 1303 outb(adp->va_crtc_addr, 8); 1304 outb(adp->va_crtc_addr + 1, roff); 1305 1306 adp->va_disp_start.x = x; 1307 adp->va_disp_start.y = y; 1308 return 0; 1309} 1310 1311#ifdef __i386__ /* XXX */ 1312static void 1313fill(int val, void *d, size_t size) 1314{ 1315 u_char *p = d; 1316 1317 while (size-- > 0) 1318 *p++ = val; 1319} 1320#endif /* __i386__ */ 1321 1322static void 1323filll_io(int val, vm_offset_t d, size_t size) 1324{ 1325 while (size-- > 0) { 1326 writel(d, val); 1327 d += sizeof(u_int32_t); 1328 } 1329} 1330 1331/* entry points */ 1332 1333static int 1334vga_nop(void) 1335{ 1336 return 0; 1337} 1338 1339static int 1340vga_error(void) 1341{ 1342 return ENODEV; 1343} 1344 1345static int 1346vga_probe(int unit, video_adapter_t **adpp, void *arg, int flags) 1347{ 1348 probe_adapters(); 1349 if (unit >= biosadapters) 1350 return ENXIO; 1351 1352 *adpp = &biosadapter[unit]; 1353 1354 return 0; 1355} 1356 1357static int 1358vga_init(int unit, video_adapter_t *adp, int flags) 1359{ 1360 if ((unit >= biosadapters) || (adp == NULL) || !probe_done(adp)) 1361 return ENXIO; 1362 1363 if (!init_done(adp)) { 1364 /* nothing to do really... */ 1365 adp->va_flags |= V_ADP_INITIALIZED; 1366 } 1367 1368 if (!config_done(adp)) { 1369 if (vid_register(adp) < 0) 1370 return ENXIO; 1371 adp->va_flags |= V_ADP_REGISTERED; 1372 } 1373 if (vga_sub_configure != NULL) 1374 (*vga_sub_configure)(0); 1375 1376 return 0; 1377} 1378 1379/* 1380 * get_info(): 1381 * Return the video_info structure of the requested video mode. 1382 * 1383 * all adapters 1384 */ 1385static int 1386vga_get_info(video_adapter_t *adp, int mode, video_info_t *info) 1387{ 1388 int i; 1389 1390 if (!vga_init_done) 1391 return ENXIO; 1392 1393 mode = map_gen_mode_num(adp->va_type, adp->va_flags & V_ADP_COLOR, mode); 1394#ifndef VGA_NO_MODE_CHANGE 1395 if (adp->va_flags & V_ADP_MODECHANGE) { 1396 /* 1397 * If the parameter table entry for this mode is not found, 1398 * the mode is not supported... 1399 */ 1400 if (get_mode_param(mode) == NULL) 1401 return EINVAL; 1402 } else 1403#endif /* VGA_NO_MODE_CHANGE */ 1404 { 1405 /* 1406 * Even if we don't support video mode switching on this adapter, 1407 * the information on the initial (thus current) video mode 1408 * should be made available. 1409 */ 1410 if (mode != adp->va_initial_mode) 1411 return EINVAL; 1412 } 1413 1414 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 1415 if (bios_vmode[i].vi_mode == NA) 1416 continue; 1417 if (mode == bios_vmode[i].vi_mode) { 1418 *info = bios_vmode[i]; 1419 /* XXX */ 1420 info->vi_buffer_size = info->vi_window_size*info->vi_planes; 1421 return 0; 1422 } 1423 } 1424 return EINVAL; 1425} 1426 1427/* 1428 * query_mode(): 1429 * Find a video mode matching the requested parameters. 1430 * Fields filled with 0 are considered "don't care" fields and 1431 * match any modes. 1432 * 1433 * all adapters 1434 */ 1435static int 1436vga_query_mode(video_adapter_t *adp, video_info_t *info) 1437{ 1438 video_info_t buf; 1439 int i; 1440 1441 if (!vga_init_done) 1442 return -1; 1443 1444 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 1445 if (bios_vmode[i].vi_mode == NA) 1446 continue; 1447 1448 if ((info->vi_width != 0) 1449 && (info->vi_width != bios_vmode[i].vi_width)) 1450 continue; 1451 if ((info->vi_height != 0) 1452 && (info->vi_height != bios_vmode[i].vi_height)) 1453 continue; 1454 if ((info->vi_cwidth != 0) 1455 && (info->vi_cwidth != bios_vmode[i].vi_cwidth)) 1456 continue; 1457 if ((info->vi_cheight != 0) 1458 && (info->vi_cheight != bios_vmode[i].vi_cheight)) 1459 continue; 1460 if ((info->vi_depth != 0) 1461 && (info->vi_depth != bios_vmode[i].vi_depth)) 1462 continue; 1463 if ((info->vi_planes != 0) 1464 && (info->vi_planes != bios_vmode[i].vi_planes)) 1465 continue; 1466 /* XXX: should check pixel format, memory model */ 1467 if ((info->vi_flags != 0) 1468 && (info->vi_flags != bios_vmode[i].vi_flags)) 1469 continue; 1470 1471 /* verify if this mode is supported on this adapter */ 1472 if (vga_get_info(adp, bios_vmode[i].vi_mode, &buf)) 1473 continue; 1474 return bios_vmode[i].vi_mode; 1475 } 1476 return -1; 1477} 1478 1479/* 1480 * set_mode(): 1481 * Change the video mode. 1482 * 1483 * EGA/VGA 1484 */ 1485 1486#ifndef VGA_NO_MODE_CHANGE 1487#ifdef VGA_WIDTH90 1488static void 1489set_width90(adp_state_t *params) 1490{ 1491 /* 1492 * Based on code submitted by Kelly Yancey (kbyanc@freedomnet.com) 1493 * and alexv@sui.gda.itesm.mx. 1494 */ 1495 params->regs[5] |= 1; /* toggle 8 pixel wide fonts */ 1496 params->regs[10+0x0] = 0x6b; 1497 params->regs[10+0x1] = 0x59; 1498 params->regs[10+0x2] = 0x5a; 1499 params->regs[10+0x3] = 0x8e; 1500 params->regs[10+0x4] = 0x5e; 1501 params->regs[10+0x5] = 0x8a; 1502 params->regs[10+0x13] = 45; 1503 params->regs[35+0x13] = 0; 1504} 1505#endif /* VGA_WIDTH90 */ 1506#endif /* !VGA_NO_MODE_CHANGE */ 1507 1508static int 1509vga_set_mode(video_adapter_t *adp, int mode) 1510{ 1511#ifndef VGA_NO_MODE_CHANGE 1512 video_info_t info; 1513 adp_state_t params; 1514 1515 prologue(adp, V_ADP_MODECHANGE, ENODEV); 1516 1517 mode = map_gen_mode_num(adp->va_type, 1518 adp->va_flags & V_ADP_COLOR, mode); 1519 if (vga_get_info(adp, mode, &info)) 1520 return EINVAL; 1521 1522#if VGA_DEBUG > 1 1523 printf("vga_set_mode(): setting mode %d\n", mode); 1524#endif 1525 1526 params.sig = V_STATE_SIG; 1527 bcopy(get_mode_param(mode), params.regs, sizeof(params.regs)); 1528 1529 switch (mode) { 1530#ifdef VGA_WIDTH90 1531 case M_VGA_C90x60: case M_VGA_M90x60: 1532 set_width90(¶ms); 1533 /* FALL THROUGH */ 1534#endif 1535 case M_VGA_C80x60: case M_VGA_M80x60: 1536 params.regs[2] = 0x08; 1537 params.regs[19] = 0x47; 1538 goto special_480l; 1539 1540#ifdef VGA_WIDTH90 1541 case M_VGA_C90x30: case M_VGA_M90x30: 1542 set_width90(¶ms); 1543 /* FALL THROUGH */ 1544#endif 1545 case M_VGA_C80x30: case M_VGA_M80x30: 1546 params.regs[19] = 0x4f; 1547special_480l: 1548 params.regs[9] |= 0xc0; 1549 params.regs[16] = 0x08; 1550 params.regs[17] = 0x3e; 1551 params.regs[26] = 0xea; 1552 params.regs[28] = 0xdf; 1553 params.regs[31] = 0xe7; 1554 params.regs[32] = 0x04; 1555 goto setup_mode; 1556 1557#ifdef VGA_WIDTH90 1558 case M_VGA_C90x43: case M_VGA_M90x43: 1559 set_width90(¶ms); 1560 /* FALL THROUGH */ 1561#endif 1562 case M_ENH_C80x43: case M_ENH_B80x43: 1563 params.regs[28] = 87; 1564 goto special_80x50; 1565 1566#ifdef VGA_WIDTH90 1567 case M_VGA_C90x50: case M_VGA_M90x50: 1568 set_width90(¶ms); 1569 /* FALL THROUGH */ 1570#endif 1571 case M_VGA_C80x50: case M_VGA_M80x50: 1572special_80x50: 1573 params.regs[2] = 8; 1574 params.regs[19] = 7; 1575 goto setup_mode; 1576 1577#ifdef VGA_WIDTH90 1578 case M_VGA_C90x25: case M_VGA_M90x25: 1579 set_width90(¶ms); 1580 /* FALL THROUGH */ 1581#endif 1582 case M_VGA_C40x25: case M_VGA_C80x25: 1583 case M_VGA_M80x25: 1584 case M_B40x25: case M_C40x25: 1585 case M_B80x25: case M_C80x25: 1586 case M_ENH_B40x25: case M_ENH_C40x25: 1587 case M_ENH_B80x25: case M_ENH_C80x25: 1588 case M_EGAMONO80x25: 1589 1590setup_mode: 1591 vga_load_state(adp, ¶ms); 1592 break; 1593 1594 case M_VGA_MODEX: 1595 /* "unchain" the VGA mode */ 1596 params.regs[5-1+0x04] &= 0xf7; 1597 params.regs[5-1+0x04] |= 0x04; 1598 /* turn off doubleword mode */ 1599 params.regs[10+0x14] &= 0xbf; 1600 /* turn off word adressing */ 1601 params.regs[10+0x17] |= 0x40; 1602 /* set logical screen width */ 1603 params.regs[10+0x13] = 80; 1604 /* set 240 lines */ 1605 params.regs[10+0x11] = 0x2c; 1606 params.regs[10+0x06] = 0x0d; 1607 params.regs[10+0x07] = 0x3e; 1608 params.regs[10+0x10] = 0xea; 1609 params.regs[10+0x11] = 0xac; 1610 params.regs[10+0x12] = 0xdf; 1611 params.regs[10+0x15] = 0xe7; 1612 params.regs[10+0x16] = 0x06; 1613 /* set vertical sync polarity to reflect aspect ratio */ 1614 params.regs[9] = 0xe3; 1615 goto setup_grmode; 1616 1617 case M_BG320: case M_CG320: case M_BG640: 1618 case M_CG320_D: case M_CG640_E: 1619 case M_CG640x350: case M_ENH_CG640: 1620 case M_BG640x480: case M_CG640x480: case M_VGA_CG320: 1621 1622setup_grmode: 1623 vga_load_state(adp, ¶ms); 1624 break; 1625 1626 default: 1627 return EINVAL; 1628 } 1629 1630 adp->va_mode = mode; 1631 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1632 update_adapter_info(adp, &info); 1633 1634 /* move hardware cursor out of the way */ 1635 (*vidsw[adp->va_index]->set_hw_cursor)(adp, -1, -1); 1636 1637 return 0; 1638#else /* VGA_NO_MODE_CHANGE */ 1639 return ENODEV; 1640#endif /* VGA_NO_MODE_CHANGE */ 1641} 1642 1643#ifndef VGA_NO_FONT_LOADING 1644 1645static void 1646set_font_mode(video_adapter_t *adp, u_char *buf) 1647{ 1648 u_char *mp; 1649 int s; 1650 1651 s = splhigh(); 1652 1653 /* save register values */ 1654 if (adp->va_type == KD_VGA) { 1655 outb(TSIDX, 0x02); buf[0] = inb(TSREG); 1656 outb(TSIDX, 0x04); buf[1] = inb(TSREG); 1657 outb(GDCIDX, 0x04); buf[2] = inb(GDCREG); 1658 outb(GDCIDX, 0x05); buf[3] = inb(GDCREG); 1659 outb(GDCIDX, 0x06); buf[4] = inb(GDCREG); 1660 inb(adp->va_crtc_addr + 6); 1661 outb(ATC, 0x10); buf[5] = inb(ATC + 1); 1662 } else /* if (adp->va_type == KD_EGA) */ { 1663 /* 1664 * EGA cannot be read; copy parameters from the mode parameter 1665 * table. 1666 */ 1667 mp = get_mode_param(adp->va_mode); 1668 buf[0] = mp[5 + 0x02 - 1]; 1669 buf[1] = mp[5 + 0x04 - 1]; 1670 buf[2] = mp[55 + 0x04]; 1671 buf[3] = mp[55 + 0x05]; 1672 buf[4] = mp[55 + 0x06]; 1673 buf[5] = mp[35 + 0x10]; 1674 } 1675 1676 /* setup vga for loading fonts */ 1677 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1678 outb(ATC, 0x10); outb(ATC, buf[5] & ~0x01); 1679 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1680 outb(ATC, 0x20); /* enable palette */ 1681 1682#if VGA_SLOW_IOACCESS 1683#ifdef VGA_ALT_SEQACCESS 1684 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1685#endif 1686 outb(TSIDX, 0x02); outb(TSREG, 0x04); 1687 outb(TSIDX, 0x04); outb(TSREG, 0x07); 1688#ifdef VGA_ALT_SEQACCESS 1689 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1690#endif 1691 outb(GDCIDX, 0x04); outb(GDCREG, 0x02); 1692 outb(GDCIDX, 0x05); outb(GDCREG, 0x00); 1693 outb(GDCIDX, 0x06); outb(GDCREG, 0x04); 1694#else /* VGA_SLOW_IOACCESS */ 1695#ifdef VGA_ALT_SEQACCESS 1696 outw(TSIDX, 0x0100); 1697#endif 1698 outw(TSIDX, 0x0402); 1699 outw(TSIDX, 0x0704); 1700#ifdef VGA_ALT_SEQACCESS 1701 outw(TSIDX, 0x0300); 1702#endif 1703 outw(GDCIDX, 0x0204); 1704 outw(GDCIDX, 0x0005); 1705 outw(GDCIDX, 0x0406); /* addr = a0000, 64kb */ 1706#endif /* VGA_SLOW_IOACCESS */ 1707 1708 splx(s); 1709} 1710 1711static void 1712set_normal_mode(video_adapter_t *adp, u_char *buf) 1713{ 1714 int s; 1715 1716 s = splhigh(); 1717 1718 /* setup vga for normal operation mode again */ 1719 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1720 outb(ATC, 0x10); outb(ATC, buf[5]); 1721 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1722 outb(ATC, 0x20); /* enable palette */ 1723 1724#if VGA_SLOW_IOACCESS 1725#ifdef VGA_ALT_SEQACCESS 1726 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1727#endif 1728 outb(TSIDX, 0x02); outb(TSREG, buf[0]); 1729 outb(TSIDX, 0x04); outb(TSREG, buf[1]); 1730#ifdef VGA_ALT_SEQACCESS 1731 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1732#endif 1733 outb(GDCIDX, 0x04); outb(GDCREG, buf[2]); 1734 outb(GDCIDX, 0x05); outb(GDCREG, buf[3]); 1735 if (adp->va_crtc_addr == MONO_CRTC) { 1736 outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x08); 1737 } else { 1738 outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x0c); 1739 } 1740#else /* VGA_SLOW_IOACCESS */ 1741#ifdef VGA_ALT_SEQACCESS 1742 outw(TSIDX, 0x0100); 1743#endif 1744 outw(TSIDX, 0x0002 | (buf[0] << 8)); 1745 outw(TSIDX, 0x0004 | (buf[1] << 8)); 1746#ifdef VGA_ALT_SEQACCESS 1747 outw(TSIDX, 0x0300); 1748#endif 1749 outw(GDCIDX, 0x0004 | (buf[2] << 8)); 1750 outw(GDCIDX, 0x0005 | (buf[3] << 8)); 1751 if (adp->va_crtc_addr == MONO_CRTC) 1752 outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x08)<<8)); 1753 else 1754 outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x0c)<<8)); 1755#endif /* VGA_SLOW_IOACCESS */ 1756 1757 splx(s); 1758} 1759 1760#endif /* VGA_NO_FONT_LOADING */ 1761 1762/* 1763 * save_font(): 1764 * Read the font data in the requested font page from the video adapter. 1765 * 1766 * EGA/VGA 1767 */ 1768static int 1769vga_save_font(video_adapter_t *adp, int page, int fontsize, u_char *data, 1770 int ch, int count) 1771{ 1772#ifndef VGA_NO_FONT_LOADING 1773 u_char buf[PARAM_BUFSIZE]; 1774 u_int32_t segment; 1775 int c; 1776#ifdef VGA_ALT_SEQACCESS 1777 int s; 1778 u_char val = 0; 1779#endif 1780 1781 prologue(adp, V_ADP_FONT, ENODEV); 1782 1783 if (fontsize < 14) { 1784 /* FONT_8 */ 1785 fontsize = 8; 1786 } else if (fontsize >= 32) { 1787 fontsize = 32; 1788 } else if (fontsize >= 16) { 1789 /* FONT_16 */ 1790 fontsize = 16; 1791 } else { 1792 /* FONT_14 */ 1793 fontsize = 14; 1794 } 1795 1796 if (page < 0 || page >= 8) 1797 return EINVAL; 1798 segment = FONT_BUF + 0x4000*page; 1799 if (page > 3) 1800 segment -= 0xe000; 1801 1802#ifdef VGA_ALT_SEQACCESS 1803 if (adp->va_type == KD_VGA) { /* what about EGA? XXX */ 1804 s = splhigh(); 1805 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1806 outb(TSIDX, 0x01); val = inb(TSREG); /* disable screen */ 1807 outb(TSIDX, 0x01); outb(TSREG, val | 0x20); 1808 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1809 splx(s); 1810 } 1811#endif 1812 1813 set_font_mode(adp, buf); 1814 if (fontsize == 32) { 1815 bcopy_fromio(segment + ch*32, data, fontsize*count); 1816 } else { 1817 for (c = ch; count > 0; ++c, --count) { 1818 bcopy_fromio(segment + c*32, data, fontsize); 1819 data += fontsize; 1820 } 1821 } 1822 set_normal_mode(adp, buf); 1823 1824#ifdef VGA_ALT_SEQACCESS 1825 if (adp->va_type == KD_VGA) { 1826 s = splhigh(); 1827 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1828 outb(TSIDX, 0x01); outb(TSREG, val & 0xdf); /* enable screen */ 1829 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1830 splx(s); 1831 } 1832#endif 1833 1834 return 0; 1835#else /* VGA_NO_FONT_LOADING */ 1836 return ENODEV; 1837#endif /* VGA_NO_FONT_LOADING */ 1838} 1839 1840/* 1841 * load_font(): 1842 * Set the font data in the requested font page. 1843 * NOTE: it appears that some recent video adapters do not support 1844 * the font page other than 0... XXX 1845 * 1846 * EGA/VGA 1847 */ 1848static int 1849vga_load_font(video_adapter_t *adp, int page, int fontsize, u_char *data, 1850 int ch, int count) 1851{ 1852#ifndef VGA_NO_FONT_LOADING 1853 u_char buf[PARAM_BUFSIZE]; 1854 u_int32_t segment; 1855 int c; 1856#ifdef VGA_ALT_SEQACCESS 1857 int s; 1858 u_char val = 0; 1859#endif 1860 1861 prologue(adp, V_ADP_FONT, ENODEV); 1862 1863 if (fontsize < 14) { 1864 /* FONT_8 */ 1865 fontsize = 8; 1866 } else if (fontsize >= 32) { 1867 fontsize = 32; 1868 } else if (fontsize >= 16) { 1869 /* FONT_16 */ 1870 fontsize = 16; 1871 } else { 1872 /* FONT_14 */ 1873 fontsize = 14; 1874 } 1875 1876 if (page < 0 || page >= 8) 1877 return EINVAL; 1878 segment = FONT_BUF + 0x4000*page; 1879 if (page > 3) 1880 segment -= 0xe000; 1881 1882#ifdef VGA_ALT_SEQACCESS 1883 if (adp->va_type == KD_VGA) { /* what about EGA? XXX */ 1884 s = splhigh(); 1885 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1886 outb(TSIDX, 0x01); val = inb(TSREG); /* disable screen */ 1887 outb(TSIDX, 0x01); outb(TSREG, val | 0x20); 1888 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1889 splx(s); 1890 } 1891#endif 1892 1893 set_font_mode(adp, buf); 1894 if (fontsize == 32) { 1895 bcopy_toio(data, segment + ch*32, fontsize*count); 1896 } else { 1897 for (c = ch; count > 0; ++c, --count) { 1898 bcopy_toio(data, segment + c*32, fontsize); 1899 data += fontsize; 1900 } 1901 } 1902 set_normal_mode(adp, buf); 1903 1904#ifdef VGA_ALT_SEQACCESS 1905 if (adp->va_type == KD_VGA) { 1906 s = splhigh(); 1907 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1908 outb(TSIDX, 0x01); outb(TSREG, val & 0xdf); /* enable screen */ 1909 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1910 splx(s); 1911 } 1912#endif 1913 1914 return 0; 1915#else /* VGA_NO_FONT_LOADING */ 1916 return ENODEV; 1917#endif /* VGA_NO_FONT_LOADING */ 1918} 1919 1920/* 1921 * show_font(): 1922 * Activate the requested font page. 1923 * NOTE: it appears that some recent video adapters do not support 1924 * the font page other than 0... XXX 1925 * 1926 * EGA/VGA 1927 */ 1928static int 1929vga_show_font(video_adapter_t *adp, int page) 1930{ 1931#ifndef VGA_NO_FONT_LOADING 1932 static u_char cg[] = { 0x00, 0x05, 0x0a, 0x0f, 0x30, 0x35, 0x3a, 0x3f }; 1933 int s; 1934 1935 prologue(adp, V_ADP_FONT, ENODEV); 1936 if (page < 0 || page >= 8) 1937 return EINVAL; 1938 1939 s = splhigh(); 1940 outb(TSIDX, 0x03); outb(TSREG, cg[page]); 1941 splx(s); 1942 1943 return 0; 1944#else /* VGA_NO_FONT_LOADING */ 1945 return ENODEV; 1946#endif /* VGA_NO_FONT_LOADING */ 1947} 1948 1949/* 1950 * save_palette(): 1951 * Read DAC values. The values have expressed in 8 bits. 1952 * 1953 * VGA 1954 */ 1955static int 1956vga_save_palette(video_adapter_t *adp, u_char *palette) 1957{ 1958 int i; 1959 1960 prologue(adp, V_ADP_PALETTE, ENODEV); 1961 1962 /* 1963 * We store 8 bit values in the palette buffer, while the standard 1964 * VGA has 6 bit DAC . 1965 */ 1966 outb(PALRADR, 0x00); 1967 for (i = 0; i < 256*3; ++i) 1968 palette[i] = inb(PALDATA) << 2; 1969 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 1970 return 0; 1971} 1972 1973static int 1974vga_save_palette2(video_adapter_t *adp, int base, int count, 1975 u_char *r, u_char *g, u_char *b) 1976{ 1977 int i; 1978 1979 prologue(adp, V_ADP_PALETTE, ENODEV); 1980 1981 outb(PALRADR, base); 1982 for (i = 0; i < count; ++i) { 1983 r[i] = inb(PALDATA) << 2; 1984 g[i] = inb(PALDATA) << 2; 1985 b[i] = inb(PALDATA) << 2; 1986 } 1987 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 1988 return 0; 1989} 1990 1991/* 1992 * load_palette(): 1993 * Set DAC values. 1994 * 1995 * VGA 1996 */ 1997static int 1998vga_load_palette(video_adapter_t *adp, u_char *palette) 1999{ 2000 int i; 2001 2002 prologue(adp, V_ADP_PALETTE, ENODEV); 2003 2004 outb(PIXMASK, 0xff); /* no pixelmask */ 2005 outb(PALWADR, 0x00); 2006 for (i = 0; i < 256*3; ++i) 2007 outb(PALDATA, palette[i] >> 2); 2008 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 2009 outb(ATC, 0x20); /* enable palette */ 2010 return 0; 2011} 2012 2013static int 2014vga_load_palette2(video_adapter_t *adp, int base, int count, 2015 u_char *r, u_char *g, u_char *b) 2016{ 2017 int i; 2018 2019 prologue(adp, V_ADP_PALETTE, ENODEV); 2020 2021 outb(PIXMASK, 0xff); /* no pixelmask */ 2022 outb(PALWADR, base); 2023 for (i = 0; i < count; ++i) { 2024 outb(PALDATA, r[i] >> 2); 2025 outb(PALDATA, g[i] >> 2); 2026 outb(PALDATA, b[i] >> 2); 2027 } 2028 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 2029 outb(ATC, 0x20); /* enable palette */ 2030 return 0; 2031} 2032 2033/* 2034 * set_border(): 2035 * Change the border color. 2036 * 2037 * CGA/EGA/VGA 2038 */ 2039static int 2040vga_set_border(video_adapter_t *adp, int color) 2041{ 2042 prologue(adp, V_ADP_BORDER, ENODEV); 2043 2044 switch (adp->va_type) { 2045 case KD_EGA: 2046 case KD_VGA: 2047 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 2048 outb(ATC, 0x31); outb(ATC, color & 0xff); 2049 break; 2050 case KD_CGA: 2051 outb(adp->va_crtc_addr + 5, color & 0x0f); /* color select register */ 2052 break; 2053 case KD_MONO: 2054 case KD_HERCULES: 2055 default: 2056 break; 2057 } 2058 return 0; 2059} 2060 2061/* 2062 * save_state(): 2063 * Read video register values. 2064 * NOTE: this function only reads the standard EGA/VGA registers. 2065 * any extra/extended registers of SVGA adapters are not saved. 2066 * 2067 * VGA 2068 */ 2069static int 2070vga_save_state(video_adapter_t *adp, void *p, size_t size) 2071{ 2072 video_info_t info; 2073 u_char *buf; 2074 int crtc_addr; 2075 int i, j; 2076 int s; 2077 2078 if (size == 0) { 2079 /* return the required buffer size */ 2080 prologue(adp, V_ADP_STATESAVE, 0); 2081 return sizeof(adp_state_t); 2082 } else { 2083 prologue(adp, V_ADP_STATESAVE, ENODEV); 2084 if (size < sizeof(adp_state_t)) 2085 return EINVAL; 2086 } 2087 2088 ((adp_state_t *)p)->sig = V_STATE_SIG; 2089 buf = ((adp_state_t *)p)->regs; 2090 bzero(buf, V_MODE_PARAM_SIZE); 2091 crtc_addr = adp->va_crtc_addr; 2092 2093 s = splhigh(); 2094 2095 outb(TSIDX, 0x00); outb(TSREG, 0x01); /* stop sequencer */ 2096 for (i = 0, j = 5; i < 4; i++) { 2097 outb(TSIDX, i + 1); 2098 buf[j++] = inb(TSREG); 2099 } 2100 buf[9] = inb(MISC + 10); /* dot-clock */ 2101 outb(TSIDX, 0x00); outb(TSREG, 0x03); /* start sequencer */ 2102 2103 for (i = 0, j = 10; i < 25; i++) { /* crtc */ 2104 outb(crtc_addr, i); 2105 buf[j++] = inb(crtc_addr + 1); 2106 } 2107 for (i = 0, j = 35; i < 20; i++) { /* attribute ctrl */ 2108 inb(crtc_addr + 6); /* reset flip-flop */ 2109 outb(ATC, i); 2110 buf[j++] = inb(ATC + 1); 2111 } 2112 for (i = 0, j = 55; i < 9; i++) { /* graph data ctrl */ 2113 outb(GDCIDX, i); 2114 buf[j++] = inb(GDCREG); 2115 } 2116 inb(crtc_addr + 6); /* reset flip-flop */ 2117 outb(ATC, 0x20); /* enable palette */ 2118 2119 splx(s); 2120 2121#if 1 2122 if (vga_get_info(adp, adp->va_mode, &info) == 0) { 2123 if (info.vi_flags & V_INFO_GRAPHICS) { 2124 buf[0] = info.vi_width/info.vi_cwidth; /* COLS */ 2125 buf[1] = info.vi_height/info.vi_cheight - 1; /* ROWS */ 2126 } else { 2127 buf[0] = info.vi_width; /* COLS */ 2128 buf[1] = info.vi_height - 1; /* ROWS */ 2129 } 2130 buf[2] = info.vi_cheight; /* POINTS */ 2131 } else { 2132 /* XXX: shouldn't be happening... */ 2133 printf("vga%d: %s: failed to obtain mode info. (vga_save_state())\n", 2134 adp->va_unit, adp->va_name); 2135 } 2136#else 2137 buf[0] = readb(BIOS_PADDRTOVADDR(0x44a)); /* COLS */ 2138 buf[1] = readb(BIOS_PADDRTOVADDR(0x484)); /* ROWS */ 2139 buf[2] = readb(BIOS_PADDRTOVADDR(0x485)); /* POINTS */ 2140 buf[3] = readb(BIOS_PADDRTOVADDR(0x44c)); 2141 buf[4] = readb(BIOS_PADDRTOVADDR(0x44d)); 2142#endif 2143 2144 return 0; 2145} 2146 2147/* 2148 * load_state(): 2149 * Set video registers at once. 2150 * NOTE: this function only updates the standard EGA/VGA registers. 2151 * any extra/extended registers of SVGA adapters are not changed. 2152 * 2153 * EGA/VGA 2154 */ 2155static int 2156vga_load_state(video_adapter_t *adp, void *p) 2157{ 2158 u_char *buf; 2159 int crtc_addr; 2160 int s; 2161 int i; 2162 2163 prologue(adp, V_ADP_STATELOAD, ENODEV); 2164 if (((adp_state_t *)p)->sig != V_STATE_SIG) 2165 return EINVAL; 2166 2167 buf = ((adp_state_t *)p)->regs; 2168 crtc_addr = adp->va_crtc_addr; 2169 2170#if VGA_DEBUG > 1 2171 dump_buffer(buf, V_MODE_PARAM_SIZE); 2172#endif 2173 2174 s = splhigh(); 2175 2176 outb(TSIDX, 0x00); outb(TSREG, 0x01); /* stop sequencer */ 2177 for (i = 0; i < 4; ++i) { /* program sequencer */ 2178 outb(TSIDX, i + 1); 2179 outb(TSREG, buf[i + 5]); 2180 } 2181 outb(MISC, buf[9]); /* set dot-clock */ 2182 outb(TSIDX, 0x00); outb(TSREG, 0x03); /* start sequencer */ 2183 outb(crtc_addr, 0x11); 2184 outb(crtc_addr + 1, inb(crtc_addr + 1) & 0x7F); 2185 for (i = 0; i < 25; ++i) { /* program crtc */ 2186 outb(crtc_addr, i); 2187 outb(crtc_addr + 1, buf[i + 10]); 2188 } 2189 inb(crtc_addr+6); /* reset flip-flop */ 2190 for (i = 0; i < 20; ++i) { /* program attribute ctrl */ 2191 outb(ATC, i); 2192 outb(ATC, buf[i + 35]); 2193 } 2194 for (i = 0; i < 9; ++i) { /* program graph data ctrl */ 2195 outb(GDCIDX, i); 2196 outb(GDCREG, buf[i + 55]); 2197 } 2198 inb(crtc_addr + 6); /* reset flip-flop */ 2199 outb(ATC, 0x20); /* enable palette */ 2200 2201#if notyet /* a temporary workaround for kernel panic, XXX */ 2202#ifndef VGA_NO_BIOS 2203 if (adp->va_unit == V_ADP_PRIMARY) { 2204 writeb(BIOS_PADDRTOVADDR(0x44a), buf[0]); /* COLS */ 2205 writeb(BIOS_PADDRTOVADDR(0x484), buf[1] + rows_offset - 1); /* ROWS */ 2206 writeb(BIOS_PADDRTOVADDR(0x485), buf[2]); /* POINTS */ 2207#if 0 2208 writeb(BIOS_PADDRTOVADDR(0x44c), buf[3]); 2209 writeb(BIOS_PADDRTOVADDR(0x44d), buf[4]); 2210#endif 2211 } 2212#endif /* VGA_NO_BIOS */ 2213#endif /* notyet */ 2214 2215 splx(s); 2216 return 0; 2217} 2218 2219/* 2220 * set_origin(): 2221 * Change the origin (window mapping) of the banked frame buffer. 2222 */ 2223static int 2224vga_set_origin(video_adapter_t *adp, off_t offset) 2225{ 2226 /* 2227 * The standard video modes do not require window mapping; 2228 * always return error. 2229 */ 2230 return ENODEV; 2231} 2232 2233/* 2234 * read_hw_cursor(): 2235 * Read the position of the hardware text cursor. 2236 * 2237 * all adapters 2238 */ 2239static int 2240vga_read_hw_cursor(video_adapter_t *adp, int *col, int *row) 2241{ 2242 u_int16_t off; 2243 int s; 2244 2245 if (!vga_init_done) 2246 return ENXIO; 2247 2248 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) 2249 return ENODEV; 2250 2251 s = spltty(); 2252 outb(adp->va_crtc_addr, 14); 2253 off = inb(adp->va_crtc_addr + 1); 2254 outb(adp->va_crtc_addr, 15); 2255 off = (off << 8) | inb(adp->va_crtc_addr + 1); 2256 splx(s); 2257 2258 *row = off / adp->va_info.vi_width; 2259 *col = off % adp->va_info.vi_width; 2260 2261 return 0; 2262} 2263 2264/* 2265 * set_hw_cursor(): 2266 * Move the hardware text cursor. If col and row are both -1, 2267 * the cursor won't be shown. 2268 * 2269 * all adapters 2270 */ 2271static int 2272vga_set_hw_cursor(video_adapter_t *adp, int col, int row) 2273{ 2274 u_int16_t off; 2275 int s; 2276 2277 if (!vga_init_done) 2278 return ENXIO; 2279 2280 if ((col == -1) && (row == -1)) { 2281 off = -1; 2282 } else { 2283 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) 2284 return ENODEV; 2285 off = row*adp->va_info.vi_width + col; 2286 } 2287 2288 s = spltty(); 2289 outb(adp->va_crtc_addr, 14); 2290 outb(adp->va_crtc_addr + 1, off >> 8); 2291 outb(adp->va_crtc_addr, 15); 2292 outb(adp->va_crtc_addr + 1, off & 0x00ff); 2293 splx(s); 2294 2295 return 0; 2296} 2297 2298/* 2299 * set_hw_cursor_shape(): 2300 * Change the shape of the hardware text cursor. If the height is 2301 * zero or negative, the cursor won't be shown. 2302 * 2303 * all adapters 2304 */ 2305static int 2306vga_set_hw_cursor_shape(video_adapter_t *adp, int base, int height, 2307 int celsize, int blink) 2308{ 2309 int s; 2310 2311 if (!vga_init_done) 2312 return ENXIO; 2313 2314 s = spltty(); 2315 switch (adp->va_type) { 2316 case KD_VGA: 2317 case KD_CGA: 2318 case KD_MONO: 2319 case KD_HERCULES: 2320 default: 2321 if (height <= 0) { 2322 /* make the cursor invisible */ 2323 outb(adp->va_crtc_addr, 10); 2324 outb(adp->va_crtc_addr + 1, 32); 2325 outb(adp->va_crtc_addr, 11); 2326 outb(adp->va_crtc_addr + 1, 0); 2327 } else { 2328 outb(adp->va_crtc_addr, 10); 2329 outb(adp->va_crtc_addr + 1, celsize - base - height); 2330 outb(adp->va_crtc_addr, 11); 2331 outb(adp->va_crtc_addr + 1, celsize - base - 1); 2332 } 2333 break; 2334 case KD_EGA: 2335 if (height <= 0) { 2336 /* make the cursor invisible */ 2337 outb(adp->va_crtc_addr, 10); 2338 outb(adp->va_crtc_addr + 1, celsize); 2339 outb(adp->va_crtc_addr, 11); 2340 outb(adp->va_crtc_addr + 1, 0); 2341 } else { 2342 outb(adp->va_crtc_addr, 10); 2343 outb(adp->va_crtc_addr + 1, celsize - base - height); 2344 outb(adp->va_crtc_addr, 11); 2345 outb(adp->va_crtc_addr + 1, celsize - base); 2346 } 2347 break; 2348 } 2349 splx(s); 2350 2351 return 0; 2352} 2353 2354/* 2355 * blank_display() 2356 * Put the display in power save/power off mode. 2357 * 2358 * all adapters 2359 */ 2360static int 2361vga_blank_display(video_adapter_t *adp, int mode) 2362{ 2363 u_char val; 2364 int s; 2365 2366 s = splhigh(); 2367 switch (adp->va_type) { 2368 case KD_VGA: 2369 switch (mode) { 2370 case V_DISPLAY_SUSPEND: 2371 case V_DISPLAY_STAND_BY: 2372 outb(TSIDX, 0x01); 2373 val = inb(TSREG); 2374 outb(TSIDX, 0x01); 2375 outb(TSREG, val | 0x20); 2376 outb(adp->va_crtc_addr, 0x17); 2377 val = inb(adp->va_crtc_addr + 1); 2378 outb(adp->va_crtc_addr + 1, val & ~0x80); 2379 break; 2380 case V_DISPLAY_BLANK: 2381 outb(TSIDX, 0x01); 2382 val = inb(TSREG); 2383 outb(TSIDX, 0x01); 2384 outb(TSREG, val | 0x20); 2385 break; 2386 case V_DISPLAY_ON: 2387 outb(TSIDX, 0x01); 2388 val = inb(TSREG); 2389 outb(TSIDX, 0x01); 2390 outb(TSREG, val & 0xDF); 2391 outb(adp->va_crtc_addr, 0x17); 2392 val = inb(adp->va_crtc_addr + 1); 2393 outb(adp->va_crtc_addr + 1, val | 0x80); 2394 break; 2395 } 2396 break; 2397 2398 case KD_EGA: 2399 /* no support yet */ 2400 return ENODEV; 2401 2402 case KD_CGA: 2403 switch (mode) { 2404 case V_DISPLAY_SUSPEND: 2405 case V_DISPLAY_STAND_BY: 2406 case V_DISPLAY_BLANK: 2407 outb(adp->va_crtc_addr + 4, 0x25); 2408 break; 2409 case V_DISPLAY_ON: 2410 outb(adp->va_crtc_addr + 4, 0x2d); 2411 break; 2412 } 2413 break; 2414 2415 case KD_MONO: 2416 case KD_HERCULES: 2417 switch (mode) { 2418 case V_DISPLAY_SUSPEND: 2419 case V_DISPLAY_STAND_BY: 2420 case V_DISPLAY_BLANK: 2421 outb(adp->va_crtc_addr + 4, 0x21); 2422 break; 2423 case V_DISPLAY_ON: 2424 outb(adp->va_crtc_addr + 4, 0x29); 2425 break; 2426 } 2427 break; 2428 default: 2429 break; 2430 } 2431 splx(s); 2432 2433 return 0; 2434} 2435 2436/* 2437 * mmap(): 2438 * Mmap frame buffer. 2439 * 2440 * all adapters 2441 */ 2442static int 2443vga_mmap_buf(video_adapter_t *adp, vm_offset_t offset, int prot) 2444{ 2445 if (adp->va_info.vi_flags & V_INFO_LINEAR) 2446 return -1; 2447 2448#if VGA_DEBUG > 0 2449 printf("vga_mmap_buf(): window:0x%x, offset:0x%x\n", 2450 adp->va_info.vi_window, offset); 2451#endif 2452 2453 /* XXX: is this correct? */ 2454 if (offset > adp->va_window_size - PAGE_SIZE) 2455 return -1; 2456 2457#ifdef __i386__ 2458 return i386_btop(adp->va_info.vi_window + offset); 2459#endif 2460#ifdef __alpha__ 2461 return alpha_btop(adp->va_info.vi_window + offset); 2462#endif 2463} 2464 2465#ifndef VGA_NO_MODE_CHANGE 2466 2467static void 2468planar_fill(video_adapter_t *adp, int val) 2469{ 2470 int length; 2471 int at; /* position in the frame buffer */ 2472 int l; 2473 2474 outw(GDCIDX, 0x0005); /* read mode 0, write mode 0 */ 2475 outw(GDCIDX, 0x0003); /* data rotate/function select */ 2476 outw(GDCIDX, 0x0f01); /* set/reset enable */ 2477 outw(GDCIDX, 0xff08); /* bit mask */ 2478 outw(GDCIDX, (val << 8) | 0x00); /* set/reset */ 2479 at = 0; 2480 length = adp->va_line_width*adp->va_info.vi_height; 2481 while (length > 0) { 2482 l = imin(length, adp->va_window_size); 2483 (*vidsw[adp->va_index]->set_win_org)(adp, at); 2484 bzero_io(adp->va_window, l); 2485 length -= l; 2486 at += l; 2487 } 2488 outw(GDCIDX, 0x0000); /* set/reset */ 2489 outw(GDCIDX, 0x0001); /* set/reset enable */ 2490} 2491 2492static void 2493packed_fill(video_adapter_t *adp, int val) 2494{ 2495 int length; 2496 int at; /* position in the frame buffer */ 2497 int l; 2498 2499 at = 0; 2500 length = adp->va_line_width*adp->va_info.vi_height; 2501 while (length > 0) { 2502 l = imin(length, adp->va_window_size); 2503 (*vidsw[adp->va_index]->set_win_org)(adp, at); 2504 fill_io(val, adp->va_window, l); 2505 length -= l; 2506 at += l; 2507 } 2508} 2509 2510static void 2511direct_fill(video_adapter_t *adp, int val) 2512{ 2513 int length; 2514 int at; /* position in the frame buffer */ 2515 int l; 2516 2517 at = 0; 2518 length = adp->va_line_width*adp->va_info.vi_height; 2519 while (length > 0) { 2520 l = imin(length, adp->va_window_size); 2521 (*vidsw[adp->va_index]->set_win_org)(adp, at); 2522 switch (adp->va_info.vi_pixel_size) { 2523 case sizeof(u_int16_t): 2524 fillw_io(val, adp->va_window, l/sizeof(u_int16_t)); 2525 break; 2526 case 3: 2527 /* FIXME */ 2528 break; 2529 case sizeof(u_int32_t): 2530 filll_io(val, adp->va_window, l/sizeof(u_int32_t)); 2531 break; 2532 } 2533 length -= l; 2534 at += l; 2535 } 2536} 2537 2538static int 2539vga_clear(video_adapter_t *adp) 2540{ 2541 switch (adp->va_info.vi_mem_model) { 2542 case V_INFO_MM_TEXT: 2543 /* do nothing? XXX */ 2544 break; 2545 case V_INFO_MM_PLANAR: 2546 planar_fill(adp, 0); 2547 break; 2548 case V_INFO_MM_PACKED: 2549 packed_fill(adp, 0); 2550 break; 2551 case V_INFO_MM_DIRECT: 2552 direct_fill(adp, 0); 2553 break; 2554 } 2555 return 0; 2556} 2557 2558#ifdef notyet 2559static void 2560planar_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2561{ 2562 int banksize; 2563 int bank; 2564 int pos; 2565 int offset; /* offset within window */ 2566 int bx; 2567 int l; 2568 2569 outw(GDCIDX, 0x0005); /* read mode 0, write mode 0 */ 2570 outw(GDCIDX, 0x0003); /* data rotate/function select */ 2571 outw(GDCIDX, 0x0f01); /* set/reset enable */ 2572 outw(GDCIDX, 0xff08); /* bit mask */ 2573 outw(GDCIDX, (val << 8) | 0x00); /* set/reset */ 2574 2575 banksize = adp->va_window_size; 2576 bank = -1; 2577 while (cy > 0) { 2578 pos = adp->va_line_width*y + x/8; 2579 if (bank != pos/banksize) { 2580 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2581 bank = pos/banksize; 2582 } 2583 offset = pos%banksize; 2584 bx = (x + cx)/8 - x/8; 2585 if (x % 8) { 2586 outw(GDCIDX, ((0xff00 >> (x % 8)) & 0xff00) | 0x08); 2587 writeb(adp->va_window + offset, 0); 2588 ++offset; 2589 --bx; 2590 if (offset >= banksize) { 2591 offset = 0; 2592 ++bank; /* next bank */ 2593 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2594 } 2595 outw(GDCIDX, 0xff08); /* bit mask */ 2596 } 2597 while (bx > 0) { 2598 l = imin(bx, banksize); 2599 bzero_io(adp->va_window + offset, l); 2600 offset += l; 2601 bx -= l; 2602 if (offset >= banksize) { 2603 offset = 0; 2604 ++bank; /* next bank */ 2605 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2606 } 2607 } 2608 if ((x + cx) % 8) { 2609 outw(GDCIDX, (~(0xff00 >> ((x + cx) % 8)) & 0xff00) | 0x08); 2610 writeb(adp->va_window + offset, 0); 2611 ++offset; 2612 if (offset >= banksize) { 2613 offset = 0; 2614 ++bank; /* next bank */ 2615 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2616 } 2617 outw(GDCIDX, 0xff08); /* bit mask */ 2618 } 2619 ++y; 2620 --cy; 2621 } 2622 2623 outw(GDCIDX, 0xff08); /* bit mask */ 2624 outw(GDCIDX, 0x0000); /* set/reset */ 2625 outw(GDCIDX, 0x0001); /* set/reset enable */ 2626} 2627 2628static void 2629packed_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2630{ 2631 int banksize; 2632 int bank; 2633 int pos; 2634 int offset; /* offset within window */ 2635 int end; 2636 2637 banksize = adp->va_window_size; 2638 bank = -1; 2639 cx *= adp->va_info.vi_pixel_size; 2640 while (cy > 0) { 2641 pos = adp->va_line_width*y + x*adp->va_info.vi_pixel_size; 2642 if (bank != pos/banksize) { 2643 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2644 bank = pos/banksize; 2645 } 2646 offset = pos%banksize; 2647 end = imin(offset + cx, banksize); 2648 fill_io(val, adp->va_window + offset, 2649 (end - offset)/adp->va_info.vi_pixel_size); 2650 /* the line may cross the window boundary */ 2651 if (offset + cx > banksize) { 2652 ++bank; /* next bank */ 2653 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2654 end = offset + cx - banksize; 2655 fill_io(val, adp->va_window, end/adp->va_info.vi_pixel_size); 2656 } 2657 ++y; 2658 --cy; 2659 } 2660} 2661 2662static void 2663direct_fill_rect16(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2664{ 2665 int banksize; 2666 int bank; 2667 int pos; 2668 int offset; /* offset within window */ 2669 int end; 2670 2671 /* 2672 * XXX: the function assumes that banksize is a muliple of 2673 * sizeof(u_int16_t). 2674 */ 2675 banksize = adp->va_window_size; 2676 bank = -1; 2677 cx *= sizeof(u_int16_t); 2678 while (cy > 0) { 2679 pos = adp->va_line_width*y + x*sizeof(u_int16_t); 2680 if (bank != pos/banksize) { 2681 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2682 bank = pos/banksize; 2683 } 2684 offset = pos%banksize; 2685 end = imin(offset + cx, banksize); 2686 fillw_io(val, adp->va_window + offset, 2687 (end - offset)/sizeof(u_int16_t)); 2688 /* the line may cross the window boundary */ 2689 if (offset + cx > banksize) { 2690 ++bank; /* next bank */ 2691 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2692 end = offset + cx - banksize; 2693 fillw_io(val, adp->va_window, end/sizeof(u_int16_t)); 2694 } 2695 ++y; 2696 --cy; 2697 } 2698} 2699 2700static void 2701direct_fill_rect24(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2702{ 2703 int banksize; 2704 int bank; 2705 int pos; 2706 int offset; /* offset within window */ 2707 int end; 2708 int i; 2709 int j; 2710 u_int8_t b[3]; 2711 2712 b[0] = val & 0x0000ff; 2713 b[1] = (val >> 8) & 0x0000ff; 2714 b[2] = (val >> 16) & 0x0000ff; 2715 banksize = adp->va_window_size; 2716 bank = -1; 2717 cx *= 3; 2718 while (cy > 0) { 2719 pos = adp->va_line_width*y + x*3; 2720 if (bank != pos/banksize) { 2721 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2722 bank = pos/banksize; 2723 } 2724 offset = pos%banksize; 2725 end = imin(offset + cx, banksize); 2726 for (i = 0, j = offset; j < end; i = (++i)%3, ++j) { 2727 writeb(adp->va_window + j, b[i]); 2728 } 2729 /* the line may cross the window boundary */ 2730 if (offset + cx >= banksize) { 2731 ++bank; /* next bank */ 2732 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2733 j = 0; 2734 end = offset + cx - banksize; 2735 for (; j < end; i = (++i)%3, ++j) { 2736 writeb(adp->va_window + j, b[i]); 2737 } 2738 } 2739 ++y; 2740 --cy; 2741 } 2742} 2743 2744static void 2745direct_fill_rect32(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2746{ 2747 int banksize; 2748 int bank; 2749 int pos; 2750 int offset; /* offset within window */ 2751 int end; 2752 2753 /* 2754 * XXX: the function assumes that banksize is a muliple of 2755 * sizeof(u_int32_t). 2756 */ 2757 banksize = adp->va_window_size; 2758 bank = -1; 2759 cx *= sizeof(u_int32_t); 2760 while (cy > 0) { 2761 pos = adp->va_line_width*y + x*sizeof(u_int32_t); 2762 if (bank != pos/banksize) { 2763 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2764 bank = pos/banksize; 2765 } 2766 offset = pos%banksize; 2767 end = imin(offset + cx, banksize); 2768 filll_io(val, adp->va_window + offset, 2769 (end - offset)/sizeof(u_int32_t)); 2770 /* the line may cross the window boundary */ 2771 if (offset + cx > banksize) { 2772 ++bank; /* next bank */ 2773 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2774 end = offset + cx - banksize; 2775 filll_io(val, adp->va_window, end/sizeof(u_int32_t)); 2776 } 2777 ++y; 2778 --cy; 2779 } 2780} 2781 2782static int 2783vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2784{ 2785 switch (adp->va_info.vi_mem_model) { 2786 case V_INFO_MM_TEXT: 2787 /* do nothing? XXX */ 2788 break; 2789 case V_INFO_MM_PLANAR: 2790 planar_fill_rect(adp, val, x, y, cx, cy); 2791 break; 2792 case V_INFO_MM_PACKED: 2793 packed_fill_rect(adp, val, x, y, cx, cy); 2794 break; 2795 case V_INFO_MM_DIRECT: 2796 switch (adp->va_info.vi_pixel_size) { 2797 case sizeof(u_int16_t): 2798 direct_fill_rect16(adp, val, x, y, cx, cy); 2799 break; 2800 case 3: 2801 direct_fill_rect24(adp, val, x, y, cx, cy); 2802 break; 2803 case sizeof(u_int32_t): 2804 direct_fill_rect32(adp, val, x, y, cx, cy); 2805 break; 2806 } 2807 break; 2808 } 2809 return 0; 2810} 2811#else /* !notyet */ 2812static int 2813vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2814{ 2815 return ENODEV; 2816} 2817#endif /* notyet */ 2818 2819static int 2820vga_bitblt(video_adapter_t *adp,...) 2821{ 2822 /* FIXME */ 2823 return ENODEV; 2824} 2825 2826#endif /* !VGA_NO_MODE_CHANGE */ 2827 2828static int 2829get_palette(video_adapter_t *adp, int base, int count, 2830 u_char *red, u_char *green, u_char *blue, u_char *trans) 2831{ 2832 u_char *r; 2833 u_char *g; 2834 u_char *b; 2835 2836 if ((base < 0) || (base >= 256) || (base + count > 256)) 2837 return EINVAL; 2838 2839 r = malloc(count*3, M_DEVBUF, M_WAITOK); 2840 g = r + count; 2841 b = g + count; 2842 if (vga_save_palette2(adp, base, count, r, g, b)) 2843 return ENODEV; 2844 copyout(r, red, count); 2845 copyout(g, green, count); 2846 copyout(b, blue, count); 2847 if (trans != NULL) { 2848 bzero(r, count); 2849 copyout(r, trans, count); 2850 } 2851 free(r, M_DEVBUF); 2852 2853 return 0; 2854} 2855 2856static int 2857set_palette(video_adapter_t *adp, int base, int count, 2858 u_char *red, u_char *green, u_char *blue, u_char *trans) 2859{ 2860 u_char *r; 2861 u_char *g; 2862 u_char *b; 2863 int err; 2864 2865 if ((base < 0) || (base >= 256) || (base + count > 256)) 2866 return EINVAL; 2867 2868 r = malloc(count*3, M_DEVBUF, M_WAITOK); 2869 g = r + count; 2870 b = g + count; 2871 copyin(red, r, count); 2872 copyin(green, g, count); 2873 copyin(blue, b, count); 2874 err = vga_load_palette2(adp, base, count, r, g, b); 2875 free(r, M_DEVBUF); 2876 2877 return (err ? ENODEV : 0); 2878} 2879 2880static int 2881vga_dev_ioctl(video_adapter_t *adp, u_long cmd, caddr_t arg) 2882{ 2883 switch (cmd) { 2884 case FBIO_GETWINORG: /* get frame buffer window origin */ 2885 *(u_int *)arg = 0; 2886 return 0; 2887 2888 case FBIO_SETWINORG: /* set frame buffer window origin */ 2889 return ENODEV; 2890 2891 case FBIO_SETDISPSTART: /* set display start address */ 2892 return (set_display_start(adp, 2893 ((video_display_start_t *)arg)->x, 2894 ((video_display_start_t *)arg)->y) 2895 ? ENODEV : 0); 2896 2897 case FBIO_SETLINEWIDTH: /* set scan line length in pixel */ 2898 return (set_line_length(adp, *(u_int *)arg) ? ENODEV : 0); 2899 2900 case FBIO_GETPALETTE: /* get color palette */ 2901 return get_palette(adp, ((video_color_palette_t *)arg)->index, 2902 ((video_color_palette_t *)arg)->count, 2903 ((video_color_palette_t *)arg)->red, 2904 ((video_color_palette_t *)arg)->green, 2905 ((video_color_palette_t *)arg)->blue, 2906 ((video_color_palette_t *)arg)->transparent); 2907 2908 case FBIO_SETPALETTE: /* set color palette */ 2909 return set_palette(adp, ((video_color_palette_t *)arg)->index, 2910 ((video_color_palette_t *)arg)->count, 2911 ((video_color_palette_t *)arg)->red, 2912 ((video_color_palette_t *)arg)->green, 2913 ((video_color_palette_t *)arg)->blue, 2914 ((video_color_palette_t *)arg)->transparent); 2915 2916 case FBIOGTYPE: /* get frame buffer type info. */ 2917 ((struct fbtype *)arg)->fb_type = fb_type(adp->va_type); 2918 ((struct fbtype *)arg)->fb_height = adp->va_info.vi_height; 2919 ((struct fbtype *)arg)->fb_width = adp->va_info.vi_width; 2920 ((struct fbtype *)arg)->fb_depth = adp->va_info.vi_depth; 2921 if ((adp->va_info.vi_depth <= 1) || (adp->va_info.vi_depth > 8)) 2922 ((struct fbtype *)arg)->fb_cmsize = 0; 2923 else 2924 ((struct fbtype *)arg)->fb_cmsize = 1 << adp->va_info.vi_depth; 2925 ((struct fbtype *)arg)->fb_size = adp->va_buffer_size; 2926 return 0; 2927 2928 case FBIOGETCMAP: /* get color palette */ 2929 return get_palette(adp, ((struct fbcmap *)arg)->index, 2930 ((struct fbcmap *)arg)->count, 2931 ((struct fbcmap *)arg)->red, 2932 ((struct fbcmap *)arg)->green, 2933 ((struct fbcmap *)arg)->blue, NULL); 2934 2935 case FBIOPUTCMAP: /* set color palette */ 2936 return set_palette(adp, ((struct fbcmap *)arg)->index, 2937 ((struct fbcmap *)arg)->count, 2938 ((struct fbcmap *)arg)->red, 2939 ((struct fbcmap *)arg)->green, 2940 ((struct fbcmap *)arg)->blue, NULL); 2941 2942 default: 2943 return fb_commonioctl(adp, cmd, arg); 2944 } 2945} 2946 2947static void 2948dump_buffer(u_char *buf, size_t len) 2949{ 2950 int i; 2951 2952 for(i = 0; i < len;) { 2953 printf("%02x ", buf[i]); 2954 if ((++i % 16) == 0) 2955 printf("\n"); 2956 } 2957} 2958 2959/* 2960 * diag(): 2961 * Print some information about the video adapter and video modes, 2962 * with requested level of details. 2963 * 2964 * all adapters 2965 */ 2966static int 2967vga_diag(video_adapter_t *adp, int level) 2968{ 2969 u_char *mp; 2970#if FB_DEBUG > 1 2971 video_info_t info; 2972 int i; 2973#endif 2974 2975 if (!vga_init_done) 2976 return ENXIO; 2977 2978#if FB_DEBUG > 1 2979#ifndef VGA_NO_BIOS 2980 printf("vga: RTC equip. code:0x%02x, DCC code:0x%02x\n", 2981 rtcin(RTC_EQUIPMENT), readb(BIOS_PADDRTOVADDR(0x488))); 2982 printf("vga: CRTC:0x%x, video option:0x%02x, ", 2983 readw(BIOS_PADDRTOVADDR(0x463)), 2984 readb(BIOS_PADDRTOVADDR(0x487))); 2985 printf("rows:%d, cols:%d, font height:%d\n", 2986 readb(BIOS_PADDRTOVADDR(0x44a)), 2987 readb(BIOS_PADDRTOVADDR(0x484)) + 1, 2988 readb(BIOS_PADDRTOVADDR(0x485))); 2989#endif /* VGA_NO_BIOS */ 2990#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 2991 printf("vga: param table EGA/VGA:%p", video_mode_ptr); 2992 printf(", CGA/MDA:%p\n", video_mode_ptr2); 2993 printf("vga: rows_offset:%d\n", rows_offset); 2994#endif 2995#endif /* FB_DEBUG > 1 */ 2996 2997 fb_dump_adp_info(VGA_DRIVER_NAME, adp, level); 2998 2999#if FB_DEBUG > 1 3000 if (adp->va_flags & V_ADP_MODECHANGE) { 3001 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 3002 if (bios_vmode[i].vi_mode == NA) 3003 continue; 3004 if (get_mode_param(bios_vmode[i].vi_mode) == NULL) 3005 continue; 3006 fb_dump_mode_info(VGA_DRIVER_NAME, adp, &bios_vmode[i], level); 3007 } 3008 } else { 3009 vga_get_info(adp, adp->va_initial_mode, &info); /* shouldn't fail */ 3010 fb_dump_mode_info(VGA_DRIVER_NAME, adp, &info, level); 3011 } 3012#endif /* FB_DEBUG > 1 */ 3013 3014 if ((adp->va_type != KD_EGA) && (adp->va_type != KD_VGA)) 3015 return 0; 3016#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 3017 if (video_mode_ptr == NULL) 3018 printf("vga%d: %s: WARNING: video mode switching is not " 3019 "fully supported on this adapter\n", 3020 adp->va_unit, adp->va_name); 3021#endif 3022 if (level <= 0) 3023 return 0; 3024 3025 if (adp->va_type == KD_VGA) { 3026 printf("VGA parameters upon power-up\n"); 3027 dump_buffer(adpstate.regs, sizeof(adpstate.regs)); 3028 printf("VGA parameters in BIOS for mode %d\n", adp->va_initial_mode); 3029 dump_buffer(adpstate2.regs, sizeof(adpstate2.regs)); 3030 } 3031 3032 mp = get_mode_param(adp->va_initial_mode); 3033 if (mp == NULL) /* this shouldn't be happening */ 3034 return 0; 3035 printf("EGA/VGA parameters to be used for mode %d\n", adp->va_initial_mode); 3036 dump_buffer(mp, V_MODE_PARAM_SIZE); 3037 3038 return 0; 3039} 3040 3041#endif /* NVGA > 0 */ 3042