vga.c revision 138891
1/*-
2 * Copyright (c) 1999 Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp>
3 * Copyright (c) 1992-1998 S�ren Schmidt
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer as
11 *    the first lines of this file unmodified.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 *    derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 */
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD: head/sys/dev/fb/vga.c 138891 2004-12-15 13:49:25Z ru $");
33
34#include "opt_vga.h"
35#include "opt_fb.h"
36#include "opt_syscons.h"	/* should be removed in the future, XXX */
37
38#include <sys/param.h>
39#include <sys/systm.h>
40#include <sys/kernel.h>
41#include <sys/conf.h>
42#include <sys/fcntl.h>
43#include <sys/malloc.h>
44#include <sys/fbio.h>
45
46#include <vm/vm.h>
47#include <vm/vm_param.h>
48#include <vm/pmap.h>
49
50#include <machine/md_var.h>
51#if defined(__i386__) || defined(__amd64__)
52#include <machine/pc/bios.h>
53#endif
54#include <machine/bus.h>
55
56#include <dev/fb/fbreg.h>
57#include <dev/fb/vgareg.h>
58
59#include <isa/isareg.h>
60
61#ifndef VGA_DEBUG
62#define VGA_DEBUG		0
63#endif
64
65/* XXX machine/pc/bios.h has got too much i386-specific stuff in it */
66#ifndef BIOS_PADDRTOVADDR
67#define	BIOS_PADDRTOVADDR(x)	(x)
68#endif
69
70int
71vga_probe_unit(int unit, video_adapter_t *buf, int flags)
72{
73	video_adapter_t *adp;
74	video_switch_t *sw;
75	int error;
76
77	sw = vid_get_switch(VGA_DRIVER_NAME);
78	if (sw == NULL)
79		return 0;
80	error = (*sw->probe)(unit, &adp, NULL, flags);
81	if (error)
82		return error;
83	bcopy(adp, buf, sizeof(*buf));
84	return 0;
85}
86
87int
88vga_attach_unit(int unit, vga_softc_t *sc, int flags)
89{
90	video_switch_t *sw;
91	int error;
92
93	sw = vid_get_switch(VGA_DRIVER_NAME);
94	if (sw == NULL)
95		return ENXIO;
96
97	error = (*sw->probe)(unit, &sc->adp, NULL, flags);
98	if (error)
99		return error;
100	return (*sw->init)(unit, sc->adp, flags);
101}
102
103/* cdev driver functions */
104
105#ifdef FB_INSTALL_CDEV
106
107int
108vga_open(struct cdev *dev, vga_softc_t *sc, int flag, int mode, struct thread *td)
109{
110	if (sc == NULL)
111		return ENXIO;
112	if (mode & (O_CREAT | O_APPEND | O_TRUNC))
113		return ENODEV;
114
115	return genfbopen(&sc->gensc, sc->adp, flag, mode, td);
116}
117
118int
119vga_close(struct cdev *dev, vga_softc_t *sc, int flag, int mode, struct thread *td)
120{
121	return genfbclose(&sc->gensc, sc->adp, flag, mode, td);
122}
123
124int
125vga_read(struct cdev *dev, vga_softc_t *sc, struct uio *uio, int flag)
126{
127	return genfbread(&sc->gensc, sc->adp, uio, flag);
128}
129
130int
131vga_write(struct cdev *dev, vga_softc_t *sc, struct uio *uio, int flag)
132{
133	return genfbread(&sc->gensc, sc->adp, uio, flag);
134}
135
136int
137vga_ioctl(struct cdev *dev, vga_softc_t *sc, u_long cmd, caddr_t arg, int flag,
138	  struct thread *td)
139{
140	return genfbioctl(&sc->gensc, sc->adp, cmd, arg, flag, td);
141}
142
143int
144vga_mmap(struct cdev *dev, vga_softc_t *sc, vm_offset_t offset, vm_offset_t *paddr,
145	 int prot)
146{
147	return genfbmmap(&sc->gensc, sc->adp, offset, paddr, prot);
148}
149
150#endif /* FB_INSTALL_CDEV */
151
152/* LOW-LEVEL */
153
154#include <machine/clock.h>
155#ifdef __i386__
156#include <machine/pc/vesa.h>
157#endif
158
159#define probe_done(adp)		((adp)->va_flags & V_ADP_PROBED)
160#define init_done(adp)		((adp)->va_flags & V_ADP_INITIALIZED)
161#define config_done(adp)	((adp)->va_flags & V_ADP_REGISTERED)
162
163/* for compatibility with old kernel options */
164#ifdef SC_ALT_SEQACCESS
165#undef SC_ALT_SEQACCESS
166#undef VGA_ALT_SEQACCESS
167#define VGA_ALT_SEQACCESS	1
168#endif
169
170#ifdef SLOW_VGA
171#undef SLOW_VGA
172#undef VGA_SLOW_IOACCESS
173#define VGA_SLOW_IOACCESS	1
174#endif
175
176/* architecture dependent option */
177#ifndef __i386__
178#define VGA_NO_BIOS		1
179#endif
180
181/* this should really be in `rtc.h' */
182#define RTC_EQUIPMENT           0x14
183
184/* various sizes */
185#define V_MODE_MAP_SIZE		(M_VGA_CG320 + 1)
186#define V_MODE_PARAM_SIZE	64
187
188/* video adapter state buffer */
189struct adp_state {
190    int			sig;
191#define V_STATE_SIG	0x736f6962
192    u_char		regs[V_MODE_PARAM_SIZE];
193};
194typedef struct adp_state adp_state_t;
195
196/* video adapter information */
197#define DCC_MONO	0
198#define DCC_CGA40	1
199#define DCC_CGA80	2
200#define DCC_EGAMONO	3
201#define DCC_EGA40	4
202#define DCC_EGA80	5
203
204/*
205 * NOTE: `va_window' should have a virtual address, but is initialized
206 * with a physical address in the following table, as verify_adapter()
207 * will perform address conversion at run-time.
208 */
209static video_adapter_t adapter_init_value[] = {
210    /* DCC_MONO */
211    { 0, KD_MONO, "mda", 0, 0, 0, 	    IO_MDA, IO_MDASIZE, MONO_CRTC,
212      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE,
213      0, 0, 0, 0, 7, 0, },
214    /* DCC_CGA40 */
215    { 0, KD_CGA,  "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC,
216      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE,
217      0, 0, 0, 0, 3, 0, },
218    /* DCC_CGA80 */
219    { 0, KD_CGA,  "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC,
220      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE,
221      0, 0, 0, 0, 3, 0, },
222    /* DCC_EGAMONO */
223    { 0, KD_EGA,  "ega", 0, 0, 0,	    IO_MDA, 48,	  MONO_CRTC,
224      EGA_BUF_BASE, EGA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE,
225      0, 0, 0, 0, 7, 0, },
226    /* DCC_EGA40 */
227    { 0, KD_EGA,  "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48,	  COLOR_CRTC,
228      EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE,
229      0, 0, 0, 0, 3, 0, },
230    /* DCC_EGA80 */
231    { 0, KD_EGA,  "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48,	  COLOR_CRTC,
232      EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE,
233      0, 0, 0, 0, 3, 0, },
234};
235
236static video_adapter_t	biosadapter[2];
237static int		biosadapters = 0;
238
239/* video driver declarations */
240static int			vga_configure(int flags);
241       int			(*vga_sub_configure)(int flags);
242#if 0
243static int			vga_nop(void);
244#endif
245static int			vga_error(void);
246static vi_probe_t		vga_probe;
247static vi_init_t		vga_init;
248static vi_get_info_t		vga_get_info;
249static vi_query_mode_t		vga_query_mode;
250static vi_set_mode_t		vga_set_mode;
251static vi_save_font_t		vga_save_font;
252static vi_load_font_t		vga_load_font;
253static vi_show_font_t		vga_show_font;
254static vi_save_palette_t	vga_save_palette;
255static vi_load_palette_t	vga_load_palette;
256static vi_set_border_t		vga_set_border;
257static vi_save_state_t		vga_save_state;
258static vi_load_state_t		vga_load_state;
259static vi_set_win_org_t		vga_set_origin;
260static vi_read_hw_cursor_t	vga_read_hw_cursor;
261static vi_set_hw_cursor_t	vga_set_hw_cursor;
262static vi_set_hw_cursor_shape_t	vga_set_hw_cursor_shape;
263static vi_blank_display_t	vga_blank_display;
264static vi_mmap_t		vga_mmap_buf;
265static vi_ioctl_t		vga_dev_ioctl;
266#ifndef VGA_NO_MODE_CHANGE
267static vi_clear_t		vga_clear;
268static vi_fill_rect_t		vga_fill_rect;
269static vi_bitblt_t		vga_bitblt;
270#else /* VGA_NO_MODE_CHANGE */
271#define vga_clear		(vi_clear_t *)vga_error
272#define vga_fill_rect		(vi_fill_rect_t *)vga_error
273#define vga_bitblt		(vi_bitblt_t *)vga_error
274#endif
275static vi_diag_t		vga_diag;
276
277static video_switch_t vgavidsw = {
278	vga_probe,
279	vga_init,
280	vga_get_info,
281	vga_query_mode,
282	vga_set_mode,
283	vga_save_font,
284	vga_load_font,
285	vga_show_font,
286	vga_save_palette,
287	vga_load_palette,
288	vga_set_border,
289	vga_save_state,
290	vga_load_state,
291	vga_set_origin,
292	vga_read_hw_cursor,
293	vga_set_hw_cursor,
294	vga_set_hw_cursor_shape,
295	vga_blank_display,
296	vga_mmap_buf,
297	vga_dev_ioctl,
298	vga_clear,
299	vga_fill_rect,
300	vga_bitblt,
301	vga_error,
302	vga_error,
303	vga_diag,
304};
305
306VIDEO_DRIVER(mda, vgavidsw, NULL);
307VIDEO_DRIVER(cga, vgavidsw, NULL);
308VIDEO_DRIVER(ega, vgavidsw, NULL);
309VIDEO_DRIVER(vga, vgavidsw, vga_configure);
310
311/* VGA BIOS standard video modes */
312#define EOT		(-1)
313#define NA		(-2)
314
315static video_info_t bios_vmode[] = {
316    /* CGA */
317    { M_B40x25,     V_INFO_COLOR, 40, 25, 8,  8, 2, 1,
318      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
319    { M_C40x25,     V_INFO_COLOR, 40, 25, 8,  8, 4, 1,
320      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
321    { M_B80x25,     V_INFO_COLOR, 80, 25, 8,  8, 2, 1,
322      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
323    { M_C80x25,     V_INFO_COLOR, 80, 25, 8,  8, 4, 1,
324      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
325    /* EGA */
326    { M_ENH_B40x25, V_INFO_COLOR, 40, 25, 8, 14, 2, 1,
327      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
328    { M_ENH_C40x25, V_INFO_COLOR, 40, 25, 8, 14, 4, 1,
329      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
330    { M_ENH_B80x25, V_INFO_COLOR, 80, 25, 8, 14, 2, 1,
331      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
332    { M_ENH_C80x25, V_INFO_COLOR, 80, 25, 8, 14, 4, 1,
333      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
334    /* VGA */
335    { M_VGA_C40x25, V_INFO_COLOR, 40, 25, 8, 16, 4, 1,
336      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
337    { M_VGA_M80x25, 0,            80, 25, 8, 16, 2, 1,
338      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
339    { M_VGA_C80x25, V_INFO_COLOR, 80, 25, 8, 16, 4, 1,
340      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
341    /* MDA */
342    { M_EGAMONO80x25, 0,          80, 25, 8, 14, 2, 1,
343      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
344    /* EGA */
345    { M_ENH_B80x43, 0,            80, 43, 8,  8, 2, 1,
346      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
347    { M_ENH_C80x43, V_INFO_COLOR, 80, 43, 8,  8, 4, 1,
348      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
349    /* VGA */
350    { M_VGA_M80x30, 0,            80, 30, 8, 16, 2, 1,
351      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
352    { M_VGA_C80x30, V_INFO_COLOR, 80, 30, 8, 16, 4, 1,
353      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
354    { M_VGA_M80x50, 0,            80, 50, 8,  8, 2, 1,
355      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
356    { M_VGA_C80x50, V_INFO_COLOR, 80, 50, 8,  8, 4, 1,
357      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
358    { M_VGA_M80x60, 0,            80, 60, 8,  8, 2, 1,
359      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
360    { M_VGA_C80x60, V_INFO_COLOR, 80, 60, 8,  8, 4, 1,
361      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
362
363#ifndef VGA_NO_MODE_CHANGE
364
365#ifdef VGA_WIDTH90
366    { M_VGA_M90x25, 0,            90, 25, 8, 16, 2, 1,
367      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
368    { M_VGA_C90x25, V_INFO_COLOR, 90, 25, 8, 16, 4, 1,
369      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
370    { M_VGA_M90x30, 0,            90, 30, 8, 16, 2, 1,
371      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
372    { M_VGA_C90x30, V_INFO_COLOR, 90, 30, 8, 16, 4, 1,
373      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
374    { M_VGA_M90x43, 0,            90, 43, 8,  8, 2, 1,
375      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
376    { M_VGA_C90x43, V_INFO_COLOR, 90, 43, 8,  8, 4, 1,
377      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
378    { M_VGA_M90x50, 0,            90, 50, 8,  8, 2, 1,
379      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
380    { M_VGA_C90x50, V_INFO_COLOR, 90, 50, 8,  8, 4, 1,
381      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
382    { M_VGA_M90x60, 0,            90, 60, 8,  8, 2, 1,
383      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
384    { M_VGA_C90x60, V_INFO_COLOR, 90, 60, 8,  8, 4, 1,
385      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
386#endif /* VGA_WIDTH90 */
387
388    /* CGA */
389    { M_BG320,      V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8,  8, 2, 1,
390      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA },
391    { M_CG320,      V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8,  8, 2, 1,
392      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA },
393    { M_BG640,      V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8,  8, 1, 1,
394      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA },
395    /* EGA */
396    { M_CG320_D,    V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8,  8, 4, 4,
397      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0,
398      V_INFO_MM_PLANAR },
399    { M_CG640_E,    V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8,  8, 4, 4,
400      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
401      V_INFO_MM_PLANAR },
402    { M_EGAMONOAPA, V_INFO_GRAPHICS,                640, 350, 8, 14, 4, 4,
403      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, 64*1024, 0, 0 ,
404      V_INFO_MM_PLANAR },
405    { M_ENHMONOAPA2,V_INFO_GRAPHICS,                640, 350, 8, 14, 4, 4,
406      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
407      V_INFO_MM_PLANAR },
408    { M_CG640x350,  V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 2, 2,
409      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
410      V_INFO_MM_PLANAR },
411    { M_ENH_CG640,  V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4,
412      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
413      V_INFO_MM_PLANAR },
414    /* VGA */
415    { M_BG640x480,  V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4,
416      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
417      V_INFO_MM_PLANAR },
418    { M_CG640x480,  V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4,
419      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
420      V_INFO_MM_PLANAR },
421    { M_VGA_CG320,  V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8,  8, 8, 1,
422      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0,
423      V_INFO_MM_PACKED, 1 },
424    { M_VGA_MODEX,  V_INFO_COLOR | V_INFO_GRAPHICS, 320, 240, 8,  8, 8, 4,
425      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0,
426      V_INFO_MM_VGAX, 1 },
427#endif /* VGA_NO_MODE_CHANGE */
428
429    { EOT },
430};
431
432static int		vga_init_done = FALSE;
433#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
434static u_char		*video_mode_ptr = NULL;		/* EGA/VGA */
435static u_char		*video_mode_ptr2 = NULL;	/* CGA/MDA */
436#endif
437static u_char		*mode_map[V_MODE_MAP_SIZE];
438static adp_state_t	adpstate;
439static adp_state_t	adpstate2;
440static int		rows_offset = 1;
441
442/* local macros and functions */
443#define BIOS_SADDRTOLADDR(p) ((((p) & 0xffff0000) >> 12) + ((p) & 0x0000ffff))
444
445#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
446static void map_mode_table(u_char *map[], u_char *table, int max);
447#endif
448static void clear_mode_map(video_adapter_t *adp, u_char *map[], int max,
449			   int color);
450#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
451static int map_mode_num(int mode);
452#endif
453static int map_gen_mode_num(int type, int color, int mode);
454static int map_bios_mode_num(int type, int color, int bios_mode);
455static u_char *get_mode_param(int mode);
456#ifndef VGA_NO_BIOS
457static void fill_adapter_param(int code, video_adapter_t *adp);
458#endif
459static int verify_adapter(video_adapter_t *adp);
460static void update_adapter_info(video_adapter_t *adp, video_info_t *info);
461#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
462#define COMP_IDENTICAL	0
463#define COMP_SIMILAR	1
464#define COMP_DIFFERENT	2
465static int comp_adpregs(u_char *buf1, u_char *buf2);
466#endif
467static int probe_adapters(void);
468static int set_line_length(video_adapter_t *adp, int pixel);
469static int set_display_start(video_adapter_t *adp, int x, int y);
470
471#ifndef VGA_NO_MODE_CHANGE
472#ifdef VGA_WIDTH90
473static void set_width90(adp_state_t *params);
474#endif
475#endif /* !VGA_NO_MODE_CHANGE */
476
477#ifndef VGA_NO_FONT_LOADING
478#define PARAM_BUFSIZE	6
479static void set_font_mode(video_adapter_t *adp, u_char *buf);
480static void set_normal_mode(video_adapter_t *adp, u_char *buf);
481#endif
482
483#ifndef VGA_NO_MODE_CHANGE
484static void filll_io(int val, vm_offset_t d, size_t size);
485static void planar_fill(video_adapter_t *adp, int val);
486static void packed_fill(video_adapter_t *adp, int val);
487static void direct_fill(video_adapter_t *adp, int val);
488#ifdef notyet
489static void planar_fill_rect(video_adapter_t *adp, int val, int x, int y,
490			     int cx, int cy);
491static void packed_fill_rect(video_adapter_t *adp, int val, int x, int y,
492			     int cx, int cy);
493static void direct_fill_rect16(video_adapter_t *adp, int val, int x, int y,
494			       int cx, int cy);
495static void direct_fill_rect24(video_adapter_t *adp, int val, int x, int y,
496			       int cx, int cy);
497static void direct_fill_rect32(video_adapter_t *adp, int val, int x, int y,
498			       int cx, int cy);
499#endif /* notyet */
500#endif /* !VGA_NO_MODE_CHANGE */
501
502static void dump_buffer(u_char *buf, size_t len);
503
504#define	ISMAPPED(pa, width)				\
505	(((pa) <= (u_long)0x1000 - (width)) 		\
506	 || ((pa) >= ISA_HOLE_START && (pa) <= 0x100000 - (width)))
507
508#define	prologue(adp, flag, err)			\
509	if (!vga_init_done || !((adp)->va_flags & (flag)))	\
510	    return (err)
511
512/* a backdoor for the console driver */
513static int
514vga_configure(int flags)
515{
516    int i;
517
518    probe_adapters();
519    for (i = 0; i < biosadapters; ++i) {
520	if (!probe_done(&biosadapter[i]))
521	    continue;
522	biosadapter[i].va_flags |= V_ADP_INITIALIZED;
523	if (!config_done(&biosadapter[i])) {
524	    if (vid_register(&biosadapter[i]) < 0)
525		continue;
526	    biosadapter[i].va_flags |= V_ADP_REGISTERED;
527	}
528    }
529    if (vga_sub_configure != NULL)
530	(*vga_sub_configure)(flags);
531
532    return biosadapters;
533}
534
535/* local subroutines */
536
537#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
538/* construct the mode parameter map */
539static void
540map_mode_table(u_char *map[], u_char *table, int max)
541{
542    int i;
543
544    for(i = 0; i < max; ++i)
545	map[i] = table + i*V_MODE_PARAM_SIZE;
546    for(; i < V_MODE_MAP_SIZE; ++i)
547	map[i] = NULL;
548}
549#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */
550
551static void
552clear_mode_map(video_adapter_t *adp, u_char *map[], int max, int color)
553{
554    video_info_t info;
555    int i;
556
557    /*
558     * NOTE: we don't touch `bios_vmode[]' because it is shared
559     * by all adapters.
560     */
561    for(i = 0; i < max; ++i) {
562	if (vga_get_info(adp, i, &info))
563	    continue;
564	if ((info.vi_flags & V_INFO_COLOR) != color)
565	    map[i] = NULL;
566    }
567}
568
569#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
570/* map the non-standard video mode to a known mode number */
571static int
572map_mode_num(int mode)
573{
574    static struct {
575        int from;
576        int to;
577    } mode_map[] = {
578        { M_ENH_B80x43, M_ENH_B80x25 },
579        { M_ENH_C80x43, M_ENH_C80x25 },
580        { M_VGA_M80x30, M_VGA_M80x25 },
581        { M_VGA_C80x30, M_VGA_C80x25 },
582        { M_VGA_M80x50, M_VGA_M80x25 },
583        { M_VGA_C80x50, M_VGA_C80x25 },
584        { M_VGA_M80x60, M_VGA_M80x25 },
585        { M_VGA_C80x60, M_VGA_C80x25 },
586#ifdef VGA_WIDTH90
587        { M_VGA_M90x25, M_VGA_M80x25 },
588        { M_VGA_C90x25, M_VGA_C80x25 },
589        { M_VGA_M90x30, M_VGA_M80x25 },
590        { M_VGA_C90x30, M_VGA_C80x25 },
591        { M_VGA_M90x43, M_ENH_B80x25 },
592        { M_VGA_C90x43, M_ENH_C80x25 },
593        { M_VGA_M90x50, M_VGA_M80x25 },
594        { M_VGA_C90x50, M_VGA_C80x25 },
595        { M_VGA_M90x60, M_VGA_M80x25 },
596        { M_VGA_C90x60, M_VGA_C80x25 },
597#endif
598        { M_VGA_MODEX,  M_VGA_CG320 },
599    };
600    int i;
601
602    for (i = 0; i < sizeof(mode_map)/sizeof(mode_map[0]); ++i) {
603        if (mode_map[i].from == mode)
604            return mode_map[i].to;
605    }
606    return mode;
607}
608#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */
609
610/* map a generic video mode to a known mode number */
611static int
612map_gen_mode_num(int type, int color, int mode)
613{
614    static struct {
615	int from;
616	int to_color;
617	int to_mono;
618    } mode_map[] = {
619	{ M_TEXT_80x30,	M_VGA_C80x30, M_VGA_M80x30, },
620	{ M_TEXT_80x43,	M_ENH_C80x43, M_ENH_B80x43, },
621	{ M_TEXT_80x50,	M_VGA_C80x50, M_VGA_M80x50, },
622	{ M_TEXT_80x60,	M_VGA_C80x60, M_VGA_M80x60, },
623    };
624    int i;
625
626    if (mode == M_TEXT_80x25) {
627	switch (type) {
628
629	case KD_VGA:
630	    if (color)
631		return M_VGA_C80x25;
632	    else
633		return M_VGA_M80x25;
634	    break;
635
636	case KD_EGA:
637	    if (color)
638		return M_ENH_C80x25;
639	    else
640		return M_EGAMONO80x25;
641	    break;
642
643	case KD_CGA:
644	    return M_C80x25;
645
646	case KD_MONO:
647	case KD_HERCULES:
648	    return M_EGAMONO80x25;	/* XXX: this name is confusing */
649
650 	default:
651	    return -1;
652	}
653    }
654
655    for (i = 0; i < sizeof(mode_map)/sizeof(mode_map[0]); ++i) {
656        if (mode_map[i].from == mode)
657            return ((color) ? mode_map[i].to_color : mode_map[i].to_mono);
658    }
659    return mode;
660}
661
662/* turn the BIOS video number into our video mode number */
663static int
664map_bios_mode_num(int type, int color, int bios_mode)
665{
666    static int cga_modes[7] = {
667	M_B40x25, M_C40x25,		/* 0, 1 */
668	M_B80x25, M_C80x25,		/* 2, 3 */
669	M_BG320, M_CG320,
670	M_BG640,
671    };
672    static int ega_modes[17] = {
673	M_ENH_B40x25, M_ENH_C40x25,	/* 0, 1 */
674	M_ENH_B80x25, M_ENH_C80x25,	/* 2, 3 */
675	M_BG320, M_CG320,
676	M_BG640,
677	M_EGAMONO80x25,			/* 7 */
678	8, 9, 10, 11, 12,
679	M_CG320_D,
680	M_CG640_E,
681	M_ENHMONOAPA2,			/* XXX: video momery > 64K */
682	M_ENH_CG640,			/* XXX: video momery > 64K */
683    };
684    static int vga_modes[20] = {
685	M_VGA_C40x25, M_VGA_C40x25,	/* 0, 1 */
686	M_VGA_C80x25, M_VGA_C80x25,	/* 2, 3 */
687	M_BG320, M_CG320,
688	M_BG640,
689	M_VGA_M80x25,			/* 7 */
690	8, 9, 10, 11, 12,
691	M_CG320_D,
692	M_CG640_E,
693	M_ENHMONOAPA2,
694	M_ENH_CG640,
695	M_BG640x480, M_CG640x480,
696	M_VGA_CG320,
697    };
698
699    switch (type) {
700
701    case KD_VGA:
702	if (bios_mode < sizeof(vga_modes)/sizeof(vga_modes[0]))
703	    return vga_modes[bios_mode];
704	else if (color)
705	    return M_VGA_C80x25;
706	else
707	    return M_VGA_M80x25;
708	break;
709
710    case KD_EGA:
711	if (bios_mode < sizeof(ega_modes)/sizeof(ega_modes[0]))
712	    return ega_modes[bios_mode];
713	else if (color)
714	    return M_ENH_C80x25;
715	else
716	    return M_EGAMONO80x25;
717	break;
718
719    case KD_CGA:
720	if (bios_mode < sizeof(cga_modes)/sizeof(cga_modes[0]))
721	    return cga_modes[bios_mode];
722	else
723	    return M_C80x25;
724	break;
725
726    case KD_MONO:
727    case KD_HERCULES:
728	return M_EGAMONO80x25;		/* XXX: this name is confusing */
729
730    default:
731	break;
732    }
733    return -1;
734}
735
736/* look up a parameter table entry */
737static u_char
738*get_mode_param(int mode)
739{
740#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
741    if (mode >= V_MODE_MAP_SIZE)
742	mode = map_mode_num(mode);
743#endif
744    if ((mode >= 0) && (mode < V_MODE_MAP_SIZE))
745	return mode_map[mode];
746    else
747	return NULL;
748}
749
750#ifndef VGA_NO_BIOS
751static void
752fill_adapter_param(int code, video_adapter_t *adp)
753{
754    static struct {
755	int primary;
756	int secondary;
757    } dcc[] = {
758	{ DCC_MONO, 			DCC_EGA40 /* CGA monitor */ },
759	{ DCC_MONO, 			DCC_EGA80 /* CGA monitor */ },
760	{ DCC_MONO, 			DCC_EGA80 },
761	{ DCC_MONO, 			DCC_EGA80 },
762	{ DCC_CGA40, 			DCC_EGAMONO },
763	{ DCC_CGA80, 			DCC_EGAMONO },
764	{ DCC_EGA40 /* CGA monitor */, 	DCC_MONO},
765	{ DCC_EGA80 /* CGA monitor */, 	DCC_MONO},
766	{ DCC_EGA80,			DCC_MONO },
767	{ DCC_EGA80, 			DCC_MONO },
768	{ DCC_EGAMONO, 			DCC_CGA40 },
769	{ DCC_EGAMONO, 			DCC_CGA80 },
770    };
771
772    if ((code < 0) || (code >= sizeof(dcc)/sizeof(dcc[0]))) {
773	adp[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO];
774	adp[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80];
775    } else {
776	adp[V_ADP_PRIMARY] = adapter_init_value[dcc[code].primary];
777	adp[V_ADP_SECONDARY] = adapter_init_value[dcc[code].secondary];
778    }
779}
780#endif /* VGA_NO_BIOS */
781
782static int
783verify_adapter(video_adapter_t *adp)
784{
785    vm_offset_t buf;
786    u_int16_t v;
787#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
788    u_int32_t p;
789#endif
790
791    buf = BIOS_PADDRTOVADDR(adp->va_window);
792    v = readw(buf);
793    writew(buf, 0xA55A);
794    if (readw(buf) != 0xA55A)
795	return ENXIO;
796    writew(buf, v);
797
798    switch (adp->va_type) {
799
800    case KD_EGA:
801	outb(adp->va_crtc_addr, 7);
802	if (inb(adp->va_crtc_addr) == 7) {
803	    adp->va_type = KD_VGA;
804	    adp->va_name = "vga";
805	    adp->va_flags |= V_ADP_STATESAVE | V_ADP_PALETTE;
806	}
807	adp->va_flags |= V_ADP_STATELOAD | V_ADP_BORDER;
808	/* the color adapter may be in the 40x25 mode... XXX */
809
810#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
811	/* get the BIOS video mode pointer */
812	p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8);
813	p = BIOS_SADDRTOLADDR(p);
814	if (ISMAPPED(p, sizeof(u_int32_t))) {
815	    p = *(u_int32_t *)BIOS_PADDRTOVADDR(p);
816	    p = BIOS_SADDRTOLADDR(p);
817	    if (ISMAPPED(p, V_MODE_PARAM_SIZE))
818		video_mode_ptr = (u_char *)BIOS_PADDRTOVADDR(p);
819	}
820#endif
821	break;
822
823    case KD_CGA:
824	adp->va_flags |= V_ADP_COLOR | V_ADP_BORDER;
825	/* may be in the 40x25 mode... XXX */
826#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
827	/* get the BIOS video mode pointer */
828	p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4);
829	p = BIOS_SADDRTOLADDR(p);
830	video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p);
831#endif
832	break;
833
834    case KD_MONO:
835#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
836	/* get the BIOS video mode pointer */
837	p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4);
838	p = BIOS_SADDRTOLADDR(p);
839	video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p);
840#endif
841	break;
842    }
843
844    return 0;
845}
846
847static void
848update_adapter_info(video_adapter_t *adp, video_info_t *info)
849{
850    adp->va_flags &= ~V_ADP_COLOR;
851    adp->va_flags |=
852	(info->vi_flags & V_INFO_COLOR) ? V_ADP_COLOR : 0;
853    adp->va_crtc_addr =
854	(adp->va_flags & V_ADP_COLOR) ? COLOR_CRTC : MONO_CRTC;
855    adp->va_window = BIOS_PADDRTOVADDR(info->vi_window);
856    adp->va_window_size = info->vi_window_size;
857    adp->va_window_gran = info->vi_window_gran;
858    adp->va_window_orig = 0;
859    /* XXX */
860    adp->va_buffer = info->vi_buffer;
861    adp->va_buffer_size = info->vi_buffer_size;
862    if (info->vi_mem_model == V_INFO_MM_VGAX) {
863	adp->va_line_width = info->vi_width/2;
864    } else if (info->vi_flags & V_INFO_GRAPHICS) {
865	switch (info->vi_depth/info->vi_planes) {
866	case 1:
867	    adp->va_line_width = info->vi_width/8;
868	    break;
869	case 2:
870	    adp->va_line_width = info->vi_width/4;
871	    break;
872	case 4:
873	    adp->va_line_width = info->vi_width/2;
874	    break;
875	case 8:
876	default: /* shouldn't happen */
877	    adp->va_line_width = info->vi_width;
878	    break;
879	}
880    } else {
881	adp->va_line_width = info->vi_width;
882    }
883    adp->va_disp_start.x = 0;
884    adp->va_disp_start.y = 0;
885    bcopy(info, &adp->va_info, sizeof(adp->va_info));
886}
887
888#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
889/* compare two parameter table entries */
890static int
891comp_adpregs(u_char *buf1, u_char *buf2)
892{
893    static struct {
894        u_char mask;
895    } params[V_MODE_PARAM_SIZE] = {
896	{0xff}, {0x00}, {0xff}, 		/* COLS}, ROWS}, POINTS */
897	{0x00}, {0x00}, 			/* page length */
898	{0xfe}, {0xff}, {0xff}, {0xff},		/* sequencer registers */
899	{0xf3},					/* misc register */
900	{0xff}, {0xff}, {0xff}, {0x7f}, {0xff},	/* CRTC */
901	{0xff}, {0xff}, {0xff}, {0x7f}, {0xff},
902	{0x00}, {0x00}, {0x00}, {0x00}, {0x00},
903	{0x00}, {0xff}, {0x7f}, {0xff}, {0xff},
904	{0x7f}, {0xff}, {0xff}, {0xef}, {0xff},
905	{0xff}, {0xff}, {0xff}, {0xff}, {0xff},	/* attribute controller regs */
906	{0xff}, {0xff}, {0xff}, {0xff}, {0xff},
907	{0xff}, {0xff}, {0xff}, {0xff}, {0xff},
908	{0xff}, {0xff}, {0xff}, {0xff}, {0xf0},
909	{0xff}, {0xff}, {0xff}, {0xff}, {0xff},	/* GDC register */
910	{0xff}, {0xff}, {0xff}, {0xff},
911    };
912    int identical = TRUE;
913    int i;
914
915    if ((buf1 == NULL) || (buf2 == NULL))
916	return COMP_DIFFERENT;
917
918    for (i = 0; i < sizeof(params)/sizeof(params[0]); ++i) {
919	if (params[i].mask == 0)	/* don't care */
920	    continue;
921	if ((buf1[i] & params[i].mask) != (buf2[i] & params[i].mask))
922	    return COMP_DIFFERENT;
923	if (buf1[i] != buf2[i])
924	    identical = FALSE;
925    }
926    return (identical) ? COMP_IDENTICAL : COMP_SIMILAR;
927}
928#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */
929
930/* probe video adapters and return the number of detected adapters */
931static int
932probe_adapters(void)
933{
934    video_adapter_t *adp;
935    video_info_t info;
936#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
937    u_char *mp;
938#endif
939    int i;
940
941    /* do this test only once */
942    if (vga_init_done)
943	return biosadapters;
944    vga_init_done = TRUE;
945
946    /*
947     * Locate display adapters.
948     * The AT architecture supports upto two adapters. `syscons' allows
949     * the following combinations of adapters:
950     *     1) MDA + CGA
951     *     2) MDA + EGA/VGA color
952     *     3) CGA + EGA/VGA mono
953     * Note that `syscons' doesn't bother with MCGA as it is only
954     * avaiable for low end PS/2 models which has 80286 or earlier CPUs,
955     * thus, they are not running FreeBSD!
956     * When there are two adapaters in the system, one becomes `primary'
957     * and the other `secondary'. The EGA adapter has a set of DIP
958     * switches on board for this information and the EGA BIOS copies
959     * it in the BIOS data area BIOSDATA_VIDEOSWITCH (40:88).
960     * The VGA BIOS has more sophisticated mechanism and has this
961     * information in BIOSDATA_DCCINDEX (40:8a), but it also maintains
962     * compatibility with the EGA BIOS by updating BIOSDATA_VIDEOSWITCH.
963     */
964
965    /*
966     * Check rtc and BIOS data area.
967     * XXX: we don't use BIOSDATA_EQUIPMENT, since it is not a dead
968     * copy of RTC_EQUIPMENT.  Bits 4 and 5 of ETC_EQUIPMENT are
969     * zeros for EGA and VGA.  However, the EGA/VGA BIOS sets
970     * these bits in BIOSDATA_EQUIPMENT according to the monitor
971     * type detected.
972     */
973#ifndef VGA_NO_BIOS
974    if (*(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8)) {
975	/* EGA/VGA BIOS is present */
976	fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f,
977			   biosadapter);
978    } else {
979	switch ((rtcin(RTC_EQUIPMENT) >> 4) & 3) {	/* bit 4 and 5 */
980	case 0:
981	    /* EGA/VGA: shouldn't be happening */
982	    fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f,
983			       biosadapter);
984	    break;
985	case 1:
986	    /* CGA 40x25 */
987	    /* FIXME: switch to the 80x25 mode? XXX */
988	    biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA40];
989	    biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO];
990	    break;
991	case 2:
992	    /* CGA 80x25 */
993	    biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA80];
994	    biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO];
995	    break;
996	case 3:
997	    /* MDA */
998	    biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO];
999	    biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80];
1000	    break;
1001	}
1002    }
1003#else
1004    /* assume EGA/VGA? XXX */
1005    biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_EGA80];
1006    biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO];
1007#endif /* VGA_NO_BIOS */
1008
1009    biosadapters = 0;
1010    if (verify_adapter(&biosadapter[V_ADP_SECONDARY]) == 0) {
1011	++biosadapters;
1012	biosadapter[V_ADP_SECONDARY].va_flags |= V_ADP_PROBED;
1013	biosadapter[V_ADP_SECONDARY].va_mode =
1014	    biosadapter[V_ADP_SECONDARY].va_initial_mode =
1015	    map_bios_mode_num(biosadapter[V_ADP_SECONDARY].va_type,
1016			      biosadapter[V_ADP_SECONDARY].va_flags
1017				  & V_ADP_COLOR,
1018			      biosadapter[V_ADP_SECONDARY].va_initial_bios_mode);
1019    } else {
1020	biosadapter[V_ADP_SECONDARY].va_type = -1;
1021    }
1022    if (verify_adapter(&biosadapter[V_ADP_PRIMARY]) == 0) {
1023	++biosadapters;
1024	biosadapter[V_ADP_PRIMARY].va_flags |= V_ADP_PROBED;
1025#ifndef VGA_NO_BIOS
1026	biosadapter[V_ADP_PRIMARY].va_initial_bios_mode =
1027	    readb(BIOS_PADDRTOVADDR(0x449));
1028#else
1029	biosadapter[V_ADP_PRIMARY].va_initial_bios_mode = 3;	/* XXX */
1030#endif
1031	biosadapter[V_ADP_PRIMARY].va_mode =
1032	    biosadapter[V_ADP_PRIMARY].va_initial_mode =
1033	    map_bios_mode_num(biosadapter[V_ADP_PRIMARY].va_type,
1034			      biosadapter[V_ADP_PRIMARY].va_flags & V_ADP_COLOR,
1035			      biosadapter[V_ADP_PRIMARY].va_initial_bios_mode);
1036    } else {
1037	biosadapter[V_ADP_PRIMARY] = biosadapter[V_ADP_SECONDARY];
1038	biosadapter[V_ADP_SECONDARY].va_type = -1;
1039    }
1040    if (biosadapters == 0)
1041	return biosadapters;
1042    biosadapter[V_ADP_PRIMARY].va_unit = V_ADP_PRIMARY;
1043    biosadapter[V_ADP_SECONDARY].va_unit = V_ADP_SECONDARY;
1044
1045#if 0 /* we don't need these... */
1046    fb_init_struct(&biosadapter[V_ADP_PRIMARY], ...);
1047    fb_init_struct(&biosadapter[V_ADP_SECONDARY], ...);
1048#endif
1049
1050#if notyet
1051    /*
1052     * We cannot have two video adapter of the same type; there must be
1053     * only one of color or mono adapter, or one each of them.
1054     */
1055    if (biosadapters > 1) {
1056	if (!((biosadapter[0].va_flags ^ biosadapter[1].va_flags)
1057	      & V_ADP_COLOR))
1058	    /* we have two mono or color adapters!! */
1059	    return (biosadapters = 0);
1060    }
1061#endif
1062
1063    /*
1064     * Ensure a zero start address. The registers are w/o
1065     * for old hardware so it's too hard to relocate the active screen
1066     * memory.
1067     * This must be done before vga_save_state() for VGA.
1068     */
1069    outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 12);
1070    outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0);
1071    outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 13);
1072    outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0);
1073
1074    /* the video mode parameter table in EGA/VGA BIOS */
1075    /* NOTE: there can be only one EGA/VGA, wheather color or mono,
1076     * recognized by the video BIOS.
1077     */
1078    if ((biosadapter[V_ADP_PRIMARY].va_type == KD_EGA) ||
1079	(biosadapter[V_ADP_PRIMARY].va_type == KD_VGA)) {
1080	adp = &biosadapter[V_ADP_PRIMARY];
1081    } else if ((biosadapter[V_ADP_SECONDARY].va_type == KD_EGA) ||
1082	       (biosadapter[V_ADP_SECONDARY].va_type == KD_VGA)) {
1083	adp = &biosadapter[V_ADP_SECONDARY];
1084    } else {
1085	adp = NULL;
1086    }
1087    bzero(mode_map, sizeof(mode_map));
1088    if (adp != NULL) {
1089	if (adp->va_type == KD_VGA) {
1090	    vga_save_state(adp, &adpstate, sizeof(adpstate));
1091#if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE)
1092	    mode_map[adp->va_initial_mode] = adpstate.regs;
1093	    rows_offset = 1;
1094#else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */
1095	    if (video_mode_ptr == NULL) {
1096		mode_map[adp->va_initial_mode] = adpstate.regs;
1097		rows_offset = 1;
1098	    } else {
1099		/* discard the table if we are not familiar with it... */
1100		map_mode_table(mode_map, video_mode_ptr, M_VGA_CG320 + 1);
1101		mp = get_mode_param(adp->va_initial_mode);
1102		if (mp != NULL)
1103		    bcopy(mp, adpstate2.regs, sizeof(adpstate2.regs));
1104		switch (comp_adpregs(adpstate.regs, mp)) {
1105		case COMP_IDENTICAL:
1106		    /*
1107		     * OK, this parameter table looks reasonably familiar
1108		     * to us...
1109		     */
1110		    /*
1111		     * This is a kludge for Toshiba DynaBook SS433
1112		     * whose BIOS video mode table entry has the actual #
1113		     * of rows at the offset 1; BIOSes from other
1114		     * manufacturers store the # of rows - 1 there. XXX
1115		     */
1116		    rows_offset = adpstate.regs[1] + 1 - mp[1];
1117		    break;
1118
1119		case COMP_SIMILAR:
1120		    /*
1121		     * Not exactly the same, but similar enough to be
1122		     * trusted. However, use the saved register values
1123		     * for the initial mode and other modes which are
1124		     * based on the initial mode.
1125		     */
1126		    mode_map[adp->va_initial_mode] = adpstate.regs;
1127		    rows_offset = adpstate.regs[1] + 1 - mp[1];
1128		    adpstate.regs[1] -= rows_offset - 1;
1129		    break;
1130
1131		case COMP_DIFFERENT:
1132		default:
1133		    /*
1134		     * Don't use the paramter table in BIOS. It doesn't
1135		     * look familiar to us. Video mode switching is allowed
1136		     * only if the new mode is the same as or based on
1137		     * the initial mode.
1138		     */
1139		    video_mode_ptr = NULL;
1140		    bzero(mode_map, sizeof(mode_map));
1141		    mode_map[adp->va_initial_mode] = adpstate.regs;
1142		    rows_offset = 1;
1143		    break;
1144		}
1145	    }
1146#endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */
1147
1148#ifndef VGA_NO_MODE_CHANGE
1149	    adp->va_flags |= V_ADP_MODECHANGE;
1150#endif
1151#ifndef VGA_NO_FONT_LOADING
1152	    adp->va_flags |= V_ADP_FONT;
1153#endif
1154	} else if (adp->va_type == KD_EGA) {
1155#if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE)
1156	    rows_offset = 1;
1157#else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */
1158	    if (video_mode_ptr == NULL) {
1159		rows_offset = 1;
1160	    } else {
1161		map_mode_table(mode_map, video_mode_ptr, M_ENH_C80x25 + 1);
1162		/* XXX how can one validate the EGA table... */
1163		mp = get_mode_param(adp->va_initial_mode);
1164		if (mp != NULL) {
1165		    adp->va_flags |= V_ADP_MODECHANGE;
1166#ifndef VGA_NO_FONT_LOADING
1167		    adp->va_flags |= V_ADP_FONT;
1168#endif
1169		    rows_offset = 1;
1170		} else {
1171		    /*
1172		     * This is serious. We will not be able to switch video
1173		     * modes at all...
1174		     */
1175		    video_mode_ptr = NULL;
1176		    bzero(mode_map, sizeof(mode_map));
1177		    rows_offset = 1;
1178                }
1179	    }
1180#endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */
1181	}
1182    }
1183
1184    /* remove conflicting modes if we have more than one adapter */
1185    if (biosadapters > 0) {
1186	for (i = 0; i < biosadapters; ++i) {
1187	    if (!(biosadapter[i].va_flags & V_ADP_MODECHANGE))
1188		continue;
1189	    clear_mode_map(&biosadapter[i], mode_map, M_VGA_CG320 + 1,
1190			   (biosadapter[i].va_flags & V_ADP_COLOR) ?
1191			       V_INFO_COLOR : 0);
1192	    if ((biosadapter[i].va_type == KD_VGA)
1193		|| (biosadapter[i].va_type == KD_EGA)) {
1194		biosadapter[i].va_io_base =
1195		    (biosadapter[i].va_flags & V_ADP_COLOR) ?
1196			IO_VGA : IO_MDA;
1197		biosadapter[i].va_io_size = 32;
1198	    }
1199	}
1200    }
1201
1202    /* buffer address */
1203    vga_get_info(&biosadapter[V_ADP_PRIMARY],
1204		 biosadapter[V_ADP_PRIMARY].va_initial_mode, &info);
1205    info.vi_flags &= ~V_INFO_LINEAR; /* XXX */
1206    update_adapter_info(&biosadapter[V_ADP_PRIMARY], &info);
1207
1208    if (biosadapters > 1) {
1209	vga_get_info(&biosadapter[V_ADP_SECONDARY],
1210		     biosadapter[V_ADP_SECONDARY].va_initial_mode, &info);
1211	info.vi_flags &= ~V_INFO_LINEAR; /* XXX */
1212	update_adapter_info(&biosadapter[V_ADP_SECONDARY], &info);
1213    }
1214
1215    /*
1216     * XXX: we should verify the following values for the primary adapter...
1217     * crtc I/O port address: *(u_int16_t *)BIOS_PADDRTOVADDR(0x463);
1218     * color/mono display: (*(u_int8_t *)BIOS_PADDRTOVADDR(0x487) & 0x02)
1219     *                     ? 0 : V_ADP_COLOR;
1220     * columns: *(u_int8_t *)BIOS_PADDRTOVADDR(0x44a);
1221     * rows: *(u_int8_t *)BIOS_PADDRTOVADDR(0x484);
1222     * font size: *(u_int8_t *)BIOS_PADDRTOVADDR(0x485);
1223     * buffer size: *(u_int16_t *)BIOS_PADDRTOVADDR(0x44c);
1224     */
1225
1226    return biosadapters;
1227}
1228
1229/* set the scan line length in pixel */
1230static int
1231set_line_length(video_adapter_t *adp, int pixel)
1232{
1233    u_char *mp;
1234    int ppw;	/* pixels per word */
1235    int bpl;	/* bytes per line */
1236    int count;
1237
1238    if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA))
1239	return ENODEV;
1240    mp = get_mode_param(adp->va_mode);
1241    if (mp == NULL)
1242	return EINVAL;
1243
1244    switch (adp->va_info.vi_mem_model) {
1245    case V_INFO_MM_PLANAR:
1246	ppw = 16/(adp->va_info.vi_depth/adp->va_info.vi_planes);
1247	count = (pixel + ppw - 1)/ppw/2;
1248	bpl = ((pixel + ppw - 1)/ppw/2)*4;
1249	break;
1250    case V_INFO_MM_PACKED:
1251	count = (pixel + 7)/8;
1252	bpl = ((pixel + 7)/8)*8;
1253	break;
1254    case V_INFO_MM_TEXT:
1255	count = (pixel + 7)/8;			/* columns */
1256	bpl = (pixel + 7)/8;			/* columns */
1257	break;
1258    default:
1259	return ENODEV;
1260    }
1261
1262    if (mp[10 + 0x17] & 0x40)			/* CRTC mode control reg */
1263	count *= 2;				/* byte mode */
1264    outb(adp->va_crtc_addr, 0x13);
1265    outb(adp->va_crtc_addr + 1, count);
1266    adp->va_line_width = bpl;
1267
1268    return 0;
1269}
1270
1271static int
1272set_display_start(video_adapter_t *adp, int x, int y)
1273{
1274    int off;	/* byte offset (graphics mode)/word offset (text mode) */
1275    int poff;	/* pixel offset */
1276    int roff;	/* row offset */
1277    int ppb;	/* pixels per byte */
1278
1279    if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA))
1280	x &= ~7;
1281    if (adp->va_info.vi_flags & V_INFO_GRAPHICS) {
1282	ppb = 8/(adp->va_info.vi_depth/adp->va_info.vi_planes);
1283	off = y*adp->va_line_width + x/ppb;
1284	roff = 0;
1285	poff = x%ppb;
1286    } else {
1287	if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) {
1288	    outb(TSIDX, 1);
1289	    if (inb(TSREG) & 1)
1290		ppb = 9;
1291	    else
1292		ppb = 8;
1293	} else {
1294	    ppb = 8;
1295	}
1296	off = y/adp->va_info.vi_cheight*adp->va_line_width + x/ppb;
1297	roff = y%adp->va_info.vi_cheight;
1298	/* FIXME: is this correct? XXX */
1299	if (ppb == 8)
1300	    poff = x%ppb;
1301	else
1302	    poff = (x + 8)%ppb;
1303    }
1304
1305    /* start address */
1306    outb(adp->va_crtc_addr, 0xc);		/* high */
1307    outb(adp->va_crtc_addr + 1, off >> 8);
1308    outb(adp->va_crtc_addr, 0xd);		/* low */
1309    outb(adp->va_crtc_addr + 1, off & 0xff);
1310
1311    /* horizontal pel pan */
1312    if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) {
1313	inb(adp->va_crtc_addr + 6);
1314	outb(ATC, 0x13 | 0x20);
1315	outb(ATC, poff);
1316	inb(adp->va_crtc_addr + 6);
1317	outb(ATC, 0x20);
1318    }
1319
1320    /* preset raw scan */
1321    outb(adp->va_crtc_addr, 8);
1322    outb(adp->va_crtc_addr + 1, roff);
1323
1324    adp->va_disp_start.x = x;
1325    adp->va_disp_start.y = y;
1326    return 0;
1327}
1328
1329#ifndef VGA_NO_MODE_CHANGE
1330#if defined(__i386__) || defined(__amd64__)	/* XXX */
1331static void
1332fill(int val, void *d, size_t size)
1333{
1334    u_char *p = d;
1335
1336    while (size-- > 0)
1337	*p++ = val;
1338}
1339#endif /* __i386__ */
1340
1341static void
1342filll_io(int val, vm_offset_t d, size_t size)
1343{
1344    while (size-- > 0) {
1345	writel(d, val);
1346	d += sizeof(u_int32_t);
1347    }
1348}
1349#endif /* !VGA_NO_MODE_CHANGE */
1350
1351/* entry points */
1352
1353#if 0
1354static int
1355vga_nop(void)
1356{
1357    return 0;
1358}
1359#endif
1360
1361static int
1362vga_error(void)
1363{
1364    return ENODEV;
1365}
1366
1367static int
1368vga_probe(int unit, video_adapter_t **adpp, void *arg, int flags)
1369{
1370    probe_adapters();
1371    if (unit >= biosadapters)
1372	return ENXIO;
1373
1374    *adpp = &biosadapter[unit];
1375
1376    return 0;
1377}
1378
1379static int
1380vga_init(int unit, video_adapter_t *adp, int flags)
1381{
1382    if ((unit >= biosadapters) || (adp == NULL) || !probe_done(adp))
1383	return ENXIO;
1384
1385    if (!init_done(adp)) {
1386	/* nothing to do really... */
1387	adp->va_flags |= V_ADP_INITIALIZED;
1388    }
1389
1390    if (!config_done(adp)) {
1391	if (vid_register(adp) < 0)
1392		return ENXIO;
1393	adp->va_flags |= V_ADP_REGISTERED;
1394    }
1395    if (vga_sub_configure != NULL)
1396	(*vga_sub_configure)(0);
1397
1398    return 0;
1399}
1400
1401/*
1402 * get_info():
1403 * Return the video_info structure of the requested video mode.
1404 *
1405 * all adapters
1406 */
1407static int
1408vga_get_info(video_adapter_t *adp, int mode, video_info_t *info)
1409{
1410    int i;
1411
1412    if (!vga_init_done)
1413	return ENXIO;
1414
1415    mode = map_gen_mode_num(adp->va_type, adp->va_flags & V_ADP_COLOR, mode);
1416#ifndef VGA_NO_MODE_CHANGE
1417    if (adp->va_flags & V_ADP_MODECHANGE) {
1418	/*
1419	 * If the parameter table entry for this mode is not found,
1420	 * the mode is not supported...
1421	 */
1422	if (get_mode_param(mode) == NULL)
1423	    return EINVAL;
1424    } else
1425#endif /* VGA_NO_MODE_CHANGE */
1426    {
1427	/*
1428	 * Even if we don't support video mode switching on this adapter,
1429	 * the information on the initial (thus current) video mode
1430	 * should be made available.
1431	 */
1432	if (mode != adp->va_initial_mode)
1433	    return EINVAL;
1434    }
1435
1436    for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) {
1437	if (bios_vmode[i].vi_mode == NA)
1438	    continue;
1439	if (mode == bios_vmode[i].vi_mode) {
1440	    *info = bios_vmode[i];
1441	    /* XXX */
1442	    info->vi_buffer_size = info->vi_window_size*info->vi_planes;
1443	    return 0;
1444	}
1445    }
1446    return EINVAL;
1447}
1448
1449/*
1450 * query_mode():
1451 * Find a video mode matching the requested parameters.
1452 * Fields filled with 0 are considered "don't care" fields and
1453 * match any modes.
1454 *
1455 * all adapters
1456 */
1457static int
1458vga_query_mode(video_adapter_t *adp, video_info_t *info)
1459{
1460    int i;
1461
1462    if (!vga_init_done)
1463	return ENXIO;
1464
1465    for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) {
1466	if (bios_vmode[i].vi_mode == NA)
1467	    continue;
1468
1469	if ((info->vi_width != 0)
1470	    && (info->vi_width != bios_vmode[i].vi_width))
1471		continue;
1472	if ((info->vi_height != 0)
1473	    && (info->vi_height != bios_vmode[i].vi_height))
1474		continue;
1475	if ((info->vi_cwidth != 0)
1476	    && (info->vi_cwidth != bios_vmode[i].vi_cwidth))
1477		continue;
1478	if ((info->vi_cheight != 0)
1479	    && (info->vi_cheight != bios_vmode[i].vi_cheight))
1480		continue;
1481	if ((info->vi_depth != 0)
1482	    && (info->vi_depth != bios_vmode[i].vi_depth))
1483		continue;
1484	if ((info->vi_planes != 0)
1485	    && (info->vi_planes != bios_vmode[i].vi_planes))
1486		continue;
1487	/* XXX: should check pixel format, memory model */
1488	if ((info->vi_flags != 0)
1489	    && (info->vi_flags != bios_vmode[i].vi_flags))
1490		continue;
1491
1492	/* verify if this mode is supported on this adapter */
1493	if (vga_get_info(adp, bios_vmode[i].vi_mode, info))
1494		continue;
1495	return 0;
1496    }
1497    return ENODEV;
1498}
1499
1500/*
1501 * set_mode():
1502 * Change the video mode.
1503 *
1504 * EGA/VGA
1505 */
1506
1507#ifndef VGA_NO_MODE_CHANGE
1508#ifdef VGA_WIDTH90
1509static void
1510set_width90(adp_state_t *params)
1511{
1512    /*
1513     * Based on code submitted by Kelly Yancey (kbyanc@freedomnet.com)
1514     * and alexv@sui.gda.itesm.mx.
1515     */
1516    params->regs[5] |= 1;		/* toggle 8 pixel wide fonts */
1517    params->regs[10+0x0] = 0x6b;
1518    params->regs[10+0x1] = 0x59;
1519    params->regs[10+0x2] = 0x5a;
1520    params->regs[10+0x3] = 0x8e;
1521    params->regs[10+0x4] = 0x5e;
1522    params->regs[10+0x5] = 0x8a;
1523    params->regs[10+0x13] = 45;
1524    params->regs[35+0x13] = 0;
1525}
1526#endif /* VGA_WIDTH90 */
1527#endif /* !VGA_NO_MODE_CHANGE */
1528
1529static int
1530vga_set_mode(video_adapter_t *adp, int mode)
1531{
1532#ifndef VGA_NO_MODE_CHANGE
1533    video_info_t info;
1534    adp_state_t params;
1535
1536    prologue(adp, V_ADP_MODECHANGE, ENODEV);
1537
1538    mode = map_gen_mode_num(adp->va_type,
1539			    adp->va_flags & V_ADP_COLOR, mode);
1540    if (vga_get_info(adp, mode, &info))
1541	return EINVAL;
1542
1543#if VGA_DEBUG > 1
1544    printf("vga_set_mode(): setting mode %d\n", mode);
1545#endif
1546
1547    params.sig = V_STATE_SIG;
1548    bcopy(get_mode_param(mode), params.regs, sizeof(params.regs));
1549
1550    switch (mode) {
1551#ifdef VGA_WIDTH90
1552    case M_VGA_C90x60: case M_VGA_M90x60:
1553	set_width90(&params);
1554	/* FALLTHROUGH */
1555#endif
1556    case M_VGA_C80x60: case M_VGA_M80x60:
1557	params.regs[2]  = 0x08;
1558	params.regs[19] = 0x47;
1559	goto special_480l;
1560
1561#ifdef VGA_WIDTH90
1562    case M_VGA_C90x30: case M_VGA_M90x30:
1563	set_width90(&params);
1564	/* FALLTHROUGH */
1565#endif
1566    case M_VGA_C80x30: case M_VGA_M80x30:
1567	params.regs[19] = 0x4f;
1568special_480l:
1569	params.regs[9] |= 0xc0;
1570	params.regs[16] = 0x08;
1571	params.regs[17] = 0x3e;
1572	params.regs[26] = 0xea;
1573	params.regs[28] = 0xdf;
1574	params.regs[31] = 0xe7;
1575	params.regs[32] = 0x04;
1576	goto setup_mode;
1577
1578#ifdef VGA_WIDTH90
1579    case M_VGA_C90x43: case M_VGA_M90x43:
1580	set_width90(&params);
1581	/* FALLTHROUGH */
1582#endif
1583    case M_ENH_C80x43: case M_ENH_B80x43:
1584	params.regs[28] = 87;
1585	goto special_80x50;
1586
1587#ifdef VGA_WIDTH90
1588    case M_VGA_C90x50: case M_VGA_M90x50:
1589	set_width90(&params);
1590	/* FALLTHROUGH */
1591#endif
1592    case M_VGA_C80x50: case M_VGA_M80x50:
1593special_80x50:
1594	params.regs[2] = 8;
1595	params.regs[19] = 7;
1596	goto setup_mode;
1597
1598#ifdef VGA_WIDTH90
1599    case M_VGA_C90x25: case M_VGA_M90x25:
1600	set_width90(&params);
1601	/* FALLTHROUGH */
1602#endif
1603    case M_VGA_C40x25: case M_VGA_C80x25:
1604    case M_VGA_M80x25:
1605    case M_B40x25:     case M_C40x25:
1606    case M_B80x25:     case M_C80x25:
1607    case M_ENH_B40x25: case M_ENH_C40x25:
1608    case M_ENH_B80x25: case M_ENH_C80x25:
1609    case M_EGAMONO80x25:
1610
1611setup_mode:
1612	vga_load_state(adp, &params);
1613	break;
1614
1615    case M_VGA_MODEX:
1616	/* "unchain" the VGA mode */
1617	params.regs[5-1+0x04] &= 0xf7;
1618	params.regs[5-1+0x04] |= 0x04;
1619	/* turn off doubleword mode */
1620	params.regs[10+0x14] &= 0xbf;
1621	/* turn off word addressing */
1622	params.regs[10+0x17] |= 0x40;
1623	/* set logical screen width */
1624	params.regs[10+0x13] = 80;
1625	/* set 240 lines */
1626	params.regs[10+0x11] = 0x2c;
1627	params.regs[10+0x06] = 0x0d;
1628	params.regs[10+0x07] = 0x3e;
1629	params.regs[10+0x10] = 0xea;
1630	params.regs[10+0x11] = 0xac;
1631	params.regs[10+0x12] = 0xdf;
1632	params.regs[10+0x15] = 0xe7;
1633	params.regs[10+0x16] = 0x06;
1634	/* set vertical sync polarity to reflect aspect ratio */
1635	params.regs[9] = 0xe3;
1636	goto setup_grmode;
1637
1638    case M_BG320:     case M_CG320:     case M_BG640:
1639    case M_CG320_D:   case M_CG640_E:
1640    case M_CG640x350: case M_ENH_CG640:
1641    case M_BG640x480: case M_CG640x480: case M_VGA_CG320:
1642
1643setup_grmode:
1644	vga_load_state(adp, &params);
1645	break;
1646
1647    default:
1648	return EINVAL;
1649    }
1650
1651    adp->va_mode = mode;
1652    info.vi_flags &= ~V_INFO_LINEAR; /* XXX */
1653    update_adapter_info(adp, &info);
1654
1655    /* move hardware cursor out of the way */
1656    (*vidsw[adp->va_index]->set_hw_cursor)(adp, -1, -1);
1657
1658    return 0;
1659#else /* VGA_NO_MODE_CHANGE */
1660    return ENODEV;
1661#endif /* VGA_NO_MODE_CHANGE */
1662}
1663
1664#ifndef VGA_NO_FONT_LOADING
1665
1666static void
1667set_font_mode(video_adapter_t *adp, u_char *buf)
1668{
1669    u_char *mp;
1670    int s;
1671
1672    s = splhigh();
1673
1674    /* save register values */
1675    if (adp->va_type == KD_VGA) {
1676	outb(TSIDX, 0x02); buf[0] = inb(TSREG);
1677	outb(TSIDX, 0x04); buf[1] = inb(TSREG);
1678	outb(GDCIDX, 0x04); buf[2] = inb(GDCREG);
1679	outb(GDCIDX, 0x05); buf[3] = inb(GDCREG);
1680	outb(GDCIDX, 0x06); buf[4] = inb(GDCREG);
1681	inb(adp->va_crtc_addr + 6);
1682	outb(ATC, 0x10); buf[5] = inb(ATC + 1);
1683    } else /* if (adp->va_type == KD_EGA) */ {
1684	/*
1685	 * EGA cannot be read; copy parameters from the mode parameter
1686	 * table.
1687	 */
1688	mp = get_mode_param(adp->va_mode);
1689	buf[0] = mp[5 + 0x02 - 1];
1690	buf[1] = mp[5 + 0x04 - 1];
1691	buf[2] = mp[55 + 0x04];
1692	buf[3] = mp[55 + 0x05];
1693	buf[4] = mp[55 + 0x06];
1694	buf[5] = mp[35 + 0x10];
1695    }
1696
1697    /* setup vga for loading fonts */
1698    inb(adp->va_crtc_addr + 6);			/* reset flip-flop */
1699    outb(ATC, 0x10); outb(ATC, buf[5] & ~0x01);
1700    inb(adp->va_crtc_addr + 6);			/* reset flip-flop */
1701    outb(ATC, 0x20);				/* enable palette */
1702
1703#if VGA_SLOW_IOACCESS
1704#ifdef VGA_ALT_SEQACCESS
1705    outb(TSIDX, 0x00); outb(TSREG, 0x01);
1706#endif
1707    outb(TSIDX, 0x02); outb(TSREG, 0x04);
1708    outb(TSIDX, 0x04); outb(TSREG, 0x07);
1709#ifdef VGA_ALT_SEQACCESS
1710    outb(TSIDX, 0x00); outb(TSREG, 0x03);
1711#endif
1712    outb(GDCIDX, 0x04); outb(GDCREG, 0x02);
1713    outb(GDCIDX, 0x05); outb(GDCREG, 0x00);
1714    outb(GDCIDX, 0x06); outb(GDCREG, 0x04);
1715#else /* VGA_SLOW_IOACCESS */
1716#ifdef VGA_ALT_SEQACCESS
1717    outw(TSIDX, 0x0100);
1718#endif
1719    outw(TSIDX, 0x0402);
1720    outw(TSIDX, 0x0704);
1721#ifdef VGA_ALT_SEQACCESS
1722    outw(TSIDX, 0x0300);
1723#endif
1724    outw(GDCIDX, 0x0204);
1725    outw(GDCIDX, 0x0005);
1726    outw(GDCIDX, 0x0406);               /* addr = a0000, 64kb */
1727#endif /* VGA_SLOW_IOACCESS */
1728
1729    splx(s);
1730}
1731
1732static void
1733set_normal_mode(video_adapter_t *adp, u_char *buf)
1734{
1735    int s;
1736
1737    s = splhigh();
1738
1739    /* setup vga for normal operation mode again */
1740    inb(adp->va_crtc_addr + 6);			/* reset flip-flop */
1741    outb(ATC, 0x10); outb(ATC, buf[5]);
1742    inb(adp->va_crtc_addr + 6);			/* reset flip-flop */
1743    outb(ATC, 0x20);				/* enable palette */
1744
1745#if VGA_SLOW_IOACCESS
1746#ifdef VGA_ALT_SEQACCESS
1747    outb(TSIDX, 0x00); outb(TSREG, 0x01);
1748#endif
1749    outb(TSIDX, 0x02); outb(TSREG, buf[0]);
1750    outb(TSIDX, 0x04); outb(TSREG, buf[1]);
1751#ifdef VGA_ALT_SEQACCESS
1752    outb(TSIDX, 0x00); outb(TSREG, 0x03);
1753#endif
1754    outb(GDCIDX, 0x04); outb(GDCREG, buf[2]);
1755    outb(GDCIDX, 0x05); outb(GDCREG, buf[3]);
1756    if (adp->va_crtc_addr == MONO_CRTC) {
1757	outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x08);
1758    } else {
1759	outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x0c);
1760    }
1761#else /* VGA_SLOW_IOACCESS */
1762#ifdef VGA_ALT_SEQACCESS
1763    outw(TSIDX, 0x0100);
1764#endif
1765    outw(TSIDX, 0x0002 | (buf[0] << 8));
1766    outw(TSIDX, 0x0004 | (buf[1] << 8));
1767#ifdef VGA_ALT_SEQACCESS
1768    outw(TSIDX, 0x0300);
1769#endif
1770    outw(GDCIDX, 0x0004 | (buf[2] << 8));
1771    outw(GDCIDX, 0x0005 | (buf[3] << 8));
1772    if (adp->va_crtc_addr == MONO_CRTC)
1773        outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x08)<<8));
1774    else
1775        outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x0c)<<8));
1776#endif /* VGA_SLOW_IOACCESS */
1777
1778    splx(s);
1779}
1780
1781#endif /* VGA_NO_FONT_LOADING */
1782
1783/*
1784 * save_font():
1785 * Read the font data in the requested font page from the video adapter.
1786 *
1787 * EGA/VGA
1788 */
1789static int
1790vga_save_font(video_adapter_t *adp, int page, int fontsize, u_char *data,
1791	      int ch, int count)
1792{
1793#ifndef VGA_NO_FONT_LOADING
1794    u_char buf[PARAM_BUFSIZE];
1795    vm_offset_t segment;
1796    int c;
1797#ifdef VGA_ALT_SEQACCESS
1798    int s;
1799    u_char val = 0;
1800#endif
1801
1802    prologue(adp, V_ADP_FONT, ENODEV);
1803
1804    if (fontsize < 14) {
1805	/* FONT_8 */
1806	fontsize = 8;
1807    } else if (fontsize >= 32) {
1808	fontsize = 32;
1809    } else if (fontsize >= 16) {
1810	/* FONT_16 */
1811	fontsize = 16;
1812    } else {
1813	/* FONT_14 */
1814	fontsize = 14;
1815    }
1816
1817    if (page < 0 || page >= 8)
1818	return EINVAL;
1819    segment = FONT_BUF + 0x4000*page;
1820    if (page > 3)
1821	segment -= 0xe000;
1822
1823#ifdef VGA_ALT_SEQACCESS
1824    if (adp->va_type == KD_VGA) {	/* what about EGA? XXX */
1825	s = splhigh();
1826	outb(TSIDX, 0x00); outb(TSREG, 0x01);
1827	outb(TSIDX, 0x01); val = inb(TSREG);	/* disable screen */
1828	outb(TSIDX, 0x01); outb(TSREG, val | 0x20);
1829	outb(TSIDX, 0x00); outb(TSREG, 0x03);
1830	splx(s);
1831    }
1832#endif
1833
1834    set_font_mode(adp, buf);
1835    if (fontsize == 32) {
1836	bcopy_fromio((uintptr_t)segment + ch*32, data, fontsize*count);
1837    } else {
1838	for (c = ch; count > 0; ++c, --count) {
1839	    bcopy_fromio((uintptr_t)segment + c*32, data, fontsize);
1840	    data += fontsize;
1841	}
1842    }
1843    set_normal_mode(adp, buf);
1844
1845#ifdef VGA_ALT_SEQACCESS
1846    if (adp->va_type == KD_VGA) {
1847	s = splhigh();
1848	outb(TSIDX, 0x00); outb(TSREG, 0x01);
1849	outb(TSIDX, 0x01); outb(TSREG, val & 0xdf);	/* enable screen */
1850	outb(TSIDX, 0x00); outb(TSREG, 0x03);
1851	splx(s);
1852    }
1853#endif
1854
1855    return 0;
1856#else /* VGA_NO_FONT_LOADING */
1857    return ENODEV;
1858#endif /* VGA_NO_FONT_LOADING */
1859}
1860
1861/*
1862 * load_font():
1863 * Set the font data in the requested font page.
1864 * NOTE: it appears that some recent video adapters do not support
1865 * the font page other than 0... XXX
1866 *
1867 * EGA/VGA
1868 */
1869static int
1870vga_load_font(video_adapter_t *adp, int page, int fontsize, u_char *data,
1871	      int ch, int count)
1872{
1873#ifndef VGA_NO_FONT_LOADING
1874    u_char buf[PARAM_BUFSIZE];
1875    vm_offset_t segment;
1876    int c;
1877#ifdef VGA_ALT_SEQACCESS
1878    int s;
1879    u_char val = 0;
1880#endif
1881
1882    prologue(adp, V_ADP_FONT, ENODEV);
1883
1884    if (fontsize < 14) {
1885	/* FONT_8 */
1886	fontsize = 8;
1887    } else if (fontsize >= 32) {
1888	fontsize = 32;
1889    } else if (fontsize >= 16) {
1890	/* FONT_16 */
1891	fontsize = 16;
1892    } else {
1893	/* FONT_14 */
1894	fontsize = 14;
1895    }
1896
1897    if (page < 0 || page >= 8)
1898	return EINVAL;
1899    segment = FONT_BUF + 0x4000*page;
1900    if (page > 3)
1901	segment -= 0xe000;
1902
1903#ifdef VGA_ALT_SEQACCESS
1904    if (adp->va_type == KD_VGA) {	/* what about EGA? XXX */
1905	s = splhigh();
1906	outb(TSIDX, 0x00); outb(TSREG, 0x01);
1907	outb(TSIDX, 0x01); val = inb(TSREG);	/* disable screen */
1908	outb(TSIDX, 0x01); outb(TSREG, val | 0x20);
1909	outb(TSIDX, 0x00); outb(TSREG, 0x03);
1910	splx(s);
1911    }
1912#endif
1913
1914    set_font_mode(adp, buf);
1915    if (fontsize == 32) {
1916	bcopy_toio(data, (uintptr_t)segment + ch*32, fontsize*count);
1917    } else {
1918	for (c = ch; count > 0; ++c, --count) {
1919	    bcopy_toio(data, (uintptr_t)segment + c*32, fontsize);
1920	    data += fontsize;
1921	}
1922    }
1923    set_normal_mode(adp, buf);
1924
1925#ifdef VGA_ALT_SEQACCESS
1926    if (adp->va_type == KD_VGA) {
1927	s = splhigh();
1928	outb(TSIDX, 0x00); outb(TSREG, 0x01);
1929	outb(TSIDX, 0x01); outb(TSREG, val & 0xdf);	/* enable screen */
1930	outb(TSIDX, 0x00); outb(TSREG, 0x03);
1931	splx(s);
1932    }
1933#endif
1934
1935    return 0;
1936#else /* VGA_NO_FONT_LOADING */
1937    return ENODEV;
1938#endif /* VGA_NO_FONT_LOADING */
1939}
1940
1941/*
1942 * show_font():
1943 * Activate the requested font page.
1944 * NOTE: it appears that some recent video adapters do not support
1945 * the font page other than 0... XXX
1946 *
1947 * EGA/VGA
1948 */
1949static int
1950vga_show_font(video_adapter_t *adp, int page)
1951{
1952#ifndef VGA_NO_FONT_LOADING
1953    static u_char cg[] = { 0x00, 0x05, 0x0a, 0x0f, 0x30, 0x35, 0x3a, 0x3f };
1954    int s;
1955
1956    prologue(adp, V_ADP_FONT, ENODEV);
1957    if (page < 0 || page >= 8)
1958	return EINVAL;
1959
1960    s = splhigh();
1961    outb(TSIDX, 0x03); outb(TSREG, cg[page]);
1962    splx(s);
1963
1964    return 0;
1965#else /* VGA_NO_FONT_LOADING */
1966    return ENODEV;
1967#endif /* VGA_NO_FONT_LOADING */
1968}
1969
1970/*
1971 * save_palette():
1972 * Read DAC values. The values have expressed in 8 bits.
1973 *
1974 * VGA
1975 */
1976static int
1977vga_save_palette(video_adapter_t *adp, u_char *palette)
1978{
1979    int i;
1980
1981    prologue(adp, V_ADP_PALETTE, ENODEV);
1982
1983    /*
1984     * We store 8 bit values in the palette buffer, while the standard
1985     * VGA has 6 bit DAC .
1986     */
1987    outb(PALRADR, 0x00);
1988    for (i = 0; i < 256*3; ++i)
1989	palette[i] = inb(PALDATA) << 2;
1990    inb(adp->va_crtc_addr + 6);	/* reset flip/flop */
1991    return 0;
1992}
1993
1994static int
1995vga_save_palette2(video_adapter_t *adp, int base, int count,
1996		  u_char *r, u_char *g, u_char *b)
1997{
1998    int i;
1999
2000    prologue(adp, V_ADP_PALETTE, ENODEV);
2001
2002    outb(PALRADR, base);
2003    for (i = 0; i < count; ++i) {
2004	r[i] = inb(PALDATA) << 2;
2005	g[i] = inb(PALDATA) << 2;
2006	b[i] = inb(PALDATA) << 2;
2007    }
2008    inb(adp->va_crtc_addr + 6);		/* reset flip/flop */
2009    return 0;
2010}
2011
2012/*
2013 * load_palette():
2014 * Set DAC values.
2015 *
2016 * VGA
2017 */
2018static int
2019vga_load_palette(video_adapter_t *adp, u_char *palette)
2020{
2021    int i;
2022
2023    prologue(adp, V_ADP_PALETTE, ENODEV);
2024
2025    outb(PIXMASK, 0xff);		/* no pixelmask */
2026    outb(PALWADR, 0x00);
2027    for (i = 0; i < 256*3; ++i)
2028	outb(PALDATA, palette[i] >> 2);
2029    inb(adp->va_crtc_addr + 6);	/* reset flip/flop */
2030    outb(ATC, 0x20);			/* enable palette */
2031    return 0;
2032}
2033
2034static int
2035vga_load_palette2(video_adapter_t *adp, int base, int count,
2036		  u_char *r, u_char *g, u_char *b)
2037{
2038    int i;
2039
2040    prologue(adp, V_ADP_PALETTE, ENODEV);
2041
2042    outb(PIXMASK, 0xff);		/* no pixelmask */
2043    outb(PALWADR, base);
2044    for (i = 0; i < count; ++i) {
2045	outb(PALDATA, r[i] >> 2);
2046	outb(PALDATA, g[i] >> 2);
2047	outb(PALDATA, b[i] >> 2);
2048    }
2049    inb(adp->va_crtc_addr + 6);		/* reset flip/flop */
2050    outb(ATC, 0x20);			/* enable palette */
2051    return 0;
2052}
2053
2054/*
2055 * set_border():
2056 * Change the border color.
2057 *
2058 * CGA/EGA/VGA
2059 */
2060static int
2061vga_set_border(video_adapter_t *adp, int color)
2062{
2063    prologue(adp, V_ADP_BORDER, ENODEV);
2064
2065    switch (adp->va_type) {
2066    case KD_EGA:
2067    case KD_VGA:
2068	inb(adp->va_crtc_addr + 6);	/* reset flip-flop */
2069	outb(ATC, 0x31); outb(ATC, color & 0xff);
2070	break;
2071    case KD_CGA:
2072	outb(adp->va_crtc_addr + 5, color & 0x0f); /* color select register */
2073	break;
2074    case KD_MONO:
2075    case KD_HERCULES:
2076    default:
2077	break;
2078    }
2079    return 0;
2080}
2081
2082/*
2083 * save_state():
2084 * Read video register values.
2085 * NOTE: this function only reads the standard EGA/VGA registers.
2086 * any extra/extended registers of SVGA adapters are not saved.
2087 *
2088 * VGA
2089 */
2090static int
2091vga_save_state(video_adapter_t *adp, void *p, size_t size)
2092{
2093    video_info_t info;
2094    u_char *buf;
2095    int crtc_addr;
2096    int i, j;
2097    int s;
2098
2099    if (size == 0) {
2100	/* return the required buffer size */
2101	prologue(adp, V_ADP_STATESAVE, 0);
2102	return sizeof(adp_state_t);
2103    } else {
2104	prologue(adp, V_ADP_STATESAVE, ENODEV);
2105	if (size < sizeof(adp_state_t))
2106	    return EINVAL;
2107    }
2108
2109    ((adp_state_t *)p)->sig = V_STATE_SIG;
2110    buf = ((adp_state_t *)p)->regs;
2111    bzero(buf, V_MODE_PARAM_SIZE);
2112    crtc_addr = adp->va_crtc_addr;
2113
2114    s = splhigh();
2115
2116    outb(TSIDX, 0x00); outb(TSREG, 0x01);	/* stop sequencer */
2117    for (i = 0, j = 5; i < 4; i++) {
2118	outb(TSIDX, i + 1);
2119	buf[j++]  =  inb(TSREG);
2120    }
2121    buf[9]  =  inb(MISC + 10);			/* dot-clock */
2122    outb(TSIDX, 0x00); outb(TSREG, 0x03);	/* start sequencer */
2123
2124    for (i = 0, j = 10; i < 25; i++) {		/* crtc */
2125	outb(crtc_addr, i);
2126	buf[j++]  =  inb(crtc_addr + 1);
2127    }
2128    for (i = 0, j = 35; i < 20; i++) {		/* attribute ctrl */
2129        inb(crtc_addr + 6);			/* reset flip-flop */
2130	outb(ATC, i);
2131	buf[j++]  =  inb(ATC + 1);
2132    }
2133    for (i = 0, j = 55; i < 9; i++) {		/* graph data ctrl */
2134	outb(GDCIDX, i);
2135	buf[j++]  =  inb(GDCREG);
2136    }
2137    inb(crtc_addr + 6);				/* reset flip-flop */
2138    outb(ATC, 0x20);				/* enable palette */
2139
2140    splx(s);
2141
2142#if 1
2143    if (vga_get_info(adp, adp->va_mode, &info) == 0) {
2144	if (info.vi_flags & V_INFO_GRAPHICS) {
2145	    buf[0] = info.vi_width/info.vi_cwidth; /* COLS */
2146	    buf[1] = info.vi_height/info.vi_cheight - 1; /* ROWS */
2147	} else {
2148	    buf[0] = info.vi_width;		/* COLS */
2149	    buf[1] = info.vi_height - 1;	/* ROWS */
2150	}
2151	buf[2] = info.vi_cheight;		/* POINTS */
2152    } else {
2153	/* XXX: shouldn't be happening... */
2154	printf("vga%d: %s: failed to obtain mode info. (vga_save_state())\n",
2155	       adp->va_unit, adp->va_name);
2156    }
2157#else
2158    buf[0] = readb(BIOS_PADDRTOVADDR(0x44a));	/* COLS */
2159    buf[1] = readb(BIOS_PADDRTOVADDR(0x484));	/* ROWS */
2160    buf[2] = readb(BIOS_PADDRTOVADDR(0x485));	/* POINTS */
2161    buf[3] = readb(BIOS_PADDRTOVADDR(0x44c));
2162    buf[4] = readb(BIOS_PADDRTOVADDR(0x44d));
2163#endif
2164
2165    return 0;
2166}
2167
2168/*
2169 * load_state():
2170 * Set video registers at once.
2171 * NOTE: this function only updates the standard EGA/VGA registers.
2172 * any extra/extended registers of SVGA adapters are not changed.
2173 *
2174 * EGA/VGA
2175 */
2176static int
2177vga_load_state(video_adapter_t *adp, void *p)
2178{
2179    u_char *buf;
2180    int crtc_addr;
2181    int s;
2182    int i;
2183
2184    prologue(adp, V_ADP_STATELOAD, ENODEV);
2185    if (((adp_state_t *)p)->sig != V_STATE_SIG)
2186	return EINVAL;
2187
2188    buf = ((adp_state_t *)p)->regs;
2189    crtc_addr = adp->va_crtc_addr;
2190
2191#if VGA_DEBUG > 1
2192    dump_buffer(buf, V_MODE_PARAM_SIZE);
2193#endif
2194
2195    s = splhigh();
2196
2197    outb(TSIDX, 0x00); outb(TSREG, 0x01);	/* stop sequencer */
2198    for (i = 0; i < 4; ++i) {			/* program sequencer */
2199	outb(TSIDX, i + 1);
2200	outb(TSREG, buf[i + 5]);
2201    }
2202    outb(MISC, buf[9]);				/* set dot-clock */
2203    outb(TSIDX, 0x00); outb(TSREG, 0x03);	/* start sequencer */
2204    outb(crtc_addr, 0x11);
2205    outb(crtc_addr + 1, inb(crtc_addr + 1) & 0x7F);
2206    for (i = 0; i < 25; ++i) {			/* program crtc */
2207	outb(crtc_addr, i);
2208	outb(crtc_addr + 1, buf[i + 10]);
2209    }
2210    inb(crtc_addr+6);				/* reset flip-flop */
2211    for (i = 0; i < 20; ++i) {			/* program attribute ctrl */
2212	outb(ATC, i);
2213	outb(ATC, buf[i + 35]);
2214    }
2215    for (i = 0; i < 9; ++i) {			/* program graph data ctrl */
2216	outb(GDCIDX, i);
2217	outb(GDCREG, buf[i + 55]);
2218    }
2219    inb(crtc_addr + 6);				/* reset flip-flop */
2220    outb(ATC, 0x20);				/* enable palette */
2221
2222#if notyet /* a temporary workaround for kernel panic, XXX */
2223#ifndef VGA_NO_BIOS
2224    if (adp->va_unit == V_ADP_PRIMARY) {
2225	writeb(BIOS_PADDRTOVADDR(0x44a), buf[0]);	/* COLS */
2226	writeb(BIOS_PADDRTOVADDR(0x484), buf[1] + rows_offset - 1); /* ROWS */
2227	writeb(BIOS_PADDRTOVADDR(0x485), buf[2]);	/* POINTS */
2228#if 0
2229	writeb(BIOS_PADDRTOVADDR(0x44c), buf[3]);
2230	writeb(BIOS_PADDRTOVADDR(0x44d), buf[4]);
2231#endif
2232    }
2233#endif /* VGA_NO_BIOS */
2234#endif /* notyet */
2235
2236    splx(s);
2237    return 0;
2238}
2239
2240/*
2241 * set_origin():
2242 * Change the origin (window mapping) of the banked frame buffer.
2243 */
2244static int
2245vga_set_origin(video_adapter_t *adp, off_t offset)
2246{
2247    /*
2248     * The standard video modes do not require window mapping;
2249     * always return error.
2250     */
2251    return ENODEV;
2252}
2253
2254/*
2255 * read_hw_cursor():
2256 * Read the position of the hardware text cursor.
2257 *
2258 * all adapters
2259 */
2260static int
2261vga_read_hw_cursor(video_adapter_t *adp, int *col, int *row)
2262{
2263    u_int16_t off;
2264    int s;
2265
2266    if (!vga_init_done)
2267	return ENXIO;
2268
2269    if (adp->va_info.vi_flags & V_INFO_GRAPHICS)
2270	return ENODEV;
2271
2272    s = spltty();
2273    outb(adp->va_crtc_addr, 14);
2274    off = inb(adp->va_crtc_addr + 1);
2275    outb(adp->va_crtc_addr, 15);
2276    off = (off << 8) | inb(adp->va_crtc_addr + 1);
2277    splx(s);
2278
2279    *row = off / adp->va_info.vi_width;
2280    *col = off % adp->va_info.vi_width;
2281
2282    return 0;
2283}
2284
2285/*
2286 * set_hw_cursor():
2287 * Move the hardware text cursor.  If col and row are both -1,
2288 * the cursor won't be shown.
2289 *
2290 * all adapters
2291 */
2292static int
2293vga_set_hw_cursor(video_adapter_t *adp, int col, int row)
2294{
2295    u_int16_t off;
2296    int s;
2297
2298    if (!vga_init_done)
2299	return ENXIO;
2300
2301    if ((col == -1) && (row == -1)) {
2302	off = -1;
2303    } else {
2304	if (adp->va_info.vi_flags & V_INFO_GRAPHICS)
2305	    return ENODEV;
2306	off = row*adp->va_info.vi_width + col;
2307    }
2308
2309    s = spltty();
2310    outb(adp->va_crtc_addr, 14);
2311    outb(adp->va_crtc_addr + 1, off >> 8);
2312    outb(adp->va_crtc_addr, 15);
2313    outb(adp->va_crtc_addr + 1, off & 0x00ff);
2314    splx(s);
2315
2316    return 0;
2317}
2318
2319/*
2320 * set_hw_cursor_shape():
2321 * Change the shape of the hardware text cursor. If the height is
2322 * zero or negative, the cursor won't be shown.
2323 *
2324 * all adapters
2325 */
2326static int
2327vga_set_hw_cursor_shape(video_adapter_t *adp, int base, int height,
2328			int celsize, int blink)
2329{
2330    int s;
2331
2332    if (!vga_init_done)
2333	return ENXIO;
2334
2335    s = spltty();
2336    switch (adp->va_type) {
2337    case KD_VGA:
2338    case KD_CGA:
2339    case KD_MONO:
2340    case KD_HERCULES:
2341    default:
2342	if (height <= 0) {
2343	    /* make the cursor invisible */
2344	    outb(adp->va_crtc_addr, 10);
2345	    outb(adp->va_crtc_addr + 1, 32);
2346	    outb(adp->va_crtc_addr, 11);
2347	    outb(adp->va_crtc_addr + 1, 0);
2348	} else {
2349	    outb(adp->va_crtc_addr, 10);
2350	    outb(adp->va_crtc_addr + 1, celsize - base - height);
2351	    outb(adp->va_crtc_addr, 11);
2352	    outb(adp->va_crtc_addr + 1, celsize - base - 1);
2353	}
2354	break;
2355    case KD_EGA:
2356	if (height <= 0) {
2357	    /* make the cursor invisible */
2358	    outb(adp->va_crtc_addr, 10);
2359	    outb(adp->va_crtc_addr + 1, celsize);
2360	    outb(adp->va_crtc_addr, 11);
2361	    outb(adp->va_crtc_addr + 1, 0);
2362	} else {
2363	    outb(adp->va_crtc_addr, 10);
2364	    outb(adp->va_crtc_addr + 1, celsize - base - height);
2365	    outb(adp->va_crtc_addr, 11);
2366	    outb(adp->va_crtc_addr + 1, celsize - base);
2367	}
2368	break;
2369    }
2370    splx(s);
2371
2372    return 0;
2373}
2374
2375/*
2376 * blank_display()
2377 * Put the display in power save/power off mode.
2378 *
2379 * all adapters
2380 */
2381static int
2382vga_blank_display(video_adapter_t *adp, int mode)
2383{
2384    u_char val;
2385    int s;
2386
2387    s = splhigh();
2388    switch (adp->va_type) {
2389    case KD_VGA:
2390	switch (mode) {
2391	case V_DISPLAY_SUSPEND:
2392	case V_DISPLAY_STAND_BY:
2393	    outb(TSIDX, 0x01);
2394	    val = inb(TSREG);
2395	    outb(TSIDX, 0x01);
2396	    outb(TSREG, val | 0x20);
2397	    outb(adp->va_crtc_addr, 0x17);
2398	    val = inb(adp->va_crtc_addr + 1);
2399	    outb(adp->va_crtc_addr + 1, val & ~0x80);
2400	    break;
2401	case V_DISPLAY_BLANK:
2402	    outb(TSIDX, 0x01);
2403	    val = inb(TSREG);
2404	    outb(TSIDX, 0x01);
2405	    outb(TSREG, val | 0x20);
2406	    break;
2407	case V_DISPLAY_ON:
2408	    outb(TSIDX, 0x01);
2409	    val = inb(TSREG);
2410	    outb(TSIDX, 0x01);
2411	    outb(TSREG, val & 0xDF);
2412	    outb(adp->va_crtc_addr, 0x17);
2413	    val = inb(adp->va_crtc_addr + 1);
2414	    outb(adp->va_crtc_addr + 1, val | 0x80);
2415	    break;
2416	}
2417	break;
2418
2419    case KD_EGA:
2420	/* no support yet */
2421	splx(s);
2422	return ENODEV;
2423
2424    case KD_CGA:
2425	switch (mode) {
2426	case V_DISPLAY_SUSPEND:
2427	case V_DISPLAY_STAND_BY:
2428	case V_DISPLAY_BLANK:
2429	    outb(adp->va_crtc_addr + 4, 0x25);
2430	    break;
2431	case V_DISPLAY_ON:
2432	    outb(adp->va_crtc_addr + 4, 0x2d);
2433	    break;
2434	}
2435	break;
2436
2437    case KD_MONO:
2438    case KD_HERCULES:
2439	switch (mode) {
2440	case V_DISPLAY_SUSPEND:
2441	case V_DISPLAY_STAND_BY:
2442	case V_DISPLAY_BLANK:
2443	    outb(adp->va_crtc_addr + 4, 0x21);
2444	    break;
2445	case V_DISPLAY_ON:
2446	    outb(adp->va_crtc_addr + 4, 0x29);
2447	    break;
2448	}
2449	break;
2450    default:
2451	break;
2452    }
2453    splx(s);
2454
2455    return 0;
2456}
2457
2458/*
2459 * mmap():
2460 * Mmap frame buffer.
2461 *
2462 * all adapters
2463 */
2464static int
2465vga_mmap_buf(video_adapter_t *adp, vm_offset_t offset, vm_paddr_t *paddr,
2466   	     int prot)
2467{
2468    if (adp->va_info.vi_flags & V_INFO_LINEAR)
2469	return -1;
2470
2471#if VGA_DEBUG > 0
2472    printf("vga_mmap_buf(): window:0x%jx, offset:0x%jx\n",
2473	   (uintmax_t)adp->va_info.vi_window, (uintmax_t)offset);
2474#endif
2475
2476    /* XXX: is this correct? */
2477    if (offset > adp->va_window_size - PAGE_SIZE)
2478	return -1;
2479
2480    *paddr = adp->va_info.vi_window + offset;
2481    return 0;
2482}
2483
2484#ifndef VGA_NO_MODE_CHANGE
2485
2486static void
2487planar_fill(video_adapter_t *adp, int val)
2488{
2489    int length;
2490    int at;			/* position in the frame buffer */
2491    int l;
2492
2493    outw(GDCIDX, 0x0005);		/* read mode 0, write mode 0 */
2494    outw(GDCIDX, 0x0003);		/* data rotate/function select */
2495    outw(GDCIDX, 0x0f01);		/* set/reset enable */
2496    outw(GDCIDX, 0xff08);		/* bit mask */
2497    outw(GDCIDX, (val << 8) | 0x00);	/* set/reset */
2498    at = 0;
2499    length = adp->va_line_width*adp->va_info.vi_height;
2500    while (length > 0) {
2501	l = imin(length, adp->va_window_size);
2502	(*vidsw[adp->va_index]->set_win_org)(adp, at);
2503	bzero_io(adp->va_window, l);
2504	length -= l;
2505	at += l;
2506    }
2507    outw(GDCIDX, 0x0000);		/* set/reset */
2508    outw(GDCIDX, 0x0001);		/* set/reset enable */
2509}
2510
2511static void
2512packed_fill(video_adapter_t *adp, int val)
2513{
2514    int length;
2515    int at;			/* position in the frame buffer */
2516    int l;
2517
2518    at = 0;
2519    length = adp->va_line_width*adp->va_info.vi_height;
2520    while (length > 0) {
2521	l = imin(length, adp->va_window_size);
2522	(*vidsw[adp->va_index]->set_win_org)(adp, at);
2523	fill_io(val, adp->va_window, l);
2524	length -= l;
2525	at += l;
2526    }
2527}
2528
2529static void
2530direct_fill(video_adapter_t *adp, int val)
2531{
2532    int length;
2533    int at;			/* position in the frame buffer */
2534    int l;
2535
2536    at = 0;
2537    length = adp->va_line_width*adp->va_info.vi_height;
2538    while (length > 0) {
2539	l = imin(length, adp->va_window_size);
2540	(*vidsw[adp->va_index]->set_win_org)(adp, at);
2541	switch (adp->va_info.vi_pixel_size) {
2542	case sizeof(u_int16_t):
2543	    fillw_io(val, adp->va_window, l/sizeof(u_int16_t));
2544	    break;
2545	case 3:
2546	    /* FIXME */
2547	    break;
2548	case sizeof(u_int32_t):
2549	    filll_io(val, adp->va_window, l/sizeof(u_int32_t));
2550	    break;
2551	}
2552	length -= l;
2553	at += l;
2554    }
2555}
2556
2557static int
2558vga_clear(video_adapter_t *adp)
2559{
2560    switch (adp->va_info.vi_mem_model) {
2561    case V_INFO_MM_TEXT:
2562	/* do nothing? XXX */
2563	break;
2564    case V_INFO_MM_PLANAR:
2565	planar_fill(adp, 0);
2566	break;
2567    case V_INFO_MM_PACKED:
2568	packed_fill(adp, 0);
2569	break;
2570    case V_INFO_MM_DIRECT:
2571	direct_fill(adp, 0);
2572	break;
2573    }
2574    return 0;
2575}
2576
2577#ifdef notyet
2578static void
2579planar_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
2580{
2581    int banksize;
2582    int bank;
2583    int pos;
2584    int offset;			/* offset within window */
2585    int bx;
2586    int l;
2587
2588    outw(GDCIDX, 0x0005);		/* read mode 0, write mode 0 */
2589    outw(GDCIDX, 0x0003);		/* data rotate/function select */
2590    outw(GDCIDX, 0x0f01);		/* set/reset enable */
2591    outw(GDCIDX, 0xff08);		/* bit mask */
2592    outw(GDCIDX, (val << 8) | 0x00); /* set/reset */
2593
2594    banksize = adp->va_window_size;
2595    bank = -1;
2596    while (cy > 0) {
2597	pos = adp->va_line_width*y + x/8;
2598	if (bank != pos/banksize) {
2599	    (*vidsw[adp->va_index]->set_win_org)(adp, pos);
2600	    bank = pos/banksize;
2601	}
2602	offset = pos%banksize;
2603	bx = (x + cx)/8 - x/8;
2604	if (x % 8) {
2605	    outw(GDCIDX, ((0xff00 >> (x % 8)) & 0xff00) | 0x08);
2606	    writeb(adp->va_window + offset, 0);
2607	    ++offset;
2608	    --bx;
2609	    if (offset >= banksize) {
2610		offset = 0;
2611		++bank;		/* next bank */
2612		(*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize);
2613	    }
2614	    outw(GDCIDX, 0xff08);	/* bit mask */
2615	}
2616	while (bx > 0) {
2617	    l = imin(bx, banksize);
2618	    bzero_io(adp->va_window + offset, l);
2619	    offset += l;
2620	    bx -= l;
2621	    if (offset >= banksize) {
2622		offset = 0;
2623		++bank;		/* next bank */
2624		(*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize);
2625	    }
2626	}
2627	if ((x + cx) % 8) {
2628	    outw(GDCIDX, (~(0xff00 >> ((x + cx) % 8)) & 0xff00) | 0x08);
2629	    writeb(adp->va_window + offset, 0);
2630	    ++offset;
2631	    if (offset >= banksize) {
2632		offset = 0;
2633		++bank;		/* next bank */
2634		(*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize);
2635	    }
2636	    outw(GDCIDX, 0xff08);	/* bit mask */
2637	}
2638	++y;
2639	--cy;
2640    }
2641
2642    outw(GDCIDX, 0xff08);		/* bit mask */
2643    outw(GDCIDX, 0x0000);		/* set/reset */
2644    outw(GDCIDX, 0x0001);		/* set/reset enable */
2645}
2646
2647static void
2648packed_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
2649{
2650    int banksize;
2651    int bank;
2652    int pos;
2653    int offset;			/* offset within window */
2654    int end;
2655
2656    banksize = adp->va_window_size;
2657    bank = -1;
2658    cx *= adp->va_info.vi_pixel_size;
2659    while (cy > 0) {
2660	pos = adp->va_line_width*y + x*adp->va_info.vi_pixel_size;
2661	if (bank != pos/banksize) {
2662	    (*vidsw[adp->va_index]->set_win_org)(adp, pos);
2663	    bank = pos/banksize;
2664	}
2665	offset = pos%banksize;
2666	end = imin(offset + cx, banksize);
2667	fill_io(val, adp->va_window + offset,
2668		(end - offset)/adp->va_info.vi_pixel_size);
2669	/* the line may cross the window boundary */
2670	if (offset + cx > banksize) {
2671	    ++bank;		/* next bank */
2672	    (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize);
2673	    end = offset + cx - banksize;
2674	    fill_io(val, adp->va_window, end/adp->va_info.vi_pixel_size);
2675	}
2676	++y;
2677	--cy;
2678    }
2679}
2680
2681static void
2682direct_fill_rect16(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
2683{
2684    int banksize;
2685    int bank;
2686    int pos;
2687    int offset;			/* offset within window */
2688    int end;
2689
2690    /*
2691     * XXX: the function assumes that banksize is a muliple of
2692     * sizeof(u_int16_t).
2693     */
2694    banksize = adp->va_window_size;
2695    bank = -1;
2696    cx *= sizeof(u_int16_t);
2697    while (cy > 0) {
2698	pos = adp->va_line_width*y + x*sizeof(u_int16_t);
2699	if (bank != pos/banksize) {
2700	    (*vidsw[adp->va_index]->set_win_org)(adp, pos);
2701	    bank = pos/banksize;
2702	}
2703	offset = pos%banksize;
2704	end = imin(offset + cx, banksize);
2705	fillw_io(val, adp->va_window + offset,
2706		 (end - offset)/sizeof(u_int16_t));
2707	/* the line may cross the window boundary */
2708	if (offset + cx > banksize) {
2709	    ++bank;		/* next bank */
2710	    (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize);
2711	    end = offset + cx - banksize;
2712	    fillw_io(val, adp->va_window, end/sizeof(u_int16_t));
2713	}
2714	++y;
2715	--cy;
2716    }
2717}
2718
2719static void
2720direct_fill_rect24(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
2721{
2722    int banksize;
2723    int bank;
2724    int pos;
2725    int offset;			/* offset within window */
2726    int end;
2727    int i;
2728    int j;
2729    u_int8_t b[3];
2730
2731    b[0] = val & 0x0000ff;
2732    b[1] = (val >> 8) & 0x0000ff;
2733    b[2] = (val >> 16) & 0x0000ff;
2734    banksize = adp->va_window_size;
2735    bank = -1;
2736    cx *= 3;
2737    while (cy > 0) {
2738	pos = adp->va_line_width*y + x*3;
2739	if (bank != pos/banksize) {
2740	    (*vidsw[adp->va_index]->set_win_org)(adp, pos);
2741	    bank = pos/banksize;
2742	}
2743	offset = pos%banksize;
2744	end = imin(offset + cx, banksize);
2745	for (i = 0, j = offset; j < end; i = (++i)%3, ++j) {
2746	    writeb(adp->va_window + j, b[i]);
2747	}
2748	/* the line may cross the window boundary */
2749	if (offset + cx >= banksize) {
2750	    ++bank;		/* next bank */
2751	    (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize);
2752	    j = 0;
2753	    end = offset + cx - banksize;
2754	    for (; j < end; i = (++i)%3, ++j) {
2755		writeb(adp->va_window + j, b[i]);
2756	    }
2757	}
2758	++y;
2759	--cy;
2760    }
2761}
2762
2763static void
2764direct_fill_rect32(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
2765{
2766    int banksize;
2767    int bank;
2768    int pos;
2769    int offset;			/* offset within window */
2770    int end;
2771
2772    /*
2773     * XXX: the function assumes that banksize is a muliple of
2774     * sizeof(u_int32_t).
2775     */
2776    banksize = adp->va_window_size;
2777    bank = -1;
2778    cx *= sizeof(u_int32_t);
2779    while (cy > 0) {
2780	pos = adp->va_line_width*y + x*sizeof(u_int32_t);
2781	if (bank != pos/banksize) {
2782	    (*vidsw[adp->va_index]->set_win_org)(adp, pos);
2783	    bank = pos/banksize;
2784	}
2785	offset = pos%banksize;
2786	end = imin(offset + cx, banksize);
2787	filll_io(val, adp->va_window + offset,
2788		 (end - offset)/sizeof(u_int32_t));
2789	/* the line may cross the window boundary */
2790	if (offset + cx > banksize) {
2791	    ++bank;		/* next bank */
2792	    (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize);
2793	    end = offset + cx - banksize;
2794	    filll_io(val, adp->va_window, end/sizeof(u_int32_t));
2795	}
2796	++y;
2797	--cy;
2798    }
2799}
2800
2801static int
2802vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
2803{
2804    switch (adp->va_info.vi_mem_model) {
2805    case V_INFO_MM_TEXT:
2806	/* do nothing? XXX */
2807	break;
2808    case V_INFO_MM_PLANAR:
2809	planar_fill_rect(adp, val, x, y, cx, cy);
2810	break;
2811    case V_INFO_MM_PACKED:
2812	packed_fill_rect(adp, val, x, y, cx, cy);
2813	break;
2814    case V_INFO_MM_DIRECT:
2815	switch (adp->va_info.vi_pixel_size) {
2816	case sizeof(u_int16_t):
2817	    direct_fill_rect16(adp, val, x, y, cx, cy);
2818	    break;
2819	case 3:
2820	    direct_fill_rect24(adp, val, x, y, cx, cy);
2821	    break;
2822	case sizeof(u_int32_t):
2823	    direct_fill_rect32(adp, val, x, y, cx, cy);
2824	    break;
2825	}
2826	break;
2827    }
2828    return 0;
2829}
2830#else /* !notyet */
2831static int
2832vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
2833{
2834    return ENODEV;
2835}
2836#endif /* notyet */
2837
2838static int
2839vga_bitblt(video_adapter_t *adp,...)
2840{
2841    /* FIXME */
2842    return ENODEV;
2843}
2844
2845#endif /* !VGA_NO_MODE_CHANGE */
2846
2847static int
2848get_palette(video_adapter_t *adp, int base, int count,
2849	    u_char *red, u_char *green, u_char *blue, u_char *trans)
2850{
2851    u_char *r;
2852    u_char *g;
2853    u_char *b;
2854
2855    if (count < 0 || base < 0 || count > 256 || base > 256 ||
2856	base + count > 256)
2857	return EINVAL;
2858
2859    r = malloc(count*3, M_DEVBUF, M_WAITOK);
2860    g = r + count;
2861    b = g + count;
2862    if (vga_save_palette2(adp, base, count, r, g, b)) {
2863	free(r, M_DEVBUF);
2864	return ENODEV;
2865    }
2866    copyout(r, red, count);
2867    copyout(g, green, count);
2868    copyout(b, blue, count);
2869    if (trans != NULL) {
2870	bzero(r, count);
2871	copyout(r, trans, count);
2872    }
2873    free(r, M_DEVBUF);
2874
2875    return 0;
2876}
2877
2878static int
2879set_palette(video_adapter_t *adp, int base, int count,
2880	    u_char *red, u_char *green, u_char *blue, u_char *trans)
2881{
2882    u_char *r;
2883    u_char *g;
2884    u_char *b;
2885    int err;
2886
2887    if (count < 0 || base < 0 || count > 256 || base > 256 ||
2888	base + count > 256)
2889	return EINVAL;
2890
2891    r = malloc(count*3, M_DEVBUF, M_WAITOK);
2892    g = r + count;
2893    b = g + count;
2894    copyin(red, r, count);
2895    copyin(green, g, count);
2896    copyin(blue, b, count);
2897    err = vga_load_palette2(adp, base, count, r, g, b);
2898    free(r, M_DEVBUF);
2899
2900    return (err ? ENODEV : 0);
2901}
2902
2903static int
2904vga_dev_ioctl(video_adapter_t *adp, u_long cmd, caddr_t arg)
2905{
2906    switch (cmd) {
2907    case FBIO_GETWINORG:	/* get frame buffer window origin */
2908	*(u_int *)arg = 0;
2909	return 0;
2910
2911    case FBIO_SETWINORG:	/* set frame buffer window origin */
2912	return ENODEV;
2913
2914    case FBIO_SETDISPSTART:	/* set display start address */
2915	return (set_display_start(adp,
2916				  ((video_display_start_t *)arg)->x,
2917			  	  ((video_display_start_t *)arg)->y)
2918		? ENODEV : 0);
2919
2920    case FBIO_SETLINEWIDTH:	/* set scan line length in pixel */
2921	return (set_line_length(adp, *(u_int *)arg) ? ENODEV : 0);
2922
2923    case FBIO_GETPALETTE:	/* get color palette */
2924	return get_palette(adp, ((video_color_palette_t *)arg)->index,
2925			   ((video_color_palette_t *)arg)->count,
2926			   ((video_color_palette_t *)arg)->red,
2927			   ((video_color_palette_t *)arg)->green,
2928			   ((video_color_palette_t *)arg)->blue,
2929			   ((video_color_palette_t *)arg)->transparent);
2930
2931    case FBIO_SETPALETTE:	/* set color palette */
2932	return set_palette(adp, ((video_color_palette_t *)arg)->index,
2933			   ((video_color_palette_t *)arg)->count,
2934			   ((video_color_palette_t *)arg)->red,
2935			   ((video_color_palette_t *)arg)->green,
2936			   ((video_color_palette_t *)arg)->blue,
2937			   ((video_color_palette_t *)arg)->transparent);
2938
2939    case FBIOGTYPE:		/* get frame buffer type info. */
2940	((struct fbtype *)arg)->fb_type = fb_type(adp->va_type);
2941	((struct fbtype *)arg)->fb_height = adp->va_info.vi_height;
2942	((struct fbtype *)arg)->fb_width = adp->va_info.vi_width;
2943	((struct fbtype *)arg)->fb_depth = adp->va_info.vi_depth;
2944	if ((adp->va_info.vi_depth <= 1) || (adp->va_info.vi_depth > 8))
2945	    ((struct fbtype *)arg)->fb_cmsize = 0;
2946	else
2947	    ((struct fbtype *)arg)->fb_cmsize = 1 << adp->va_info.vi_depth;
2948	((struct fbtype *)arg)->fb_size = adp->va_buffer_size;
2949	return 0;
2950
2951    case FBIOGETCMAP:		/* get color palette */
2952	return get_palette(adp, ((struct fbcmap *)arg)->index,
2953			   ((struct fbcmap *)arg)->count,
2954			   ((struct fbcmap *)arg)->red,
2955			   ((struct fbcmap *)arg)->green,
2956			   ((struct fbcmap *)arg)->blue, NULL);
2957
2958    case FBIOPUTCMAP:		/* set color palette */
2959	return set_palette(adp, ((struct fbcmap *)arg)->index,
2960			   ((struct fbcmap *)arg)->count,
2961			   ((struct fbcmap *)arg)->red,
2962			   ((struct fbcmap *)arg)->green,
2963			   ((struct fbcmap *)arg)->blue, NULL);
2964
2965    default:
2966	return fb_commonioctl(adp, cmd, arg);
2967    }
2968}
2969
2970static void
2971dump_buffer(u_char *buf, size_t len)
2972{
2973    int i;
2974
2975    for(i = 0; i < len;) {
2976	printf("%02x ", buf[i]);
2977	if ((++i % 16) == 0)
2978	    printf("\n");
2979    }
2980}
2981
2982/*
2983 * diag():
2984 * Print some information about the video adapter and video modes,
2985 * with requested level of details.
2986 *
2987 * all adapters
2988 */
2989static int
2990vga_diag(video_adapter_t *adp, int level)
2991{
2992    u_char *mp;
2993#if FB_DEBUG > 1
2994    video_info_t info;
2995    int i;
2996#endif
2997
2998    if (!vga_init_done)
2999	return ENXIO;
3000
3001#if FB_DEBUG > 1
3002#ifndef VGA_NO_BIOS
3003    printf("vga: RTC equip. code:0x%02x, DCC code:0x%02x\n",
3004	   rtcin(RTC_EQUIPMENT), readb(BIOS_PADDRTOVADDR(0x488)));
3005    printf("vga: CRTC:0x%x, video option:0x%02x, ",
3006	   readw(BIOS_PADDRTOVADDR(0x463)),
3007	   readb(BIOS_PADDRTOVADDR(0x487)));
3008    printf("rows:%d, cols:%d, font height:%d\n",
3009	   readb(BIOS_PADDRTOVADDR(0x44a)),
3010	   readb(BIOS_PADDRTOVADDR(0x484)) + 1,
3011	   readb(BIOS_PADDRTOVADDR(0x485)));
3012#endif /* VGA_NO_BIOS */
3013#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
3014    printf("vga: param table EGA/VGA:%p", video_mode_ptr);
3015    printf(", CGA/MDA:%p\n", video_mode_ptr2);
3016    printf("vga: rows_offset:%d\n", rows_offset);
3017#endif
3018#endif /* FB_DEBUG > 1 */
3019
3020    fb_dump_adp_info(VGA_DRIVER_NAME, adp, level);
3021
3022#if FB_DEBUG > 1
3023    if (adp->va_flags & V_ADP_MODECHANGE) {
3024	for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) {
3025	    if (bios_vmode[i].vi_mode == NA)
3026		continue;
3027	    if (get_mode_param(bios_vmode[i].vi_mode) == NULL)
3028		continue;
3029	    fb_dump_mode_info(VGA_DRIVER_NAME, adp, &bios_vmode[i], level);
3030	}
3031    } else {
3032	vga_get_info(adp, adp->va_initial_mode, &info);	/* shouldn't fail */
3033	fb_dump_mode_info(VGA_DRIVER_NAME, adp, &info, level);
3034    }
3035#endif /* FB_DEBUG > 1 */
3036
3037    if ((adp->va_type != KD_EGA) && (adp->va_type != KD_VGA))
3038	return 0;
3039#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
3040    if (video_mode_ptr == NULL)
3041	printf("vga%d: %s: WARNING: video mode switching is not "
3042	       "fully supported on this adapter\n",
3043	       adp->va_unit, adp->va_name);
3044#endif
3045    if (level <= 0)
3046	return 0;
3047
3048    if (adp->va_type == KD_VGA) {
3049	printf("VGA parameters upon power-up\n");
3050	dump_buffer(adpstate.regs, sizeof(adpstate.regs));
3051	printf("VGA parameters in BIOS for mode %d\n", adp->va_initial_mode);
3052	dump_buffer(adpstate2.regs, sizeof(adpstate2.regs));
3053    }
3054
3055    mp = get_mode_param(adp->va_initial_mode);
3056    if (mp == NULL)	/* this shouldn't be happening */
3057	return 0;
3058    printf("EGA/VGA parameters to be used for mode %d\n", adp->va_initial_mode);
3059    dump_buffer(mp, V_MODE_PARAM_SIZE);
3060
3061    return 0;
3062}
3063