vga.c revision 114383
1/*-
2 * Copyright (c) 1999 Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp>
3 * Copyright (c) 1992-1998 S�ren Schmidt
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer as
11 *    the first lines of this file unmodified.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 *    derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * $FreeBSD: head/sys/dev/fb/vga.c 114383 2003-05-01 04:21:05Z peter $
30 */
31
32#include "opt_vga.h"
33#include "opt_fb.h"
34#include "opt_syscons.h"	/* should be removed in the future, XXX */
35
36#include <sys/param.h>
37#include <sys/systm.h>
38#include <sys/kernel.h>
39#include <sys/conf.h>
40#include <sys/fcntl.h>
41#include <sys/malloc.h>
42#include <sys/fbio.h>
43
44#include <vm/vm.h>
45#include <vm/vm_param.h>
46#include <vm/pmap.h>
47
48#include <machine/md_var.h>
49#ifdef __i386__
50#include <machine/pc/bios.h>
51#endif
52#include <machine/bus.h>
53
54#include <dev/fb/fbreg.h>
55#include <dev/fb/vgareg.h>
56
57#include <isa/isareg.h>
58
59#ifndef VGA_DEBUG
60#define VGA_DEBUG		0
61#endif
62
63/* machine/pc/bios.h has got too much i386-specific stuff in it */
64#ifndef BIOS_PADDRTOVADDR
65#define BIOS_PADDRTOVADDR(x) (((x) - ISA_HOLE_START) + atdevbase)
66#endif
67int
68vga_probe_unit(int unit, video_adapter_t *buf, int flags)
69{
70	video_adapter_t *adp;
71	video_switch_t *sw;
72	int error;
73
74	sw = vid_get_switch(VGA_DRIVER_NAME);
75	if (sw == NULL)
76		return 0;
77	error = (*sw->probe)(unit, &adp, NULL, flags);
78	if (error)
79		return error;
80	bcopy(adp, buf, sizeof(*buf));
81	return 0;
82}
83
84int
85vga_attach_unit(int unit, vga_softc_t *sc, int flags)
86{
87	video_switch_t *sw;
88	int error;
89
90	sw = vid_get_switch(VGA_DRIVER_NAME);
91	if (sw == NULL)
92		return ENXIO;
93
94	error = (*sw->probe)(unit, &sc->adp, NULL, flags);
95	if (error)
96		return error;
97	return (*sw->init)(unit, sc->adp, flags);
98}
99
100/* cdev driver functions */
101
102#ifdef FB_INSTALL_CDEV
103
104int
105vga_open(dev_t dev, vga_softc_t *sc, int flag, int mode, struct thread *td)
106{
107	if (sc == NULL)
108		return ENXIO;
109	if (mode & (O_CREAT | O_APPEND | O_TRUNC))
110		return ENODEV;
111
112	return genfbopen(&sc->gensc, sc->adp, flag, mode, td);
113}
114
115int
116vga_close(dev_t dev, vga_softc_t *sc, int flag, int mode, struct thread *td)
117{
118	return genfbclose(&sc->gensc, sc->adp, flag, mode, td);
119}
120
121int
122vga_read(dev_t dev, vga_softc_t *sc, struct uio *uio, int flag)
123{
124	return genfbread(&sc->gensc, sc->adp, uio, flag);
125}
126
127int
128vga_write(dev_t dev, vga_softc_t *sc, struct uio *uio, int flag)
129{
130	return genfbread(&sc->gensc, sc->adp, uio, flag);
131}
132
133int
134vga_ioctl(dev_t dev, vga_softc_t *sc, u_long cmd, caddr_t arg, int flag,
135	  struct thread *td)
136{
137	return genfbioctl(&sc->gensc, sc->adp, cmd, arg, flag, td);
138}
139
140int
141vga_mmap(dev_t dev, vga_softc_t *sc, vm_offset_t offset, vm_offset_t *paddr,
142	 int prot)
143{
144	return genfbmmap(&sc->gensc, sc->adp, offset, paddr, prot);
145}
146
147#endif /* FB_INSTALL_CDEV */
148
149/* LOW-LEVEL */
150
151#include <machine/clock.h>
152#ifdef __i386__
153#include <machine/pc/vesa.h>
154#endif
155
156#define probe_done(adp)		((adp)->va_flags & V_ADP_PROBED)
157#define init_done(adp)		((adp)->va_flags & V_ADP_INITIALIZED)
158#define config_done(adp)	((adp)->va_flags & V_ADP_REGISTERED)
159
160/* for compatibility with old kernel options */
161#ifdef SC_ALT_SEQACCESS
162#undef SC_ALT_SEQACCESS
163#undef VGA_ALT_SEQACCESS
164#define VGA_ALT_SEQACCESS	1
165#endif
166
167#ifdef SLOW_VGA
168#undef SLOW_VGA
169#undef VGA_SLOW_IOACCESS
170#define VGA_SLOW_IOACCESS	1
171#endif
172
173/* architecture dependent option */
174#ifndef __i386__
175#define VGA_NO_BIOS		1
176#endif
177
178/* this should really be in `rtc.h' */
179#define RTC_EQUIPMENT           0x14
180
181/* various sizes */
182#define V_MODE_MAP_SIZE		(M_VGA_CG320 + 1)
183#define V_MODE_PARAM_SIZE	64
184
185/* video adapter state buffer */
186struct adp_state {
187    int			sig;
188#define V_STATE_SIG	0x736f6962
189    u_char		regs[V_MODE_PARAM_SIZE];
190};
191typedef struct adp_state adp_state_t;
192
193/* video adapter information */
194#define DCC_MONO	0
195#define DCC_CGA40	1
196#define DCC_CGA80	2
197#define DCC_EGAMONO	3
198#define DCC_EGA40	4
199#define DCC_EGA80	5
200
201/*
202 * NOTE: `va_window' should have a virtual address, but is initialized
203 * with a physical address in the following table, as verify_adapter()
204 * will perform address conversion at run-time.
205 */
206static video_adapter_t adapter_init_value[] = {
207    /* DCC_MONO */
208    { 0, KD_MONO, "mda", 0, 0, 0, 	    IO_MDA, IO_MDASIZE, MONO_CRTC,
209      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE,
210      0, 0, 0, 0, 7, 0, },
211    /* DCC_CGA40 */
212    { 0, KD_CGA,  "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC,
213      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE,
214      0, 0, 0, 0, 3, 0, },
215    /* DCC_CGA80 */
216    { 0, KD_CGA,  "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC,
217      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE,
218      0, 0, 0, 0, 3, 0, },
219    /* DCC_EGAMONO */
220    { 0, KD_EGA,  "ega", 0, 0, 0,	    IO_MDA, 48,	  MONO_CRTC,
221      EGA_BUF_BASE, EGA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE,
222      0, 0, 0, 0, 7, 0, },
223    /* DCC_EGA40 */
224    { 0, KD_EGA,  "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48,	  COLOR_CRTC,
225      EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE,
226      0, 0, 0, 0, 3, 0, },
227    /* DCC_EGA80 */
228    { 0, KD_EGA,  "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48,	  COLOR_CRTC,
229      EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE,
230      0, 0, 0, 0, 3, 0, },
231};
232
233static video_adapter_t	biosadapter[2];
234static int		biosadapters = 0;
235
236/* video driver declarations */
237static int			vga_configure(int flags);
238       int			(*vga_sub_configure)(int flags);
239#if 0
240static int			vga_nop(void);
241#endif
242static int			vga_error(void);
243static vi_probe_t		vga_probe;
244static vi_init_t		vga_init;
245static vi_get_info_t		vga_get_info;
246static vi_query_mode_t		vga_query_mode;
247static vi_set_mode_t		vga_set_mode;
248static vi_save_font_t		vga_save_font;
249static vi_load_font_t		vga_load_font;
250static vi_show_font_t		vga_show_font;
251static vi_save_palette_t	vga_save_palette;
252static vi_load_palette_t	vga_load_palette;
253static vi_set_border_t		vga_set_border;
254static vi_save_state_t		vga_save_state;
255static vi_load_state_t		vga_load_state;
256static vi_set_win_org_t		vga_set_origin;
257static vi_read_hw_cursor_t	vga_read_hw_cursor;
258static vi_set_hw_cursor_t	vga_set_hw_cursor;
259static vi_set_hw_cursor_shape_t	vga_set_hw_cursor_shape;
260static vi_blank_display_t	vga_blank_display;
261static vi_mmap_t		vga_mmap_buf;
262static vi_ioctl_t		vga_dev_ioctl;
263#ifndef VGA_NO_MODE_CHANGE
264static vi_clear_t		vga_clear;
265static vi_fill_rect_t		vga_fill_rect;
266static vi_bitblt_t		vga_bitblt;
267#else /* VGA_NO_MODE_CHANGE */
268#define vga_clear		(vi_clear_t *)vga_error
269#define vga_fill_rect		(vi_fill_rect_t *)vga_error
270#define vga_bitblt		(vi_bitblt_t *)vga_error
271#endif
272static vi_diag_t		vga_diag;
273
274static video_switch_t vgavidsw = {
275	vga_probe,
276	vga_init,
277	vga_get_info,
278	vga_query_mode,
279	vga_set_mode,
280	vga_save_font,
281	vga_load_font,
282	vga_show_font,
283	vga_save_palette,
284	vga_load_palette,
285	vga_set_border,
286	vga_save_state,
287	vga_load_state,
288	vga_set_origin,
289	vga_read_hw_cursor,
290	vga_set_hw_cursor,
291	vga_set_hw_cursor_shape,
292	vga_blank_display,
293	vga_mmap_buf,
294	vga_dev_ioctl,
295	vga_clear,
296	vga_fill_rect,
297	vga_bitblt,
298	vga_error,
299	vga_error,
300	vga_diag,
301};
302
303VIDEO_DRIVER(mda, vgavidsw, NULL);
304VIDEO_DRIVER(cga, vgavidsw, NULL);
305VIDEO_DRIVER(ega, vgavidsw, NULL);
306VIDEO_DRIVER(vga, vgavidsw, vga_configure);
307
308/* VGA BIOS standard video modes */
309#define EOT		(-1)
310#define NA		(-2)
311
312static video_info_t bios_vmode[] = {
313    /* CGA */
314    { M_B40x25,     V_INFO_COLOR, 40, 25, 8,  8, 2, 1,
315      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
316    { M_C40x25,     V_INFO_COLOR, 40, 25, 8,  8, 4, 1,
317      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
318    { M_B80x25,     V_INFO_COLOR, 80, 25, 8,  8, 2, 1,
319      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
320    { M_C80x25,     V_INFO_COLOR, 80, 25, 8,  8, 4, 1,
321      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
322    /* EGA */
323    { M_ENH_B40x25, V_INFO_COLOR, 40, 25, 8, 14, 2, 1,
324      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
325    { M_ENH_C40x25, V_INFO_COLOR, 40, 25, 8, 14, 4, 1,
326      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
327    { M_ENH_B80x25, V_INFO_COLOR, 80, 25, 8, 14, 2, 1,
328      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
329    { M_ENH_C80x25, V_INFO_COLOR, 80, 25, 8, 14, 4, 1,
330      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
331    /* VGA */
332    { M_VGA_C40x25, V_INFO_COLOR, 40, 25, 8, 16, 4, 1,
333      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
334    { M_VGA_M80x25, 0,            80, 25, 8, 16, 2, 1,
335      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
336    { M_VGA_C80x25, V_INFO_COLOR, 80, 25, 8, 16, 4, 1,
337      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
338    /* MDA */
339    { M_EGAMONO80x25, 0,          80, 25, 8, 14, 2, 1,
340      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
341    /* EGA */
342    { M_ENH_B80x43, 0,            80, 43, 8,  8, 2, 1,
343      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
344    { M_ENH_C80x43, V_INFO_COLOR, 80, 43, 8,  8, 4, 1,
345      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
346    /* VGA */
347    { M_VGA_M80x30, 0,            80, 30, 8, 16, 2, 1,
348      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
349    { M_VGA_C80x30, V_INFO_COLOR, 80, 30, 8, 16, 4, 1,
350      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
351    { M_VGA_M80x50, 0,            80, 50, 8,  8, 2, 1,
352      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
353    { M_VGA_C80x50, V_INFO_COLOR, 80, 50, 8,  8, 4, 1,
354      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
355    { M_VGA_M80x60, 0,            80, 60, 8,  8, 2, 1,
356      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
357    { M_VGA_C80x60, V_INFO_COLOR, 80, 60, 8,  8, 4, 1,
358      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
359
360#ifndef VGA_NO_MODE_CHANGE
361
362#ifdef VGA_WIDTH90
363    { M_VGA_M90x25, 0,            90, 25, 8, 16, 2, 1,
364      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
365    { M_VGA_C90x25, V_INFO_COLOR, 90, 25, 8, 16, 4, 1,
366      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
367    { M_VGA_M90x30, 0,            90, 30, 8, 16, 2, 1,
368      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
369    { M_VGA_C90x30, V_INFO_COLOR, 90, 30, 8, 16, 4, 1,
370      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
371    { M_VGA_M90x43, 0,            90, 43, 8,  8, 2, 1,
372      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
373    { M_VGA_C90x43, V_INFO_COLOR, 90, 43, 8,  8, 4, 1,
374      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
375    { M_VGA_M90x50, 0,            90, 50, 8,  8, 2, 1,
376      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
377    { M_VGA_C90x50, V_INFO_COLOR, 90, 50, 8,  8, 4, 1,
378      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
379    { M_VGA_M90x60, 0,            90, 60, 8,  8, 2, 1,
380      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
381    { M_VGA_C90x60, V_INFO_COLOR, 90, 60, 8,  8, 4, 1,
382      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
383#endif /* VGA_WIDTH90 */
384
385    /* CGA */
386    { M_BG320,      V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8,  8, 2, 1,
387      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA },
388    { M_CG320,      V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8,  8, 2, 1,
389      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA },
390    { M_BG640,      V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8,  8, 1, 1,
391      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA },
392    /* EGA */
393    { M_CG320_D,    V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8,  8, 4, 4,
394      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0,
395      V_INFO_MM_PLANAR },
396    { M_CG640_E,    V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8,  8, 4, 4,
397      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
398      V_INFO_MM_PLANAR },
399    { M_EGAMONOAPA, V_INFO_GRAPHICS,                640, 350, 8, 14, 4, 4,
400      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, 64*1024, 0, 0 ,
401      V_INFO_MM_PLANAR },
402    { M_ENHMONOAPA2,V_INFO_GRAPHICS,                640, 350, 8, 14, 4, 4,
403      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
404      V_INFO_MM_PLANAR },
405    { M_CG640x350,  V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 2, 2,
406      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
407      V_INFO_MM_PLANAR },
408    { M_ENH_CG640,  V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4,
409      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
410      V_INFO_MM_PLANAR },
411    /* VGA */
412    { M_BG640x480,  V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4,
413      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
414      V_INFO_MM_PLANAR },
415    { M_CG640x480,  V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4,
416      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
417      V_INFO_MM_PLANAR },
418    { M_VGA_CG320,  V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8,  8, 8, 1,
419      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0,
420      V_INFO_MM_PACKED, 1 },
421    { M_VGA_MODEX,  V_INFO_COLOR | V_INFO_GRAPHICS, 320, 240, 8,  8, 8, 4,
422      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0,
423      V_INFO_MM_VGAX, 1 },
424#endif /* VGA_NO_MODE_CHANGE */
425
426    { EOT },
427};
428
429static int		vga_init_done = FALSE;
430#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
431static u_char		*video_mode_ptr = NULL;		/* EGA/VGA */
432static u_char		*video_mode_ptr2 = NULL;	/* CGA/MDA */
433#endif
434static u_char		*mode_map[V_MODE_MAP_SIZE];
435static adp_state_t	adpstate;
436static adp_state_t	adpstate2;
437static int		rows_offset = 1;
438
439/* local macros and functions */
440#define BIOS_SADDRTOLADDR(p) ((((p) & 0xffff0000) >> 12) + ((p) & 0x0000ffff))
441
442#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
443static void map_mode_table(u_char *map[], u_char *table, int max);
444#endif
445static void clear_mode_map(video_adapter_t *adp, u_char *map[], int max,
446			   int color);
447#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
448static int map_mode_num(int mode);
449#endif
450static int map_gen_mode_num(int type, int color, int mode);
451static int map_bios_mode_num(int type, int color, int bios_mode);
452static u_char *get_mode_param(int mode);
453#ifndef VGA_NO_BIOS
454static void fill_adapter_param(int code, video_adapter_t *adp);
455#endif
456static int verify_adapter(video_adapter_t *adp);
457static void update_adapter_info(video_adapter_t *adp, video_info_t *info);
458#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
459#define COMP_IDENTICAL	0
460#define COMP_SIMILAR	1
461#define COMP_DIFFERENT	2
462static int comp_adpregs(u_char *buf1, u_char *buf2);
463#endif
464static int probe_adapters(void);
465static int set_line_length(video_adapter_t *adp, int pixel);
466static int set_display_start(video_adapter_t *adp, int x, int y);
467static void filll_io(int val, vm_offset_t d, size_t size);
468
469#ifndef VGA_NO_MODE_CHANGE
470#ifdef VGA_WIDTH90
471static void set_width90(adp_state_t *params);
472#endif
473#endif /* !VGA_NO_MODE_CHANGE */
474
475#ifndef VGA_NO_FONT_LOADING
476#define PARAM_BUFSIZE	6
477static void set_font_mode(video_adapter_t *adp, u_char *buf);
478static void set_normal_mode(video_adapter_t *adp, u_char *buf);
479#endif
480
481#ifndef VGA_NO_MODE_CHANGE
482static void planar_fill(video_adapter_t *adp, int val);
483static void packed_fill(video_adapter_t *adp, int val);
484static void direct_fill(video_adapter_t *adp, int val);
485#ifdef notyet
486static void planar_fill_rect(video_adapter_t *adp, int val, int x, int y,
487			     int cx, int cy);
488static void packed_fill_rect(video_adapter_t *adp, int val, int x, int y,
489			     int cx, int cy);
490static void direct_fill_rect16(video_adapter_t *adp, int val, int x, int y,
491			       int cx, int cy);
492static void direct_fill_rect24(video_adapter_t *adp, int val, int x, int y,
493			       int cx, int cy);
494static void direct_fill_rect32(video_adapter_t *adp, int val, int x, int y,
495			       int cx, int cy);
496#endif /* notyet */
497#endif /* !VGA_NO_MODE_CHANGE */
498
499static void dump_buffer(u_char *buf, size_t len);
500
501#define	ISMAPPED(pa, width)				\
502	(((pa) <= (u_long)0x1000 - (width)) 		\
503	 || ((pa) >= ISA_HOLE_START && (pa) <= 0x100000 - (width)))
504
505#define	prologue(adp, flag, err)			\
506	if (!vga_init_done || !((adp)->va_flags & (flag)))	\
507	    return (err)
508
509/* a backdoor for the console driver */
510static int
511vga_configure(int flags)
512{
513    int i;
514
515    probe_adapters();
516    for (i = 0; i < biosadapters; ++i) {
517	if (!probe_done(&biosadapter[i]))
518	    continue;
519	biosadapter[i].va_flags |= V_ADP_INITIALIZED;
520	if (!config_done(&biosadapter[i])) {
521	    if (vid_register(&biosadapter[i]) < 0)
522		continue;
523	    biosadapter[i].va_flags |= V_ADP_REGISTERED;
524	}
525    }
526    if (vga_sub_configure != NULL)
527	(*vga_sub_configure)(flags);
528
529    return biosadapters;
530}
531
532/* local subroutines */
533
534#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
535/* construct the mode parameter map */
536static void
537map_mode_table(u_char *map[], u_char *table, int max)
538{
539    int i;
540
541    for(i = 0; i < max; ++i)
542	map[i] = table + i*V_MODE_PARAM_SIZE;
543    for(; i < V_MODE_MAP_SIZE; ++i)
544	map[i] = NULL;
545}
546#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */
547
548static void
549clear_mode_map(video_adapter_t *adp, u_char *map[], int max, int color)
550{
551    video_info_t info;
552    int i;
553
554    /*
555     * NOTE: we don't touch `bios_vmode[]' because it is shared
556     * by all adapters.
557     */
558    for(i = 0; i < max; ++i) {
559	if (vga_get_info(adp, i, &info))
560	    continue;
561	if ((info.vi_flags & V_INFO_COLOR) != color)
562	    map[i] = NULL;
563    }
564}
565
566#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
567/* map the non-standard video mode to a known mode number */
568static int
569map_mode_num(int mode)
570{
571    static struct {
572        int from;
573        int to;
574    } mode_map[] = {
575        { M_ENH_B80x43, M_ENH_B80x25 },
576        { M_ENH_C80x43, M_ENH_C80x25 },
577        { M_VGA_M80x30, M_VGA_M80x25 },
578        { M_VGA_C80x30, M_VGA_C80x25 },
579        { M_VGA_M80x50, M_VGA_M80x25 },
580        { M_VGA_C80x50, M_VGA_C80x25 },
581        { M_VGA_M80x60, M_VGA_M80x25 },
582        { M_VGA_C80x60, M_VGA_C80x25 },
583#ifdef VGA_WIDTH90
584        { M_VGA_M90x25, M_VGA_M80x25 },
585        { M_VGA_C90x25, M_VGA_C80x25 },
586        { M_VGA_M90x30, M_VGA_M80x25 },
587        { M_VGA_C90x30, M_VGA_C80x25 },
588        { M_VGA_M90x43, M_ENH_B80x25 },
589        { M_VGA_C90x43, M_ENH_C80x25 },
590        { M_VGA_M90x50, M_VGA_M80x25 },
591        { M_VGA_C90x50, M_VGA_C80x25 },
592        { M_VGA_M90x60, M_VGA_M80x25 },
593        { M_VGA_C90x60, M_VGA_C80x25 },
594#endif
595        { M_VGA_MODEX,  M_VGA_CG320 },
596    };
597    int i;
598
599    for (i = 0; i < sizeof(mode_map)/sizeof(mode_map[0]); ++i) {
600        if (mode_map[i].from == mode)
601            return mode_map[i].to;
602    }
603    return mode;
604}
605#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */
606
607/* map a generic video mode to a known mode number */
608static int
609map_gen_mode_num(int type, int color, int mode)
610{
611    static struct {
612	int from;
613	int to_color;
614	int to_mono;
615    } mode_map[] = {
616	{ M_TEXT_80x30,	M_VGA_C80x30, M_VGA_M80x30, },
617	{ M_TEXT_80x43,	M_ENH_C80x43, M_ENH_B80x43, },
618	{ M_TEXT_80x50,	M_VGA_C80x50, M_VGA_M80x50, },
619	{ M_TEXT_80x60,	M_VGA_C80x60, M_VGA_M80x60, },
620    };
621    int i;
622
623    if (mode == M_TEXT_80x25) {
624	switch (type) {
625
626	case KD_VGA:
627	    if (color)
628		return M_VGA_C80x25;
629	    else
630		return M_VGA_M80x25;
631	    break;
632
633	case KD_EGA:
634	    if (color)
635		return M_ENH_C80x25;
636	    else
637		return M_EGAMONO80x25;
638	    break;
639
640	case KD_CGA:
641	    return M_C80x25;
642
643	case KD_MONO:
644	case KD_HERCULES:
645	    return M_EGAMONO80x25;	/* XXX: this name is confusing */
646
647 	default:
648	    return -1;
649	}
650    }
651
652    for (i = 0; i < sizeof(mode_map)/sizeof(mode_map[0]); ++i) {
653        if (mode_map[i].from == mode)
654            return ((color) ? mode_map[i].to_color : mode_map[i].to_mono);
655    }
656    return mode;
657}
658
659/* turn the BIOS video number into our video mode number */
660static int
661map_bios_mode_num(int type, int color, int bios_mode)
662{
663    static int cga_modes[7] = {
664	M_B40x25, M_C40x25,		/* 0, 1 */
665	M_B80x25, M_C80x25,		/* 2, 3 */
666	M_BG320, M_CG320,
667	M_BG640,
668    };
669    static int ega_modes[17] = {
670	M_ENH_B40x25, M_ENH_C40x25,	/* 0, 1 */
671	M_ENH_B80x25, M_ENH_C80x25,	/* 2, 3 */
672	M_BG320, M_CG320,
673	M_BG640,
674	M_EGAMONO80x25,			/* 7 */
675	8, 9, 10, 11, 12,
676	M_CG320_D,
677	M_CG640_E,
678	M_ENHMONOAPA2,			/* XXX: video momery > 64K */
679	M_ENH_CG640,			/* XXX: video momery > 64K */
680    };
681    static int vga_modes[20] = {
682	M_VGA_C40x25, M_VGA_C40x25,	/* 0, 1 */
683	M_VGA_C80x25, M_VGA_C80x25,	/* 2, 3 */
684	M_BG320, M_CG320,
685	M_BG640,
686	M_VGA_M80x25,			/* 7 */
687	8, 9, 10, 11, 12,
688	M_CG320_D,
689	M_CG640_E,
690	M_ENHMONOAPA2,
691	M_ENH_CG640,
692	M_BG640x480, M_CG640x480,
693	M_VGA_CG320,
694    };
695
696    switch (type) {
697
698    case KD_VGA:
699	if (bios_mode < sizeof(vga_modes)/sizeof(vga_modes[0]))
700	    return vga_modes[bios_mode];
701	else if (color)
702	    return M_VGA_C80x25;
703	else
704	    return M_VGA_M80x25;
705	break;
706
707    case KD_EGA:
708	if (bios_mode < sizeof(ega_modes)/sizeof(ega_modes[0]))
709	    return ega_modes[bios_mode];
710	else if (color)
711	    return M_ENH_C80x25;
712	else
713	    return M_EGAMONO80x25;
714	break;
715
716    case KD_CGA:
717	if (bios_mode < sizeof(cga_modes)/sizeof(cga_modes[0]))
718	    return cga_modes[bios_mode];
719	else
720	    return M_C80x25;
721	break;
722
723    case KD_MONO:
724    case KD_HERCULES:
725	return M_EGAMONO80x25;		/* XXX: this name is confusing */
726
727    default:
728	break;
729    }
730    return -1;
731}
732
733/* look up a parameter table entry */
734static u_char
735*get_mode_param(int mode)
736{
737#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
738    if (mode >= V_MODE_MAP_SIZE)
739	mode = map_mode_num(mode);
740#endif
741    if ((mode >= 0) && (mode < V_MODE_MAP_SIZE))
742	return mode_map[mode];
743    else
744	return NULL;
745}
746
747#ifndef VGA_NO_BIOS
748static void
749fill_adapter_param(int code, video_adapter_t *adp)
750{
751    static struct {
752	int primary;
753	int secondary;
754    } dcc[] = {
755	{ DCC_MONO, 			DCC_EGA40 /* CGA monitor */ },
756	{ DCC_MONO, 			DCC_EGA80 /* CGA monitor */ },
757	{ DCC_MONO, 			DCC_EGA80 },
758	{ DCC_MONO, 			DCC_EGA80 },
759	{ DCC_CGA40, 			DCC_EGAMONO },
760	{ DCC_CGA80, 			DCC_EGAMONO },
761	{ DCC_EGA40 /* CGA monitor */, 	DCC_MONO},
762	{ DCC_EGA80 /* CGA monitor */, 	DCC_MONO},
763	{ DCC_EGA80,			DCC_MONO },
764	{ DCC_EGA80, 			DCC_MONO },
765	{ DCC_EGAMONO, 			DCC_CGA40 },
766	{ DCC_EGAMONO, 			DCC_CGA80 },
767    };
768
769    if ((code < 0) || (code >= sizeof(dcc)/sizeof(dcc[0]))) {
770	adp[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO];
771	adp[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80];
772    } else {
773	adp[V_ADP_PRIMARY] = adapter_init_value[dcc[code].primary];
774	adp[V_ADP_SECONDARY] = adapter_init_value[dcc[code].secondary];
775    }
776}
777#endif /* VGA_NO_BIOS */
778
779static int
780verify_adapter(video_adapter_t *adp)
781{
782    vm_offset_t buf;
783    u_int16_t v;
784#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
785    u_int32_t p;
786#endif
787
788    buf = BIOS_PADDRTOVADDR(adp->va_window);
789    v = readw(buf);
790    writew(buf, 0xA55A);
791    if (readw(buf) != 0xA55A)
792	return ENXIO;
793    writew(buf, v);
794
795    switch (adp->va_type) {
796
797    case KD_EGA:
798	outb(adp->va_crtc_addr, 7);
799	if (inb(adp->va_crtc_addr) == 7) {
800	    adp->va_type = KD_VGA;
801	    adp->va_name = "vga";
802	    adp->va_flags |= V_ADP_STATESAVE | V_ADP_PALETTE;
803	}
804	adp->va_flags |= V_ADP_STATELOAD | V_ADP_BORDER;
805	/* the color adapter may be in the 40x25 mode... XXX */
806
807#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
808	/* get the BIOS video mode pointer */
809	p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8);
810	p = BIOS_SADDRTOLADDR(p);
811	if (ISMAPPED(p, sizeof(u_int32_t))) {
812	    p = *(u_int32_t *)BIOS_PADDRTOVADDR(p);
813	    p = BIOS_SADDRTOLADDR(p);
814	    if (ISMAPPED(p, V_MODE_PARAM_SIZE))
815		video_mode_ptr = (u_char *)BIOS_PADDRTOVADDR(p);
816	}
817#endif
818	break;
819
820    case KD_CGA:
821	adp->va_flags |= V_ADP_COLOR | V_ADP_BORDER;
822	/* may be in the 40x25 mode... XXX */
823#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
824	/* get the BIOS video mode pointer */
825	p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4);
826	p = BIOS_SADDRTOLADDR(p);
827	video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p);
828#endif
829	break;
830
831    case KD_MONO:
832#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
833	/* get the BIOS video mode pointer */
834	p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4);
835	p = BIOS_SADDRTOLADDR(p);
836	video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p);
837#endif
838	break;
839    }
840
841    return 0;
842}
843
844static void
845update_adapter_info(video_adapter_t *adp, video_info_t *info)
846{
847    adp->va_flags &= ~V_ADP_COLOR;
848    adp->va_flags |=
849	(info->vi_flags & V_INFO_COLOR) ? V_ADP_COLOR : 0;
850    adp->va_crtc_addr =
851	(adp->va_flags & V_ADP_COLOR) ? COLOR_CRTC : MONO_CRTC;
852    adp->va_window = BIOS_PADDRTOVADDR(info->vi_window);
853    adp->va_window_size = info->vi_window_size;
854    adp->va_window_gran = info->vi_window_gran;
855    adp->va_window_orig = 0;
856    /* XXX */
857    adp->va_buffer = info->vi_buffer;
858    adp->va_buffer_size = info->vi_buffer_size;
859    if (info->vi_mem_model == V_INFO_MM_VGAX) {
860	adp->va_line_width = info->vi_width/2;
861    } else if (info->vi_flags & V_INFO_GRAPHICS) {
862	switch (info->vi_depth/info->vi_planes) {
863	case 1:
864	    adp->va_line_width = info->vi_width/8;
865	    break;
866	case 2:
867	    adp->va_line_width = info->vi_width/4;
868	    break;
869	case 4:
870	    adp->va_line_width = info->vi_width/2;
871	    break;
872	case 8:
873	default: /* shouldn't happen */
874	    adp->va_line_width = info->vi_width;
875	    break;
876	}
877    } else {
878	adp->va_line_width = info->vi_width;
879    }
880    adp->va_disp_start.x = 0;
881    adp->va_disp_start.y = 0;
882    bcopy(info, &adp->va_info, sizeof(adp->va_info));
883}
884
885#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
886/* compare two parameter table entries */
887static int
888comp_adpregs(u_char *buf1, u_char *buf2)
889{
890    static struct {
891        u_char mask;
892    } params[V_MODE_PARAM_SIZE] = {
893	{0xff}, {0x00}, {0xff}, 		/* COLS}, ROWS}, POINTS */
894	{0x00}, {0x00}, 			/* page length */
895	{0xfe}, {0xff}, {0xff}, {0xff},		/* sequencer registers */
896	{0xf3},					/* misc register */
897	{0xff}, {0xff}, {0xff}, {0x7f}, {0xff},	/* CRTC */
898	{0xff}, {0xff}, {0xff}, {0x7f}, {0xff},
899	{0x00}, {0x00}, {0x00}, {0x00}, {0x00},
900	{0x00}, {0xff}, {0x7f}, {0xff}, {0xff},
901	{0x7f}, {0xff}, {0xff}, {0xef}, {0xff},
902	{0xff}, {0xff}, {0xff}, {0xff}, {0xff},	/* attribute controller regs */
903	{0xff}, {0xff}, {0xff}, {0xff}, {0xff},
904	{0xff}, {0xff}, {0xff}, {0xff}, {0xff},
905	{0xff}, {0xff}, {0xff}, {0xff}, {0xf0},
906	{0xff}, {0xff}, {0xff}, {0xff}, {0xff},	/* GDC register */
907	{0xff}, {0xff}, {0xff}, {0xff},
908    };
909    int identical = TRUE;
910    int i;
911
912    if ((buf1 == NULL) || (buf2 == NULL))
913	return COMP_DIFFERENT;
914
915    for (i = 0; i < sizeof(params)/sizeof(params[0]); ++i) {
916	if (params[i].mask == 0)	/* don't care */
917	    continue;
918	if ((buf1[i] & params[i].mask) != (buf2[i] & params[i].mask))
919	    return COMP_DIFFERENT;
920	if (buf1[i] != buf2[i])
921	    identical = FALSE;
922    }
923    return (identical) ? COMP_IDENTICAL : COMP_SIMILAR;
924}
925#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */
926
927/* probe video adapters and return the number of detected adapters */
928static int
929probe_adapters(void)
930{
931    video_adapter_t *adp;
932    video_info_t info;
933#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
934    u_char *mp;
935#endif
936    int i;
937
938    /* do this test only once */
939    if (vga_init_done)
940	return biosadapters;
941    vga_init_done = TRUE;
942
943    /*
944     * Locate display adapters.
945     * The AT architecture supports upto two adapters. `syscons' allows
946     * the following combinations of adapters:
947     *     1) MDA + CGA
948     *     2) MDA + EGA/VGA color
949     *     3) CGA + EGA/VGA mono
950     * Note that `syscons' doesn't bother with MCGA as it is only
951     * avaiable for low end PS/2 models which has 80286 or earlier CPUs,
952     * thus, they are not running FreeBSD!
953     * When there are two adapaters in the system, one becomes `primary'
954     * and the other `secondary'. The EGA adapter has a set of DIP
955     * switches on board for this information and the EGA BIOS copies
956     * it in the BIOS data area BIOSDATA_VIDEOSWITCH (40:88).
957     * The VGA BIOS has more sophisticated mechanism and has this
958     * information in BIOSDATA_DCCINDEX (40:8a), but it also maintains
959     * compatibility with the EGA BIOS by updating BIOSDATA_VIDEOSWITCH.
960     */
961
962    /*
963     * Check rtc and BIOS data area.
964     * XXX: we don't use BIOSDATA_EQUIPMENT, since it is not a dead
965     * copy of RTC_EQUIPMENT.  Bits 4 and 5 of ETC_EQUIPMENT are
966     * zeros for EGA and VGA.  However, the EGA/VGA BIOS sets
967     * these bits in BIOSDATA_EQUIPMENT according to the monitor
968     * type detected.
969     */
970#ifndef VGA_NO_BIOS
971    if (*(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8)) {
972	/* EGA/VGA BIOS is present */
973	fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f,
974			   biosadapter);
975    } else {
976	switch ((rtcin(RTC_EQUIPMENT) >> 4) & 3) {	/* bit 4 and 5 */
977	case 0:
978	    /* EGA/VGA: shouldn't be happening */
979	    fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f,
980			       biosadapter);
981	    break;
982	case 1:
983	    /* CGA 40x25 */
984	    /* FIXME: switch to the 80x25 mode? XXX */
985	    biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA40];
986	    biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO];
987	    break;
988	case 2:
989	    /* CGA 80x25 */
990	    biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA80];
991	    biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO];
992	    break;
993	case 3:
994	    /* MDA */
995	    biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO];
996	    biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80];
997	    break;
998	}
999    }
1000#else
1001    /* assume EGA/VGA? XXX */
1002    biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_EGA80];
1003    biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO];
1004#endif /* VGA_NO_BIOS */
1005
1006    biosadapters = 0;
1007    if (verify_adapter(&biosadapter[V_ADP_SECONDARY]) == 0) {
1008	++biosadapters;
1009	biosadapter[V_ADP_SECONDARY].va_flags |= V_ADP_PROBED;
1010	biosadapter[V_ADP_SECONDARY].va_mode =
1011	    biosadapter[V_ADP_SECONDARY].va_initial_mode =
1012	    map_bios_mode_num(biosadapter[V_ADP_SECONDARY].va_type,
1013			      biosadapter[V_ADP_SECONDARY].va_flags
1014				  & V_ADP_COLOR,
1015			      biosadapter[V_ADP_SECONDARY].va_initial_bios_mode);
1016    } else {
1017	biosadapter[V_ADP_SECONDARY].va_type = -1;
1018    }
1019    if (verify_adapter(&biosadapter[V_ADP_PRIMARY]) == 0) {
1020	++biosadapters;
1021	biosadapter[V_ADP_PRIMARY].va_flags |= V_ADP_PROBED;
1022#ifndef VGA_NO_BIOS
1023	biosadapter[V_ADP_PRIMARY].va_initial_bios_mode =
1024	    readb(BIOS_PADDRTOVADDR(0x449));
1025#else
1026	biosadapter[V_ADP_PRIMARY].va_initial_bios_mode = 3;	/* XXX */
1027#endif
1028	biosadapter[V_ADP_PRIMARY].va_mode =
1029	    biosadapter[V_ADP_PRIMARY].va_initial_mode =
1030	    map_bios_mode_num(biosadapter[V_ADP_PRIMARY].va_type,
1031			      biosadapter[V_ADP_PRIMARY].va_flags & V_ADP_COLOR,
1032			      biosadapter[V_ADP_PRIMARY].va_initial_bios_mode);
1033    } else {
1034	biosadapter[V_ADP_PRIMARY] = biosadapter[V_ADP_SECONDARY];
1035	biosadapter[V_ADP_SECONDARY].va_type = -1;
1036    }
1037    if (biosadapters == 0)
1038	return biosadapters;
1039    biosadapter[V_ADP_PRIMARY].va_unit = V_ADP_PRIMARY;
1040    biosadapter[V_ADP_SECONDARY].va_unit = V_ADP_SECONDARY;
1041
1042#if 0 /* we don't need these... */
1043    fb_init_struct(&biosadapter[V_ADP_PRIMARY], ...);
1044    fb_init_struct(&biosadapter[V_ADP_SECONDARY], ...);
1045#endif
1046
1047#if notyet
1048    /*
1049     * We cannot have two video adapter of the same type; there must be
1050     * only one of color or mono adapter, or one each of them.
1051     */
1052    if (biosadapters > 1) {
1053	if (!((biosadapter[0].va_flags ^ biosadapter[1].va_flags)
1054	      & V_ADP_COLOR))
1055	    /* we have two mono or color adapters!! */
1056	    return (biosadapters = 0);
1057    }
1058#endif
1059
1060    /*
1061     * Ensure a zero start address. The registers are w/o
1062     * for old hardware so it's too hard to relocate the active screen
1063     * memory.
1064     * This must be done before vga_save_state() for VGA.
1065     */
1066    outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 12);
1067    outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0);
1068    outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 13);
1069    outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0);
1070
1071    /* the video mode parameter table in EGA/VGA BIOS */
1072    /* NOTE: there can be only one EGA/VGA, wheather color or mono,
1073     * recognized by the video BIOS.
1074     */
1075    if ((biosadapter[V_ADP_PRIMARY].va_type == KD_EGA) ||
1076	(biosadapter[V_ADP_PRIMARY].va_type == KD_VGA)) {
1077	adp = &biosadapter[V_ADP_PRIMARY];
1078    } else if ((biosadapter[V_ADP_SECONDARY].va_type == KD_EGA) ||
1079	       (biosadapter[V_ADP_SECONDARY].va_type == KD_VGA)) {
1080	adp = &biosadapter[V_ADP_SECONDARY];
1081    } else {
1082	adp = NULL;
1083    }
1084    bzero(mode_map, sizeof(mode_map));
1085    if (adp != NULL) {
1086	if (adp->va_type == KD_VGA) {
1087	    vga_save_state(adp, &adpstate, sizeof(adpstate));
1088#if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE)
1089	    mode_map[adp->va_initial_mode] = adpstate.regs;
1090	    rows_offset = 1;
1091#else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */
1092	    if (video_mode_ptr == NULL) {
1093		mode_map[adp->va_initial_mode] = adpstate.regs;
1094		rows_offset = 1;
1095	    } else {
1096		/* discard the table if we are not familiar with it... */
1097		map_mode_table(mode_map, video_mode_ptr, M_VGA_CG320 + 1);
1098		mp = get_mode_param(adp->va_initial_mode);
1099		if (mp != NULL)
1100		    bcopy(mp, adpstate2.regs, sizeof(adpstate2.regs));
1101		switch (comp_adpregs(adpstate.regs, mp)) {
1102		case COMP_IDENTICAL:
1103		    /*
1104		     * OK, this parameter table looks reasonably familiar
1105		     * to us...
1106		     */
1107		    /*
1108		     * This is a kludge for Toshiba DynaBook SS433
1109		     * whose BIOS video mode table entry has the actual #
1110		     * of rows at the offset 1; BIOSes from other
1111		     * manufacturers store the # of rows - 1 there. XXX
1112		     */
1113		    rows_offset = adpstate.regs[1] + 1 - mp[1];
1114		    break;
1115
1116		case COMP_SIMILAR:
1117		    /*
1118		     * Not exactly the same, but similar enough to be
1119		     * trusted. However, use the saved register values
1120		     * for the initial mode and other modes which are
1121		     * based on the initial mode.
1122		     */
1123		    mode_map[adp->va_initial_mode] = adpstate.regs;
1124		    rows_offset = adpstate.regs[1] + 1 - mp[1];
1125		    adpstate.regs[1] -= rows_offset - 1;
1126		    break;
1127
1128		case COMP_DIFFERENT:
1129		default:
1130		    /*
1131		     * Don't use the paramter table in BIOS. It doesn't
1132		     * look familiar to us. Video mode switching is allowed
1133		     * only if the new mode is the same as or based on
1134		     * the initial mode.
1135		     */
1136		    video_mode_ptr = NULL;
1137		    bzero(mode_map, sizeof(mode_map));
1138		    mode_map[adp->va_initial_mode] = adpstate.regs;
1139		    rows_offset = 1;
1140		    break;
1141		}
1142	    }
1143#endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */
1144
1145#ifndef VGA_NO_MODE_CHANGE
1146	    adp->va_flags |= V_ADP_MODECHANGE;
1147#endif
1148#ifndef VGA_NO_FONT_LOADING
1149	    adp->va_flags |= V_ADP_FONT;
1150#endif
1151	} else if (adp->va_type == KD_EGA) {
1152#if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE)
1153	    rows_offset = 1;
1154#else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */
1155	    if (video_mode_ptr == NULL) {
1156		rows_offset = 1;
1157	    } else {
1158		map_mode_table(mode_map, video_mode_ptr, M_ENH_C80x25 + 1);
1159		/* XXX how can one validate the EGA table... */
1160		mp = get_mode_param(adp->va_initial_mode);
1161		if (mp != NULL) {
1162		    adp->va_flags |= V_ADP_MODECHANGE;
1163#ifndef VGA_NO_FONT_LOADING
1164		    adp->va_flags |= V_ADP_FONT;
1165#endif
1166		    rows_offset = 1;
1167		} else {
1168		    /*
1169		     * This is serious. We will not be able to switch video
1170		     * modes at all...
1171		     */
1172		    video_mode_ptr = NULL;
1173		    bzero(mode_map, sizeof(mode_map));
1174		    rows_offset = 1;
1175                }
1176	    }
1177#endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */
1178	}
1179    }
1180
1181    /* remove conflicting modes if we have more than one adapter */
1182    if (biosadapters > 0) {
1183	for (i = 0; i < biosadapters; ++i) {
1184	    if (!(biosadapter[i].va_flags & V_ADP_MODECHANGE))
1185		continue;
1186	    clear_mode_map(&biosadapter[i], mode_map, M_VGA_CG320 + 1,
1187			   (biosadapter[i].va_flags & V_ADP_COLOR) ?
1188			       V_INFO_COLOR : 0);
1189	    if ((biosadapter[i].va_type == KD_VGA)
1190		|| (biosadapter[i].va_type == KD_EGA)) {
1191		biosadapter[i].va_io_base =
1192		    (biosadapter[i].va_flags & V_ADP_COLOR) ?
1193			IO_VGA : IO_MDA;
1194		biosadapter[i].va_io_size = 32;
1195	    }
1196	}
1197    }
1198
1199    /* buffer address */
1200    vga_get_info(&biosadapter[V_ADP_PRIMARY],
1201		 biosadapter[V_ADP_PRIMARY].va_initial_mode, &info);
1202    info.vi_flags &= ~V_INFO_LINEAR; /* XXX */
1203    update_adapter_info(&biosadapter[V_ADP_PRIMARY], &info);
1204
1205    if (biosadapters > 1) {
1206	vga_get_info(&biosadapter[V_ADP_SECONDARY],
1207		     biosadapter[V_ADP_SECONDARY].va_initial_mode, &info);
1208	info.vi_flags &= ~V_INFO_LINEAR; /* XXX */
1209	update_adapter_info(&biosadapter[V_ADP_SECONDARY], &info);
1210    }
1211
1212    /*
1213     * XXX: we should verify the following values for the primary adapter...
1214     * crtc I/O port address: *(u_int16_t *)BIOS_PADDRTOVADDR(0x463);
1215     * color/mono display: (*(u_int8_t *)BIOS_PADDRTOVADDR(0x487) & 0x02)
1216     *                     ? 0 : V_ADP_COLOR;
1217     * columns: *(u_int8_t *)BIOS_PADDRTOVADDR(0x44a);
1218     * rows: *(u_int8_t *)BIOS_PADDRTOVADDR(0x484);
1219     * font size: *(u_int8_t *)BIOS_PADDRTOVADDR(0x485);
1220     * buffer size: *(u_int16_t *)BIOS_PADDRTOVADDR(0x44c);
1221     */
1222
1223    return biosadapters;
1224}
1225
1226/* set the scan line length in pixel */
1227static int
1228set_line_length(video_adapter_t *adp, int pixel)
1229{
1230    u_char *mp;
1231    int ppw;	/* pixels per word */
1232    int bpl;	/* bytes per line */
1233    int count;
1234
1235    if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA))
1236	return ENODEV;
1237    mp = get_mode_param(adp->va_mode);
1238    if (mp == NULL)
1239	return EINVAL;
1240
1241    switch (adp->va_info.vi_mem_model) {
1242    case V_INFO_MM_PLANAR:
1243	ppw = 16/(adp->va_info.vi_depth/adp->va_info.vi_planes);
1244	count = (pixel + ppw - 1)/ppw/2;
1245	bpl = ((pixel + ppw - 1)/ppw/2)*4;
1246	break;
1247    case V_INFO_MM_PACKED:
1248	count = (pixel + 7)/8;
1249	bpl = ((pixel + 7)/8)*8;
1250	break;
1251    case V_INFO_MM_TEXT:
1252	count = (pixel + 7)/8;			/* columns */
1253	bpl = (pixel + 7)/8;			/* columns */
1254	break;
1255    default:
1256	return ENODEV;
1257    }
1258
1259    if (mp[10 + 0x17] & 0x40)			/* CRTC mode control reg */
1260	count *= 2;				/* byte mode */
1261    outb(adp->va_crtc_addr, 0x13);
1262    outb(adp->va_crtc_addr + 1, count);
1263    adp->va_line_width = bpl;
1264
1265    return 0;
1266}
1267
1268static int
1269set_display_start(video_adapter_t *adp, int x, int y)
1270{
1271    int off;	/* byte offset (graphics mode)/word offset (text mode) */
1272    int poff;	/* pixel offset */
1273    int roff;	/* row offset */
1274    int ppb;	/* pixels per byte */
1275
1276    if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA))
1277	x &= ~7;
1278    if (adp->va_info.vi_flags & V_INFO_GRAPHICS) {
1279	ppb = 8/(adp->va_info.vi_depth/adp->va_info.vi_planes);
1280	off = y*adp->va_line_width + x/ppb;
1281	roff = 0;
1282	poff = x%ppb;
1283    } else {
1284	if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) {
1285	    outb(TSIDX, 1);
1286	    if (inb(TSREG) & 1)
1287		ppb = 9;
1288	    else
1289		ppb = 8;
1290	} else {
1291	    ppb = 8;
1292	}
1293	off = y/adp->va_info.vi_cheight*adp->va_line_width + x/ppb;
1294	roff = y%adp->va_info.vi_cheight;
1295	/* FIXME: is this correct? XXX */
1296	if (ppb == 8)
1297	    poff = x%ppb;
1298	else
1299	    poff = (x + 8)%ppb;
1300    }
1301
1302    /* start address */
1303    outb(adp->va_crtc_addr, 0xc);		/* high */
1304    outb(adp->va_crtc_addr + 1, off >> 8);
1305    outb(adp->va_crtc_addr, 0xd);		/* low */
1306    outb(adp->va_crtc_addr + 1, off & 0xff);
1307
1308    /* horizontal pel pan */
1309    if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) {
1310	inb(adp->va_crtc_addr + 6);
1311	outb(ATC, 0x13 | 0x20);
1312	outb(ATC, poff);
1313	inb(adp->va_crtc_addr + 6);
1314	outb(ATC, 0x20);
1315    }
1316
1317    /* preset raw scan */
1318    outb(adp->va_crtc_addr, 8);
1319    outb(adp->va_crtc_addr + 1, roff);
1320
1321    adp->va_disp_start.x = x;
1322    adp->va_disp_start.y = y;
1323    return 0;
1324}
1325
1326#if defined(__i386__) || defined(__amd64__)	/* XXX */
1327static void
1328fill(int val, void *d, size_t size)
1329{
1330    u_char *p = d;
1331
1332    while (size-- > 0)
1333	*p++ = val;
1334}
1335#endif /* __i386__ */
1336
1337static void
1338filll_io(int val, vm_offset_t d, size_t size)
1339{
1340    while (size-- > 0) {
1341	writel(d, val);
1342	d += sizeof(u_int32_t);
1343    }
1344}
1345
1346/* entry points */
1347
1348#if 0
1349static int
1350vga_nop(void)
1351{
1352    return 0;
1353}
1354#endif
1355
1356static int
1357vga_error(void)
1358{
1359    return ENODEV;
1360}
1361
1362static int
1363vga_probe(int unit, video_adapter_t **adpp, void *arg, int flags)
1364{
1365    probe_adapters();
1366    if (unit >= biosadapters)
1367	return ENXIO;
1368
1369    *adpp = &biosadapter[unit];
1370
1371    return 0;
1372}
1373
1374static int
1375vga_init(int unit, video_adapter_t *adp, int flags)
1376{
1377    if ((unit >= biosadapters) || (adp == NULL) || !probe_done(adp))
1378	return ENXIO;
1379
1380    if (!init_done(adp)) {
1381	/* nothing to do really... */
1382	adp->va_flags |= V_ADP_INITIALIZED;
1383    }
1384
1385    if (!config_done(adp)) {
1386	if (vid_register(adp) < 0)
1387		return ENXIO;
1388	adp->va_flags |= V_ADP_REGISTERED;
1389    }
1390    if (vga_sub_configure != NULL)
1391	(*vga_sub_configure)(0);
1392
1393    return 0;
1394}
1395
1396/*
1397 * get_info():
1398 * Return the video_info structure of the requested video mode.
1399 *
1400 * all adapters
1401 */
1402static int
1403vga_get_info(video_adapter_t *adp, int mode, video_info_t *info)
1404{
1405    int i;
1406
1407    if (!vga_init_done)
1408	return ENXIO;
1409
1410    mode = map_gen_mode_num(adp->va_type, adp->va_flags & V_ADP_COLOR, mode);
1411#ifndef VGA_NO_MODE_CHANGE
1412    if (adp->va_flags & V_ADP_MODECHANGE) {
1413	/*
1414	 * If the parameter table entry for this mode is not found,
1415	 * the mode is not supported...
1416	 */
1417	if (get_mode_param(mode) == NULL)
1418	    return EINVAL;
1419    } else
1420#endif /* VGA_NO_MODE_CHANGE */
1421    {
1422	/*
1423	 * Even if we don't support video mode switching on this adapter,
1424	 * the information on the initial (thus current) video mode
1425	 * should be made available.
1426	 */
1427	if (mode != adp->va_initial_mode)
1428	    return EINVAL;
1429    }
1430
1431    for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) {
1432	if (bios_vmode[i].vi_mode == NA)
1433	    continue;
1434	if (mode == bios_vmode[i].vi_mode) {
1435	    *info = bios_vmode[i];
1436	    /* XXX */
1437	    info->vi_buffer_size = info->vi_window_size*info->vi_planes;
1438	    return 0;
1439	}
1440    }
1441    return EINVAL;
1442}
1443
1444/*
1445 * query_mode():
1446 * Find a video mode matching the requested parameters.
1447 * Fields filled with 0 are considered "don't care" fields and
1448 * match any modes.
1449 *
1450 * all adapters
1451 */
1452static int
1453vga_query_mode(video_adapter_t *adp, video_info_t *info)
1454{
1455    int i;
1456
1457    if (!vga_init_done)
1458	return ENXIO;
1459
1460    for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) {
1461	if (bios_vmode[i].vi_mode == NA)
1462	    continue;
1463
1464	if ((info->vi_width != 0)
1465	    && (info->vi_width != bios_vmode[i].vi_width))
1466		continue;
1467	if ((info->vi_height != 0)
1468	    && (info->vi_height != bios_vmode[i].vi_height))
1469		continue;
1470	if ((info->vi_cwidth != 0)
1471	    && (info->vi_cwidth != bios_vmode[i].vi_cwidth))
1472		continue;
1473	if ((info->vi_cheight != 0)
1474	    && (info->vi_cheight != bios_vmode[i].vi_cheight))
1475		continue;
1476	if ((info->vi_depth != 0)
1477	    && (info->vi_depth != bios_vmode[i].vi_depth))
1478		continue;
1479	if ((info->vi_planes != 0)
1480	    && (info->vi_planes != bios_vmode[i].vi_planes))
1481		continue;
1482	/* XXX: should check pixel format, memory model */
1483	if ((info->vi_flags != 0)
1484	    && (info->vi_flags != bios_vmode[i].vi_flags))
1485		continue;
1486
1487	/* verify if this mode is supported on this adapter */
1488	if (vga_get_info(adp, bios_vmode[i].vi_mode, info))
1489		continue;
1490	return 0;
1491    }
1492    return ENODEV;
1493}
1494
1495/*
1496 * set_mode():
1497 * Change the video mode.
1498 *
1499 * EGA/VGA
1500 */
1501
1502#ifndef VGA_NO_MODE_CHANGE
1503#ifdef VGA_WIDTH90
1504static void
1505set_width90(adp_state_t *params)
1506{
1507    /*
1508     * Based on code submitted by Kelly Yancey (kbyanc@freedomnet.com)
1509     * and alexv@sui.gda.itesm.mx.
1510     */
1511    params->regs[5] |= 1;		/* toggle 8 pixel wide fonts */
1512    params->regs[10+0x0] = 0x6b;
1513    params->regs[10+0x1] = 0x59;
1514    params->regs[10+0x2] = 0x5a;
1515    params->regs[10+0x3] = 0x8e;
1516    params->regs[10+0x4] = 0x5e;
1517    params->regs[10+0x5] = 0x8a;
1518    params->regs[10+0x13] = 45;
1519    params->regs[35+0x13] = 0;
1520}
1521#endif /* VGA_WIDTH90 */
1522#endif /* !VGA_NO_MODE_CHANGE */
1523
1524static int
1525vga_set_mode(video_adapter_t *adp, int mode)
1526{
1527#ifndef VGA_NO_MODE_CHANGE
1528    video_info_t info;
1529    adp_state_t params;
1530
1531    prologue(adp, V_ADP_MODECHANGE, ENODEV);
1532
1533    mode = map_gen_mode_num(adp->va_type,
1534			    adp->va_flags & V_ADP_COLOR, mode);
1535    if (vga_get_info(adp, mode, &info))
1536	return EINVAL;
1537
1538#if VGA_DEBUG > 1
1539    printf("vga_set_mode(): setting mode %d\n", mode);
1540#endif
1541
1542    params.sig = V_STATE_SIG;
1543    bcopy(get_mode_param(mode), params.regs, sizeof(params.regs));
1544
1545    switch (mode) {
1546#ifdef VGA_WIDTH90
1547    case M_VGA_C90x60: case M_VGA_M90x60:
1548	set_width90(&params);
1549	/* FALLTHROUGH */
1550#endif
1551    case M_VGA_C80x60: case M_VGA_M80x60:
1552	params.regs[2]  = 0x08;
1553	params.regs[19] = 0x47;
1554	goto special_480l;
1555
1556#ifdef VGA_WIDTH90
1557    case M_VGA_C90x30: case M_VGA_M90x30:
1558	set_width90(&params);
1559	/* FALLTHROUGH */
1560#endif
1561    case M_VGA_C80x30: case M_VGA_M80x30:
1562	params.regs[19] = 0x4f;
1563special_480l:
1564	params.regs[9] |= 0xc0;
1565	params.regs[16] = 0x08;
1566	params.regs[17] = 0x3e;
1567	params.regs[26] = 0xea;
1568	params.regs[28] = 0xdf;
1569	params.regs[31] = 0xe7;
1570	params.regs[32] = 0x04;
1571	goto setup_mode;
1572
1573#ifdef VGA_WIDTH90
1574    case M_VGA_C90x43: case M_VGA_M90x43:
1575	set_width90(&params);
1576	/* FALLTHROUGH */
1577#endif
1578    case M_ENH_C80x43: case M_ENH_B80x43:
1579	params.regs[28] = 87;
1580	goto special_80x50;
1581
1582#ifdef VGA_WIDTH90
1583    case M_VGA_C90x50: case M_VGA_M90x50:
1584	set_width90(&params);
1585	/* FALLTHROUGH */
1586#endif
1587    case M_VGA_C80x50: case M_VGA_M80x50:
1588special_80x50:
1589	params.regs[2] = 8;
1590	params.regs[19] = 7;
1591	goto setup_mode;
1592
1593#ifdef VGA_WIDTH90
1594    case M_VGA_C90x25: case M_VGA_M90x25:
1595	set_width90(&params);
1596	/* FALLTHROUGH */
1597#endif
1598    case M_VGA_C40x25: case M_VGA_C80x25:
1599    case M_VGA_M80x25:
1600    case M_B40x25:     case M_C40x25:
1601    case M_B80x25:     case M_C80x25:
1602    case M_ENH_B40x25: case M_ENH_C40x25:
1603    case M_ENH_B80x25: case M_ENH_C80x25:
1604    case M_EGAMONO80x25:
1605
1606setup_mode:
1607	vga_load_state(adp, &params);
1608	break;
1609
1610    case M_VGA_MODEX:
1611	/* "unchain" the VGA mode */
1612	params.regs[5-1+0x04] &= 0xf7;
1613	params.regs[5-1+0x04] |= 0x04;
1614	/* turn off doubleword mode */
1615	params.regs[10+0x14] &= 0xbf;
1616	/* turn off word addressing */
1617	params.regs[10+0x17] |= 0x40;
1618	/* set logical screen width */
1619	params.regs[10+0x13] = 80;
1620	/* set 240 lines */
1621	params.regs[10+0x11] = 0x2c;
1622	params.regs[10+0x06] = 0x0d;
1623	params.regs[10+0x07] = 0x3e;
1624	params.regs[10+0x10] = 0xea;
1625	params.regs[10+0x11] = 0xac;
1626	params.regs[10+0x12] = 0xdf;
1627	params.regs[10+0x15] = 0xe7;
1628	params.regs[10+0x16] = 0x06;
1629	/* set vertical sync polarity to reflect aspect ratio */
1630	params.regs[9] = 0xe3;
1631	goto setup_grmode;
1632
1633    case M_BG320:     case M_CG320:     case M_BG640:
1634    case M_CG320_D:   case M_CG640_E:
1635    case M_CG640x350: case M_ENH_CG640:
1636    case M_BG640x480: case M_CG640x480: case M_VGA_CG320:
1637
1638setup_grmode:
1639	vga_load_state(adp, &params);
1640	break;
1641
1642    default:
1643	return EINVAL;
1644    }
1645
1646    adp->va_mode = mode;
1647    info.vi_flags &= ~V_INFO_LINEAR; /* XXX */
1648    update_adapter_info(adp, &info);
1649
1650    /* move hardware cursor out of the way */
1651    (*vidsw[adp->va_index]->set_hw_cursor)(adp, -1, -1);
1652
1653    return 0;
1654#else /* VGA_NO_MODE_CHANGE */
1655    return ENODEV;
1656#endif /* VGA_NO_MODE_CHANGE */
1657}
1658
1659#ifndef VGA_NO_FONT_LOADING
1660
1661static void
1662set_font_mode(video_adapter_t *adp, u_char *buf)
1663{
1664    u_char *mp;
1665    int s;
1666
1667    s = splhigh();
1668
1669    /* save register values */
1670    if (adp->va_type == KD_VGA) {
1671	outb(TSIDX, 0x02); buf[0] = inb(TSREG);
1672	outb(TSIDX, 0x04); buf[1] = inb(TSREG);
1673	outb(GDCIDX, 0x04); buf[2] = inb(GDCREG);
1674	outb(GDCIDX, 0x05); buf[3] = inb(GDCREG);
1675	outb(GDCIDX, 0x06); buf[4] = inb(GDCREG);
1676	inb(adp->va_crtc_addr + 6);
1677	outb(ATC, 0x10); buf[5] = inb(ATC + 1);
1678    } else /* if (adp->va_type == KD_EGA) */ {
1679	/*
1680	 * EGA cannot be read; copy parameters from the mode parameter
1681	 * table.
1682	 */
1683	mp = get_mode_param(adp->va_mode);
1684	buf[0] = mp[5 + 0x02 - 1];
1685	buf[1] = mp[5 + 0x04 - 1];
1686	buf[2] = mp[55 + 0x04];
1687	buf[3] = mp[55 + 0x05];
1688	buf[4] = mp[55 + 0x06];
1689	buf[5] = mp[35 + 0x10];
1690    }
1691
1692    /* setup vga for loading fonts */
1693    inb(adp->va_crtc_addr + 6);			/* reset flip-flop */
1694    outb(ATC, 0x10); outb(ATC, buf[5] & ~0x01);
1695    inb(adp->va_crtc_addr + 6);			/* reset flip-flop */
1696    outb(ATC, 0x20);				/* enable palette */
1697
1698#if VGA_SLOW_IOACCESS
1699#ifdef VGA_ALT_SEQACCESS
1700    outb(TSIDX, 0x00); outb(TSREG, 0x01);
1701#endif
1702    outb(TSIDX, 0x02); outb(TSREG, 0x04);
1703    outb(TSIDX, 0x04); outb(TSREG, 0x07);
1704#ifdef VGA_ALT_SEQACCESS
1705    outb(TSIDX, 0x00); outb(TSREG, 0x03);
1706#endif
1707    outb(GDCIDX, 0x04); outb(GDCREG, 0x02);
1708    outb(GDCIDX, 0x05); outb(GDCREG, 0x00);
1709    outb(GDCIDX, 0x06); outb(GDCREG, 0x04);
1710#else /* VGA_SLOW_IOACCESS */
1711#ifdef VGA_ALT_SEQACCESS
1712    outw(TSIDX, 0x0100);
1713#endif
1714    outw(TSIDX, 0x0402);
1715    outw(TSIDX, 0x0704);
1716#ifdef VGA_ALT_SEQACCESS
1717    outw(TSIDX, 0x0300);
1718#endif
1719    outw(GDCIDX, 0x0204);
1720    outw(GDCIDX, 0x0005);
1721    outw(GDCIDX, 0x0406);               /* addr = a0000, 64kb */
1722#endif /* VGA_SLOW_IOACCESS */
1723
1724    splx(s);
1725}
1726
1727static void
1728set_normal_mode(video_adapter_t *adp, u_char *buf)
1729{
1730    int s;
1731
1732    s = splhigh();
1733
1734    /* setup vga for normal operation mode again */
1735    inb(adp->va_crtc_addr + 6);			/* reset flip-flop */
1736    outb(ATC, 0x10); outb(ATC, buf[5]);
1737    inb(adp->va_crtc_addr + 6);			/* reset flip-flop */
1738    outb(ATC, 0x20);				/* enable palette */
1739
1740#if VGA_SLOW_IOACCESS
1741#ifdef VGA_ALT_SEQACCESS
1742    outb(TSIDX, 0x00); outb(TSREG, 0x01);
1743#endif
1744    outb(TSIDX, 0x02); outb(TSREG, buf[0]);
1745    outb(TSIDX, 0x04); outb(TSREG, buf[1]);
1746#ifdef VGA_ALT_SEQACCESS
1747    outb(TSIDX, 0x00); outb(TSREG, 0x03);
1748#endif
1749    outb(GDCIDX, 0x04); outb(GDCREG, buf[2]);
1750    outb(GDCIDX, 0x05); outb(GDCREG, buf[3]);
1751    if (adp->va_crtc_addr == MONO_CRTC) {
1752	outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x08);
1753    } else {
1754	outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x0c);
1755    }
1756#else /* VGA_SLOW_IOACCESS */
1757#ifdef VGA_ALT_SEQACCESS
1758    outw(TSIDX, 0x0100);
1759#endif
1760    outw(TSIDX, 0x0002 | (buf[0] << 8));
1761    outw(TSIDX, 0x0004 | (buf[1] << 8));
1762#ifdef VGA_ALT_SEQACCESS
1763    outw(TSIDX, 0x0300);
1764#endif
1765    outw(GDCIDX, 0x0004 | (buf[2] << 8));
1766    outw(GDCIDX, 0x0005 | (buf[3] << 8));
1767    if (adp->va_crtc_addr == MONO_CRTC)
1768        outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x08)<<8));
1769    else
1770        outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x0c)<<8));
1771#endif /* VGA_SLOW_IOACCESS */
1772
1773    splx(s);
1774}
1775
1776#endif /* VGA_NO_FONT_LOADING */
1777
1778/*
1779 * save_font():
1780 * Read the font data in the requested font page from the video adapter.
1781 *
1782 * EGA/VGA
1783 */
1784static int
1785vga_save_font(video_adapter_t *adp, int page, int fontsize, u_char *data,
1786	      int ch, int count)
1787{
1788#ifndef VGA_NO_FONT_LOADING
1789    u_char buf[PARAM_BUFSIZE];
1790    u_int32_t segment;
1791    int c;
1792#ifdef VGA_ALT_SEQACCESS
1793    int s;
1794    u_char val = 0;
1795#endif
1796
1797    prologue(adp, V_ADP_FONT, ENODEV);
1798
1799    if (fontsize < 14) {
1800	/* FONT_8 */
1801	fontsize = 8;
1802    } else if (fontsize >= 32) {
1803	fontsize = 32;
1804    } else if (fontsize >= 16) {
1805	/* FONT_16 */
1806	fontsize = 16;
1807    } else {
1808	/* FONT_14 */
1809	fontsize = 14;
1810    }
1811
1812    if (page < 0 || page >= 8)
1813	return EINVAL;
1814    segment = FONT_BUF + 0x4000*page;
1815    if (page > 3)
1816	segment -= 0xe000;
1817
1818#ifdef VGA_ALT_SEQACCESS
1819    if (adp->va_type == KD_VGA) {	/* what about EGA? XXX */
1820	s = splhigh();
1821	outb(TSIDX, 0x00); outb(TSREG, 0x01);
1822	outb(TSIDX, 0x01); val = inb(TSREG);	/* disable screen */
1823	outb(TSIDX, 0x01); outb(TSREG, val | 0x20);
1824	outb(TSIDX, 0x00); outb(TSREG, 0x03);
1825	splx(s);
1826    }
1827#endif
1828
1829    set_font_mode(adp, buf);
1830    if (fontsize == 32) {
1831	bcopy_fromio((uintptr_t)segment + ch*32, data, fontsize*count);
1832    } else {
1833	for (c = ch; count > 0; ++c, --count) {
1834	    bcopy_fromio((uintptr_t)segment + c*32, data, fontsize);
1835	    data += fontsize;
1836	}
1837    }
1838    set_normal_mode(adp, buf);
1839
1840#ifdef VGA_ALT_SEQACCESS
1841    if (adp->va_type == KD_VGA) {
1842	s = splhigh();
1843	outb(TSIDX, 0x00); outb(TSREG, 0x01);
1844	outb(TSIDX, 0x01); outb(TSREG, val & 0xdf);	/* enable screen */
1845	outb(TSIDX, 0x00); outb(TSREG, 0x03);
1846	splx(s);
1847    }
1848#endif
1849
1850    return 0;
1851#else /* VGA_NO_FONT_LOADING */
1852    return ENODEV;
1853#endif /* VGA_NO_FONT_LOADING */
1854}
1855
1856/*
1857 * load_font():
1858 * Set the font data in the requested font page.
1859 * NOTE: it appears that some recent video adapters do not support
1860 * the font page other than 0... XXX
1861 *
1862 * EGA/VGA
1863 */
1864static int
1865vga_load_font(video_adapter_t *adp, int page, int fontsize, u_char *data,
1866	      int ch, int count)
1867{
1868#ifndef VGA_NO_FONT_LOADING
1869    u_char buf[PARAM_BUFSIZE];
1870    u_int32_t segment;
1871    int c;
1872#ifdef VGA_ALT_SEQACCESS
1873    int s;
1874    u_char val = 0;
1875#endif
1876
1877    prologue(adp, V_ADP_FONT, ENODEV);
1878
1879    if (fontsize < 14) {
1880	/* FONT_8 */
1881	fontsize = 8;
1882    } else if (fontsize >= 32) {
1883	fontsize = 32;
1884    } else if (fontsize >= 16) {
1885	/* FONT_16 */
1886	fontsize = 16;
1887    } else {
1888	/* FONT_14 */
1889	fontsize = 14;
1890    }
1891
1892    if (page < 0 || page >= 8)
1893	return EINVAL;
1894    segment = FONT_BUF + 0x4000*page;
1895    if (page > 3)
1896	segment -= 0xe000;
1897
1898#ifdef VGA_ALT_SEQACCESS
1899    if (adp->va_type == KD_VGA) {	/* what about EGA? XXX */
1900	s = splhigh();
1901	outb(TSIDX, 0x00); outb(TSREG, 0x01);
1902	outb(TSIDX, 0x01); val = inb(TSREG);	/* disable screen */
1903	outb(TSIDX, 0x01); outb(TSREG, val | 0x20);
1904	outb(TSIDX, 0x00); outb(TSREG, 0x03);
1905	splx(s);
1906    }
1907#endif
1908
1909    set_font_mode(adp, buf);
1910    if (fontsize == 32) {
1911	bcopy_toio(data, (uintptr_t)segment + ch*32, fontsize*count);
1912    } else {
1913	for (c = ch; count > 0; ++c, --count) {
1914	    bcopy_toio(data, (uintptr_t)segment + c*32, fontsize);
1915	    data += fontsize;
1916	}
1917    }
1918    set_normal_mode(adp, buf);
1919
1920#ifdef VGA_ALT_SEQACCESS
1921    if (adp->va_type == KD_VGA) {
1922	s = splhigh();
1923	outb(TSIDX, 0x00); outb(TSREG, 0x01);
1924	outb(TSIDX, 0x01); outb(TSREG, val & 0xdf);	/* enable screen */
1925	outb(TSIDX, 0x00); outb(TSREG, 0x03);
1926	splx(s);
1927    }
1928#endif
1929
1930    return 0;
1931#else /* VGA_NO_FONT_LOADING */
1932    return ENODEV;
1933#endif /* VGA_NO_FONT_LOADING */
1934}
1935
1936/*
1937 * show_font():
1938 * Activate the requested font page.
1939 * NOTE: it appears that some recent video adapters do not support
1940 * the font page other than 0... XXX
1941 *
1942 * EGA/VGA
1943 */
1944static int
1945vga_show_font(video_adapter_t *adp, int page)
1946{
1947#ifndef VGA_NO_FONT_LOADING
1948    static u_char cg[] = { 0x00, 0x05, 0x0a, 0x0f, 0x30, 0x35, 0x3a, 0x3f };
1949    int s;
1950
1951    prologue(adp, V_ADP_FONT, ENODEV);
1952    if (page < 0 || page >= 8)
1953	return EINVAL;
1954
1955    s = splhigh();
1956    outb(TSIDX, 0x03); outb(TSREG, cg[page]);
1957    splx(s);
1958
1959    return 0;
1960#else /* VGA_NO_FONT_LOADING */
1961    return ENODEV;
1962#endif /* VGA_NO_FONT_LOADING */
1963}
1964
1965/*
1966 * save_palette():
1967 * Read DAC values. The values have expressed in 8 bits.
1968 *
1969 * VGA
1970 */
1971static int
1972vga_save_palette(video_adapter_t *adp, u_char *palette)
1973{
1974    int i;
1975
1976    prologue(adp, V_ADP_PALETTE, ENODEV);
1977
1978    /*
1979     * We store 8 bit values in the palette buffer, while the standard
1980     * VGA has 6 bit DAC .
1981     */
1982    outb(PALRADR, 0x00);
1983    for (i = 0; i < 256*3; ++i)
1984	palette[i] = inb(PALDATA) << 2;
1985    inb(adp->va_crtc_addr + 6);	/* reset flip/flop */
1986    return 0;
1987}
1988
1989static int
1990vga_save_palette2(video_adapter_t *adp, int base, int count,
1991		  u_char *r, u_char *g, u_char *b)
1992{
1993    int i;
1994
1995    prologue(adp, V_ADP_PALETTE, ENODEV);
1996
1997    outb(PALRADR, base);
1998    for (i = 0; i < count; ++i) {
1999	r[i] = inb(PALDATA) << 2;
2000	g[i] = inb(PALDATA) << 2;
2001	b[i] = inb(PALDATA) << 2;
2002    }
2003    inb(adp->va_crtc_addr + 6);		/* reset flip/flop */
2004    return 0;
2005}
2006
2007/*
2008 * load_palette():
2009 * Set DAC values.
2010 *
2011 * VGA
2012 */
2013static int
2014vga_load_palette(video_adapter_t *adp, u_char *palette)
2015{
2016    int i;
2017
2018    prologue(adp, V_ADP_PALETTE, ENODEV);
2019
2020    outb(PIXMASK, 0xff);		/* no pixelmask */
2021    outb(PALWADR, 0x00);
2022    for (i = 0; i < 256*3; ++i)
2023	outb(PALDATA, palette[i] >> 2);
2024    inb(adp->va_crtc_addr + 6);	/* reset flip/flop */
2025    outb(ATC, 0x20);			/* enable palette */
2026    return 0;
2027}
2028
2029static int
2030vga_load_palette2(video_adapter_t *adp, int base, int count,
2031		  u_char *r, u_char *g, u_char *b)
2032{
2033    int i;
2034
2035    prologue(adp, V_ADP_PALETTE, ENODEV);
2036
2037    outb(PIXMASK, 0xff);		/* no pixelmask */
2038    outb(PALWADR, base);
2039    for (i = 0; i < count; ++i) {
2040	outb(PALDATA, r[i] >> 2);
2041	outb(PALDATA, g[i] >> 2);
2042	outb(PALDATA, b[i] >> 2);
2043    }
2044    inb(adp->va_crtc_addr + 6);		/* reset flip/flop */
2045    outb(ATC, 0x20);			/* enable palette */
2046    return 0;
2047}
2048
2049/*
2050 * set_border():
2051 * Change the border color.
2052 *
2053 * CGA/EGA/VGA
2054 */
2055static int
2056vga_set_border(video_adapter_t *adp, int color)
2057{
2058    prologue(adp, V_ADP_BORDER, ENODEV);
2059
2060    switch (adp->va_type) {
2061    case KD_EGA:
2062    case KD_VGA:
2063	inb(adp->va_crtc_addr + 6);	/* reset flip-flop */
2064	outb(ATC, 0x31); outb(ATC, color & 0xff);
2065	break;
2066    case KD_CGA:
2067	outb(adp->va_crtc_addr + 5, color & 0x0f); /* color select register */
2068	break;
2069    case KD_MONO:
2070    case KD_HERCULES:
2071    default:
2072	break;
2073    }
2074    return 0;
2075}
2076
2077/*
2078 * save_state():
2079 * Read video register values.
2080 * NOTE: this function only reads the standard EGA/VGA registers.
2081 * any extra/extended registers of SVGA adapters are not saved.
2082 *
2083 * VGA
2084 */
2085static int
2086vga_save_state(video_adapter_t *adp, void *p, size_t size)
2087{
2088    video_info_t info;
2089    u_char *buf;
2090    int crtc_addr;
2091    int i, j;
2092    int s;
2093
2094    if (size == 0) {
2095	/* return the required buffer size */
2096	prologue(adp, V_ADP_STATESAVE, 0);
2097	return sizeof(adp_state_t);
2098    } else {
2099	prologue(adp, V_ADP_STATESAVE, ENODEV);
2100	if (size < sizeof(adp_state_t))
2101	    return EINVAL;
2102    }
2103
2104    ((adp_state_t *)p)->sig = V_STATE_SIG;
2105    buf = ((adp_state_t *)p)->regs;
2106    bzero(buf, V_MODE_PARAM_SIZE);
2107    crtc_addr = adp->va_crtc_addr;
2108
2109    s = splhigh();
2110
2111    outb(TSIDX, 0x00); outb(TSREG, 0x01);	/* stop sequencer */
2112    for (i = 0, j = 5; i < 4; i++) {
2113	outb(TSIDX, i + 1);
2114	buf[j++]  =  inb(TSREG);
2115    }
2116    buf[9]  =  inb(MISC + 10);			/* dot-clock */
2117    outb(TSIDX, 0x00); outb(TSREG, 0x03);	/* start sequencer */
2118
2119    for (i = 0, j = 10; i < 25; i++) {		/* crtc */
2120	outb(crtc_addr, i);
2121	buf[j++]  =  inb(crtc_addr + 1);
2122    }
2123    for (i = 0, j = 35; i < 20; i++) {		/* attribute ctrl */
2124        inb(crtc_addr + 6);			/* reset flip-flop */
2125	outb(ATC, i);
2126	buf[j++]  =  inb(ATC + 1);
2127    }
2128    for (i = 0, j = 55; i < 9; i++) {		/* graph data ctrl */
2129	outb(GDCIDX, i);
2130	buf[j++]  =  inb(GDCREG);
2131    }
2132    inb(crtc_addr + 6);				/* reset flip-flop */
2133    outb(ATC, 0x20);				/* enable palette */
2134
2135    splx(s);
2136
2137#if 1
2138    if (vga_get_info(adp, adp->va_mode, &info) == 0) {
2139	if (info.vi_flags & V_INFO_GRAPHICS) {
2140	    buf[0] = info.vi_width/info.vi_cwidth; /* COLS */
2141	    buf[1] = info.vi_height/info.vi_cheight - 1; /* ROWS */
2142	} else {
2143	    buf[0] = info.vi_width;		/* COLS */
2144	    buf[1] = info.vi_height - 1;	/* ROWS */
2145	}
2146	buf[2] = info.vi_cheight;		/* POINTS */
2147    } else {
2148	/* XXX: shouldn't be happening... */
2149	printf("vga%d: %s: failed to obtain mode info. (vga_save_state())\n",
2150	       adp->va_unit, adp->va_name);
2151    }
2152#else
2153    buf[0] = readb(BIOS_PADDRTOVADDR(0x44a));	/* COLS */
2154    buf[1] = readb(BIOS_PADDRTOVADDR(0x484));	/* ROWS */
2155    buf[2] = readb(BIOS_PADDRTOVADDR(0x485));	/* POINTS */
2156    buf[3] = readb(BIOS_PADDRTOVADDR(0x44c));
2157    buf[4] = readb(BIOS_PADDRTOVADDR(0x44d));
2158#endif
2159
2160    return 0;
2161}
2162
2163/*
2164 * load_state():
2165 * Set video registers at once.
2166 * NOTE: this function only updates the standard EGA/VGA registers.
2167 * any extra/extended registers of SVGA adapters are not changed.
2168 *
2169 * EGA/VGA
2170 */
2171static int
2172vga_load_state(video_adapter_t *adp, void *p)
2173{
2174    u_char *buf;
2175    int crtc_addr;
2176    int s;
2177    int i;
2178
2179    prologue(adp, V_ADP_STATELOAD, ENODEV);
2180    if (((adp_state_t *)p)->sig != V_STATE_SIG)
2181	return EINVAL;
2182
2183    buf = ((adp_state_t *)p)->regs;
2184    crtc_addr = adp->va_crtc_addr;
2185
2186#if VGA_DEBUG > 1
2187    dump_buffer(buf, V_MODE_PARAM_SIZE);
2188#endif
2189
2190    s = splhigh();
2191
2192    outb(TSIDX, 0x00); outb(TSREG, 0x01);	/* stop sequencer */
2193    for (i = 0; i < 4; ++i) {			/* program sequencer */
2194	outb(TSIDX, i + 1);
2195	outb(TSREG, buf[i + 5]);
2196    }
2197    outb(MISC, buf[9]);				/* set dot-clock */
2198    outb(TSIDX, 0x00); outb(TSREG, 0x03);	/* start sequencer */
2199    outb(crtc_addr, 0x11);
2200    outb(crtc_addr + 1, inb(crtc_addr + 1) & 0x7F);
2201    for (i = 0; i < 25; ++i) {			/* program crtc */
2202	outb(crtc_addr, i);
2203	outb(crtc_addr + 1, buf[i + 10]);
2204    }
2205    inb(crtc_addr+6);				/* reset flip-flop */
2206    for (i = 0; i < 20; ++i) {			/* program attribute ctrl */
2207	outb(ATC, i);
2208	outb(ATC, buf[i + 35]);
2209    }
2210    for (i = 0; i < 9; ++i) {			/* program graph data ctrl */
2211	outb(GDCIDX, i);
2212	outb(GDCREG, buf[i + 55]);
2213    }
2214    inb(crtc_addr + 6);				/* reset flip-flop */
2215    outb(ATC, 0x20);				/* enable palette */
2216
2217#if notyet /* a temporary workaround for kernel panic, XXX */
2218#ifndef VGA_NO_BIOS
2219    if (adp->va_unit == V_ADP_PRIMARY) {
2220	writeb(BIOS_PADDRTOVADDR(0x44a), buf[0]);	/* COLS */
2221	writeb(BIOS_PADDRTOVADDR(0x484), buf[1] + rows_offset - 1); /* ROWS */
2222	writeb(BIOS_PADDRTOVADDR(0x485), buf[2]);	/* POINTS */
2223#if 0
2224	writeb(BIOS_PADDRTOVADDR(0x44c), buf[3]);
2225	writeb(BIOS_PADDRTOVADDR(0x44d), buf[4]);
2226#endif
2227    }
2228#endif /* VGA_NO_BIOS */
2229#endif /* notyet */
2230
2231    splx(s);
2232    return 0;
2233}
2234
2235/*
2236 * set_origin():
2237 * Change the origin (window mapping) of the banked frame buffer.
2238 */
2239static int
2240vga_set_origin(video_adapter_t *adp, off_t offset)
2241{
2242    /*
2243     * The standard video modes do not require window mapping;
2244     * always return error.
2245     */
2246    return ENODEV;
2247}
2248
2249/*
2250 * read_hw_cursor():
2251 * Read the position of the hardware text cursor.
2252 *
2253 * all adapters
2254 */
2255static int
2256vga_read_hw_cursor(video_adapter_t *adp, int *col, int *row)
2257{
2258    u_int16_t off;
2259    int s;
2260
2261    if (!vga_init_done)
2262	return ENXIO;
2263
2264    if (adp->va_info.vi_flags & V_INFO_GRAPHICS)
2265	return ENODEV;
2266
2267    s = spltty();
2268    outb(adp->va_crtc_addr, 14);
2269    off = inb(adp->va_crtc_addr + 1);
2270    outb(adp->va_crtc_addr, 15);
2271    off = (off << 8) | inb(adp->va_crtc_addr + 1);
2272    splx(s);
2273
2274    *row = off / adp->va_info.vi_width;
2275    *col = off % adp->va_info.vi_width;
2276
2277    return 0;
2278}
2279
2280/*
2281 * set_hw_cursor():
2282 * Move the hardware text cursor.  If col and row are both -1,
2283 * the cursor won't be shown.
2284 *
2285 * all adapters
2286 */
2287static int
2288vga_set_hw_cursor(video_adapter_t *adp, int col, int row)
2289{
2290    u_int16_t off;
2291    int s;
2292
2293    if (!vga_init_done)
2294	return ENXIO;
2295
2296    if ((col == -1) && (row == -1)) {
2297	off = -1;
2298    } else {
2299	if (adp->va_info.vi_flags & V_INFO_GRAPHICS)
2300	    return ENODEV;
2301	off = row*adp->va_info.vi_width + col;
2302    }
2303
2304    s = spltty();
2305    outb(adp->va_crtc_addr, 14);
2306    outb(adp->va_crtc_addr + 1, off >> 8);
2307    outb(adp->va_crtc_addr, 15);
2308    outb(adp->va_crtc_addr + 1, off & 0x00ff);
2309    splx(s);
2310
2311    return 0;
2312}
2313
2314/*
2315 * set_hw_cursor_shape():
2316 * Change the shape of the hardware text cursor. If the height is
2317 * zero or negative, the cursor won't be shown.
2318 *
2319 * all adapters
2320 */
2321static int
2322vga_set_hw_cursor_shape(video_adapter_t *adp, int base, int height,
2323			int celsize, int blink)
2324{
2325    int s;
2326
2327    if (!vga_init_done)
2328	return ENXIO;
2329
2330    s = spltty();
2331    switch (adp->va_type) {
2332    case KD_VGA:
2333    case KD_CGA:
2334    case KD_MONO:
2335    case KD_HERCULES:
2336    default:
2337	if (height <= 0) {
2338	    /* make the cursor invisible */
2339	    outb(adp->va_crtc_addr, 10);
2340	    outb(adp->va_crtc_addr + 1, 32);
2341	    outb(adp->va_crtc_addr, 11);
2342	    outb(adp->va_crtc_addr + 1, 0);
2343	} else {
2344	    outb(adp->va_crtc_addr, 10);
2345	    outb(adp->va_crtc_addr + 1, celsize - base - height);
2346	    outb(adp->va_crtc_addr, 11);
2347	    outb(adp->va_crtc_addr + 1, celsize - base - 1);
2348	}
2349	break;
2350    case KD_EGA:
2351	if (height <= 0) {
2352	    /* make the cursor invisible */
2353	    outb(adp->va_crtc_addr, 10);
2354	    outb(adp->va_crtc_addr + 1, celsize);
2355	    outb(adp->va_crtc_addr, 11);
2356	    outb(adp->va_crtc_addr + 1, 0);
2357	} else {
2358	    outb(adp->va_crtc_addr, 10);
2359	    outb(adp->va_crtc_addr + 1, celsize - base - height);
2360	    outb(adp->va_crtc_addr, 11);
2361	    outb(adp->va_crtc_addr + 1, celsize - base);
2362	}
2363	break;
2364    }
2365    splx(s);
2366
2367    return 0;
2368}
2369
2370/*
2371 * blank_display()
2372 * Put the display in power save/power off mode.
2373 *
2374 * all adapters
2375 */
2376static int
2377vga_blank_display(video_adapter_t *adp, int mode)
2378{
2379    u_char val;
2380    int s;
2381
2382    s = splhigh();
2383    switch (adp->va_type) {
2384    case KD_VGA:
2385	switch (mode) {
2386	case V_DISPLAY_SUSPEND:
2387	case V_DISPLAY_STAND_BY:
2388	    outb(TSIDX, 0x01);
2389	    val = inb(TSREG);
2390	    outb(TSIDX, 0x01);
2391	    outb(TSREG, val | 0x20);
2392	    outb(adp->va_crtc_addr, 0x17);
2393	    val = inb(adp->va_crtc_addr + 1);
2394	    outb(adp->va_crtc_addr + 1, val & ~0x80);
2395	    break;
2396	case V_DISPLAY_BLANK:
2397	    outb(TSIDX, 0x01);
2398	    val = inb(TSREG);
2399	    outb(TSIDX, 0x01);
2400	    outb(TSREG, val | 0x20);
2401	    break;
2402	case V_DISPLAY_ON:
2403	    outb(TSIDX, 0x01);
2404	    val = inb(TSREG);
2405	    outb(TSIDX, 0x01);
2406	    outb(TSREG, val & 0xDF);
2407	    outb(adp->va_crtc_addr, 0x17);
2408	    val = inb(adp->va_crtc_addr + 1);
2409	    outb(adp->va_crtc_addr + 1, val | 0x80);
2410	    break;
2411	}
2412	break;
2413
2414    case KD_EGA:
2415	/* no support yet */
2416	splx(s);
2417	return ENODEV;
2418
2419    case KD_CGA:
2420	switch (mode) {
2421	case V_DISPLAY_SUSPEND:
2422	case V_DISPLAY_STAND_BY:
2423	case V_DISPLAY_BLANK:
2424	    outb(adp->va_crtc_addr + 4, 0x25);
2425	    break;
2426	case V_DISPLAY_ON:
2427	    outb(adp->va_crtc_addr + 4, 0x2d);
2428	    break;
2429	}
2430	break;
2431
2432    case KD_MONO:
2433    case KD_HERCULES:
2434	switch (mode) {
2435	case V_DISPLAY_SUSPEND:
2436	case V_DISPLAY_STAND_BY:
2437	case V_DISPLAY_BLANK:
2438	    outb(adp->va_crtc_addr + 4, 0x21);
2439	    break;
2440	case V_DISPLAY_ON:
2441	    outb(adp->va_crtc_addr + 4, 0x29);
2442	    break;
2443	}
2444	break;
2445    default:
2446	break;
2447    }
2448    splx(s);
2449
2450    return 0;
2451}
2452
2453/*
2454 * mmap():
2455 * Mmap frame buffer.
2456 *
2457 * all adapters
2458 */
2459static int
2460vga_mmap_buf(video_adapter_t *adp, vm_offset_t offset, vm_paddr_t *paddr,
2461   	     int prot)
2462{
2463    if (adp->va_info.vi_flags & V_INFO_LINEAR)
2464	return -1;
2465
2466#if VGA_DEBUG > 0
2467    printf("vga_mmap_buf(): window:0x%jx, offset:0x%jx\n",
2468	   (uintmax_t)adp->va_info.vi_window, (uintmax_t)offset);
2469#endif
2470
2471    /* XXX: is this correct? */
2472    if (offset > adp->va_window_size - PAGE_SIZE)
2473	return -1;
2474
2475    *paddr = adp->va_info.vi_window + offset;
2476    return 0;
2477}
2478
2479#ifndef VGA_NO_MODE_CHANGE
2480
2481static void
2482planar_fill(video_adapter_t *adp, int val)
2483{
2484    int length;
2485    int at;			/* position in the frame buffer */
2486    int l;
2487
2488    outw(GDCIDX, 0x0005);		/* read mode 0, write mode 0 */
2489    outw(GDCIDX, 0x0003);		/* data rotate/function select */
2490    outw(GDCIDX, 0x0f01);		/* set/reset enable */
2491    outw(GDCIDX, 0xff08);		/* bit mask */
2492    outw(GDCIDX, (val << 8) | 0x00);	/* set/reset */
2493    at = 0;
2494    length = adp->va_line_width*adp->va_info.vi_height;
2495    while (length > 0) {
2496	l = imin(length, adp->va_window_size);
2497	(*vidsw[adp->va_index]->set_win_org)(adp, at);
2498	bzero_io(adp->va_window, l);
2499	length -= l;
2500	at += l;
2501    }
2502    outw(GDCIDX, 0x0000);		/* set/reset */
2503    outw(GDCIDX, 0x0001);		/* set/reset enable */
2504}
2505
2506static void
2507packed_fill(video_adapter_t *adp, int val)
2508{
2509    int length;
2510    int at;			/* position in the frame buffer */
2511    int l;
2512
2513    at = 0;
2514    length = adp->va_line_width*adp->va_info.vi_height;
2515    while (length > 0) {
2516	l = imin(length, adp->va_window_size);
2517	(*vidsw[adp->va_index]->set_win_org)(adp, at);
2518	fill_io(val, adp->va_window, l);
2519	length -= l;
2520	at += l;
2521    }
2522}
2523
2524static void
2525direct_fill(video_adapter_t *adp, int val)
2526{
2527    int length;
2528    int at;			/* position in the frame buffer */
2529    int l;
2530
2531    at = 0;
2532    length = adp->va_line_width*adp->va_info.vi_height;
2533    while (length > 0) {
2534	l = imin(length, adp->va_window_size);
2535	(*vidsw[adp->va_index]->set_win_org)(adp, at);
2536	switch (adp->va_info.vi_pixel_size) {
2537	case sizeof(u_int16_t):
2538	    fillw_io(val, adp->va_window, l/sizeof(u_int16_t));
2539	    break;
2540	case 3:
2541	    /* FIXME */
2542	    break;
2543	case sizeof(u_int32_t):
2544	    filll_io(val, adp->va_window, l/sizeof(u_int32_t));
2545	    break;
2546	}
2547	length -= l;
2548	at += l;
2549    }
2550}
2551
2552static int
2553vga_clear(video_adapter_t *adp)
2554{
2555    switch (adp->va_info.vi_mem_model) {
2556    case V_INFO_MM_TEXT:
2557	/* do nothing? XXX */
2558	break;
2559    case V_INFO_MM_PLANAR:
2560	planar_fill(adp, 0);
2561	break;
2562    case V_INFO_MM_PACKED:
2563	packed_fill(adp, 0);
2564	break;
2565    case V_INFO_MM_DIRECT:
2566	direct_fill(adp, 0);
2567	break;
2568    }
2569    return 0;
2570}
2571
2572#ifdef notyet
2573static void
2574planar_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
2575{
2576    int banksize;
2577    int bank;
2578    int pos;
2579    int offset;			/* offset within window */
2580    int bx;
2581    int l;
2582
2583    outw(GDCIDX, 0x0005);		/* read mode 0, write mode 0 */
2584    outw(GDCIDX, 0x0003);		/* data rotate/function select */
2585    outw(GDCIDX, 0x0f01);		/* set/reset enable */
2586    outw(GDCIDX, 0xff08);		/* bit mask */
2587    outw(GDCIDX, (val << 8) | 0x00); /* set/reset */
2588
2589    banksize = adp->va_window_size;
2590    bank = -1;
2591    while (cy > 0) {
2592	pos = adp->va_line_width*y + x/8;
2593	if (bank != pos/banksize) {
2594	    (*vidsw[adp->va_index]->set_win_org)(adp, pos);
2595	    bank = pos/banksize;
2596	}
2597	offset = pos%banksize;
2598	bx = (x + cx)/8 - x/8;
2599	if (x % 8) {
2600	    outw(GDCIDX, ((0xff00 >> (x % 8)) & 0xff00) | 0x08);
2601	    writeb(adp->va_window + offset, 0);
2602	    ++offset;
2603	    --bx;
2604	    if (offset >= banksize) {
2605		offset = 0;
2606		++bank;		/* next bank */
2607		(*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize);
2608	    }
2609	    outw(GDCIDX, 0xff08);	/* bit mask */
2610	}
2611	while (bx > 0) {
2612	    l = imin(bx, banksize);
2613	    bzero_io(adp->va_window + offset, l);
2614	    offset += l;
2615	    bx -= l;
2616	    if (offset >= banksize) {
2617		offset = 0;
2618		++bank;		/* next bank */
2619		(*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize);
2620	    }
2621	}
2622	if ((x + cx) % 8) {
2623	    outw(GDCIDX, (~(0xff00 >> ((x + cx) % 8)) & 0xff00) | 0x08);
2624	    writeb(adp->va_window + offset, 0);
2625	    ++offset;
2626	    if (offset >= banksize) {
2627		offset = 0;
2628		++bank;		/* next bank */
2629		(*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize);
2630	    }
2631	    outw(GDCIDX, 0xff08);	/* bit mask */
2632	}
2633	++y;
2634	--cy;
2635    }
2636
2637    outw(GDCIDX, 0xff08);		/* bit mask */
2638    outw(GDCIDX, 0x0000);		/* set/reset */
2639    outw(GDCIDX, 0x0001);		/* set/reset enable */
2640}
2641
2642static void
2643packed_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
2644{
2645    int banksize;
2646    int bank;
2647    int pos;
2648    int offset;			/* offset within window */
2649    int end;
2650
2651    banksize = adp->va_window_size;
2652    bank = -1;
2653    cx *= adp->va_info.vi_pixel_size;
2654    while (cy > 0) {
2655	pos = adp->va_line_width*y + x*adp->va_info.vi_pixel_size;
2656	if (bank != pos/banksize) {
2657	    (*vidsw[adp->va_index]->set_win_org)(adp, pos);
2658	    bank = pos/banksize;
2659	}
2660	offset = pos%banksize;
2661	end = imin(offset + cx, banksize);
2662	fill_io(val, adp->va_window + offset,
2663		(end - offset)/adp->va_info.vi_pixel_size);
2664	/* the line may cross the window boundary */
2665	if (offset + cx > banksize) {
2666	    ++bank;		/* next bank */
2667	    (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize);
2668	    end = offset + cx - banksize;
2669	    fill_io(val, adp->va_window, end/adp->va_info.vi_pixel_size);
2670	}
2671	++y;
2672	--cy;
2673    }
2674}
2675
2676static void
2677direct_fill_rect16(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
2678{
2679    int banksize;
2680    int bank;
2681    int pos;
2682    int offset;			/* offset within window */
2683    int end;
2684
2685    /*
2686     * XXX: the function assumes that banksize is a muliple of
2687     * sizeof(u_int16_t).
2688     */
2689    banksize = adp->va_window_size;
2690    bank = -1;
2691    cx *= sizeof(u_int16_t);
2692    while (cy > 0) {
2693	pos = adp->va_line_width*y + x*sizeof(u_int16_t);
2694	if (bank != pos/banksize) {
2695	    (*vidsw[adp->va_index]->set_win_org)(adp, pos);
2696	    bank = pos/banksize;
2697	}
2698	offset = pos%banksize;
2699	end = imin(offset + cx, banksize);
2700	fillw_io(val, adp->va_window + offset,
2701		 (end - offset)/sizeof(u_int16_t));
2702	/* the line may cross the window boundary */
2703	if (offset + cx > banksize) {
2704	    ++bank;		/* next bank */
2705	    (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize);
2706	    end = offset + cx - banksize;
2707	    fillw_io(val, adp->va_window, end/sizeof(u_int16_t));
2708	}
2709	++y;
2710	--cy;
2711    }
2712}
2713
2714static void
2715direct_fill_rect24(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
2716{
2717    int banksize;
2718    int bank;
2719    int pos;
2720    int offset;			/* offset within window */
2721    int end;
2722    int i;
2723    int j;
2724    u_int8_t b[3];
2725
2726    b[0] = val & 0x0000ff;
2727    b[1] = (val >> 8) & 0x0000ff;
2728    b[2] = (val >> 16) & 0x0000ff;
2729    banksize = adp->va_window_size;
2730    bank = -1;
2731    cx *= 3;
2732    while (cy > 0) {
2733	pos = adp->va_line_width*y + x*3;
2734	if (bank != pos/banksize) {
2735	    (*vidsw[adp->va_index]->set_win_org)(adp, pos);
2736	    bank = pos/banksize;
2737	}
2738	offset = pos%banksize;
2739	end = imin(offset + cx, banksize);
2740	for (i = 0, j = offset; j < end; i = (++i)%3, ++j) {
2741	    writeb(adp->va_window + j, b[i]);
2742	}
2743	/* the line may cross the window boundary */
2744	if (offset + cx >= banksize) {
2745	    ++bank;		/* next bank */
2746	    (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize);
2747	    j = 0;
2748	    end = offset + cx - banksize;
2749	    for (; j < end; i = (++i)%3, ++j) {
2750		writeb(adp->va_window + j, b[i]);
2751	    }
2752	}
2753	++y;
2754	--cy;
2755    }
2756}
2757
2758static void
2759direct_fill_rect32(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
2760{
2761    int banksize;
2762    int bank;
2763    int pos;
2764    int offset;			/* offset within window */
2765    int end;
2766
2767    /*
2768     * XXX: the function assumes that banksize is a muliple of
2769     * sizeof(u_int32_t).
2770     */
2771    banksize = adp->va_window_size;
2772    bank = -1;
2773    cx *= sizeof(u_int32_t);
2774    while (cy > 0) {
2775	pos = adp->va_line_width*y + x*sizeof(u_int32_t);
2776	if (bank != pos/banksize) {
2777	    (*vidsw[adp->va_index]->set_win_org)(adp, pos);
2778	    bank = pos/banksize;
2779	}
2780	offset = pos%banksize;
2781	end = imin(offset + cx, banksize);
2782	filll_io(val, adp->va_window + offset,
2783		 (end - offset)/sizeof(u_int32_t));
2784	/* the line may cross the window boundary */
2785	if (offset + cx > banksize) {
2786	    ++bank;		/* next bank */
2787	    (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize);
2788	    end = offset + cx - banksize;
2789	    filll_io(val, adp->va_window, end/sizeof(u_int32_t));
2790	}
2791	++y;
2792	--cy;
2793    }
2794}
2795
2796static int
2797vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
2798{
2799    switch (adp->va_info.vi_mem_model) {
2800    case V_INFO_MM_TEXT:
2801	/* do nothing? XXX */
2802	break;
2803    case V_INFO_MM_PLANAR:
2804	planar_fill_rect(adp, val, x, y, cx, cy);
2805	break;
2806    case V_INFO_MM_PACKED:
2807	packed_fill_rect(adp, val, x, y, cx, cy);
2808	break;
2809    case V_INFO_MM_DIRECT:
2810	switch (adp->va_info.vi_pixel_size) {
2811	case sizeof(u_int16_t):
2812	    direct_fill_rect16(adp, val, x, y, cx, cy);
2813	    break;
2814	case 3:
2815	    direct_fill_rect24(adp, val, x, y, cx, cy);
2816	    break;
2817	case sizeof(u_int32_t):
2818	    direct_fill_rect32(adp, val, x, y, cx, cy);
2819	    break;
2820	}
2821	break;
2822    }
2823    return 0;
2824}
2825#else /* !notyet */
2826static int
2827vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
2828{
2829    return ENODEV;
2830}
2831#endif /* notyet */
2832
2833static int
2834vga_bitblt(video_adapter_t *adp,...)
2835{
2836    /* FIXME */
2837    return ENODEV;
2838}
2839
2840#endif /* !VGA_NO_MODE_CHANGE */
2841
2842static int
2843get_palette(video_adapter_t *adp, int base, int count,
2844	    u_char *red, u_char *green, u_char *blue, u_char *trans)
2845{
2846    u_char *r;
2847    u_char *g;
2848    u_char *b;
2849
2850    if ((base < 0) || (base >= 256) || (base + count > 256))
2851	return EINVAL;
2852
2853    r = malloc(count*3, M_DEVBUF, M_WAITOK);
2854    g = r + count;
2855    b = g + count;
2856    if (vga_save_palette2(adp, base, count, r, g, b)) {
2857	free(r, M_DEVBUF);
2858	return ENODEV;
2859    }
2860    copyout(r, red, count);
2861    copyout(g, green, count);
2862    copyout(b, blue, count);
2863    if (trans != NULL) {
2864	bzero(r, count);
2865	copyout(r, trans, count);
2866    }
2867    free(r, M_DEVBUF);
2868
2869    return 0;
2870}
2871
2872static int
2873set_palette(video_adapter_t *adp, int base, int count,
2874	    u_char *red, u_char *green, u_char *blue, u_char *trans)
2875{
2876    u_char *r;
2877    u_char *g;
2878    u_char *b;
2879    int err;
2880
2881    if ((base < 0) || (base >= 256) || (base + count > 256))
2882	return EINVAL;
2883
2884    r = malloc(count*3, M_DEVBUF, M_WAITOK);
2885    g = r + count;
2886    b = g + count;
2887    copyin(red, r, count);
2888    copyin(green, g, count);
2889    copyin(blue, b, count);
2890    err = vga_load_palette2(adp, base, count, r, g, b);
2891    free(r, M_DEVBUF);
2892
2893    return (err ? ENODEV : 0);
2894}
2895
2896static int
2897vga_dev_ioctl(video_adapter_t *adp, u_long cmd, caddr_t arg)
2898{
2899    switch (cmd) {
2900    case FBIO_GETWINORG:	/* get frame buffer window origin */
2901	*(u_int *)arg = 0;
2902	return 0;
2903
2904    case FBIO_SETWINORG:	/* set frame buffer window origin */
2905	return ENODEV;
2906
2907    case FBIO_SETDISPSTART:	/* set display start address */
2908	return (set_display_start(adp,
2909				  ((video_display_start_t *)arg)->x,
2910			  	  ((video_display_start_t *)arg)->y)
2911		? ENODEV : 0);
2912
2913    case FBIO_SETLINEWIDTH:	/* set scan line length in pixel */
2914	return (set_line_length(adp, *(u_int *)arg) ? ENODEV : 0);
2915
2916    case FBIO_GETPALETTE:	/* get color palette */
2917	return get_palette(adp, ((video_color_palette_t *)arg)->index,
2918			   ((video_color_palette_t *)arg)->count,
2919			   ((video_color_palette_t *)arg)->red,
2920			   ((video_color_palette_t *)arg)->green,
2921			   ((video_color_palette_t *)arg)->blue,
2922			   ((video_color_palette_t *)arg)->transparent);
2923
2924    case FBIO_SETPALETTE:	/* set color palette */
2925	return set_palette(adp, ((video_color_palette_t *)arg)->index,
2926			   ((video_color_palette_t *)arg)->count,
2927			   ((video_color_palette_t *)arg)->red,
2928			   ((video_color_palette_t *)arg)->green,
2929			   ((video_color_palette_t *)arg)->blue,
2930			   ((video_color_palette_t *)arg)->transparent);
2931
2932    case FBIOGTYPE:		/* get frame buffer type info. */
2933	((struct fbtype *)arg)->fb_type = fb_type(adp->va_type);
2934	((struct fbtype *)arg)->fb_height = adp->va_info.vi_height;
2935	((struct fbtype *)arg)->fb_width = adp->va_info.vi_width;
2936	((struct fbtype *)arg)->fb_depth = adp->va_info.vi_depth;
2937	if ((adp->va_info.vi_depth <= 1) || (adp->va_info.vi_depth > 8))
2938	    ((struct fbtype *)arg)->fb_cmsize = 0;
2939	else
2940	    ((struct fbtype *)arg)->fb_cmsize = 1 << adp->va_info.vi_depth;
2941	((struct fbtype *)arg)->fb_size = adp->va_buffer_size;
2942	return 0;
2943
2944    case FBIOGETCMAP:		/* get color palette */
2945	return get_palette(adp, ((struct fbcmap *)arg)->index,
2946			   ((struct fbcmap *)arg)->count,
2947			   ((struct fbcmap *)arg)->red,
2948			   ((struct fbcmap *)arg)->green,
2949			   ((struct fbcmap *)arg)->blue, NULL);
2950
2951    case FBIOPUTCMAP:		/* set color palette */
2952	return set_palette(adp, ((struct fbcmap *)arg)->index,
2953			   ((struct fbcmap *)arg)->count,
2954			   ((struct fbcmap *)arg)->red,
2955			   ((struct fbcmap *)arg)->green,
2956			   ((struct fbcmap *)arg)->blue, NULL);
2957
2958    default:
2959	return fb_commonioctl(adp, cmd, arg);
2960    }
2961}
2962
2963static void
2964dump_buffer(u_char *buf, size_t len)
2965{
2966    int i;
2967
2968    for(i = 0; i < len;) {
2969	printf("%02x ", buf[i]);
2970	if ((++i % 16) == 0)
2971	    printf("\n");
2972    }
2973}
2974
2975/*
2976 * diag():
2977 * Print some information about the video adapter and video modes,
2978 * with requested level of details.
2979 *
2980 * all adapters
2981 */
2982static int
2983vga_diag(video_adapter_t *adp, int level)
2984{
2985    u_char *mp;
2986#if FB_DEBUG > 1
2987    video_info_t info;
2988    int i;
2989#endif
2990
2991    if (!vga_init_done)
2992	return ENXIO;
2993
2994#if FB_DEBUG > 1
2995#ifndef VGA_NO_BIOS
2996    printf("vga: RTC equip. code:0x%02x, DCC code:0x%02x\n",
2997	   rtcin(RTC_EQUIPMENT), readb(BIOS_PADDRTOVADDR(0x488)));
2998    printf("vga: CRTC:0x%x, video option:0x%02x, ",
2999	   readw(BIOS_PADDRTOVADDR(0x463)),
3000	   readb(BIOS_PADDRTOVADDR(0x487)));
3001    printf("rows:%d, cols:%d, font height:%d\n",
3002	   readb(BIOS_PADDRTOVADDR(0x44a)),
3003	   readb(BIOS_PADDRTOVADDR(0x484)) + 1,
3004	   readb(BIOS_PADDRTOVADDR(0x485)));
3005#endif /* VGA_NO_BIOS */
3006#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
3007    printf("vga: param table EGA/VGA:%p", video_mode_ptr);
3008    printf(", CGA/MDA:%p\n", video_mode_ptr2);
3009    printf("vga: rows_offset:%d\n", rows_offset);
3010#endif
3011#endif /* FB_DEBUG > 1 */
3012
3013    fb_dump_adp_info(VGA_DRIVER_NAME, adp, level);
3014
3015#if FB_DEBUG > 1
3016    if (adp->va_flags & V_ADP_MODECHANGE) {
3017	for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) {
3018	    if (bios_vmode[i].vi_mode == NA)
3019		continue;
3020	    if (get_mode_param(bios_vmode[i].vi_mode) == NULL)
3021		continue;
3022	    fb_dump_mode_info(VGA_DRIVER_NAME, adp, &bios_vmode[i], level);
3023	}
3024    } else {
3025	vga_get_info(adp, adp->va_initial_mode, &info);	/* shouldn't fail */
3026	fb_dump_mode_info(VGA_DRIVER_NAME, adp, &info, level);
3027    }
3028#endif /* FB_DEBUG > 1 */
3029
3030    if ((adp->va_type != KD_EGA) && (adp->va_type != KD_VGA))
3031	return 0;
3032#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
3033    if (video_mode_ptr == NULL)
3034	printf("vga%d: %s: WARNING: video mode switching is not "
3035	       "fully supported on this adapter\n",
3036	       adp->va_unit, adp->va_name);
3037#endif
3038    if (level <= 0)
3039	return 0;
3040
3041    if (adp->va_type == KD_VGA) {
3042	printf("VGA parameters upon power-up\n");
3043	dump_buffer(adpstate.regs, sizeof(adpstate.regs));
3044	printf("VGA parameters in BIOS for mode %d\n", adp->va_initial_mode);
3045	dump_buffer(adpstate2.regs, sizeof(adpstate2.regs));
3046    }
3047
3048    mp = get_mode_param(adp->va_initial_mode);
3049    if (mp == NULL)	/* this shouldn't be happening */
3050	return 0;
3051    printf("EGA/VGA parameters to be used for mode %d\n", adp->va_initial_mode);
3052    dump_buffer(mp, V_MODE_PARAM_SIZE);
3053
3054    return 0;
3055}
3056