vga.c revision 112569
1/*- 2 * Copyright (c) 1999 Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp> 3 * Copyright (c) 1992-1998 S�ren Schmidt 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer as 11 * the first lines of this file unmodified. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * $FreeBSD: head/sys/dev/fb/vga.c 112569 2003-03-25 00:07:06Z jake $ 30 */ 31 32#include "opt_vga.h" 33#include "opt_fb.h" 34#include "opt_syscons.h" /* should be removed in the future, XXX */ 35 36#include <sys/param.h> 37#include <sys/systm.h> 38#include <sys/kernel.h> 39#include <sys/conf.h> 40#include <sys/fcntl.h> 41#include <sys/malloc.h> 42#include <sys/fbio.h> 43 44#include <vm/vm.h> 45#include <vm/vm_param.h> 46#include <vm/pmap.h> 47 48#include <machine/md_var.h> 49#include <machine/pc/bios.h> 50#include <machine/bus.h> 51 52#include <dev/fb/fbreg.h> 53#include <dev/fb/vgareg.h> 54 55#include <isa/isareg.h> 56 57#ifndef VGA_DEBUG 58#define VGA_DEBUG 0 59#endif 60 61int 62vga_probe_unit(int unit, video_adapter_t *buf, int flags) 63{ 64 video_adapter_t *adp; 65 video_switch_t *sw; 66 int error; 67 68 sw = vid_get_switch(VGA_DRIVER_NAME); 69 if (sw == NULL) 70 return 0; 71 error = (*sw->probe)(unit, &adp, NULL, flags); 72 if (error) 73 return error; 74 bcopy(adp, buf, sizeof(*buf)); 75 return 0; 76} 77 78int 79vga_attach_unit(int unit, vga_softc_t *sc, int flags) 80{ 81 video_switch_t *sw; 82 int error; 83 84 sw = vid_get_switch(VGA_DRIVER_NAME); 85 if (sw == NULL) 86 return ENXIO; 87 88 error = (*sw->probe)(unit, &sc->adp, NULL, flags); 89 if (error) 90 return error; 91 return (*sw->init)(unit, sc->adp, flags); 92} 93 94/* cdev driver functions */ 95 96#ifdef FB_INSTALL_CDEV 97 98int 99vga_open(dev_t dev, vga_softc_t *sc, int flag, int mode, struct thread *td) 100{ 101 if (sc == NULL) 102 return ENXIO; 103 if (mode & (O_CREAT | O_APPEND | O_TRUNC)) 104 return ENODEV; 105 106 return genfbopen(&sc->gensc, sc->adp, flag, mode, td); 107} 108 109int 110vga_close(dev_t dev, vga_softc_t *sc, int flag, int mode, struct thread *td) 111{ 112 return genfbclose(&sc->gensc, sc->adp, flag, mode, td); 113} 114 115int 116vga_read(dev_t dev, vga_softc_t *sc, struct uio *uio, int flag) 117{ 118 return genfbread(&sc->gensc, sc->adp, uio, flag); 119} 120 121int 122vga_write(dev_t dev, vga_softc_t *sc, struct uio *uio, int flag) 123{ 124 return genfbread(&sc->gensc, sc->adp, uio, flag); 125} 126 127int 128vga_ioctl(dev_t dev, vga_softc_t *sc, u_long cmd, caddr_t arg, int flag, 129 struct thread *td) 130{ 131 return genfbioctl(&sc->gensc, sc->adp, cmd, arg, flag, td); 132} 133 134int 135vga_mmap(dev_t dev, vga_softc_t *sc, vm_offset_t offset, vm_offset_t *paddr, 136 int prot) 137{ 138 return genfbmmap(&sc->gensc, sc->adp, offset, paddr, prot); 139} 140 141#endif /* FB_INSTALL_CDEV */ 142 143/* LOW-LEVEL */ 144 145#include <machine/clock.h> 146#include <machine/pc/vesa.h> 147 148#define probe_done(adp) ((adp)->va_flags & V_ADP_PROBED) 149#define init_done(adp) ((adp)->va_flags & V_ADP_INITIALIZED) 150#define config_done(adp) ((adp)->va_flags & V_ADP_REGISTERED) 151 152/* for compatibility with old kernel options */ 153#ifdef SC_ALT_SEQACCESS 154#undef SC_ALT_SEQACCESS 155#undef VGA_ALT_SEQACCESS 156#define VGA_ALT_SEQACCESS 1 157#endif 158 159#ifdef SLOW_VGA 160#undef SLOW_VGA 161#undef VGA_SLOW_IOACCESS 162#define VGA_SLOW_IOACCESS 1 163#endif 164 165/* architecture dependent option */ 166#if defined(__alpha__) || defined(__ia64__) 167#define VGA_NO_BIOS 1 168#endif 169 170/* this should really be in `rtc.h' */ 171#define RTC_EQUIPMENT 0x14 172 173/* various sizes */ 174#define V_MODE_MAP_SIZE (M_VGA_CG320 + 1) 175#define V_MODE_PARAM_SIZE 64 176 177/* video adapter state buffer */ 178struct adp_state { 179 int sig; 180#define V_STATE_SIG 0x736f6962 181 u_char regs[V_MODE_PARAM_SIZE]; 182}; 183typedef struct adp_state adp_state_t; 184 185/* video adapter information */ 186#define DCC_MONO 0 187#define DCC_CGA40 1 188#define DCC_CGA80 2 189#define DCC_EGAMONO 3 190#define DCC_EGA40 4 191#define DCC_EGA80 5 192 193/* 194 * NOTE: `va_window' should have a virtual address, but is initialized 195 * with a physical address in the following table, as verify_adapter() 196 * will perform address conversion at run-time. 197 */ 198static video_adapter_t adapter_init_value[] = { 199 /* DCC_MONO */ 200 { 0, KD_MONO, "mda", 0, 0, 0, IO_MDA, IO_MDASIZE, MONO_CRTC, 201 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 202 0, 0, 0, 0, 7, 0, }, 203 /* DCC_CGA40 */ 204 { 0, KD_CGA, "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC, 205 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 206 0, 0, 0, 0, 3, 0, }, 207 /* DCC_CGA80 */ 208 { 0, KD_CGA, "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC, 209 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 210 0, 0, 0, 0, 3, 0, }, 211 /* DCC_EGAMONO */ 212 { 0, KD_EGA, "ega", 0, 0, 0, IO_MDA, 48, MONO_CRTC, 213 EGA_BUF_BASE, EGA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 214 0, 0, 0, 0, 7, 0, }, 215 /* DCC_EGA40 */ 216 { 0, KD_EGA, "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48, COLOR_CRTC, 217 EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 218 0, 0, 0, 0, 3, 0, }, 219 /* DCC_EGA80 */ 220 { 0, KD_EGA, "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48, COLOR_CRTC, 221 EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 222 0, 0, 0, 0, 3, 0, }, 223}; 224 225static video_adapter_t biosadapter[2]; 226static int biosadapters = 0; 227 228/* video driver declarations */ 229static int vga_configure(int flags); 230 int (*vga_sub_configure)(int flags); 231#if 0 232static int vga_nop(void); 233#endif 234static int vga_error(void); 235static vi_probe_t vga_probe; 236static vi_init_t vga_init; 237static vi_get_info_t vga_get_info; 238static vi_query_mode_t vga_query_mode; 239static vi_set_mode_t vga_set_mode; 240static vi_save_font_t vga_save_font; 241static vi_load_font_t vga_load_font; 242static vi_show_font_t vga_show_font; 243static vi_save_palette_t vga_save_palette; 244static vi_load_palette_t vga_load_palette; 245static vi_set_border_t vga_set_border; 246static vi_save_state_t vga_save_state; 247static vi_load_state_t vga_load_state; 248static vi_set_win_org_t vga_set_origin; 249static vi_read_hw_cursor_t vga_read_hw_cursor; 250static vi_set_hw_cursor_t vga_set_hw_cursor; 251static vi_set_hw_cursor_shape_t vga_set_hw_cursor_shape; 252static vi_blank_display_t vga_blank_display; 253static vi_mmap_t vga_mmap_buf; 254static vi_ioctl_t vga_dev_ioctl; 255#ifndef VGA_NO_MODE_CHANGE 256static vi_clear_t vga_clear; 257static vi_fill_rect_t vga_fill_rect; 258static vi_bitblt_t vga_bitblt; 259#else /* VGA_NO_MODE_CHANGE */ 260#define vga_clear (vi_clear_t *)vga_error 261#define vga_fill_rect (vi_fill_rect_t *)vga_error 262#define vga_bitblt (vi_bitblt_t *)vga_error 263#endif 264static vi_diag_t vga_diag; 265 266static video_switch_t vgavidsw = { 267 vga_probe, 268 vga_init, 269 vga_get_info, 270 vga_query_mode, 271 vga_set_mode, 272 vga_save_font, 273 vga_load_font, 274 vga_show_font, 275 vga_save_palette, 276 vga_load_palette, 277 vga_set_border, 278 vga_save_state, 279 vga_load_state, 280 vga_set_origin, 281 vga_read_hw_cursor, 282 vga_set_hw_cursor, 283 vga_set_hw_cursor_shape, 284 vga_blank_display, 285 vga_mmap_buf, 286 vga_dev_ioctl, 287 vga_clear, 288 vga_fill_rect, 289 vga_bitblt, 290 vga_error, 291 vga_error, 292 vga_diag, 293}; 294 295VIDEO_DRIVER(mda, vgavidsw, NULL); 296VIDEO_DRIVER(cga, vgavidsw, NULL); 297VIDEO_DRIVER(ega, vgavidsw, NULL); 298VIDEO_DRIVER(vga, vgavidsw, vga_configure); 299 300/* VGA BIOS standard video modes */ 301#define EOT (-1) 302#define NA (-2) 303 304static video_info_t bios_vmode[] = { 305 /* CGA */ 306 { M_B40x25, V_INFO_COLOR, 40, 25, 8, 8, 2, 1, 307 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 308 { M_C40x25, V_INFO_COLOR, 40, 25, 8, 8, 4, 1, 309 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 310 { M_B80x25, V_INFO_COLOR, 80, 25, 8, 8, 2, 1, 311 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 312 { M_C80x25, V_INFO_COLOR, 80, 25, 8, 8, 4, 1, 313 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 314 /* EGA */ 315 { M_ENH_B40x25, V_INFO_COLOR, 40, 25, 8, 14, 2, 1, 316 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 317 { M_ENH_C40x25, V_INFO_COLOR, 40, 25, 8, 14, 4, 1, 318 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 319 { M_ENH_B80x25, V_INFO_COLOR, 80, 25, 8, 14, 2, 1, 320 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 321 { M_ENH_C80x25, V_INFO_COLOR, 80, 25, 8, 14, 4, 1, 322 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 323 /* VGA */ 324 { M_VGA_C40x25, V_INFO_COLOR, 40, 25, 8, 16, 4, 1, 325 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 326 { M_VGA_M80x25, 0, 80, 25, 8, 16, 2, 1, 327 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 328 { M_VGA_C80x25, V_INFO_COLOR, 80, 25, 8, 16, 4, 1, 329 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 330 /* MDA */ 331 { M_EGAMONO80x25, 0, 80, 25, 8, 14, 2, 1, 332 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 333 /* EGA */ 334 { M_ENH_B80x43, 0, 80, 43, 8, 8, 2, 1, 335 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 336 { M_ENH_C80x43, V_INFO_COLOR, 80, 43, 8, 8, 4, 1, 337 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 338 /* VGA */ 339 { M_VGA_M80x30, 0, 80, 30, 8, 16, 2, 1, 340 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 341 { M_VGA_C80x30, V_INFO_COLOR, 80, 30, 8, 16, 4, 1, 342 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 343 { M_VGA_M80x50, 0, 80, 50, 8, 8, 2, 1, 344 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 345 { M_VGA_C80x50, V_INFO_COLOR, 80, 50, 8, 8, 4, 1, 346 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 347 { M_VGA_M80x60, 0, 80, 60, 8, 8, 2, 1, 348 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 349 { M_VGA_C80x60, V_INFO_COLOR, 80, 60, 8, 8, 4, 1, 350 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 351 352#ifndef VGA_NO_MODE_CHANGE 353 354#ifdef VGA_WIDTH90 355 { M_VGA_M90x25, 0, 90, 25, 8, 16, 2, 1, 356 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 357 { M_VGA_C90x25, V_INFO_COLOR, 90, 25, 8, 16, 4, 1, 358 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 359 { M_VGA_M90x30, 0, 90, 30, 8, 16, 2, 1, 360 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 361 { M_VGA_C90x30, V_INFO_COLOR, 90, 30, 8, 16, 4, 1, 362 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 363 { M_VGA_M90x43, 0, 90, 43, 8, 8, 2, 1, 364 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 365 { M_VGA_C90x43, V_INFO_COLOR, 90, 43, 8, 8, 4, 1, 366 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 367 { M_VGA_M90x50, 0, 90, 50, 8, 8, 2, 1, 368 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 369 { M_VGA_C90x50, V_INFO_COLOR, 90, 50, 8, 8, 4, 1, 370 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 371 { M_VGA_M90x60, 0, 90, 60, 8, 8, 2, 1, 372 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 373 { M_VGA_C90x60, V_INFO_COLOR, 90, 60, 8, 8, 4, 1, 374 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 375#endif /* VGA_WIDTH90 */ 376 377 /* CGA */ 378 { M_BG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 2, 1, 379 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 380 { M_CG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 2, 1, 381 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 382 { M_BG640, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8, 8, 1, 1, 383 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 384 /* EGA */ 385 { M_CG320_D, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 4, 4, 386 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 387 V_INFO_MM_PLANAR }, 388 { M_CG640_E, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8, 8, 4, 4, 389 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 390 V_INFO_MM_PLANAR }, 391 { M_EGAMONOAPA, V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 392 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, 64*1024, 0, 0 , 393 V_INFO_MM_PLANAR }, 394 { M_ENHMONOAPA2,V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 395 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 396 V_INFO_MM_PLANAR }, 397 { M_CG640x350, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 2, 2, 398 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 399 V_INFO_MM_PLANAR }, 400 { M_ENH_CG640, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 401 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 402 V_INFO_MM_PLANAR }, 403 /* VGA */ 404 { M_BG640x480, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4, 405 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 406 V_INFO_MM_PLANAR }, 407 { M_CG640x480, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4, 408 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 409 V_INFO_MM_PLANAR }, 410 { M_VGA_CG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 8, 1, 411 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 412 V_INFO_MM_PACKED, 1 }, 413 { M_VGA_MODEX, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 240, 8, 8, 8, 4, 414 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 415 V_INFO_MM_VGAX, 1 }, 416#endif /* VGA_NO_MODE_CHANGE */ 417 418 { EOT }, 419}; 420 421static int vga_init_done = FALSE; 422#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 423static u_char *video_mode_ptr = NULL; /* EGA/VGA */ 424static u_char *video_mode_ptr2 = NULL; /* CGA/MDA */ 425#endif 426static u_char *mode_map[V_MODE_MAP_SIZE]; 427static adp_state_t adpstate; 428static adp_state_t adpstate2; 429static int rows_offset = 1; 430 431/* local macros and functions */ 432#define BIOS_SADDRTOLADDR(p) ((((p) & 0xffff0000) >> 12) + ((p) & 0x0000ffff)) 433 434#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 435static void map_mode_table(u_char *map[], u_char *table, int max); 436#endif 437static void clear_mode_map(video_adapter_t *adp, u_char *map[], int max, 438 int color); 439#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 440static int map_mode_num(int mode); 441#endif 442static int map_gen_mode_num(int type, int color, int mode); 443static int map_bios_mode_num(int type, int color, int bios_mode); 444static u_char *get_mode_param(int mode); 445#ifndef VGA_NO_BIOS 446static void fill_adapter_param(int code, video_adapter_t *adp); 447#endif 448static int verify_adapter(video_adapter_t *adp); 449static void update_adapter_info(video_adapter_t *adp, video_info_t *info); 450#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 451#define COMP_IDENTICAL 0 452#define COMP_SIMILAR 1 453#define COMP_DIFFERENT 2 454static int comp_adpregs(u_char *buf1, u_char *buf2); 455#endif 456static int probe_adapters(void); 457static int set_line_length(video_adapter_t *adp, int pixel); 458static int set_display_start(video_adapter_t *adp, int x, int y); 459static void filll_io(int val, vm_offset_t d, size_t size); 460 461#ifndef VGA_NO_MODE_CHANGE 462#ifdef VGA_WIDTH90 463static void set_width90(adp_state_t *params); 464#endif 465#endif /* !VGA_NO_MODE_CHANGE */ 466 467#ifndef VGA_NO_FONT_LOADING 468#define PARAM_BUFSIZE 6 469static void set_font_mode(video_adapter_t *adp, u_char *buf); 470static void set_normal_mode(video_adapter_t *adp, u_char *buf); 471#endif 472 473#ifndef VGA_NO_MODE_CHANGE 474static void planar_fill(video_adapter_t *adp, int val); 475static void packed_fill(video_adapter_t *adp, int val); 476static void direct_fill(video_adapter_t *adp, int val); 477#ifdef notyet 478static void planar_fill_rect(video_adapter_t *adp, int val, int x, int y, 479 int cx, int cy); 480static void packed_fill_rect(video_adapter_t *adp, int val, int x, int y, 481 int cx, int cy); 482static void direct_fill_rect16(video_adapter_t *adp, int val, int x, int y, 483 int cx, int cy); 484static void direct_fill_rect24(video_adapter_t *adp, int val, int x, int y, 485 int cx, int cy); 486static void direct_fill_rect32(video_adapter_t *adp, int val, int x, int y, 487 int cx, int cy); 488#endif /* notyet */ 489#endif /* !VGA_NO_MODE_CHANGE */ 490 491static void dump_buffer(u_char *buf, size_t len); 492 493#define ISMAPPED(pa, width) \ 494 (((pa) <= (u_long)0x1000 - (width)) \ 495 || ((pa) >= ISA_HOLE_START && (pa) <= 0x100000 - (width))) 496 497#define prologue(adp, flag, err) \ 498 if (!vga_init_done || !((adp)->va_flags & (flag))) \ 499 return (err) 500 501/* a backdoor for the console driver */ 502static int 503vga_configure(int flags) 504{ 505 int i; 506 507 probe_adapters(); 508 for (i = 0; i < biosadapters; ++i) { 509 if (!probe_done(&biosadapter[i])) 510 continue; 511 biosadapter[i].va_flags |= V_ADP_INITIALIZED; 512 if (!config_done(&biosadapter[i])) { 513 if (vid_register(&biosadapter[i]) < 0) 514 continue; 515 biosadapter[i].va_flags |= V_ADP_REGISTERED; 516 } 517 } 518 if (vga_sub_configure != NULL) 519 (*vga_sub_configure)(flags); 520 521 return biosadapters; 522} 523 524/* local subroutines */ 525 526#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 527/* construct the mode parameter map */ 528static void 529map_mode_table(u_char *map[], u_char *table, int max) 530{ 531 int i; 532 533 for(i = 0; i < max; ++i) 534 map[i] = table + i*V_MODE_PARAM_SIZE; 535 for(; i < V_MODE_MAP_SIZE; ++i) 536 map[i] = NULL; 537} 538#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 539 540static void 541clear_mode_map(video_adapter_t *adp, u_char *map[], int max, int color) 542{ 543 video_info_t info; 544 int i; 545 546 /* 547 * NOTE: we don't touch `bios_vmode[]' because it is shared 548 * by all adapters. 549 */ 550 for(i = 0; i < max; ++i) { 551 if (vga_get_info(adp, i, &info)) 552 continue; 553 if ((info.vi_flags & V_INFO_COLOR) != color) 554 map[i] = NULL; 555 } 556} 557 558#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 559/* map the non-standard video mode to a known mode number */ 560static int 561map_mode_num(int mode) 562{ 563 static struct { 564 int from; 565 int to; 566 } mode_map[] = { 567 { M_ENH_B80x43, M_ENH_B80x25 }, 568 { M_ENH_C80x43, M_ENH_C80x25 }, 569 { M_VGA_M80x30, M_VGA_M80x25 }, 570 { M_VGA_C80x30, M_VGA_C80x25 }, 571 { M_VGA_M80x50, M_VGA_M80x25 }, 572 { M_VGA_C80x50, M_VGA_C80x25 }, 573 { M_VGA_M80x60, M_VGA_M80x25 }, 574 { M_VGA_C80x60, M_VGA_C80x25 }, 575#ifdef VGA_WIDTH90 576 { M_VGA_M90x25, M_VGA_M80x25 }, 577 { M_VGA_C90x25, M_VGA_C80x25 }, 578 { M_VGA_M90x30, M_VGA_M80x25 }, 579 { M_VGA_C90x30, M_VGA_C80x25 }, 580 { M_VGA_M90x43, M_ENH_B80x25 }, 581 { M_VGA_C90x43, M_ENH_C80x25 }, 582 { M_VGA_M90x50, M_VGA_M80x25 }, 583 { M_VGA_C90x50, M_VGA_C80x25 }, 584 { M_VGA_M90x60, M_VGA_M80x25 }, 585 { M_VGA_C90x60, M_VGA_C80x25 }, 586#endif 587 { M_VGA_MODEX, M_VGA_CG320 }, 588 }; 589 int i; 590 591 for (i = 0; i < sizeof(mode_map)/sizeof(mode_map[0]); ++i) { 592 if (mode_map[i].from == mode) 593 return mode_map[i].to; 594 } 595 return mode; 596} 597#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 598 599/* map a generic video mode to a known mode number */ 600static int 601map_gen_mode_num(int type, int color, int mode) 602{ 603 static struct { 604 int from; 605 int to_color; 606 int to_mono; 607 } mode_map[] = { 608 { M_TEXT_80x30, M_VGA_C80x30, M_VGA_M80x30, }, 609 { M_TEXT_80x43, M_ENH_C80x43, M_ENH_B80x43, }, 610 { M_TEXT_80x50, M_VGA_C80x50, M_VGA_M80x50, }, 611 { M_TEXT_80x60, M_VGA_C80x60, M_VGA_M80x60, }, 612 }; 613 int i; 614 615 if (mode == M_TEXT_80x25) { 616 switch (type) { 617 618 case KD_VGA: 619 if (color) 620 return M_VGA_C80x25; 621 else 622 return M_VGA_M80x25; 623 break; 624 625 case KD_EGA: 626 if (color) 627 return M_ENH_C80x25; 628 else 629 return M_EGAMONO80x25; 630 break; 631 632 case KD_CGA: 633 return M_C80x25; 634 635 case KD_MONO: 636 case KD_HERCULES: 637 return M_EGAMONO80x25; /* XXX: this name is confusing */ 638 639 default: 640 return -1; 641 } 642 } 643 644 for (i = 0; i < sizeof(mode_map)/sizeof(mode_map[0]); ++i) { 645 if (mode_map[i].from == mode) 646 return ((color) ? mode_map[i].to_color : mode_map[i].to_mono); 647 } 648 return mode; 649} 650 651/* turn the BIOS video number into our video mode number */ 652static int 653map_bios_mode_num(int type, int color, int bios_mode) 654{ 655 static int cga_modes[7] = { 656 M_B40x25, M_C40x25, /* 0, 1 */ 657 M_B80x25, M_C80x25, /* 2, 3 */ 658 M_BG320, M_CG320, 659 M_BG640, 660 }; 661 static int ega_modes[17] = { 662 M_ENH_B40x25, M_ENH_C40x25, /* 0, 1 */ 663 M_ENH_B80x25, M_ENH_C80x25, /* 2, 3 */ 664 M_BG320, M_CG320, 665 M_BG640, 666 M_EGAMONO80x25, /* 7 */ 667 8, 9, 10, 11, 12, 668 M_CG320_D, 669 M_CG640_E, 670 M_ENHMONOAPA2, /* XXX: video momery > 64K */ 671 M_ENH_CG640, /* XXX: video momery > 64K */ 672 }; 673 static int vga_modes[20] = { 674 M_VGA_C40x25, M_VGA_C40x25, /* 0, 1 */ 675 M_VGA_C80x25, M_VGA_C80x25, /* 2, 3 */ 676 M_BG320, M_CG320, 677 M_BG640, 678 M_VGA_M80x25, /* 7 */ 679 8, 9, 10, 11, 12, 680 M_CG320_D, 681 M_CG640_E, 682 M_ENHMONOAPA2, 683 M_ENH_CG640, 684 M_BG640x480, M_CG640x480, 685 M_VGA_CG320, 686 }; 687 688 switch (type) { 689 690 case KD_VGA: 691 if (bios_mode < sizeof(vga_modes)/sizeof(vga_modes[0])) 692 return vga_modes[bios_mode]; 693 else if (color) 694 return M_VGA_C80x25; 695 else 696 return M_VGA_M80x25; 697 break; 698 699 case KD_EGA: 700 if (bios_mode < sizeof(ega_modes)/sizeof(ega_modes[0])) 701 return ega_modes[bios_mode]; 702 else if (color) 703 return M_ENH_C80x25; 704 else 705 return M_EGAMONO80x25; 706 break; 707 708 case KD_CGA: 709 if (bios_mode < sizeof(cga_modes)/sizeof(cga_modes[0])) 710 return cga_modes[bios_mode]; 711 else 712 return M_C80x25; 713 break; 714 715 case KD_MONO: 716 case KD_HERCULES: 717 return M_EGAMONO80x25; /* XXX: this name is confusing */ 718 719 default: 720 break; 721 } 722 return -1; 723} 724 725/* look up a parameter table entry */ 726static u_char 727*get_mode_param(int mode) 728{ 729#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 730 if (mode >= V_MODE_MAP_SIZE) 731 mode = map_mode_num(mode); 732#endif 733 if ((mode >= 0) && (mode < V_MODE_MAP_SIZE)) 734 return mode_map[mode]; 735 else 736 return NULL; 737} 738 739#ifndef VGA_NO_BIOS 740static void 741fill_adapter_param(int code, video_adapter_t *adp) 742{ 743 static struct { 744 int primary; 745 int secondary; 746 } dcc[] = { 747 { DCC_MONO, DCC_EGA40 /* CGA monitor */ }, 748 { DCC_MONO, DCC_EGA80 /* CGA monitor */ }, 749 { DCC_MONO, DCC_EGA80 }, 750 { DCC_MONO, DCC_EGA80 }, 751 { DCC_CGA40, DCC_EGAMONO }, 752 { DCC_CGA80, DCC_EGAMONO }, 753 { DCC_EGA40 /* CGA monitor */, DCC_MONO}, 754 { DCC_EGA80 /* CGA monitor */, DCC_MONO}, 755 { DCC_EGA80, DCC_MONO }, 756 { DCC_EGA80, DCC_MONO }, 757 { DCC_EGAMONO, DCC_CGA40 }, 758 { DCC_EGAMONO, DCC_CGA80 }, 759 }; 760 761 if ((code < 0) || (code >= sizeof(dcc)/sizeof(dcc[0]))) { 762 adp[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO]; 763 adp[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80]; 764 } else { 765 adp[V_ADP_PRIMARY] = adapter_init_value[dcc[code].primary]; 766 adp[V_ADP_SECONDARY] = adapter_init_value[dcc[code].secondary]; 767 } 768} 769#endif /* VGA_NO_BIOS */ 770 771static int 772verify_adapter(video_adapter_t *adp) 773{ 774 vm_offset_t buf; 775 u_int16_t v; 776#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 777 u_int32_t p; 778#endif 779 780 buf = BIOS_PADDRTOVADDR(adp->va_window); 781 v = readw(buf); 782 writew(buf, 0xA55A); 783 if (readw(buf) != 0xA55A) 784 return ENXIO; 785 writew(buf, v); 786 787 switch (adp->va_type) { 788 789 case KD_EGA: 790 outb(adp->va_crtc_addr, 7); 791 if (inb(adp->va_crtc_addr) == 7) { 792 adp->va_type = KD_VGA; 793 adp->va_name = "vga"; 794 adp->va_flags |= V_ADP_STATESAVE | V_ADP_PALETTE; 795 } 796 adp->va_flags |= V_ADP_STATELOAD | V_ADP_BORDER; 797 /* the color adapter may be in the 40x25 mode... XXX */ 798 799#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 800 /* get the BIOS video mode pointer */ 801 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8); 802 p = BIOS_SADDRTOLADDR(p); 803 if (ISMAPPED(p, sizeof(u_int32_t))) { 804 p = *(u_int32_t *)BIOS_PADDRTOVADDR(p); 805 p = BIOS_SADDRTOLADDR(p); 806 if (ISMAPPED(p, V_MODE_PARAM_SIZE)) 807 video_mode_ptr = (u_char *)BIOS_PADDRTOVADDR(p); 808 } 809#endif 810 break; 811 812 case KD_CGA: 813 adp->va_flags |= V_ADP_COLOR | V_ADP_BORDER; 814 /* may be in the 40x25 mode... XXX */ 815#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 816 /* get the BIOS video mode pointer */ 817 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4); 818 p = BIOS_SADDRTOLADDR(p); 819 video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p); 820#endif 821 break; 822 823 case KD_MONO: 824#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 825 /* get the BIOS video mode pointer */ 826 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4); 827 p = BIOS_SADDRTOLADDR(p); 828 video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p); 829#endif 830 break; 831 } 832 833 return 0; 834} 835 836static void 837update_adapter_info(video_adapter_t *adp, video_info_t *info) 838{ 839 adp->va_flags &= ~V_ADP_COLOR; 840 adp->va_flags |= 841 (info->vi_flags & V_INFO_COLOR) ? V_ADP_COLOR : 0; 842 adp->va_crtc_addr = 843 (adp->va_flags & V_ADP_COLOR) ? COLOR_CRTC : MONO_CRTC; 844 adp->va_window = BIOS_PADDRTOVADDR(info->vi_window); 845 adp->va_window_size = info->vi_window_size; 846 adp->va_window_gran = info->vi_window_gran; 847 adp->va_window_orig = 0; 848 /* XXX */ 849 adp->va_buffer = info->vi_buffer; 850 adp->va_buffer_size = info->vi_buffer_size; 851 if (info->vi_mem_model == V_INFO_MM_VGAX) { 852 adp->va_line_width = info->vi_width/2; 853 } else if (info->vi_flags & V_INFO_GRAPHICS) { 854 switch (info->vi_depth/info->vi_planes) { 855 case 1: 856 adp->va_line_width = info->vi_width/8; 857 break; 858 case 2: 859 adp->va_line_width = info->vi_width/4; 860 break; 861 case 4: 862 adp->va_line_width = info->vi_width/2; 863 break; 864 case 8: 865 default: /* shouldn't happen */ 866 adp->va_line_width = info->vi_width; 867 break; 868 } 869 } else { 870 adp->va_line_width = info->vi_width; 871 } 872 adp->va_disp_start.x = 0; 873 adp->va_disp_start.y = 0; 874 bcopy(info, &adp->va_info, sizeof(adp->va_info)); 875} 876 877#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 878/* compare two parameter table entries */ 879static int 880comp_adpregs(u_char *buf1, u_char *buf2) 881{ 882 static struct { 883 u_char mask; 884 } params[V_MODE_PARAM_SIZE] = { 885 {0xff}, {0x00}, {0xff}, /* COLS}, ROWS}, POINTS */ 886 {0x00}, {0x00}, /* page length */ 887 {0xfe}, {0xff}, {0xff}, {0xff}, /* sequencer registers */ 888 {0xf3}, /* misc register */ 889 {0xff}, {0xff}, {0xff}, {0x7f}, {0xff}, /* CRTC */ 890 {0xff}, {0xff}, {0xff}, {0x7f}, {0xff}, 891 {0x00}, {0x00}, {0x00}, {0x00}, {0x00}, 892 {0x00}, {0xff}, {0x7f}, {0xff}, {0xff}, 893 {0x7f}, {0xff}, {0xff}, {0xef}, {0xff}, 894 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, /* attribute controller regs */ 895 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, 896 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, 897 {0xff}, {0xff}, {0xff}, {0xff}, {0xf0}, 898 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, /* GDC register */ 899 {0xff}, {0xff}, {0xff}, {0xff}, 900 }; 901 int identical = TRUE; 902 int i; 903 904 if ((buf1 == NULL) || (buf2 == NULL)) 905 return COMP_DIFFERENT; 906 907 for (i = 0; i < sizeof(params)/sizeof(params[0]); ++i) { 908 if (params[i].mask == 0) /* don't care */ 909 continue; 910 if ((buf1[i] & params[i].mask) != (buf2[i] & params[i].mask)) 911 return COMP_DIFFERENT; 912 if (buf1[i] != buf2[i]) 913 identical = FALSE; 914 } 915 return (identical) ? COMP_IDENTICAL : COMP_SIMILAR; 916} 917#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 918 919/* probe video adapters and return the number of detected adapters */ 920static int 921probe_adapters(void) 922{ 923 video_adapter_t *adp; 924 video_info_t info; 925#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 926 u_char *mp; 927#endif 928 int i; 929 930 /* do this test only once */ 931 if (vga_init_done) 932 return biosadapters; 933 vga_init_done = TRUE; 934 935 /* 936 * Locate display adapters. 937 * The AT architecture supports upto two adapters. `syscons' allows 938 * the following combinations of adapters: 939 * 1) MDA + CGA 940 * 2) MDA + EGA/VGA color 941 * 3) CGA + EGA/VGA mono 942 * Note that `syscons' doesn't bother with MCGA as it is only 943 * avaiable for low end PS/2 models which has 80286 or earlier CPUs, 944 * thus, they are not running FreeBSD! 945 * When there are two adapaters in the system, one becomes `primary' 946 * and the other `secondary'. The EGA adapter has a set of DIP 947 * switches on board for this information and the EGA BIOS copies 948 * it in the BIOS data area BIOSDATA_VIDEOSWITCH (40:88). 949 * The VGA BIOS has more sophisticated mechanism and has this 950 * information in BIOSDATA_DCCINDEX (40:8a), but it also maintains 951 * compatibility with the EGA BIOS by updating BIOSDATA_VIDEOSWITCH. 952 */ 953 954 /* 955 * Check rtc and BIOS data area. 956 * XXX: we don't use BIOSDATA_EQUIPMENT, since it is not a dead 957 * copy of RTC_EQUIPMENT. Bits 4 and 5 of ETC_EQUIPMENT are 958 * zeros for EGA and VGA. However, the EGA/VGA BIOS sets 959 * these bits in BIOSDATA_EQUIPMENT according to the monitor 960 * type detected. 961 */ 962#ifndef VGA_NO_BIOS 963 if (*(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8)) { 964 /* EGA/VGA BIOS is present */ 965 fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f, 966 biosadapter); 967 } else { 968 switch ((rtcin(RTC_EQUIPMENT) >> 4) & 3) { /* bit 4 and 5 */ 969 case 0: 970 /* EGA/VGA: shouldn't be happening */ 971 fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f, 972 biosadapter); 973 break; 974 case 1: 975 /* CGA 40x25 */ 976 /* FIXME: switch to the 80x25 mode? XXX */ 977 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA40]; 978 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 979 break; 980 case 2: 981 /* CGA 80x25 */ 982 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA80]; 983 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 984 break; 985 case 3: 986 /* MDA */ 987 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO]; 988 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80]; 989 break; 990 } 991 } 992#else 993 /* assume EGA/VGA? XXX */ 994 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_EGA80]; 995 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 996#endif /* VGA_NO_BIOS */ 997 998 biosadapters = 0; 999 if (verify_adapter(&biosadapter[V_ADP_SECONDARY]) == 0) { 1000 ++biosadapters; 1001 biosadapter[V_ADP_SECONDARY].va_flags |= V_ADP_PROBED; 1002 biosadapter[V_ADP_SECONDARY].va_mode = 1003 biosadapter[V_ADP_SECONDARY].va_initial_mode = 1004 map_bios_mode_num(biosadapter[V_ADP_SECONDARY].va_type, 1005 biosadapter[V_ADP_SECONDARY].va_flags 1006 & V_ADP_COLOR, 1007 biosadapter[V_ADP_SECONDARY].va_initial_bios_mode); 1008 } else { 1009 biosadapter[V_ADP_SECONDARY].va_type = -1; 1010 } 1011 if (verify_adapter(&biosadapter[V_ADP_PRIMARY]) == 0) { 1012 ++biosadapters; 1013 biosadapter[V_ADP_PRIMARY].va_flags |= V_ADP_PROBED; 1014#ifndef VGA_NO_BIOS 1015 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode = 1016 readb(BIOS_PADDRTOVADDR(0x449)); 1017#else 1018 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode = 3; /* XXX */ 1019#endif 1020 biosadapter[V_ADP_PRIMARY].va_mode = 1021 biosadapter[V_ADP_PRIMARY].va_initial_mode = 1022 map_bios_mode_num(biosadapter[V_ADP_PRIMARY].va_type, 1023 biosadapter[V_ADP_PRIMARY].va_flags & V_ADP_COLOR, 1024 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode); 1025 } else { 1026 biosadapter[V_ADP_PRIMARY] = biosadapter[V_ADP_SECONDARY]; 1027 biosadapter[V_ADP_SECONDARY].va_type = -1; 1028 } 1029 if (biosadapters == 0) 1030 return biosadapters; 1031 biosadapter[V_ADP_PRIMARY].va_unit = V_ADP_PRIMARY; 1032 biosadapter[V_ADP_SECONDARY].va_unit = V_ADP_SECONDARY; 1033 1034#if 0 /* we don't need these... */ 1035 fb_init_struct(&biosadapter[V_ADP_PRIMARY], ...); 1036 fb_init_struct(&biosadapter[V_ADP_SECONDARY], ...); 1037#endif 1038 1039#if notyet 1040 /* 1041 * We cannot have two video adapter of the same type; there must be 1042 * only one of color or mono adapter, or one each of them. 1043 */ 1044 if (biosadapters > 1) { 1045 if (!((biosadapter[0].va_flags ^ biosadapter[1].va_flags) 1046 & V_ADP_COLOR)) 1047 /* we have two mono or color adapters!! */ 1048 return (biosadapters = 0); 1049 } 1050#endif 1051 1052 /* 1053 * Ensure a zero start address. The registers are w/o 1054 * for old hardware so it's too hard to relocate the active screen 1055 * memory. 1056 * This must be done before vga_save_state() for VGA. 1057 */ 1058 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 12); 1059 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0); 1060 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 13); 1061 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0); 1062 1063 /* the video mode parameter table in EGA/VGA BIOS */ 1064 /* NOTE: there can be only one EGA/VGA, wheather color or mono, 1065 * recognized by the video BIOS. 1066 */ 1067 if ((biosadapter[V_ADP_PRIMARY].va_type == KD_EGA) || 1068 (biosadapter[V_ADP_PRIMARY].va_type == KD_VGA)) { 1069 adp = &biosadapter[V_ADP_PRIMARY]; 1070 } else if ((biosadapter[V_ADP_SECONDARY].va_type == KD_EGA) || 1071 (biosadapter[V_ADP_SECONDARY].va_type == KD_VGA)) { 1072 adp = &biosadapter[V_ADP_SECONDARY]; 1073 } else { 1074 adp = NULL; 1075 } 1076 bzero(mode_map, sizeof(mode_map)); 1077 if (adp != NULL) { 1078 if (adp->va_type == KD_VGA) { 1079 vga_save_state(adp, &adpstate, sizeof(adpstate)); 1080#if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE) 1081 mode_map[adp->va_initial_mode] = adpstate.regs; 1082 rows_offset = 1; 1083#else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1084 if (video_mode_ptr == NULL) { 1085 mode_map[adp->va_initial_mode] = adpstate.regs; 1086 rows_offset = 1; 1087 } else { 1088 /* discard the table if we are not familiar with it... */ 1089 map_mode_table(mode_map, video_mode_ptr, M_VGA_CG320 + 1); 1090 mp = get_mode_param(adp->va_initial_mode); 1091 if (mp != NULL) 1092 bcopy(mp, adpstate2.regs, sizeof(adpstate2.regs)); 1093 switch (comp_adpregs(adpstate.regs, mp)) { 1094 case COMP_IDENTICAL: 1095 /* 1096 * OK, this parameter table looks reasonably familiar 1097 * to us... 1098 */ 1099 /* 1100 * This is a kludge for Toshiba DynaBook SS433 1101 * whose BIOS video mode table entry has the actual # 1102 * of rows at the offset 1; BIOSes from other 1103 * manufacturers store the # of rows - 1 there. XXX 1104 */ 1105 rows_offset = adpstate.regs[1] + 1 - mp[1]; 1106 break; 1107 1108 case COMP_SIMILAR: 1109 /* 1110 * Not exactly the same, but similar enough to be 1111 * trusted. However, use the saved register values 1112 * for the initial mode and other modes which are 1113 * based on the initial mode. 1114 */ 1115 mode_map[adp->va_initial_mode] = adpstate.regs; 1116 rows_offset = adpstate.regs[1] + 1 - mp[1]; 1117 adpstate.regs[1] -= rows_offset - 1; 1118 break; 1119 1120 case COMP_DIFFERENT: 1121 default: 1122 /* 1123 * Don't use the paramter table in BIOS. It doesn't 1124 * look familiar to us. Video mode switching is allowed 1125 * only if the new mode is the same as or based on 1126 * the initial mode. 1127 */ 1128 video_mode_ptr = NULL; 1129 bzero(mode_map, sizeof(mode_map)); 1130 mode_map[adp->va_initial_mode] = adpstate.regs; 1131 rows_offset = 1; 1132 break; 1133 } 1134 } 1135#endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1136 1137#ifndef VGA_NO_MODE_CHANGE 1138 adp->va_flags |= V_ADP_MODECHANGE; 1139#endif 1140#ifndef VGA_NO_FONT_LOADING 1141 adp->va_flags |= V_ADP_FONT; 1142#endif 1143 } else if (adp->va_type == KD_EGA) { 1144#if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE) 1145 rows_offset = 1; 1146#else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1147 if (video_mode_ptr == NULL) { 1148 rows_offset = 1; 1149 } else { 1150 map_mode_table(mode_map, video_mode_ptr, M_ENH_C80x25 + 1); 1151 /* XXX how can one validate the EGA table... */ 1152 mp = get_mode_param(adp->va_initial_mode); 1153 if (mp != NULL) { 1154 adp->va_flags |= V_ADP_MODECHANGE; 1155#ifndef VGA_NO_FONT_LOADING 1156 adp->va_flags |= V_ADP_FONT; 1157#endif 1158 rows_offset = 1; 1159 } else { 1160 /* 1161 * This is serious. We will not be able to switch video 1162 * modes at all... 1163 */ 1164 video_mode_ptr = NULL; 1165 bzero(mode_map, sizeof(mode_map)); 1166 rows_offset = 1; 1167 } 1168 } 1169#endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1170 } 1171 } 1172 1173 /* remove conflicting modes if we have more than one adapter */ 1174 if (biosadapters > 0) { 1175 for (i = 0; i < biosadapters; ++i) { 1176 if (!(biosadapter[i].va_flags & V_ADP_MODECHANGE)) 1177 continue; 1178 clear_mode_map(&biosadapter[i], mode_map, M_VGA_CG320 + 1, 1179 (biosadapter[i].va_flags & V_ADP_COLOR) ? 1180 V_INFO_COLOR : 0); 1181 if ((biosadapter[i].va_type == KD_VGA) 1182 || (biosadapter[i].va_type == KD_EGA)) { 1183 biosadapter[i].va_io_base = 1184 (biosadapter[i].va_flags & V_ADP_COLOR) ? 1185 IO_VGA : IO_MDA; 1186 biosadapter[i].va_io_size = 32; 1187 } 1188 } 1189 } 1190 1191 /* buffer address */ 1192 vga_get_info(&biosadapter[V_ADP_PRIMARY], 1193 biosadapter[V_ADP_PRIMARY].va_initial_mode, &info); 1194 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1195 update_adapter_info(&biosadapter[V_ADP_PRIMARY], &info); 1196 1197 if (biosadapters > 1) { 1198 vga_get_info(&biosadapter[V_ADP_SECONDARY], 1199 biosadapter[V_ADP_SECONDARY].va_initial_mode, &info); 1200 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1201 update_adapter_info(&biosadapter[V_ADP_SECONDARY], &info); 1202 } 1203 1204 /* 1205 * XXX: we should verify the following values for the primary adapter... 1206 * crtc I/O port address: *(u_int16_t *)BIOS_PADDRTOVADDR(0x463); 1207 * color/mono display: (*(u_int8_t *)BIOS_PADDRTOVADDR(0x487) & 0x02) 1208 * ? 0 : V_ADP_COLOR; 1209 * columns: *(u_int8_t *)BIOS_PADDRTOVADDR(0x44a); 1210 * rows: *(u_int8_t *)BIOS_PADDRTOVADDR(0x484); 1211 * font size: *(u_int8_t *)BIOS_PADDRTOVADDR(0x485); 1212 * buffer size: *(u_int16_t *)BIOS_PADDRTOVADDR(0x44c); 1213 */ 1214 1215 return biosadapters; 1216} 1217 1218/* set the scan line length in pixel */ 1219static int 1220set_line_length(video_adapter_t *adp, int pixel) 1221{ 1222 u_char *mp; 1223 int ppw; /* pixels per word */ 1224 int bpl; /* bytes per line */ 1225 int count; 1226 1227 if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA)) 1228 return ENODEV; 1229 mp = get_mode_param(adp->va_mode); 1230 if (mp == NULL) 1231 return EINVAL; 1232 1233 switch (adp->va_info.vi_mem_model) { 1234 case V_INFO_MM_PLANAR: 1235 ppw = 16/(adp->va_info.vi_depth/adp->va_info.vi_planes); 1236 count = (pixel + ppw - 1)/ppw/2; 1237 bpl = ((pixel + ppw - 1)/ppw/2)*4; 1238 break; 1239 case V_INFO_MM_PACKED: 1240 count = (pixel + 7)/8; 1241 bpl = ((pixel + 7)/8)*8; 1242 break; 1243 case V_INFO_MM_TEXT: 1244 count = (pixel + 7)/8; /* columns */ 1245 bpl = (pixel + 7)/8; /* columns */ 1246 break; 1247 default: 1248 return ENODEV; 1249 } 1250 1251 if (mp[10 + 0x17] & 0x40) /* CRTC mode control reg */ 1252 count *= 2; /* byte mode */ 1253 outb(adp->va_crtc_addr, 0x13); 1254 outb(adp->va_crtc_addr + 1, count); 1255 adp->va_line_width = bpl; 1256 1257 return 0; 1258} 1259 1260static int 1261set_display_start(video_adapter_t *adp, int x, int y) 1262{ 1263 int off; /* byte offset (graphics mode)/word offset (text mode) */ 1264 int poff; /* pixel offset */ 1265 int roff; /* row offset */ 1266 int ppb; /* pixels per byte */ 1267 1268 if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA)) 1269 x &= ~7; 1270 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) { 1271 ppb = 8/(adp->va_info.vi_depth/adp->va_info.vi_planes); 1272 off = y*adp->va_line_width + x/ppb; 1273 roff = 0; 1274 poff = x%ppb; 1275 } else { 1276 if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) { 1277 outb(TSIDX, 1); 1278 if (inb(TSREG) & 1) 1279 ppb = 9; 1280 else 1281 ppb = 8; 1282 } else { 1283 ppb = 8; 1284 } 1285 off = y/adp->va_info.vi_cheight*adp->va_line_width + x/ppb; 1286 roff = y%adp->va_info.vi_cheight; 1287 /* FIXME: is this correct? XXX */ 1288 if (ppb == 8) 1289 poff = x%ppb; 1290 else 1291 poff = (x + 8)%ppb; 1292 } 1293 1294 /* start address */ 1295 outb(adp->va_crtc_addr, 0xc); /* high */ 1296 outb(adp->va_crtc_addr + 1, off >> 8); 1297 outb(adp->va_crtc_addr, 0xd); /* low */ 1298 outb(adp->va_crtc_addr + 1, off & 0xff); 1299 1300 /* horizontal pel pan */ 1301 if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) { 1302 inb(adp->va_crtc_addr + 6); 1303 outb(ATC, 0x13 | 0x20); 1304 outb(ATC, poff); 1305 inb(adp->va_crtc_addr + 6); 1306 outb(ATC, 0x20); 1307 } 1308 1309 /* preset raw scan */ 1310 outb(adp->va_crtc_addr, 8); 1311 outb(adp->va_crtc_addr + 1, roff); 1312 1313 adp->va_disp_start.x = x; 1314 adp->va_disp_start.y = y; 1315 return 0; 1316} 1317 1318#ifdef __i386__ /* XXX */ 1319static void 1320fill(int val, void *d, size_t size) 1321{ 1322 u_char *p = d; 1323 1324 while (size-- > 0) 1325 *p++ = val; 1326} 1327#endif /* __i386__ */ 1328 1329static void 1330filll_io(int val, vm_offset_t d, size_t size) 1331{ 1332 while (size-- > 0) { 1333 writel(d, val); 1334 d += sizeof(u_int32_t); 1335 } 1336} 1337 1338/* entry points */ 1339 1340#if 0 1341static int 1342vga_nop(void) 1343{ 1344 return 0; 1345} 1346#endif 1347 1348static int 1349vga_error(void) 1350{ 1351 return ENODEV; 1352} 1353 1354static int 1355vga_probe(int unit, video_adapter_t **adpp, void *arg, int flags) 1356{ 1357 probe_adapters(); 1358 if (unit >= biosadapters) 1359 return ENXIO; 1360 1361 *adpp = &biosadapter[unit]; 1362 1363 return 0; 1364} 1365 1366static int 1367vga_init(int unit, video_adapter_t *adp, int flags) 1368{ 1369 if ((unit >= biosadapters) || (adp == NULL) || !probe_done(adp)) 1370 return ENXIO; 1371 1372 if (!init_done(adp)) { 1373 /* nothing to do really... */ 1374 adp->va_flags |= V_ADP_INITIALIZED; 1375 } 1376 1377 if (!config_done(adp)) { 1378 if (vid_register(adp) < 0) 1379 return ENXIO; 1380 adp->va_flags |= V_ADP_REGISTERED; 1381 } 1382 if (vga_sub_configure != NULL) 1383 (*vga_sub_configure)(0); 1384 1385 return 0; 1386} 1387 1388/* 1389 * get_info(): 1390 * Return the video_info structure of the requested video mode. 1391 * 1392 * all adapters 1393 */ 1394static int 1395vga_get_info(video_adapter_t *adp, int mode, video_info_t *info) 1396{ 1397 int i; 1398 1399 if (!vga_init_done) 1400 return ENXIO; 1401 1402 mode = map_gen_mode_num(adp->va_type, adp->va_flags & V_ADP_COLOR, mode); 1403#ifndef VGA_NO_MODE_CHANGE 1404 if (adp->va_flags & V_ADP_MODECHANGE) { 1405 /* 1406 * If the parameter table entry for this mode is not found, 1407 * the mode is not supported... 1408 */ 1409 if (get_mode_param(mode) == NULL) 1410 return EINVAL; 1411 } else 1412#endif /* VGA_NO_MODE_CHANGE */ 1413 { 1414 /* 1415 * Even if we don't support video mode switching on this adapter, 1416 * the information on the initial (thus current) video mode 1417 * should be made available. 1418 */ 1419 if (mode != adp->va_initial_mode) 1420 return EINVAL; 1421 } 1422 1423 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 1424 if (bios_vmode[i].vi_mode == NA) 1425 continue; 1426 if (mode == bios_vmode[i].vi_mode) { 1427 *info = bios_vmode[i]; 1428 /* XXX */ 1429 info->vi_buffer_size = info->vi_window_size*info->vi_planes; 1430 return 0; 1431 } 1432 } 1433 return EINVAL; 1434} 1435 1436/* 1437 * query_mode(): 1438 * Find a video mode matching the requested parameters. 1439 * Fields filled with 0 are considered "don't care" fields and 1440 * match any modes. 1441 * 1442 * all adapters 1443 */ 1444static int 1445vga_query_mode(video_adapter_t *adp, video_info_t *info) 1446{ 1447 int i; 1448 1449 if (!vga_init_done) 1450 return ENXIO; 1451 1452 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 1453 if (bios_vmode[i].vi_mode == NA) 1454 continue; 1455 1456 if ((info->vi_width != 0) 1457 && (info->vi_width != bios_vmode[i].vi_width)) 1458 continue; 1459 if ((info->vi_height != 0) 1460 && (info->vi_height != bios_vmode[i].vi_height)) 1461 continue; 1462 if ((info->vi_cwidth != 0) 1463 && (info->vi_cwidth != bios_vmode[i].vi_cwidth)) 1464 continue; 1465 if ((info->vi_cheight != 0) 1466 && (info->vi_cheight != bios_vmode[i].vi_cheight)) 1467 continue; 1468 if ((info->vi_depth != 0) 1469 && (info->vi_depth != bios_vmode[i].vi_depth)) 1470 continue; 1471 if ((info->vi_planes != 0) 1472 && (info->vi_planes != bios_vmode[i].vi_planes)) 1473 continue; 1474 /* XXX: should check pixel format, memory model */ 1475 if ((info->vi_flags != 0) 1476 && (info->vi_flags != bios_vmode[i].vi_flags)) 1477 continue; 1478 1479 /* verify if this mode is supported on this adapter */ 1480 if (vga_get_info(adp, bios_vmode[i].vi_mode, info)) 1481 continue; 1482 return 0; 1483 } 1484 return ENODEV; 1485} 1486 1487/* 1488 * set_mode(): 1489 * Change the video mode. 1490 * 1491 * EGA/VGA 1492 */ 1493 1494#ifndef VGA_NO_MODE_CHANGE 1495#ifdef VGA_WIDTH90 1496static void 1497set_width90(adp_state_t *params) 1498{ 1499 /* 1500 * Based on code submitted by Kelly Yancey (kbyanc@freedomnet.com) 1501 * and alexv@sui.gda.itesm.mx. 1502 */ 1503 params->regs[5] |= 1; /* toggle 8 pixel wide fonts */ 1504 params->regs[10+0x0] = 0x6b; 1505 params->regs[10+0x1] = 0x59; 1506 params->regs[10+0x2] = 0x5a; 1507 params->regs[10+0x3] = 0x8e; 1508 params->regs[10+0x4] = 0x5e; 1509 params->regs[10+0x5] = 0x8a; 1510 params->regs[10+0x13] = 45; 1511 params->regs[35+0x13] = 0; 1512} 1513#endif /* VGA_WIDTH90 */ 1514#endif /* !VGA_NO_MODE_CHANGE */ 1515 1516static int 1517vga_set_mode(video_adapter_t *adp, int mode) 1518{ 1519#ifndef VGA_NO_MODE_CHANGE 1520 video_info_t info; 1521 adp_state_t params; 1522 1523 prologue(adp, V_ADP_MODECHANGE, ENODEV); 1524 1525 mode = map_gen_mode_num(adp->va_type, 1526 adp->va_flags & V_ADP_COLOR, mode); 1527 if (vga_get_info(adp, mode, &info)) 1528 return EINVAL; 1529 1530#if VGA_DEBUG > 1 1531 printf("vga_set_mode(): setting mode %d\n", mode); 1532#endif 1533 1534 params.sig = V_STATE_SIG; 1535 bcopy(get_mode_param(mode), params.regs, sizeof(params.regs)); 1536 1537 switch (mode) { 1538#ifdef VGA_WIDTH90 1539 case M_VGA_C90x60: case M_VGA_M90x60: 1540 set_width90(¶ms); 1541 /* FALLTHROUGH */ 1542#endif 1543 case M_VGA_C80x60: case M_VGA_M80x60: 1544 params.regs[2] = 0x08; 1545 params.regs[19] = 0x47; 1546 goto special_480l; 1547 1548#ifdef VGA_WIDTH90 1549 case M_VGA_C90x30: case M_VGA_M90x30: 1550 set_width90(¶ms); 1551 /* FALLTHROUGH */ 1552#endif 1553 case M_VGA_C80x30: case M_VGA_M80x30: 1554 params.regs[19] = 0x4f; 1555special_480l: 1556 params.regs[9] |= 0xc0; 1557 params.regs[16] = 0x08; 1558 params.regs[17] = 0x3e; 1559 params.regs[26] = 0xea; 1560 params.regs[28] = 0xdf; 1561 params.regs[31] = 0xe7; 1562 params.regs[32] = 0x04; 1563 goto setup_mode; 1564 1565#ifdef VGA_WIDTH90 1566 case M_VGA_C90x43: case M_VGA_M90x43: 1567 set_width90(¶ms); 1568 /* FALLTHROUGH */ 1569#endif 1570 case M_ENH_C80x43: case M_ENH_B80x43: 1571 params.regs[28] = 87; 1572 goto special_80x50; 1573 1574#ifdef VGA_WIDTH90 1575 case M_VGA_C90x50: case M_VGA_M90x50: 1576 set_width90(¶ms); 1577 /* FALLTHROUGH */ 1578#endif 1579 case M_VGA_C80x50: case M_VGA_M80x50: 1580special_80x50: 1581 params.regs[2] = 8; 1582 params.regs[19] = 7; 1583 goto setup_mode; 1584 1585#ifdef VGA_WIDTH90 1586 case M_VGA_C90x25: case M_VGA_M90x25: 1587 set_width90(¶ms); 1588 /* FALLTHROUGH */ 1589#endif 1590 case M_VGA_C40x25: case M_VGA_C80x25: 1591 case M_VGA_M80x25: 1592 case M_B40x25: case M_C40x25: 1593 case M_B80x25: case M_C80x25: 1594 case M_ENH_B40x25: case M_ENH_C40x25: 1595 case M_ENH_B80x25: case M_ENH_C80x25: 1596 case M_EGAMONO80x25: 1597 1598setup_mode: 1599 vga_load_state(adp, ¶ms); 1600 break; 1601 1602 case M_VGA_MODEX: 1603 /* "unchain" the VGA mode */ 1604 params.regs[5-1+0x04] &= 0xf7; 1605 params.regs[5-1+0x04] |= 0x04; 1606 /* turn off doubleword mode */ 1607 params.regs[10+0x14] &= 0xbf; 1608 /* turn off word addressing */ 1609 params.regs[10+0x17] |= 0x40; 1610 /* set logical screen width */ 1611 params.regs[10+0x13] = 80; 1612 /* set 240 lines */ 1613 params.regs[10+0x11] = 0x2c; 1614 params.regs[10+0x06] = 0x0d; 1615 params.regs[10+0x07] = 0x3e; 1616 params.regs[10+0x10] = 0xea; 1617 params.regs[10+0x11] = 0xac; 1618 params.regs[10+0x12] = 0xdf; 1619 params.regs[10+0x15] = 0xe7; 1620 params.regs[10+0x16] = 0x06; 1621 /* set vertical sync polarity to reflect aspect ratio */ 1622 params.regs[9] = 0xe3; 1623 goto setup_grmode; 1624 1625 case M_BG320: case M_CG320: case M_BG640: 1626 case M_CG320_D: case M_CG640_E: 1627 case M_CG640x350: case M_ENH_CG640: 1628 case M_BG640x480: case M_CG640x480: case M_VGA_CG320: 1629 1630setup_grmode: 1631 vga_load_state(adp, ¶ms); 1632 break; 1633 1634 default: 1635 return EINVAL; 1636 } 1637 1638 adp->va_mode = mode; 1639 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1640 update_adapter_info(adp, &info); 1641 1642 /* move hardware cursor out of the way */ 1643 (*vidsw[adp->va_index]->set_hw_cursor)(adp, -1, -1); 1644 1645 return 0; 1646#else /* VGA_NO_MODE_CHANGE */ 1647 return ENODEV; 1648#endif /* VGA_NO_MODE_CHANGE */ 1649} 1650 1651#ifndef VGA_NO_FONT_LOADING 1652 1653static void 1654set_font_mode(video_adapter_t *adp, u_char *buf) 1655{ 1656 u_char *mp; 1657 int s; 1658 1659 s = splhigh(); 1660 1661 /* save register values */ 1662 if (adp->va_type == KD_VGA) { 1663 outb(TSIDX, 0x02); buf[0] = inb(TSREG); 1664 outb(TSIDX, 0x04); buf[1] = inb(TSREG); 1665 outb(GDCIDX, 0x04); buf[2] = inb(GDCREG); 1666 outb(GDCIDX, 0x05); buf[3] = inb(GDCREG); 1667 outb(GDCIDX, 0x06); buf[4] = inb(GDCREG); 1668 inb(adp->va_crtc_addr + 6); 1669 outb(ATC, 0x10); buf[5] = inb(ATC + 1); 1670 } else /* if (adp->va_type == KD_EGA) */ { 1671 /* 1672 * EGA cannot be read; copy parameters from the mode parameter 1673 * table. 1674 */ 1675 mp = get_mode_param(adp->va_mode); 1676 buf[0] = mp[5 + 0x02 - 1]; 1677 buf[1] = mp[5 + 0x04 - 1]; 1678 buf[2] = mp[55 + 0x04]; 1679 buf[3] = mp[55 + 0x05]; 1680 buf[4] = mp[55 + 0x06]; 1681 buf[5] = mp[35 + 0x10]; 1682 } 1683 1684 /* setup vga for loading fonts */ 1685 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1686 outb(ATC, 0x10); outb(ATC, buf[5] & ~0x01); 1687 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1688 outb(ATC, 0x20); /* enable palette */ 1689 1690#if VGA_SLOW_IOACCESS 1691#ifdef VGA_ALT_SEQACCESS 1692 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1693#endif 1694 outb(TSIDX, 0x02); outb(TSREG, 0x04); 1695 outb(TSIDX, 0x04); outb(TSREG, 0x07); 1696#ifdef VGA_ALT_SEQACCESS 1697 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1698#endif 1699 outb(GDCIDX, 0x04); outb(GDCREG, 0x02); 1700 outb(GDCIDX, 0x05); outb(GDCREG, 0x00); 1701 outb(GDCIDX, 0x06); outb(GDCREG, 0x04); 1702#else /* VGA_SLOW_IOACCESS */ 1703#ifdef VGA_ALT_SEQACCESS 1704 outw(TSIDX, 0x0100); 1705#endif 1706 outw(TSIDX, 0x0402); 1707 outw(TSIDX, 0x0704); 1708#ifdef VGA_ALT_SEQACCESS 1709 outw(TSIDX, 0x0300); 1710#endif 1711 outw(GDCIDX, 0x0204); 1712 outw(GDCIDX, 0x0005); 1713 outw(GDCIDX, 0x0406); /* addr = a0000, 64kb */ 1714#endif /* VGA_SLOW_IOACCESS */ 1715 1716 splx(s); 1717} 1718 1719static void 1720set_normal_mode(video_adapter_t *adp, u_char *buf) 1721{ 1722 int s; 1723 1724 s = splhigh(); 1725 1726 /* setup vga for normal operation mode again */ 1727 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1728 outb(ATC, 0x10); outb(ATC, buf[5]); 1729 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1730 outb(ATC, 0x20); /* enable palette */ 1731 1732#if VGA_SLOW_IOACCESS 1733#ifdef VGA_ALT_SEQACCESS 1734 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1735#endif 1736 outb(TSIDX, 0x02); outb(TSREG, buf[0]); 1737 outb(TSIDX, 0x04); outb(TSREG, buf[1]); 1738#ifdef VGA_ALT_SEQACCESS 1739 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1740#endif 1741 outb(GDCIDX, 0x04); outb(GDCREG, buf[2]); 1742 outb(GDCIDX, 0x05); outb(GDCREG, buf[3]); 1743 if (adp->va_crtc_addr == MONO_CRTC) { 1744 outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x08); 1745 } else { 1746 outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x0c); 1747 } 1748#else /* VGA_SLOW_IOACCESS */ 1749#ifdef VGA_ALT_SEQACCESS 1750 outw(TSIDX, 0x0100); 1751#endif 1752 outw(TSIDX, 0x0002 | (buf[0] << 8)); 1753 outw(TSIDX, 0x0004 | (buf[1] << 8)); 1754#ifdef VGA_ALT_SEQACCESS 1755 outw(TSIDX, 0x0300); 1756#endif 1757 outw(GDCIDX, 0x0004 | (buf[2] << 8)); 1758 outw(GDCIDX, 0x0005 | (buf[3] << 8)); 1759 if (adp->va_crtc_addr == MONO_CRTC) 1760 outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x08)<<8)); 1761 else 1762 outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x0c)<<8)); 1763#endif /* VGA_SLOW_IOACCESS */ 1764 1765 splx(s); 1766} 1767 1768#endif /* VGA_NO_FONT_LOADING */ 1769 1770/* 1771 * save_font(): 1772 * Read the font data in the requested font page from the video adapter. 1773 * 1774 * EGA/VGA 1775 */ 1776static int 1777vga_save_font(video_adapter_t *adp, int page, int fontsize, u_char *data, 1778 int ch, int count) 1779{ 1780#ifndef VGA_NO_FONT_LOADING 1781 u_char buf[PARAM_BUFSIZE]; 1782 u_int32_t segment; 1783 int c; 1784#ifdef VGA_ALT_SEQACCESS 1785 int s; 1786 u_char val = 0; 1787#endif 1788 1789 prologue(adp, V_ADP_FONT, ENODEV); 1790 1791 if (fontsize < 14) { 1792 /* FONT_8 */ 1793 fontsize = 8; 1794 } else if (fontsize >= 32) { 1795 fontsize = 32; 1796 } else if (fontsize >= 16) { 1797 /* FONT_16 */ 1798 fontsize = 16; 1799 } else { 1800 /* FONT_14 */ 1801 fontsize = 14; 1802 } 1803 1804 if (page < 0 || page >= 8) 1805 return EINVAL; 1806 segment = FONT_BUF + 0x4000*page; 1807 if (page > 3) 1808 segment -= 0xe000; 1809 1810#ifdef VGA_ALT_SEQACCESS 1811 if (adp->va_type == KD_VGA) { /* what about EGA? XXX */ 1812 s = splhigh(); 1813 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1814 outb(TSIDX, 0x01); val = inb(TSREG); /* disable screen */ 1815 outb(TSIDX, 0x01); outb(TSREG, val | 0x20); 1816 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1817 splx(s); 1818 } 1819#endif 1820 1821 set_font_mode(adp, buf); 1822 if (fontsize == 32) { 1823 bcopy_fromio(segment + ch*32, data, fontsize*count); 1824 } else { 1825 for (c = ch; count > 0; ++c, --count) { 1826 bcopy_fromio(segment + c*32, data, fontsize); 1827 data += fontsize; 1828 } 1829 } 1830 set_normal_mode(adp, buf); 1831 1832#ifdef VGA_ALT_SEQACCESS 1833 if (adp->va_type == KD_VGA) { 1834 s = splhigh(); 1835 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1836 outb(TSIDX, 0x01); outb(TSREG, val & 0xdf); /* enable screen */ 1837 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1838 splx(s); 1839 } 1840#endif 1841 1842 return 0; 1843#else /* VGA_NO_FONT_LOADING */ 1844 return ENODEV; 1845#endif /* VGA_NO_FONT_LOADING */ 1846} 1847 1848/* 1849 * load_font(): 1850 * Set the font data in the requested font page. 1851 * NOTE: it appears that some recent video adapters do not support 1852 * the font page other than 0... XXX 1853 * 1854 * EGA/VGA 1855 */ 1856static int 1857vga_load_font(video_adapter_t *adp, int page, int fontsize, u_char *data, 1858 int ch, int count) 1859{ 1860#ifndef VGA_NO_FONT_LOADING 1861 u_char buf[PARAM_BUFSIZE]; 1862 u_int32_t segment; 1863 int c; 1864#ifdef VGA_ALT_SEQACCESS 1865 int s; 1866 u_char val = 0; 1867#endif 1868 1869 prologue(adp, V_ADP_FONT, ENODEV); 1870 1871 if (fontsize < 14) { 1872 /* FONT_8 */ 1873 fontsize = 8; 1874 } else if (fontsize >= 32) { 1875 fontsize = 32; 1876 } else if (fontsize >= 16) { 1877 /* FONT_16 */ 1878 fontsize = 16; 1879 } else { 1880 /* FONT_14 */ 1881 fontsize = 14; 1882 } 1883 1884 if (page < 0 || page >= 8) 1885 return EINVAL; 1886 segment = FONT_BUF + 0x4000*page; 1887 if (page > 3) 1888 segment -= 0xe000; 1889 1890#ifdef VGA_ALT_SEQACCESS 1891 if (adp->va_type == KD_VGA) { /* what about EGA? XXX */ 1892 s = splhigh(); 1893 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1894 outb(TSIDX, 0x01); val = inb(TSREG); /* disable screen */ 1895 outb(TSIDX, 0x01); outb(TSREG, val | 0x20); 1896 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1897 splx(s); 1898 } 1899#endif 1900 1901 set_font_mode(adp, buf); 1902 if (fontsize == 32) { 1903 bcopy_toio(data, segment + ch*32, fontsize*count); 1904 } else { 1905 for (c = ch; count > 0; ++c, --count) { 1906 bcopy_toio(data, segment + c*32, fontsize); 1907 data += fontsize; 1908 } 1909 } 1910 set_normal_mode(adp, buf); 1911 1912#ifdef VGA_ALT_SEQACCESS 1913 if (adp->va_type == KD_VGA) { 1914 s = splhigh(); 1915 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1916 outb(TSIDX, 0x01); outb(TSREG, val & 0xdf); /* enable screen */ 1917 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1918 splx(s); 1919 } 1920#endif 1921 1922 return 0; 1923#else /* VGA_NO_FONT_LOADING */ 1924 return ENODEV; 1925#endif /* VGA_NO_FONT_LOADING */ 1926} 1927 1928/* 1929 * show_font(): 1930 * Activate the requested font page. 1931 * NOTE: it appears that some recent video adapters do not support 1932 * the font page other than 0... XXX 1933 * 1934 * EGA/VGA 1935 */ 1936static int 1937vga_show_font(video_adapter_t *adp, int page) 1938{ 1939#ifndef VGA_NO_FONT_LOADING 1940 static u_char cg[] = { 0x00, 0x05, 0x0a, 0x0f, 0x30, 0x35, 0x3a, 0x3f }; 1941 int s; 1942 1943 prologue(adp, V_ADP_FONT, ENODEV); 1944 if (page < 0 || page >= 8) 1945 return EINVAL; 1946 1947 s = splhigh(); 1948 outb(TSIDX, 0x03); outb(TSREG, cg[page]); 1949 splx(s); 1950 1951 return 0; 1952#else /* VGA_NO_FONT_LOADING */ 1953 return ENODEV; 1954#endif /* VGA_NO_FONT_LOADING */ 1955} 1956 1957/* 1958 * save_palette(): 1959 * Read DAC values. The values have expressed in 8 bits. 1960 * 1961 * VGA 1962 */ 1963static int 1964vga_save_palette(video_adapter_t *adp, u_char *palette) 1965{ 1966 int i; 1967 1968 prologue(adp, V_ADP_PALETTE, ENODEV); 1969 1970 /* 1971 * We store 8 bit values in the palette buffer, while the standard 1972 * VGA has 6 bit DAC . 1973 */ 1974 outb(PALRADR, 0x00); 1975 for (i = 0; i < 256*3; ++i) 1976 palette[i] = inb(PALDATA) << 2; 1977 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 1978 return 0; 1979} 1980 1981static int 1982vga_save_palette2(video_adapter_t *adp, int base, int count, 1983 u_char *r, u_char *g, u_char *b) 1984{ 1985 int i; 1986 1987 prologue(adp, V_ADP_PALETTE, ENODEV); 1988 1989 outb(PALRADR, base); 1990 for (i = 0; i < count; ++i) { 1991 r[i] = inb(PALDATA) << 2; 1992 g[i] = inb(PALDATA) << 2; 1993 b[i] = inb(PALDATA) << 2; 1994 } 1995 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 1996 return 0; 1997} 1998 1999/* 2000 * load_palette(): 2001 * Set DAC values. 2002 * 2003 * VGA 2004 */ 2005static int 2006vga_load_palette(video_adapter_t *adp, u_char *palette) 2007{ 2008 int i; 2009 2010 prologue(adp, V_ADP_PALETTE, ENODEV); 2011 2012 outb(PIXMASK, 0xff); /* no pixelmask */ 2013 outb(PALWADR, 0x00); 2014 for (i = 0; i < 256*3; ++i) 2015 outb(PALDATA, palette[i] >> 2); 2016 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 2017 outb(ATC, 0x20); /* enable palette */ 2018 return 0; 2019} 2020 2021static int 2022vga_load_palette2(video_adapter_t *adp, int base, int count, 2023 u_char *r, u_char *g, u_char *b) 2024{ 2025 int i; 2026 2027 prologue(adp, V_ADP_PALETTE, ENODEV); 2028 2029 outb(PIXMASK, 0xff); /* no pixelmask */ 2030 outb(PALWADR, base); 2031 for (i = 0; i < count; ++i) { 2032 outb(PALDATA, r[i] >> 2); 2033 outb(PALDATA, g[i] >> 2); 2034 outb(PALDATA, b[i] >> 2); 2035 } 2036 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 2037 outb(ATC, 0x20); /* enable palette */ 2038 return 0; 2039} 2040 2041/* 2042 * set_border(): 2043 * Change the border color. 2044 * 2045 * CGA/EGA/VGA 2046 */ 2047static int 2048vga_set_border(video_adapter_t *adp, int color) 2049{ 2050 prologue(adp, V_ADP_BORDER, ENODEV); 2051 2052 switch (adp->va_type) { 2053 case KD_EGA: 2054 case KD_VGA: 2055 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 2056 outb(ATC, 0x31); outb(ATC, color & 0xff); 2057 break; 2058 case KD_CGA: 2059 outb(adp->va_crtc_addr + 5, color & 0x0f); /* color select register */ 2060 break; 2061 case KD_MONO: 2062 case KD_HERCULES: 2063 default: 2064 break; 2065 } 2066 return 0; 2067} 2068 2069/* 2070 * save_state(): 2071 * Read video register values. 2072 * NOTE: this function only reads the standard EGA/VGA registers. 2073 * any extra/extended registers of SVGA adapters are not saved. 2074 * 2075 * VGA 2076 */ 2077static int 2078vga_save_state(video_adapter_t *adp, void *p, size_t size) 2079{ 2080 video_info_t info; 2081 u_char *buf; 2082 int crtc_addr; 2083 int i, j; 2084 int s; 2085 2086 if (size == 0) { 2087 /* return the required buffer size */ 2088 prologue(adp, V_ADP_STATESAVE, 0); 2089 return sizeof(adp_state_t); 2090 } else { 2091 prologue(adp, V_ADP_STATESAVE, ENODEV); 2092 if (size < sizeof(adp_state_t)) 2093 return EINVAL; 2094 } 2095 2096 ((adp_state_t *)p)->sig = V_STATE_SIG; 2097 buf = ((adp_state_t *)p)->regs; 2098 bzero(buf, V_MODE_PARAM_SIZE); 2099 crtc_addr = adp->va_crtc_addr; 2100 2101 s = splhigh(); 2102 2103 outb(TSIDX, 0x00); outb(TSREG, 0x01); /* stop sequencer */ 2104 for (i = 0, j = 5; i < 4; i++) { 2105 outb(TSIDX, i + 1); 2106 buf[j++] = inb(TSREG); 2107 } 2108 buf[9] = inb(MISC + 10); /* dot-clock */ 2109 outb(TSIDX, 0x00); outb(TSREG, 0x03); /* start sequencer */ 2110 2111 for (i = 0, j = 10; i < 25; i++) { /* crtc */ 2112 outb(crtc_addr, i); 2113 buf[j++] = inb(crtc_addr + 1); 2114 } 2115 for (i = 0, j = 35; i < 20; i++) { /* attribute ctrl */ 2116 inb(crtc_addr + 6); /* reset flip-flop */ 2117 outb(ATC, i); 2118 buf[j++] = inb(ATC + 1); 2119 } 2120 for (i = 0, j = 55; i < 9; i++) { /* graph data ctrl */ 2121 outb(GDCIDX, i); 2122 buf[j++] = inb(GDCREG); 2123 } 2124 inb(crtc_addr + 6); /* reset flip-flop */ 2125 outb(ATC, 0x20); /* enable palette */ 2126 2127 splx(s); 2128 2129#if 1 2130 if (vga_get_info(adp, adp->va_mode, &info) == 0) { 2131 if (info.vi_flags & V_INFO_GRAPHICS) { 2132 buf[0] = info.vi_width/info.vi_cwidth; /* COLS */ 2133 buf[1] = info.vi_height/info.vi_cheight - 1; /* ROWS */ 2134 } else { 2135 buf[0] = info.vi_width; /* COLS */ 2136 buf[1] = info.vi_height - 1; /* ROWS */ 2137 } 2138 buf[2] = info.vi_cheight; /* POINTS */ 2139 } else { 2140 /* XXX: shouldn't be happening... */ 2141 printf("vga%d: %s: failed to obtain mode info. (vga_save_state())\n", 2142 adp->va_unit, adp->va_name); 2143 } 2144#else 2145 buf[0] = readb(BIOS_PADDRTOVADDR(0x44a)); /* COLS */ 2146 buf[1] = readb(BIOS_PADDRTOVADDR(0x484)); /* ROWS */ 2147 buf[2] = readb(BIOS_PADDRTOVADDR(0x485)); /* POINTS */ 2148 buf[3] = readb(BIOS_PADDRTOVADDR(0x44c)); 2149 buf[4] = readb(BIOS_PADDRTOVADDR(0x44d)); 2150#endif 2151 2152 return 0; 2153} 2154 2155/* 2156 * load_state(): 2157 * Set video registers at once. 2158 * NOTE: this function only updates the standard EGA/VGA registers. 2159 * any extra/extended registers of SVGA adapters are not changed. 2160 * 2161 * EGA/VGA 2162 */ 2163static int 2164vga_load_state(video_adapter_t *adp, void *p) 2165{ 2166 u_char *buf; 2167 int crtc_addr; 2168 int s; 2169 int i; 2170 2171 prologue(adp, V_ADP_STATELOAD, ENODEV); 2172 if (((adp_state_t *)p)->sig != V_STATE_SIG) 2173 return EINVAL; 2174 2175 buf = ((adp_state_t *)p)->regs; 2176 crtc_addr = adp->va_crtc_addr; 2177 2178#if VGA_DEBUG > 1 2179 dump_buffer(buf, V_MODE_PARAM_SIZE); 2180#endif 2181 2182 s = splhigh(); 2183 2184 outb(TSIDX, 0x00); outb(TSREG, 0x01); /* stop sequencer */ 2185 for (i = 0; i < 4; ++i) { /* program sequencer */ 2186 outb(TSIDX, i + 1); 2187 outb(TSREG, buf[i + 5]); 2188 } 2189 outb(MISC, buf[9]); /* set dot-clock */ 2190 outb(TSIDX, 0x00); outb(TSREG, 0x03); /* start sequencer */ 2191 outb(crtc_addr, 0x11); 2192 outb(crtc_addr + 1, inb(crtc_addr + 1) & 0x7F); 2193 for (i = 0; i < 25; ++i) { /* program crtc */ 2194 outb(crtc_addr, i); 2195 outb(crtc_addr + 1, buf[i + 10]); 2196 } 2197 inb(crtc_addr+6); /* reset flip-flop */ 2198 for (i = 0; i < 20; ++i) { /* program attribute ctrl */ 2199 outb(ATC, i); 2200 outb(ATC, buf[i + 35]); 2201 } 2202 for (i = 0; i < 9; ++i) { /* program graph data ctrl */ 2203 outb(GDCIDX, i); 2204 outb(GDCREG, buf[i + 55]); 2205 } 2206 inb(crtc_addr + 6); /* reset flip-flop */ 2207 outb(ATC, 0x20); /* enable palette */ 2208 2209#if notyet /* a temporary workaround for kernel panic, XXX */ 2210#ifndef VGA_NO_BIOS 2211 if (adp->va_unit == V_ADP_PRIMARY) { 2212 writeb(BIOS_PADDRTOVADDR(0x44a), buf[0]); /* COLS */ 2213 writeb(BIOS_PADDRTOVADDR(0x484), buf[1] + rows_offset - 1); /* ROWS */ 2214 writeb(BIOS_PADDRTOVADDR(0x485), buf[2]); /* POINTS */ 2215#if 0 2216 writeb(BIOS_PADDRTOVADDR(0x44c), buf[3]); 2217 writeb(BIOS_PADDRTOVADDR(0x44d), buf[4]); 2218#endif 2219 } 2220#endif /* VGA_NO_BIOS */ 2221#endif /* notyet */ 2222 2223 splx(s); 2224 return 0; 2225} 2226 2227/* 2228 * set_origin(): 2229 * Change the origin (window mapping) of the banked frame buffer. 2230 */ 2231static int 2232vga_set_origin(video_adapter_t *adp, off_t offset) 2233{ 2234 /* 2235 * The standard video modes do not require window mapping; 2236 * always return error. 2237 */ 2238 return ENODEV; 2239} 2240 2241/* 2242 * read_hw_cursor(): 2243 * Read the position of the hardware text cursor. 2244 * 2245 * all adapters 2246 */ 2247static int 2248vga_read_hw_cursor(video_adapter_t *adp, int *col, int *row) 2249{ 2250 u_int16_t off; 2251 int s; 2252 2253 if (!vga_init_done) 2254 return ENXIO; 2255 2256 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) 2257 return ENODEV; 2258 2259 s = spltty(); 2260 outb(adp->va_crtc_addr, 14); 2261 off = inb(adp->va_crtc_addr + 1); 2262 outb(adp->va_crtc_addr, 15); 2263 off = (off << 8) | inb(adp->va_crtc_addr + 1); 2264 splx(s); 2265 2266 *row = off / adp->va_info.vi_width; 2267 *col = off % adp->va_info.vi_width; 2268 2269 return 0; 2270} 2271 2272/* 2273 * set_hw_cursor(): 2274 * Move the hardware text cursor. If col and row are both -1, 2275 * the cursor won't be shown. 2276 * 2277 * all adapters 2278 */ 2279static int 2280vga_set_hw_cursor(video_adapter_t *adp, int col, int row) 2281{ 2282 u_int16_t off; 2283 int s; 2284 2285 if (!vga_init_done) 2286 return ENXIO; 2287 2288 if ((col == -1) && (row == -1)) { 2289 off = -1; 2290 } else { 2291 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) 2292 return ENODEV; 2293 off = row*adp->va_info.vi_width + col; 2294 } 2295 2296 s = spltty(); 2297 outb(adp->va_crtc_addr, 14); 2298 outb(adp->va_crtc_addr + 1, off >> 8); 2299 outb(adp->va_crtc_addr, 15); 2300 outb(adp->va_crtc_addr + 1, off & 0x00ff); 2301 splx(s); 2302 2303 return 0; 2304} 2305 2306/* 2307 * set_hw_cursor_shape(): 2308 * Change the shape of the hardware text cursor. If the height is 2309 * zero or negative, the cursor won't be shown. 2310 * 2311 * all adapters 2312 */ 2313static int 2314vga_set_hw_cursor_shape(video_adapter_t *adp, int base, int height, 2315 int celsize, int blink) 2316{ 2317 int s; 2318 2319 if (!vga_init_done) 2320 return ENXIO; 2321 2322 s = spltty(); 2323 switch (adp->va_type) { 2324 case KD_VGA: 2325 case KD_CGA: 2326 case KD_MONO: 2327 case KD_HERCULES: 2328 default: 2329 if (height <= 0) { 2330 /* make the cursor invisible */ 2331 outb(adp->va_crtc_addr, 10); 2332 outb(adp->va_crtc_addr + 1, 32); 2333 outb(adp->va_crtc_addr, 11); 2334 outb(adp->va_crtc_addr + 1, 0); 2335 } else { 2336 outb(adp->va_crtc_addr, 10); 2337 outb(adp->va_crtc_addr + 1, celsize - base - height); 2338 outb(adp->va_crtc_addr, 11); 2339 outb(adp->va_crtc_addr + 1, celsize - base - 1); 2340 } 2341 break; 2342 case KD_EGA: 2343 if (height <= 0) { 2344 /* make the cursor invisible */ 2345 outb(adp->va_crtc_addr, 10); 2346 outb(adp->va_crtc_addr + 1, celsize); 2347 outb(adp->va_crtc_addr, 11); 2348 outb(adp->va_crtc_addr + 1, 0); 2349 } else { 2350 outb(adp->va_crtc_addr, 10); 2351 outb(adp->va_crtc_addr + 1, celsize - base - height); 2352 outb(adp->va_crtc_addr, 11); 2353 outb(adp->va_crtc_addr + 1, celsize - base); 2354 } 2355 break; 2356 } 2357 splx(s); 2358 2359 return 0; 2360} 2361 2362/* 2363 * blank_display() 2364 * Put the display in power save/power off mode. 2365 * 2366 * all adapters 2367 */ 2368static int 2369vga_blank_display(video_adapter_t *adp, int mode) 2370{ 2371 u_char val; 2372 int s; 2373 2374 s = splhigh(); 2375 switch (adp->va_type) { 2376 case KD_VGA: 2377 switch (mode) { 2378 case V_DISPLAY_SUSPEND: 2379 case V_DISPLAY_STAND_BY: 2380 outb(TSIDX, 0x01); 2381 val = inb(TSREG); 2382 outb(TSIDX, 0x01); 2383 outb(TSREG, val | 0x20); 2384 outb(adp->va_crtc_addr, 0x17); 2385 val = inb(adp->va_crtc_addr + 1); 2386 outb(adp->va_crtc_addr + 1, val & ~0x80); 2387 break; 2388 case V_DISPLAY_BLANK: 2389 outb(TSIDX, 0x01); 2390 val = inb(TSREG); 2391 outb(TSIDX, 0x01); 2392 outb(TSREG, val | 0x20); 2393 break; 2394 case V_DISPLAY_ON: 2395 outb(TSIDX, 0x01); 2396 val = inb(TSREG); 2397 outb(TSIDX, 0x01); 2398 outb(TSREG, val & 0xDF); 2399 outb(adp->va_crtc_addr, 0x17); 2400 val = inb(adp->va_crtc_addr + 1); 2401 outb(adp->va_crtc_addr + 1, val | 0x80); 2402 break; 2403 } 2404 break; 2405 2406 case KD_EGA: 2407 /* no support yet */ 2408 splx(s); 2409 return ENODEV; 2410 2411 case KD_CGA: 2412 switch (mode) { 2413 case V_DISPLAY_SUSPEND: 2414 case V_DISPLAY_STAND_BY: 2415 case V_DISPLAY_BLANK: 2416 outb(adp->va_crtc_addr + 4, 0x25); 2417 break; 2418 case V_DISPLAY_ON: 2419 outb(adp->va_crtc_addr + 4, 0x2d); 2420 break; 2421 } 2422 break; 2423 2424 case KD_MONO: 2425 case KD_HERCULES: 2426 switch (mode) { 2427 case V_DISPLAY_SUSPEND: 2428 case V_DISPLAY_STAND_BY: 2429 case V_DISPLAY_BLANK: 2430 outb(adp->va_crtc_addr + 4, 0x21); 2431 break; 2432 case V_DISPLAY_ON: 2433 outb(adp->va_crtc_addr + 4, 0x29); 2434 break; 2435 } 2436 break; 2437 default: 2438 break; 2439 } 2440 splx(s); 2441 2442 return 0; 2443} 2444 2445/* 2446 * mmap(): 2447 * Mmap frame buffer. 2448 * 2449 * all adapters 2450 */ 2451static int 2452vga_mmap_buf(video_adapter_t *adp, vm_offset_t offset, vm_paddr_t *paddr, 2453 int prot) 2454{ 2455 if (adp->va_info.vi_flags & V_INFO_LINEAR) 2456 return -1; 2457 2458#if VGA_DEBUG > 0 2459 printf("vga_mmap_buf(): window:0x%jx, offset:0x%jx\n", 2460 (uintmax_t)adp->va_info.vi_window, (uintmax_t)offset); 2461#endif 2462 2463 /* XXX: is this correct? */ 2464 if (offset > adp->va_window_size - PAGE_SIZE) 2465 return -1; 2466 2467 *paddr = adp->va_info.vi_window + offset; 2468 return 0; 2469} 2470 2471#ifndef VGA_NO_MODE_CHANGE 2472 2473static void 2474planar_fill(video_adapter_t *adp, int val) 2475{ 2476 int length; 2477 int at; /* position in the frame buffer */ 2478 int l; 2479 2480 outw(GDCIDX, 0x0005); /* read mode 0, write mode 0 */ 2481 outw(GDCIDX, 0x0003); /* data rotate/function select */ 2482 outw(GDCIDX, 0x0f01); /* set/reset enable */ 2483 outw(GDCIDX, 0xff08); /* bit mask */ 2484 outw(GDCIDX, (val << 8) | 0x00); /* set/reset */ 2485 at = 0; 2486 length = adp->va_line_width*adp->va_info.vi_height; 2487 while (length > 0) { 2488 l = imin(length, adp->va_window_size); 2489 (*vidsw[adp->va_index]->set_win_org)(adp, at); 2490 bzero_io(adp->va_window, l); 2491 length -= l; 2492 at += l; 2493 } 2494 outw(GDCIDX, 0x0000); /* set/reset */ 2495 outw(GDCIDX, 0x0001); /* set/reset enable */ 2496} 2497 2498static void 2499packed_fill(video_adapter_t *adp, int val) 2500{ 2501 int length; 2502 int at; /* position in the frame buffer */ 2503 int l; 2504 2505 at = 0; 2506 length = adp->va_line_width*adp->va_info.vi_height; 2507 while (length > 0) { 2508 l = imin(length, adp->va_window_size); 2509 (*vidsw[adp->va_index]->set_win_org)(adp, at); 2510 fill_io(val, adp->va_window, l); 2511 length -= l; 2512 at += l; 2513 } 2514} 2515 2516static void 2517direct_fill(video_adapter_t *adp, int val) 2518{ 2519 int length; 2520 int at; /* position in the frame buffer */ 2521 int l; 2522 2523 at = 0; 2524 length = adp->va_line_width*adp->va_info.vi_height; 2525 while (length > 0) { 2526 l = imin(length, adp->va_window_size); 2527 (*vidsw[adp->va_index]->set_win_org)(adp, at); 2528 switch (adp->va_info.vi_pixel_size) { 2529 case sizeof(u_int16_t): 2530 fillw_io(val, adp->va_window, l/sizeof(u_int16_t)); 2531 break; 2532 case 3: 2533 /* FIXME */ 2534 break; 2535 case sizeof(u_int32_t): 2536 filll_io(val, adp->va_window, l/sizeof(u_int32_t)); 2537 break; 2538 } 2539 length -= l; 2540 at += l; 2541 } 2542} 2543 2544static int 2545vga_clear(video_adapter_t *adp) 2546{ 2547 switch (adp->va_info.vi_mem_model) { 2548 case V_INFO_MM_TEXT: 2549 /* do nothing? XXX */ 2550 break; 2551 case V_INFO_MM_PLANAR: 2552 planar_fill(adp, 0); 2553 break; 2554 case V_INFO_MM_PACKED: 2555 packed_fill(adp, 0); 2556 break; 2557 case V_INFO_MM_DIRECT: 2558 direct_fill(adp, 0); 2559 break; 2560 } 2561 return 0; 2562} 2563 2564#ifdef notyet 2565static void 2566planar_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2567{ 2568 int banksize; 2569 int bank; 2570 int pos; 2571 int offset; /* offset within window */ 2572 int bx; 2573 int l; 2574 2575 outw(GDCIDX, 0x0005); /* read mode 0, write mode 0 */ 2576 outw(GDCIDX, 0x0003); /* data rotate/function select */ 2577 outw(GDCIDX, 0x0f01); /* set/reset enable */ 2578 outw(GDCIDX, 0xff08); /* bit mask */ 2579 outw(GDCIDX, (val << 8) | 0x00); /* set/reset */ 2580 2581 banksize = adp->va_window_size; 2582 bank = -1; 2583 while (cy > 0) { 2584 pos = adp->va_line_width*y + x/8; 2585 if (bank != pos/banksize) { 2586 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2587 bank = pos/banksize; 2588 } 2589 offset = pos%banksize; 2590 bx = (x + cx)/8 - x/8; 2591 if (x % 8) { 2592 outw(GDCIDX, ((0xff00 >> (x % 8)) & 0xff00) | 0x08); 2593 writeb(adp->va_window + offset, 0); 2594 ++offset; 2595 --bx; 2596 if (offset >= banksize) { 2597 offset = 0; 2598 ++bank; /* next bank */ 2599 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2600 } 2601 outw(GDCIDX, 0xff08); /* bit mask */ 2602 } 2603 while (bx > 0) { 2604 l = imin(bx, banksize); 2605 bzero_io(adp->va_window + offset, l); 2606 offset += l; 2607 bx -= l; 2608 if (offset >= banksize) { 2609 offset = 0; 2610 ++bank; /* next bank */ 2611 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2612 } 2613 } 2614 if ((x + cx) % 8) { 2615 outw(GDCIDX, (~(0xff00 >> ((x + cx) % 8)) & 0xff00) | 0x08); 2616 writeb(adp->va_window + offset, 0); 2617 ++offset; 2618 if (offset >= banksize) { 2619 offset = 0; 2620 ++bank; /* next bank */ 2621 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2622 } 2623 outw(GDCIDX, 0xff08); /* bit mask */ 2624 } 2625 ++y; 2626 --cy; 2627 } 2628 2629 outw(GDCIDX, 0xff08); /* bit mask */ 2630 outw(GDCIDX, 0x0000); /* set/reset */ 2631 outw(GDCIDX, 0x0001); /* set/reset enable */ 2632} 2633 2634static void 2635packed_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2636{ 2637 int banksize; 2638 int bank; 2639 int pos; 2640 int offset; /* offset within window */ 2641 int end; 2642 2643 banksize = adp->va_window_size; 2644 bank = -1; 2645 cx *= adp->va_info.vi_pixel_size; 2646 while (cy > 0) { 2647 pos = adp->va_line_width*y + x*adp->va_info.vi_pixel_size; 2648 if (bank != pos/banksize) { 2649 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2650 bank = pos/banksize; 2651 } 2652 offset = pos%banksize; 2653 end = imin(offset + cx, banksize); 2654 fill_io(val, adp->va_window + offset, 2655 (end - offset)/adp->va_info.vi_pixel_size); 2656 /* the line may cross the window boundary */ 2657 if (offset + cx > banksize) { 2658 ++bank; /* next bank */ 2659 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2660 end = offset + cx - banksize; 2661 fill_io(val, adp->va_window, end/adp->va_info.vi_pixel_size); 2662 } 2663 ++y; 2664 --cy; 2665 } 2666} 2667 2668static void 2669direct_fill_rect16(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2670{ 2671 int banksize; 2672 int bank; 2673 int pos; 2674 int offset; /* offset within window */ 2675 int end; 2676 2677 /* 2678 * XXX: the function assumes that banksize is a muliple of 2679 * sizeof(u_int16_t). 2680 */ 2681 banksize = adp->va_window_size; 2682 bank = -1; 2683 cx *= sizeof(u_int16_t); 2684 while (cy > 0) { 2685 pos = adp->va_line_width*y + x*sizeof(u_int16_t); 2686 if (bank != pos/banksize) { 2687 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2688 bank = pos/banksize; 2689 } 2690 offset = pos%banksize; 2691 end = imin(offset + cx, banksize); 2692 fillw_io(val, adp->va_window + offset, 2693 (end - offset)/sizeof(u_int16_t)); 2694 /* the line may cross the window boundary */ 2695 if (offset + cx > banksize) { 2696 ++bank; /* next bank */ 2697 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2698 end = offset + cx - banksize; 2699 fillw_io(val, adp->va_window, end/sizeof(u_int16_t)); 2700 } 2701 ++y; 2702 --cy; 2703 } 2704} 2705 2706static void 2707direct_fill_rect24(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2708{ 2709 int banksize; 2710 int bank; 2711 int pos; 2712 int offset; /* offset within window */ 2713 int end; 2714 int i; 2715 int j; 2716 u_int8_t b[3]; 2717 2718 b[0] = val & 0x0000ff; 2719 b[1] = (val >> 8) & 0x0000ff; 2720 b[2] = (val >> 16) & 0x0000ff; 2721 banksize = adp->va_window_size; 2722 bank = -1; 2723 cx *= 3; 2724 while (cy > 0) { 2725 pos = adp->va_line_width*y + x*3; 2726 if (bank != pos/banksize) { 2727 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2728 bank = pos/banksize; 2729 } 2730 offset = pos%banksize; 2731 end = imin(offset + cx, banksize); 2732 for (i = 0, j = offset; j < end; i = (++i)%3, ++j) { 2733 writeb(adp->va_window + j, b[i]); 2734 } 2735 /* the line may cross the window boundary */ 2736 if (offset + cx >= banksize) { 2737 ++bank; /* next bank */ 2738 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2739 j = 0; 2740 end = offset + cx - banksize; 2741 for (; j < end; i = (++i)%3, ++j) { 2742 writeb(adp->va_window + j, b[i]); 2743 } 2744 } 2745 ++y; 2746 --cy; 2747 } 2748} 2749 2750static void 2751direct_fill_rect32(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2752{ 2753 int banksize; 2754 int bank; 2755 int pos; 2756 int offset; /* offset within window */ 2757 int end; 2758 2759 /* 2760 * XXX: the function assumes that banksize is a muliple of 2761 * sizeof(u_int32_t). 2762 */ 2763 banksize = adp->va_window_size; 2764 bank = -1; 2765 cx *= sizeof(u_int32_t); 2766 while (cy > 0) { 2767 pos = adp->va_line_width*y + x*sizeof(u_int32_t); 2768 if (bank != pos/banksize) { 2769 (*vidsw[adp->va_index]->set_win_org)(adp, pos); 2770 bank = pos/banksize; 2771 } 2772 offset = pos%banksize; 2773 end = imin(offset + cx, banksize); 2774 filll_io(val, adp->va_window + offset, 2775 (end - offset)/sizeof(u_int32_t)); 2776 /* the line may cross the window boundary */ 2777 if (offset + cx > banksize) { 2778 ++bank; /* next bank */ 2779 (*vidsw[adp->va_index]->set_win_org)(adp, bank*banksize); 2780 end = offset + cx - banksize; 2781 filll_io(val, adp->va_window, end/sizeof(u_int32_t)); 2782 } 2783 ++y; 2784 --cy; 2785 } 2786} 2787 2788static int 2789vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2790{ 2791 switch (adp->va_info.vi_mem_model) { 2792 case V_INFO_MM_TEXT: 2793 /* do nothing? XXX */ 2794 break; 2795 case V_INFO_MM_PLANAR: 2796 planar_fill_rect(adp, val, x, y, cx, cy); 2797 break; 2798 case V_INFO_MM_PACKED: 2799 packed_fill_rect(adp, val, x, y, cx, cy); 2800 break; 2801 case V_INFO_MM_DIRECT: 2802 switch (adp->va_info.vi_pixel_size) { 2803 case sizeof(u_int16_t): 2804 direct_fill_rect16(adp, val, x, y, cx, cy); 2805 break; 2806 case 3: 2807 direct_fill_rect24(adp, val, x, y, cx, cy); 2808 break; 2809 case sizeof(u_int32_t): 2810 direct_fill_rect32(adp, val, x, y, cx, cy); 2811 break; 2812 } 2813 break; 2814 } 2815 return 0; 2816} 2817#else /* !notyet */ 2818static int 2819vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2820{ 2821 return ENODEV; 2822} 2823#endif /* notyet */ 2824 2825static int 2826vga_bitblt(video_adapter_t *adp,...) 2827{ 2828 /* FIXME */ 2829 return ENODEV; 2830} 2831 2832#endif /* !VGA_NO_MODE_CHANGE */ 2833 2834static int 2835get_palette(video_adapter_t *adp, int base, int count, 2836 u_char *red, u_char *green, u_char *blue, u_char *trans) 2837{ 2838 u_char *r; 2839 u_char *g; 2840 u_char *b; 2841 2842 if ((base < 0) || (base >= 256) || (base + count > 256)) 2843 return EINVAL; 2844 2845 r = malloc(count*3, M_DEVBUF, M_WAITOK); 2846 g = r + count; 2847 b = g + count; 2848 if (vga_save_palette2(adp, base, count, r, g, b)) { 2849 free(r, M_DEVBUF); 2850 return ENODEV; 2851 } 2852 copyout(r, red, count); 2853 copyout(g, green, count); 2854 copyout(b, blue, count); 2855 if (trans != NULL) { 2856 bzero(r, count); 2857 copyout(r, trans, count); 2858 } 2859 free(r, M_DEVBUF); 2860 2861 return 0; 2862} 2863 2864static int 2865set_palette(video_adapter_t *adp, int base, int count, 2866 u_char *red, u_char *green, u_char *blue, u_char *trans) 2867{ 2868 u_char *r; 2869 u_char *g; 2870 u_char *b; 2871 int err; 2872 2873 if ((base < 0) || (base >= 256) || (base + count > 256)) 2874 return EINVAL; 2875 2876 r = malloc(count*3, M_DEVBUF, M_WAITOK); 2877 g = r + count; 2878 b = g + count; 2879 copyin(red, r, count); 2880 copyin(green, g, count); 2881 copyin(blue, b, count); 2882 err = vga_load_palette2(adp, base, count, r, g, b); 2883 free(r, M_DEVBUF); 2884 2885 return (err ? ENODEV : 0); 2886} 2887 2888static int 2889vga_dev_ioctl(video_adapter_t *adp, u_long cmd, caddr_t arg) 2890{ 2891 switch (cmd) { 2892 case FBIO_GETWINORG: /* get frame buffer window origin */ 2893 *(u_int *)arg = 0; 2894 return 0; 2895 2896 case FBIO_SETWINORG: /* set frame buffer window origin */ 2897 return ENODEV; 2898 2899 case FBIO_SETDISPSTART: /* set display start address */ 2900 return (set_display_start(adp, 2901 ((video_display_start_t *)arg)->x, 2902 ((video_display_start_t *)arg)->y) 2903 ? ENODEV : 0); 2904 2905 case FBIO_SETLINEWIDTH: /* set scan line length in pixel */ 2906 return (set_line_length(adp, *(u_int *)arg) ? ENODEV : 0); 2907 2908 case FBIO_GETPALETTE: /* get color palette */ 2909 return get_palette(adp, ((video_color_palette_t *)arg)->index, 2910 ((video_color_palette_t *)arg)->count, 2911 ((video_color_palette_t *)arg)->red, 2912 ((video_color_palette_t *)arg)->green, 2913 ((video_color_palette_t *)arg)->blue, 2914 ((video_color_palette_t *)arg)->transparent); 2915 2916 case FBIO_SETPALETTE: /* set color palette */ 2917 return set_palette(adp, ((video_color_palette_t *)arg)->index, 2918 ((video_color_palette_t *)arg)->count, 2919 ((video_color_palette_t *)arg)->red, 2920 ((video_color_palette_t *)arg)->green, 2921 ((video_color_palette_t *)arg)->blue, 2922 ((video_color_palette_t *)arg)->transparent); 2923 2924 case FBIOGTYPE: /* get frame buffer type info. */ 2925 ((struct fbtype *)arg)->fb_type = fb_type(adp->va_type); 2926 ((struct fbtype *)arg)->fb_height = adp->va_info.vi_height; 2927 ((struct fbtype *)arg)->fb_width = adp->va_info.vi_width; 2928 ((struct fbtype *)arg)->fb_depth = adp->va_info.vi_depth; 2929 if ((adp->va_info.vi_depth <= 1) || (adp->va_info.vi_depth > 8)) 2930 ((struct fbtype *)arg)->fb_cmsize = 0; 2931 else 2932 ((struct fbtype *)arg)->fb_cmsize = 1 << adp->va_info.vi_depth; 2933 ((struct fbtype *)arg)->fb_size = adp->va_buffer_size; 2934 return 0; 2935 2936 case FBIOGETCMAP: /* get color palette */ 2937 return get_palette(adp, ((struct fbcmap *)arg)->index, 2938 ((struct fbcmap *)arg)->count, 2939 ((struct fbcmap *)arg)->red, 2940 ((struct fbcmap *)arg)->green, 2941 ((struct fbcmap *)arg)->blue, NULL); 2942 2943 case FBIOPUTCMAP: /* set color palette */ 2944 return set_palette(adp, ((struct fbcmap *)arg)->index, 2945 ((struct fbcmap *)arg)->count, 2946 ((struct fbcmap *)arg)->red, 2947 ((struct fbcmap *)arg)->green, 2948 ((struct fbcmap *)arg)->blue, NULL); 2949 2950 default: 2951 return fb_commonioctl(adp, cmd, arg); 2952 } 2953} 2954 2955static void 2956dump_buffer(u_char *buf, size_t len) 2957{ 2958 int i; 2959 2960 for(i = 0; i < len;) { 2961 printf("%02x ", buf[i]); 2962 if ((++i % 16) == 0) 2963 printf("\n"); 2964 } 2965} 2966 2967/* 2968 * diag(): 2969 * Print some information about the video adapter and video modes, 2970 * with requested level of details. 2971 * 2972 * all adapters 2973 */ 2974static int 2975vga_diag(video_adapter_t *adp, int level) 2976{ 2977 u_char *mp; 2978#if FB_DEBUG > 1 2979 video_info_t info; 2980 int i; 2981#endif 2982 2983 if (!vga_init_done) 2984 return ENXIO; 2985 2986#if FB_DEBUG > 1 2987#ifndef VGA_NO_BIOS 2988 printf("vga: RTC equip. code:0x%02x, DCC code:0x%02x\n", 2989 rtcin(RTC_EQUIPMENT), readb(BIOS_PADDRTOVADDR(0x488))); 2990 printf("vga: CRTC:0x%x, video option:0x%02x, ", 2991 readw(BIOS_PADDRTOVADDR(0x463)), 2992 readb(BIOS_PADDRTOVADDR(0x487))); 2993 printf("rows:%d, cols:%d, font height:%d\n", 2994 readb(BIOS_PADDRTOVADDR(0x44a)), 2995 readb(BIOS_PADDRTOVADDR(0x484)) + 1, 2996 readb(BIOS_PADDRTOVADDR(0x485))); 2997#endif /* VGA_NO_BIOS */ 2998#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 2999 printf("vga: param table EGA/VGA:%p", video_mode_ptr); 3000 printf(", CGA/MDA:%p\n", video_mode_ptr2); 3001 printf("vga: rows_offset:%d\n", rows_offset); 3002#endif 3003#endif /* FB_DEBUG > 1 */ 3004 3005 fb_dump_adp_info(VGA_DRIVER_NAME, adp, level); 3006 3007#if FB_DEBUG > 1 3008 if (adp->va_flags & V_ADP_MODECHANGE) { 3009 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 3010 if (bios_vmode[i].vi_mode == NA) 3011 continue; 3012 if (get_mode_param(bios_vmode[i].vi_mode) == NULL) 3013 continue; 3014 fb_dump_mode_info(VGA_DRIVER_NAME, adp, &bios_vmode[i], level); 3015 } 3016 } else { 3017 vga_get_info(adp, adp->va_initial_mode, &info); /* shouldn't fail */ 3018 fb_dump_mode_info(VGA_DRIVER_NAME, adp, &info, level); 3019 } 3020#endif /* FB_DEBUG > 1 */ 3021 3022 if ((adp->va_type != KD_EGA) && (adp->va_type != KD_VGA)) 3023 return 0; 3024#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 3025 if (video_mode_ptr == NULL) 3026 printf("vga%d: %s: WARNING: video mode switching is not " 3027 "fully supported on this adapter\n", 3028 adp->va_unit, adp->va_name); 3029#endif 3030 if (level <= 0) 3031 return 0; 3032 3033 if (adp->va_type == KD_VGA) { 3034 printf("VGA parameters upon power-up\n"); 3035 dump_buffer(adpstate.regs, sizeof(adpstate.regs)); 3036 printf("VGA parameters in BIOS for mode %d\n", adp->va_initial_mode); 3037 dump_buffer(adpstate2.regs, sizeof(adpstate2.regs)); 3038 } 3039 3040 mp = get_mode_param(adp->va_initial_mode); 3041 if (mp == NULL) /* this shouldn't be happening */ 3042 return 0; 3043 printf("EGA/VGA parameters to be used for mode %d\n", adp->va_initial_mode); 3044 dump_buffer(mp, V_MODE_PARAM_SIZE); 3045 3046 return 0; 3047} 3048