1/*-
2 * Copyright (c) 1999 Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp>
3 * Copyright (c) 1992-1998 S��ren Schmidt
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer as
11 *    the first lines of this file unmodified.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 *    derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 */
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD: stable/11/sys/dev/fb/vga.c 331722 2018-03-29 02:50:57Z eadler $");
33
34#include "opt_vga.h"
35#include "opt_fb.h"
36#ifndef FB_DEBUG
37#define	FB_DEBUG	0
38#endif
39#include "opt_syscons.h"	/* should be removed in the future, XXX */
40
41#include <sys/param.h>
42#include <sys/systm.h>
43#include <sys/kernel.h>
44#include <sys/conf.h>
45#include <sys/fcntl.h>
46#include <sys/malloc.h>
47#include <sys/fbio.h>
48
49#include <vm/vm.h>
50#include <vm/vm_param.h>
51#include <vm/pmap.h>
52
53#include <machine/md_var.h>
54#if defined(__i386__) || defined(__amd64__)
55#include <machine/pc/bios.h>
56#endif
57#include <machine/bus.h>
58
59#include <dev/fb/fbreg.h>
60#include <dev/fb/vgareg.h>
61
62#include <isa/isareg.h>
63
64#ifndef VGA_DEBUG
65#define VGA_DEBUG		0
66#endif
67
68/* XXX machine/pc/bios.h has got too much i386-specific stuff in it */
69#ifndef BIOS_PADDRTOVADDR
70#define	BIOS_PADDRTOVADDR(x)	(x)
71#endif
72
73int
74vga_probe_unit(int unit, video_adapter_t *buf, int flags)
75{
76	video_adapter_t *adp;
77	video_switch_t *sw;
78	int error;
79
80	sw = vid_get_switch(VGA_DRIVER_NAME);
81	if (sw == NULL)
82		return 0;
83	error = (*sw->probe)(unit, &adp, NULL, flags);
84	if (error)
85		return error;
86	bcopy(adp, buf, sizeof(*buf));
87	return 0;
88}
89
90int
91vga_attach_unit(int unit, vga_softc_t *sc, int flags)
92{
93	video_switch_t *sw;
94	int error;
95
96	sw = vid_get_switch(VGA_DRIVER_NAME);
97	if (sw == NULL)
98		return ENXIO;
99
100	error = (*sw->probe)(unit, &sc->adp, NULL, flags);
101	if (error)
102		return error;
103	return (*sw->init)(unit, sc->adp, flags);
104}
105
106/* cdev driver functions */
107
108#ifdef FB_INSTALL_CDEV
109
110int
111vga_open(struct cdev *dev, vga_softc_t *sc, int flag, int mode, struct thread *td)
112{
113	if (sc == NULL)
114		return ENXIO;
115	if (mode & (O_CREAT | O_APPEND | O_TRUNC))
116		return ENODEV;
117
118	return genfbopen(&sc->gensc, sc->adp, flag, mode, td);
119}
120
121int
122vga_close(struct cdev *dev, vga_softc_t *sc, int flag, int mode, struct thread *td)
123{
124	return genfbclose(&sc->gensc, sc->adp, flag, mode, td);
125}
126
127int
128vga_read(struct cdev *dev, vga_softc_t *sc, struct uio *uio, int flag)
129{
130	return genfbread(&sc->gensc, sc->adp, uio, flag);
131}
132
133int
134vga_write(struct cdev *dev, vga_softc_t *sc, struct uio *uio, int flag)
135{
136	return genfbread(&sc->gensc, sc->adp, uio, flag);
137}
138
139int
140vga_ioctl(struct cdev *dev, vga_softc_t *sc, u_long cmd, caddr_t arg, int flag,
141	  struct thread *td)
142{
143	return genfbioctl(&sc->gensc, sc->adp, cmd, arg, flag, td);
144}
145
146int
147vga_mmap(struct cdev *dev, vga_softc_t *sc, vm_ooffset_t offset,
148    vm_offset_t *paddr, int prot, vm_memattr_t *memattr)
149{
150	return genfbmmap(&sc->gensc, sc->adp, offset, paddr, prot, memattr);
151}
152
153#endif /* FB_INSTALL_CDEV */
154
155/* LOW-LEVEL */
156
157#include <isa/rtc.h>
158#ifdef __i386__
159#include <dev/fb/vesa.h>
160#endif
161
162#define probe_done(adp)		((adp)->va_flags & V_ADP_PROBED)
163#define init_done(adp)		((adp)->va_flags & V_ADP_INITIALIZED)
164#define config_done(adp)	((adp)->va_flags & V_ADP_REGISTERED)
165
166/* for compatibility with old kernel options */
167#ifdef SC_ALT_SEQACCESS
168#undef SC_ALT_SEQACCESS
169#undef VGA_ALT_SEQACCESS
170#define VGA_ALT_SEQACCESS	1
171#endif
172
173#ifdef SLOW_VGA
174#undef SLOW_VGA
175#undef VGA_SLOW_IOACCESS
176#define VGA_SLOW_IOACCESS
177#endif
178
179/* architecture dependent option */
180#if !defined(__i386__) && !defined(__amd64__)
181#define VGA_NO_BIOS		1
182#endif
183
184/* this should really be in `rtc.h' */
185#define RTC_EQUIPMENT           0x14
186
187/* various sizes */
188#define V_MODE_MAP_SIZE		(M_VGA_CG320 + 1)
189#define V_MODE_PARAM_SIZE	64
190
191/* video adapter state buffer */
192struct adp_state {
193    int			sig;
194#define V_STATE_SIG	0x736f6962
195    u_char		regs[V_MODE_PARAM_SIZE];
196};
197typedef struct adp_state adp_state_t;
198
199/* video adapter information */
200#define DCC_MONO	0
201#define DCC_CGA40	1
202#define DCC_CGA80	2
203#define DCC_EGAMONO	3
204#define DCC_EGA40	4
205#define DCC_EGA80	5
206
207/*
208 * NOTE: `va_window' should have a virtual address, but is initialized
209 * with a physical address in the following table, as verify_adapter()
210 * will perform address conversion at run-time.
211 */
212static video_adapter_t adapter_init_value[] = {
213    /* DCC_MONO */
214    { 0, KD_MONO, "mda", 0, 0, 0, 	    IO_MDA, IO_MDASIZE, MONO_CRTC,
215      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE,
216      0, 0, 0, 0, 7, 0, },
217    /* DCC_CGA40 */
218    { 0, KD_CGA,  "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC,
219      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE,
220      0, 0, 0, 0, 3, 0, },
221    /* DCC_CGA80 */
222    { 0, KD_CGA,  "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC,
223      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE,
224      0, 0, 0, 0, 3, 0, },
225    /* DCC_EGAMONO */
226    { 0, KD_EGA,  "ega", 0, 0, 0,	    IO_MDA, 48,	  MONO_CRTC,
227      EGA_BUF_BASE, EGA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE,
228      0, 0, 0, 0, 7, 0, },
229    /* DCC_EGA40 */
230    { 0, KD_EGA,  "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48,	  COLOR_CRTC,
231      EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE,
232      0, 0, 0, 0, 3, 0, },
233    /* DCC_EGA80 */
234    { 0, KD_EGA,  "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48,	  COLOR_CRTC,
235      EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE,
236      0, 0, 0, 0, 3, 0, },
237};
238
239static video_adapter_t	biosadapter[2];
240static int		biosadapters = 0;
241
242/* video driver declarations */
243static int			vga_configure(int flags);
244       int			(*vga_sub_configure)(int flags);
245#if 0
246static int			vga_nop(void);
247#endif
248static int			vga_error(void);
249static vi_probe_t		vga_probe;
250static vi_init_t		vga_init;
251static vi_get_info_t		vga_get_info;
252static vi_query_mode_t		vga_query_mode;
253static vi_set_mode_t		vga_set_mode;
254static vi_save_font_t		vga_save_font;
255static vi_load_font_t		vga_load_font;
256static vi_show_font_t		vga_show_font;
257static vi_save_palette_t	vga_save_palette;
258static vi_load_palette_t	vga_load_palette;
259static vi_set_border_t		vga_set_border;
260static vi_save_state_t		vga_save_state;
261static vi_load_state_t		vga_load_state;
262static vi_set_win_org_t		vga_set_origin;
263static vi_read_hw_cursor_t	vga_read_hw_cursor;
264static vi_set_hw_cursor_t	vga_set_hw_cursor;
265static vi_set_hw_cursor_shape_t	vga_set_hw_cursor_shape;
266static vi_blank_display_t	vga_blank_display;
267static vi_mmap_t		vga_mmap_buf;
268static vi_ioctl_t		vga_dev_ioctl;
269#ifndef VGA_NO_MODE_CHANGE
270static vi_clear_t		vga_clear;
271static vi_fill_rect_t		vga_fill_rect;
272static vi_bitblt_t		vga_bitblt;
273#else /* VGA_NO_MODE_CHANGE */
274#define vga_clear		(vi_clear_t *)vga_error
275#define vga_fill_rect		(vi_fill_rect_t *)vga_error
276#define vga_bitblt		(vi_bitblt_t *)vga_error
277#endif
278static vi_diag_t		vga_diag;
279
280static video_switch_t vgavidsw = {
281	vga_probe,
282	vga_init,
283	vga_get_info,
284	vga_query_mode,
285	vga_set_mode,
286	vga_save_font,
287	vga_load_font,
288	vga_show_font,
289	vga_save_palette,
290	vga_load_palette,
291	vga_set_border,
292	vga_save_state,
293	vga_load_state,
294	vga_set_origin,
295	vga_read_hw_cursor,
296	vga_set_hw_cursor,
297	vga_set_hw_cursor_shape,
298	vga_blank_display,
299	vga_mmap_buf,
300	vga_dev_ioctl,
301	vga_clear,
302	vga_fill_rect,
303	vga_bitblt,
304	vga_error,
305	vga_error,
306	vga_diag,
307};
308
309VIDEO_DRIVER(mda, vgavidsw, NULL);
310VIDEO_DRIVER(cga, vgavidsw, NULL);
311VIDEO_DRIVER(ega, vgavidsw, NULL);
312VIDEO_DRIVER(vga, vgavidsw, vga_configure);
313
314/* VGA BIOS standard video modes */
315#define EOT		(-1)
316#define NA		(-2)
317
318static video_info_t bios_vmode[] = {
319    /* CGA */
320    { M_B40x25,     V_INFO_COLOR, 40, 25, 8,  8, 2, 1,
321      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
322    { M_C40x25,     V_INFO_COLOR, 40, 25, 8,  8, 4, 1,
323      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
324    { M_B80x25,     V_INFO_COLOR, 80, 25, 8,  8, 2, 1,
325      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
326    { M_C80x25,     V_INFO_COLOR, 80, 25, 8,  8, 4, 1,
327      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
328    /* EGA */
329    { M_ENH_B40x25, V_INFO_COLOR, 40, 25, 8, 14, 2, 1,
330      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
331    { M_ENH_C40x25, V_INFO_COLOR, 40, 25, 8, 14, 4, 1,
332      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
333    { M_ENH_B80x25, V_INFO_COLOR, 80, 25, 8, 14, 2, 1,
334      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
335    { M_ENH_C80x25, V_INFO_COLOR, 80, 25, 8, 14, 4, 1,
336      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
337    /* VGA */
338    { M_VGA_C40x25, V_INFO_COLOR, 40, 25, 8, 16, 4, 1,
339      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
340    { M_VGA_M80x25, 0,            80, 25, 8, 16, 2, 1,
341      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
342    { M_VGA_C80x25, V_INFO_COLOR, 80, 25, 8, 16, 4, 1,
343      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
344    /* MDA */
345    { M_EGAMONO80x25, 0,          80, 25, 8, 14, 2, 1,
346      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
347    /* EGA */
348    { M_ENH_B80x43, V_INFO_COLOR, 80, 43, 8,  8, 2, 1,
349      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
350    { M_ENH_C80x43, V_INFO_COLOR, 80, 43, 8,  8, 4, 1,
351      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
352    /* VGA */
353    { M_VGA_M80x30, 0,            80, 30, 8, 16, 2, 1,
354      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
355    { M_VGA_C80x30, V_INFO_COLOR, 80, 30, 8, 16, 4, 1,
356      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
357    { M_VGA_M80x50, 0,            80, 50, 8,  8, 2, 1,
358      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
359    { M_VGA_C80x50, V_INFO_COLOR, 80, 50, 8,  8, 4, 1,
360      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
361    { M_VGA_M80x60, 0,            80, 60, 8,  8, 2, 1,
362      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
363    { M_VGA_C80x60, V_INFO_COLOR, 80, 60, 8,  8, 4, 1,
364      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
365
366#ifndef VGA_NO_MODE_CHANGE
367
368#ifdef VGA_WIDTH90
369    { M_VGA_M90x25, 0,            90, 25, 8, 16, 2, 1,
370      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
371    { M_VGA_C90x25, V_INFO_COLOR, 90, 25, 8, 16, 4, 1,
372      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
373    { M_VGA_M90x30, 0,            90, 30, 8, 16, 2, 1,
374      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
375    { M_VGA_C90x30, V_INFO_COLOR, 90, 30, 8, 16, 4, 1,
376      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
377    { M_VGA_M90x43, 0,            90, 43, 8,  8, 2, 1,
378      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
379    { M_VGA_C90x43, V_INFO_COLOR, 90, 43, 8,  8, 4, 1,
380      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
381    { M_VGA_M90x50, 0,            90, 50, 8,  8, 2, 1,
382      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
383    { M_VGA_C90x50, V_INFO_COLOR, 90, 50, 8,  8, 4, 1,
384      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
385    { M_VGA_M90x60, 0,            90, 60, 8,  8, 2, 1,
386      MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
387    { M_VGA_C90x60, V_INFO_COLOR, 90, 60, 8,  8, 4, 1,
388      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
389#endif /* VGA_WIDTH90 */
390
391    /* CGA */
392    { M_BG320,      V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8,  8, 2, 1,
393      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA },
394    { M_CG320,      V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8,  8, 2, 1,
395      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA },
396    { M_BG640,      V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8,  8, 1, 1,
397      CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA },
398    /* EGA */
399    { M_CG320_D,    V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8,  8, 4, 4,
400      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0,
401      V_INFO_MM_PLANAR },
402    { M_CG640_E,    V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8,  8, 4, 4,
403      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
404      V_INFO_MM_PLANAR },
405    { M_EGAMONOAPA, V_INFO_GRAPHICS,                640, 350, 8, 14, 4, 4,
406      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, 64*1024, 0, 0 ,
407      V_INFO_MM_PLANAR },
408    { M_ENHMONOAPA2,V_INFO_GRAPHICS,                640, 350, 8, 14, 4, 4,
409      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
410      V_INFO_MM_PLANAR },
411    { M_CG640x350,  V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 2, 2,
412      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
413      V_INFO_MM_PLANAR },
414    { M_ENH_CG640,  V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4,
415      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
416      V_INFO_MM_PLANAR },
417    /* VGA */
418    { M_BG640x480,  V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4,
419      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
420      V_INFO_MM_PLANAR },
421    { M_CG640x480,  V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4,
422      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
423      V_INFO_MM_PLANAR },
424    { M_VGA_CG320,  V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8,  8, 8, 1,
425      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0,
426      V_INFO_MM_PACKED, 1 },
427    { M_VGA_MODEX,  V_INFO_COLOR | V_INFO_GRAPHICS, 320, 240, 8,  8, 8, 4,
428      GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0,
429      V_INFO_MM_VGAX, 1 },
430#endif /* VGA_NO_MODE_CHANGE */
431
432    { EOT },
433};
434
435static int		vga_init_done = FALSE;
436#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
437static u_char		*video_mode_ptr = NULL;		/* EGA/VGA */
438static u_char		*video_mode_ptr2 = NULL;	/* CGA/MDA */
439#endif
440static u_char		*mode_map[V_MODE_MAP_SIZE];
441static adp_state_t	adpstate;
442static adp_state_t	adpstate2;
443static int		rows_offset = 1;
444
445/* local macros and functions */
446#define BIOS_SADDRTOLADDR(p) ((((p) & 0xffff0000) >> 12) + ((p) & 0x0000ffff))
447
448#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
449static void map_mode_table(u_char *map[], u_char *table, int max);
450#endif
451static void clear_mode_map(video_adapter_t *adp, u_char *map[], int max,
452			   int color);
453#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
454static int map_mode_num(int mode);
455#endif
456static int map_gen_mode_num(int type, int color, int mode);
457static int map_bios_mode_num(int type, int color, int bios_mode);
458static u_char *get_mode_param(int mode);
459#ifndef VGA_NO_BIOS
460static void fill_adapter_param(int code, video_adapter_t *adp);
461#endif
462static int verify_adapter(video_adapter_t *adp);
463static void update_adapter_info(video_adapter_t *adp, video_info_t *info);
464#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
465#define COMP_IDENTICAL	0
466#define COMP_SIMILAR	1
467#define COMP_DIFFERENT	2
468static int comp_adpregs(u_char *buf1, u_char *buf2);
469#endif
470static int probe_adapters(void);
471static int set_line_length(video_adapter_t *adp, int pixel);
472static int set_display_start(video_adapter_t *adp, int x, int y);
473
474#ifndef VGA_NO_MODE_CHANGE
475#ifdef VGA_WIDTH90
476static void set_width90(adp_state_t *params);
477#endif
478#endif /* !VGA_NO_MODE_CHANGE */
479
480#ifndef VGA_NO_FONT_LOADING
481#define PARAM_BUFSIZE	6
482static void set_font_mode(video_adapter_t *adp, u_char *buf);
483static void set_normal_mode(video_adapter_t *adp, u_char *buf);
484#endif
485
486#ifndef VGA_NO_MODE_CHANGE
487static void filll_io(int val, vm_offset_t d, size_t size);
488static void planar_fill(video_adapter_t *adp, int val);
489static void packed_fill(video_adapter_t *adp, int val);
490static void direct_fill(video_adapter_t *adp, int val);
491#ifdef notyet
492static void planar_fill_rect(video_adapter_t *adp, int val, int x, int y,
493			     int cx, int cy);
494static void packed_fill_rect(video_adapter_t *adp, int val, int x, int y,
495			     int cx, int cy);
496static void direct_fill_rect16(video_adapter_t *adp, int val, int x, int y,
497			       int cx, int cy);
498static void direct_fill_rect24(video_adapter_t *adp, int val, int x, int y,
499			       int cx, int cy);
500static void direct_fill_rect32(video_adapter_t *adp, int val, int x, int y,
501			       int cx, int cy);
502#endif /* notyet */
503#endif /* !VGA_NO_MODE_CHANGE */
504
505static void dump_buffer(u_char *buf, size_t len);
506
507#define	ISMAPPED(pa, width)				\
508	(((pa) <= (u_long)0x1000 - (width)) 		\
509	 || ((pa) >= ISA_HOLE_START && (pa) <= 0x100000 - (width)))
510
511#define	prologue(adp, flag, err)			\
512	if (!vga_init_done || !((adp)->va_flags & (flag)))	\
513	    return (err)
514
515/* a backdoor for the console driver */
516static int
517vga_configure(int flags)
518{
519    int i;
520
521    probe_adapters();
522    for (i = 0; i < biosadapters; ++i) {
523	if (!probe_done(&biosadapter[i]))
524	    continue;
525	biosadapter[i].va_flags |= V_ADP_INITIALIZED;
526	if (!config_done(&biosadapter[i])) {
527	    if (vid_register(&biosadapter[i]) < 0)
528		continue;
529	    biosadapter[i].va_flags |= V_ADP_REGISTERED;
530	}
531    }
532    if (vga_sub_configure != NULL)
533	(*vga_sub_configure)(flags);
534
535    return biosadapters;
536}
537
538/* local subroutines */
539
540#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
541/* construct the mode parameter map */
542static void
543map_mode_table(u_char *map[], u_char *table, int max)
544{
545    int i;
546
547    for(i = 0; i < max; ++i)
548	map[i] = table + i*V_MODE_PARAM_SIZE;
549    for(; i < V_MODE_MAP_SIZE; ++i)
550	map[i] = NULL;
551}
552#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */
553
554static void
555clear_mode_map(video_adapter_t *adp, u_char *map[], int max, int color)
556{
557    video_info_t info;
558    int i;
559
560    /*
561     * NOTE: we don't touch `bios_vmode[]' because it is shared
562     * by all adapters.
563     */
564    for(i = 0; i < max; ++i) {
565	if (vga_get_info(adp, i, &info))
566	    continue;
567	if ((info.vi_flags & V_INFO_COLOR) != color)
568	    map[i] = NULL;
569    }
570}
571
572#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
573/* map the non-standard video mode to a known mode number */
574static int
575map_mode_num(int mode)
576{
577    static struct {
578        int from;
579        int to;
580    } mode_map[] = {
581        { M_ENH_B80x43, M_ENH_B80x25 },
582        { M_ENH_C80x43, M_ENH_C80x25 },
583        { M_VGA_M80x30, M_VGA_M80x25 },
584        { M_VGA_C80x30, M_VGA_C80x25 },
585        { M_VGA_M80x50, M_VGA_M80x25 },
586        { M_VGA_C80x50, M_VGA_C80x25 },
587        { M_VGA_M80x60, M_VGA_M80x25 },
588        { M_VGA_C80x60, M_VGA_C80x25 },
589#ifdef VGA_WIDTH90
590        { M_VGA_M90x25, M_VGA_M80x25 },
591        { M_VGA_C90x25, M_VGA_C80x25 },
592        { M_VGA_M90x30, M_VGA_M80x25 },
593        { M_VGA_C90x30, M_VGA_C80x25 },
594        { M_VGA_M90x43, M_VGA_M80x25 },
595        { M_VGA_C90x43, M_ENH_C80x25 },
596        { M_VGA_M90x50, M_VGA_M80x25 },
597        { M_VGA_C90x50, M_VGA_C80x25 },
598        { M_VGA_M90x60, M_VGA_M80x25 },
599        { M_VGA_C90x60, M_VGA_C80x25 },
600#endif
601        { M_VGA_MODEX,  M_VGA_CG320 },
602    };
603    int i;
604
605    for (i = 0; i < nitems(mode_map); ++i) {
606        if (mode_map[i].from == mode)
607            return mode_map[i].to;
608    }
609    return mode;
610}
611#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */
612
613/* map a generic video mode to a known mode number */
614static int
615map_gen_mode_num(int type, int color, int mode)
616{
617    static struct {
618	int from;
619	int to_color;
620	int to_mono;
621    } mode_map[] = {
622	{ M_TEXT_80x30,	M_VGA_C80x30, M_VGA_M80x30, },
623	{ M_TEXT_80x43,	M_ENH_C80x43, M_ENH_B80x43, },
624	{ M_TEXT_80x50,	M_VGA_C80x50, M_VGA_M80x50, },
625	{ M_TEXT_80x60,	M_VGA_C80x60, M_VGA_M80x60, },
626    };
627    int i;
628
629    if (mode == M_TEXT_80x25) {
630	switch (type) {
631
632	case KD_VGA:
633	    if (color)
634		return M_VGA_C80x25;
635	    else
636		return M_VGA_M80x25;
637	    break;
638
639	case KD_EGA:
640	    if (color)
641		return M_ENH_C80x25;
642	    else
643		return M_EGAMONO80x25;
644	    break;
645
646	case KD_CGA:
647	    return M_C80x25;
648
649	case KD_MONO:
650	case KD_HERCULES:
651	    return M_EGAMONO80x25;	/* XXX: this name is confusing */
652
653 	default:
654	    return -1;
655	}
656    }
657
658    for (i = 0; i < nitems(mode_map); ++i) {
659        if (mode_map[i].from == mode)
660            return ((color) ? mode_map[i].to_color : mode_map[i].to_mono);
661    }
662    return mode;
663}
664
665/* turn the BIOS video number into our video mode number */
666static int
667map_bios_mode_num(int type, int color, int bios_mode)
668{
669    static int cga_modes[7] = {
670	M_B40x25, M_C40x25,		/* 0, 1 */
671	M_B80x25, M_C80x25,		/* 2, 3 */
672	M_BG320, M_CG320,
673	M_BG640,
674    };
675    static int ega_modes[17] = {
676	M_ENH_B40x25, M_ENH_C40x25,	/* 0, 1 */
677	M_ENH_B80x25, M_ENH_C80x25,	/* 2, 3 */
678	M_BG320, M_CG320,
679	M_BG640,
680	M_EGAMONO80x25,			/* 7 */
681	8, 9, 10, 11, 12,
682	M_CG320_D,
683	M_CG640_E,
684	M_ENHMONOAPA2,			/* XXX: video momery > 64K */
685	M_ENH_CG640,			/* XXX: video momery > 64K */
686    };
687    static int vga_modes[20] = {
688	M_VGA_C40x25, M_VGA_C40x25,	/* 0, 1 */
689	M_VGA_C80x25, M_VGA_C80x25,	/* 2, 3 */
690	M_BG320, M_CG320,
691	M_BG640,
692	M_VGA_M80x25,			/* 7 */
693	8, 9, 10, 11, 12,
694	M_CG320_D,
695	M_CG640_E,
696	M_ENHMONOAPA2,
697	M_ENH_CG640,
698	M_BG640x480, M_CG640x480,
699	M_VGA_CG320,
700    };
701
702    switch (type) {
703
704    case KD_VGA:
705	if (bios_mode < nitems(vga_modes))
706	    return vga_modes[bios_mode];
707	else if (color)
708	    return M_VGA_C80x25;
709	else
710	    return M_VGA_M80x25;
711	break;
712
713    case KD_EGA:
714	if (bios_mode < nitems(ega_modes))
715	    return ega_modes[bios_mode];
716	else if (color)
717	    return M_ENH_C80x25;
718	else
719	    return M_EGAMONO80x25;
720	break;
721
722    case KD_CGA:
723	if (bios_mode < nitems(cga_modes))
724	    return cga_modes[bios_mode];
725	else
726	    return M_C80x25;
727	break;
728
729    case KD_MONO:
730    case KD_HERCULES:
731	return M_EGAMONO80x25;		/* XXX: this name is confusing */
732
733    default:
734	break;
735    }
736    return -1;
737}
738
739/* look up a parameter table entry */
740static u_char
741*get_mode_param(int mode)
742{
743#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
744    if (mode >= V_MODE_MAP_SIZE)
745	mode = map_mode_num(mode);
746#endif
747    if ((mode >= 0) && (mode < V_MODE_MAP_SIZE))
748	return mode_map[mode];
749    else
750	return NULL;
751}
752
753#ifndef VGA_NO_BIOS
754static void
755fill_adapter_param(int code, video_adapter_t *adp)
756{
757    static struct {
758	int primary;
759	int secondary;
760    } dcc[] = {
761	{ DCC_MONO, 			DCC_EGA40 /* CGA monitor */ },
762	{ DCC_MONO, 			DCC_EGA80 /* CGA monitor */ },
763	{ DCC_MONO, 			DCC_EGA80 },
764	{ DCC_MONO, 			DCC_EGA80 },
765	{ DCC_CGA40, 			DCC_EGAMONO },
766	{ DCC_CGA80, 			DCC_EGAMONO },
767	{ DCC_EGA40 /* CGA monitor */, 	DCC_MONO},
768	{ DCC_EGA80 /* CGA monitor */, 	DCC_MONO},
769	{ DCC_EGA80,			DCC_MONO },
770	{ DCC_EGA80, 			DCC_MONO },
771	{ DCC_EGAMONO, 			DCC_CGA40 },
772	{ DCC_EGAMONO, 			DCC_CGA80 },
773    };
774
775    if ((code < 0) || (code >= nitems(dcc))) {
776	adp[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO];
777	adp[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80];
778    } else {
779	adp[V_ADP_PRIMARY] = adapter_init_value[dcc[code].primary];
780	adp[V_ADP_SECONDARY] = adapter_init_value[dcc[code].secondary];
781    }
782}
783#endif /* VGA_NO_BIOS */
784
785static int
786verify_adapter(video_adapter_t *adp)
787{
788    vm_offset_t buf;
789    u_int16_t v;
790#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
791    u_int32_t p;
792#endif
793
794    buf = BIOS_PADDRTOVADDR(adp->va_window);
795    v = readw(buf);
796    writew(buf, 0xA55A);
797    if (readw(buf) != 0xA55A)
798	return ENXIO;
799    writew(buf, v);
800
801    switch (adp->va_type) {
802
803    case KD_EGA:
804	outb(adp->va_crtc_addr, 7);
805	if (inb(adp->va_crtc_addr) == 7) {
806	    adp->va_type = KD_VGA;
807	    adp->va_name = "vga";
808	    adp->va_flags |= V_ADP_STATESAVE | V_ADP_PALETTE;
809	}
810	adp->va_flags |= V_ADP_STATELOAD | V_ADP_BORDER;
811	/* the color adapter may be in the 40x25 mode... XXX */
812
813#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
814	/* get the BIOS video mode pointer */
815	p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8);
816	p = BIOS_SADDRTOLADDR(p);
817	if (ISMAPPED(p, sizeof(u_int32_t))) {
818	    p = *(u_int32_t *)BIOS_PADDRTOVADDR(p);
819	    p = BIOS_SADDRTOLADDR(p);
820	    if (ISMAPPED(p, V_MODE_PARAM_SIZE))
821		video_mode_ptr = (u_char *)BIOS_PADDRTOVADDR(p);
822	}
823#endif
824	break;
825
826    case KD_CGA:
827	adp->va_flags |= V_ADP_COLOR | V_ADP_BORDER;
828	/* may be in the 40x25 mode... XXX */
829#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
830	/* get the BIOS video mode pointer */
831	p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4);
832	p = BIOS_SADDRTOLADDR(p);
833	video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p);
834#endif
835	break;
836
837    case KD_MONO:
838#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
839	/* get the BIOS video mode pointer */
840	p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4);
841	p = BIOS_SADDRTOLADDR(p);
842	video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p);
843#endif
844	break;
845    }
846
847    return 0;
848}
849
850static void
851update_adapter_info(video_adapter_t *adp, video_info_t *info)
852{
853    adp->va_flags &= ~V_ADP_COLOR;
854    adp->va_flags |=
855	(info->vi_flags & V_INFO_COLOR) ? V_ADP_COLOR : 0;
856    adp->va_crtc_addr =
857	(adp->va_flags & V_ADP_COLOR) ? COLOR_CRTC : MONO_CRTC;
858    adp->va_window = BIOS_PADDRTOVADDR(info->vi_window);
859    adp->va_window_size = info->vi_window_size;
860    adp->va_window_gran = info->vi_window_gran;
861    adp->va_window_orig = 0;
862    /* XXX */
863    adp->va_buffer = info->vi_buffer;
864    adp->va_buffer_size = info->vi_buffer_size;
865    if (info->vi_mem_model == V_INFO_MM_VGAX) {
866	adp->va_line_width = info->vi_width/2;
867    } else if (info->vi_flags & V_INFO_GRAPHICS) {
868	switch (info->vi_depth/info->vi_planes) {
869	case 1:
870	    adp->va_line_width = info->vi_width/8;
871	    break;
872	case 2:
873	    adp->va_line_width = info->vi_width/4;
874	    break;
875	case 4:
876	    adp->va_line_width = info->vi_width/2;
877	    break;
878	case 8:
879	default: /* shouldn't happen */
880	    adp->va_line_width = info->vi_width;
881	    break;
882	}
883    } else {
884	adp->va_line_width = info->vi_width;
885    }
886    adp->va_disp_start.x = 0;
887    adp->va_disp_start.y = 0;
888    bcopy(info, &adp->va_info, sizeof(adp->va_info));
889}
890
891#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
892/* compare two parameter table entries */
893static int
894comp_adpregs(u_char *buf1, u_char *buf2)
895{
896    static struct {
897        u_char mask;
898    } params[V_MODE_PARAM_SIZE] = {
899	{0xff}, {0x00}, {0xff}, 		/* COLS}, ROWS}, POINTS */
900	{0x00}, {0x00}, 			/* page length */
901	{0xfe}, {0xff}, {0xff}, {0xff},		/* sequencer registers */
902	{0xf3},					/* misc register */
903	{0xff}, {0xff}, {0xff}, {0x7f}, {0xff},	/* CRTC */
904	{0xff}, {0xff}, {0xff}, {0x7f}, {0xff},
905	{0x00}, {0x00}, {0x00}, {0x00}, {0x00},
906	{0x00}, {0xff}, {0x7f}, {0xff}, {0xff},
907	{0x7f}, {0xff}, {0xff}, {0xef}, {0xff},
908	{0xff}, {0xff}, {0xff}, {0xff}, {0xff},	/* attribute controller regs */
909	{0xff}, {0xff}, {0xff}, {0xff}, {0xff},
910	{0xff}, {0xff}, {0xff}, {0xff}, {0xff},
911	{0xff}, {0xff}, {0xff}, {0xff}, {0xf0},
912	{0xff}, {0xff}, {0xff}, {0xff}, {0xff},	/* GDC register */
913	{0xff}, {0xff}, {0xff}, {0xff},
914    };
915    int identical = TRUE;
916    int i;
917
918    if ((buf1 == NULL) || (buf2 == NULL))
919	return COMP_DIFFERENT;
920
921    for (i = 0; i < nitems(params); ++i) {
922	if (params[i].mask == 0)	/* don't care */
923	    continue;
924	if ((buf1[i] & params[i].mask) != (buf2[i] & params[i].mask))
925	    return COMP_DIFFERENT;
926	if (buf1[i] != buf2[i])
927	    identical = FALSE;
928    }
929    return (identical) ? COMP_IDENTICAL : COMP_SIMILAR;
930}
931#endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */
932
933/* probe video adapters and return the number of detected adapters */
934static int
935probe_adapters(void)
936{
937    video_adapter_t *adp;
938    video_info_t info;
939#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
940    u_char *mp;
941#endif
942    int i;
943
944    /* do this test only once */
945    if (vga_init_done)
946	return biosadapters;
947    vga_init_done = TRUE;
948
949    /*
950     * Locate display adapters.
951     * The AT architecture supports up to two adapters. `syscons' allows
952     * the following combinations of adapters:
953     *     1) MDA + CGA
954     *     2) MDA + EGA/VGA color
955     *     3) CGA + EGA/VGA mono
956     * Note that `syscons' doesn't bother with MCGA as it is only
957     * avaiable for low end PS/2 models which has 80286 or earlier CPUs,
958     * thus, they are not running FreeBSD!
959     * When there are two adapaters in the system, one becomes `primary'
960     * and the other `secondary'. The EGA adapter has a set of DIP
961     * switches on board for this information and the EGA BIOS copies
962     * it in the BIOS data area BIOSDATA_VIDEOSWITCH (40:88).
963     * The VGA BIOS has more sophisticated mechanism and has this
964     * information in BIOSDATA_DCCINDEX (40:8a), but it also maintains
965     * compatibility with the EGA BIOS by updating BIOSDATA_VIDEOSWITCH.
966     */
967
968    /*
969     * Check rtc and BIOS data area.
970     * XXX: we don't use BIOSDATA_EQUIPMENT, since it is not a dead
971     * copy of RTC_EQUIPMENT.  Bits 4 and 5 of ETC_EQUIPMENT are
972     * zeros for EGA and VGA.  However, the EGA/VGA BIOS sets
973     * these bits in BIOSDATA_EQUIPMENT according to the monitor
974     * type detected.
975     */
976#ifndef VGA_NO_BIOS
977    if (*(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8)) {
978	/* EGA/VGA BIOS is present */
979	fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f,
980			   biosadapter);
981    } else {
982	switch ((rtcin(RTC_EQUIPMENT) >> 4) & 3) {	/* bit 4 and 5 */
983	case 0:
984	    /* EGA/VGA: shouldn't be happening */
985	    fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f,
986			       biosadapter);
987	    break;
988	case 1:
989	    /* CGA 40x25 */
990	    /* FIXME: switch to the 80x25 mode? XXX */
991	    biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA40];
992	    biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO];
993	    break;
994	case 2:
995	    /* CGA 80x25 */
996	    biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA80];
997	    biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO];
998	    break;
999	case 3:
1000	    /* MDA */
1001	    biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO];
1002	    biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80];
1003	    break;
1004	}
1005    }
1006#else
1007    /* assume EGA/VGA? XXX */
1008    biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_EGA80];
1009    biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO];
1010#endif /* VGA_NO_BIOS */
1011
1012    biosadapters = 0;
1013    if (verify_adapter(&biosadapter[V_ADP_SECONDARY]) == 0) {
1014	++biosadapters;
1015	biosadapter[V_ADP_SECONDARY].va_flags |= V_ADP_PROBED;
1016	biosadapter[V_ADP_SECONDARY].va_mode =
1017	    biosadapter[V_ADP_SECONDARY].va_initial_mode =
1018	    map_bios_mode_num(biosadapter[V_ADP_SECONDARY].va_type,
1019			      biosadapter[V_ADP_SECONDARY].va_flags
1020				  & V_ADP_COLOR,
1021			      biosadapter[V_ADP_SECONDARY].va_initial_bios_mode);
1022    } else {
1023	biosadapter[V_ADP_SECONDARY].va_type = -1;
1024    }
1025    if (verify_adapter(&biosadapter[V_ADP_PRIMARY]) == 0) {
1026	++biosadapters;
1027	biosadapter[V_ADP_PRIMARY].va_flags |= V_ADP_PROBED;
1028#ifndef VGA_NO_BIOS
1029	biosadapter[V_ADP_PRIMARY].va_initial_bios_mode =
1030	    readb(BIOS_PADDRTOVADDR(0x449));
1031#else
1032	biosadapter[V_ADP_PRIMARY].va_initial_bios_mode = 3;	/* XXX */
1033#endif
1034	biosadapter[V_ADP_PRIMARY].va_mode =
1035	    biosadapter[V_ADP_PRIMARY].va_initial_mode =
1036	    map_bios_mode_num(biosadapter[V_ADP_PRIMARY].va_type,
1037			      biosadapter[V_ADP_PRIMARY].va_flags & V_ADP_COLOR,
1038			      biosadapter[V_ADP_PRIMARY].va_initial_bios_mode);
1039    } else {
1040	biosadapter[V_ADP_PRIMARY] = biosadapter[V_ADP_SECONDARY];
1041	biosadapter[V_ADP_SECONDARY].va_type = -1;
1042    }
1043    if (biosadapters == 0)
1044	return biosadapters;
1045    biosadapter[V_ADP_PRIMARY].va_unit = V_ADP_PRIMARY;
1046    biosadapter[V_ADP_SECONDARY].va_unit = V_ADP_SECONDARY;
1047
1048#if 0 /* we don't need these... */
1049    fb_init_struct(&biosadapter[V_ADP_PRIMARY], ...);
1050    fb_init_struct(&biosadapter[V_ADP_SECONDARY], ...);
1051#endif
1052
1053#ifdef notyet
1054    /*
1055     * We cannot have two video adapter of the same type; there must be
1056     * only one of color or mono adapter, or one each of them.
1057     */
1058    if (biosadapters > 1) {
1059	if (!((biosadapter[0].va_flags ^ biosadapter[1].va_flags)
1060	      & V_ADP_COLOR))
1061	    /* we have two mono or color adapters!! */
1062	    return (biosadapters = 0);
1063    }
1064#endif
1065
1066    /*
1067     * Ensure a zero start address. The registers are w/o
1068     * for old hardware so it's too hard to relocate the active screen
1069     * memory.
1070     * This must be done before vga_save_state() for VGA.
1071     */
1072    outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 12);
1073    outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0);
1074    outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 13);
1075    outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0);
1076
1077    /* the video mode parameter table in EGA/VGA BIOS */
1078    /* NOTE: there can be only one EGA/VGA, wheather color or mono,
1079     * recognized by the video BIOS.
1080     */
1081    if ((biosadapter[V_ADP_PRIMARY].va_type == KD_EGA) ||
1082	(biosadapter[V_ADP_PRIMARY].va_type == KD_VGA)) {
1083	adp = &biosadapter[V_ADP_PRIMARY];
1084    } else if ((biosadapter[V_ADP_SECONDARY].va_type == KD_EGA) ||
1085	       (biosadapter[V_ADP_SECONDARY].va_type == KD_VGA)) {
1086	adp = &biosadapter[V_ADP_SECONDARY];
1087    } else {
1088	adp = NULL;
1089    }
1090    bzero(mode_map, sizeof(mode_map));
1091    if (adp != NULL) {
1092	if (adp->va_type == KD_VGA) {
1093	    vga_save_state(adp, &adpstate, sizeof(adpstate));
1094#if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE)
1095	    mode_map[adp->va_initial_mode] = adpstate.regs;
1096	    rows_offset = 1;
1097#else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */
1098	    if (video_mode_ptr == NULL) {
1099		mode_map[adp->va_initial_mode] = adpstate.regs;
1100		rows_offset = 1;
1101	    } else {
1102		/* discard the table if we are not familiar with it... */
1103		map_mode_table(mode_map, video_mode_ptr, M_VGA_CG320 + 1);
1104		mp = get_mode_param(adp->va_initial_mode);
1105		if (mp != NULL)
1106		    bcopy(mp, adpstate2.regs, sizeof(adpstate2.regs));
1107		switch (comp_adpregs(adpstate.regs, mp)) {
1108		case COMP_IDENTICAL:
1109		    /*
1110		     * OK, this parameter table looks reasonably familiar
1111		     * to us...
1112		     */
1113		    /*
1114		     * This is a kludge for Toshiba DynaBook SS433
1115		     * whose BIOS video mode table entry has the actual #
1116		     * of rows at the offset 1; BIOSes from other
1117		     * manufacturers store the # of rows - 1 there. XXX
1118		     */
1119		    rows_offset = adpstate.regs[1] + 1 - mp[1];
1120		    break;
1121
1122		case COMP_SIMILAR:
1123		    /*
1124		     * Not exactly the same, but similar enough to be
1125		     * trusted. However, use the saved register values
1126		     * for the initial mode and other modes which are
1127		     * based on the initial mode.
1128		     */
1129		    mode_map[adp->va_initial_mode] = adpstate.regs;
1130		    rows_offset = adpstate.regs[1] + 1 - mp[1];
1131		    adpstate.regs[1] -= rows_offset - 1;
1132		    break;
1133
1134		case COMP_DIFFERENT:
1135		default:
1136		    /*
1137		     * Don't use the parameter table in BIOS. It doesn't
1138		     * look familiar to us. Video mode switching is allowed
1139		     * only if the new mode is the same as or based on
1140		     * the initial mode.
1141		     */
1142		    video_mode_ptr = NULL;
1143		    bzero(mode_map, sizeof(mode_map));
1144		    mode_map[adp->va_initial_mode] = adpstate.regs;
1145		    rows_offset = 1;
1146		    break;
1147		}
1148	    }
1149#endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */
1150
1151#ifndef VGA_NO_MODE_CHANGE
1152	    adp->va_flags |= V_ADP_MODECHANGE;
1153#endif
1154#ifndef VGA_NO_FONT_LOADING
1155	    adp->va_flags |= V_ADP_FONT;
1156#endif
1157	} else if (adp->va_type == KD_EGA) {
1158#if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE)
1159	    rows_offset = 1;
1160#else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */
1161	    if (video_mode_ptr == NULL) {
1162		rows_offset = 1;
1163	    } else {
1164		map_mode_table(mode_map, video_mode_ptr, M_ENH_C80x25 + 1);
1165		/* XXX how can one validate the EGA table... */
1166		mp = get_mode_param(adp->va_initial_mode);
1167		if (mp != NULL) {
1168		    adp->va_flags |= V_ADP_MODECHANGE;
1169#ifndef VGA_NO_FONT_LOADING
1170		    adp->va_flags |= V_ADP_FONT;
1171#endif
1172		    rows_offset = 1;
1173		} else {
1174		    /*
1175		     * This is serious. We will not be able to switch video
1176		     * modes at all...
1177		     */
1178		    video_mode_ptr = NULL;
1179		    bzero(mode_map, sizeof(mode_map));
1180		    rows_offset = 1;
1181                }
1182	    }
1183#endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */
1184	}
1185    }
1186
1187    /* remove conflicting modes if we have more than one adapter */
1188    if (biosadapters > 0) {
1189	for (i = 0; i < biosadapters; ++i) {
1190	    if (!(biosadapter[i].va_flags & V_ADP_MODECHANGE))
1191		continue;
1192	    clear_mode_map(&biosadapter[i], mode_map, M_VGA_CG320 + 1,
1193			   (biosadapter[i].va_flags & V_ADP_COLOR) ?
1194			       V_INFO_COLOR : 0);
1195	    if ((biosadapter[i].va_type == KD_VGA)
1196		|| (biosadapter[i].va_type == KD_EGA)) {
1197		biosadapter[i].va_io_base =
1198		    (biosadapter[i].va_flags & V_ADP_COLOR) ?
1199			IO_VGA : IO_MDA;
1200		biosadapter[i].va_io_size = 32;
1201	    }
1202	}
1203    }
1204
1205    /* buffer address */
1206    vga_get_info(&biosadapter[V_ADP_PRIMARY],
1207		 biosadapter[V_ADP_PRIMARY].va_initial_mode, &info);
1208    info.vi_flags &= ~V_INFO_LINEAR; /* XXX */
1209    update_adapter_info(&biosadapter[V_ADP_PRIMARY], &info);
1210
1211    if (biosadapters > 1) {
1212	vga_get_info(&biosadapter[V_ADP_SECONDARY],
1213		     biosadapter[V_ADP_SECONDARY].va_initial_mode, &info);
1214	info.vi_flags &= ~V_INFO_LINEAR; /* XXX */
1215	update_adapter_info(&biosadapter[V_ADP_SECONDARY], &info);
1216    }
1217
1218    /*
1219     * XXX: we should verify the following values for the primary adapter...
1220     * crtc I/O port address: *(u_int16_t *)BIOS_PADDRTOVADDR(0x463);
1221     * color/mono display: (*(u_int8_t *)BIOS_PADDRTOVADDR(0x487) & 0x02)
1222     *                     ? 0 : V_ADP_COLOR;
1223     * columns: *(u_int8_t *)BIOS_PADDRTOVADDR(0x44a);
1224     * rows: *(u_int8_t *)BIOS_PADDRTOVADDR(0x484);
1225     * font size: *(u_int8_t *)BIOS_PADDRTOVADDR(0x485);
1226     * buffer size: *(u_int16_t *)BIOS_PADDRTOVADDR(0x44c);
1227     */
1228
1229    return biosadapters;
1230}
1231
1232/* set the scan line length in pixel */
1233static int
1234set_line_length(video_adapter_t *adp, int pixel)
1235{
1236    u_char *mp;
1237    int ppw;	/* pixels per word */
1238    int bpl;	/* bytes per line */
1239    int count;
1240
1241    if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA))
1242	return ENODEV;
1243    mp = get_mode_param(adp->va_mode);
1244    if (mp == NULL)
1245	return EINVAL;
1246
1247    switch (adp->va_info.vi_mem_model) {
1248    case V_INFO_MM_PLANAR:
1249	ppw = 16/(adp->va_info.vi_depth/adp->va_info.vi_planes);
1250	count = howmany(pixel, ppw)/2;
1251	bpl = (howmany(pixel, ppw)/2)*4;
1252	break;
1253    case V_INFO_MM_PACKED:
1254	count = (pixel + 7)/8;
1255	bpl = rounddown(pixel + 7, 8);
1256	break;
1257    case V_INFO_MM_TEXT:
1258	count = (pixel + 7)/8;			/* columns */
1259	bpl = (pixel + 7)/8;			/* columns */
1260	break;
1261    default:
1262	return ENODEV;
1263    }
1264
1265    if (mp[10 + 0x17] & 0x40)			/* CRTC mode control reg */
1266	count *= 2;				/* byte mode */
1267    outb(adp->va_crtc_addr, 0x13);
1268    outb(adp->va_crtc_addr + 1, count);
1269    adp->va_line_width = bpl;
1270
1271    return 0;
1272}
1273
1274static int
1275set_display_start(video_adapter_t *adp, int x, int y)
1276{
1277    int off;	/* byte offset (graphics mode)/word offset (text mode) */
1278    int poff;	/* pixel offset */
1279    int roff;	/* row offset */
1280    int ppb;	/* pixels per byte */
1281
1282    if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA))
1283	x &= ~7;
1284    if (adp->va_info.vi_flags & V_INFO_GRAPHICS) {
1285	ppb = 8/(adp->va_info.vi_depth/adp->va_info.vi_planes);
1286	off = y*adp->va_line_width + x/ppb;
1287	roff = 0;
1288	poff = x%ppb;
1289    } else {
1290	if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) {
1291	    outb(TSIDX, 1);
1292	    if (inb(TSREG) & 1)
1293		ppb = 9;
1294	    else
1295		ppb = 8;
1296	} else {
1297	    ppb = 8;
1298	}
1299	off = y/adp->va_info.vi_cheight*adp->va_line_width + x/ppb;
1300	roff = y%adp->va_info.vi_cheight;
1301	/* FIXME: is this correct? XXX */
1302	if (ppb == 8)
1303	    poff = x%ppb;
1304	else
1305	    poff = (x + 8)%ppb;
1306    }
1307
1308    /* start address */
1309    outb(adp->va_crtc_addr, 0xc);		/* high */
1310    outb(adp->va_crtc_addr + 1, off >> 8);
1311    outb(adp->va_crtc_addr, 0xd);		/* low */
1312    outb(adp->va_crtc_addr + 1, off & 0xff);
1313
1314    /* horizontal pel pan */
1315    if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) {
1316	inb(adp->va_crtc_addr + 6);
1317	outb(ATC, 0x13 | 0x20);
1318	outb(ATC, poff);
1319	inb(adp->va_crtc_addr + 6);
1320	outb(ATC, 0x20);
1321    }
1322
1323    /* preset raw scan */
1324    outb(adp->va_crtc_addr, 8);
1325    outb(adp->va_crtc_addr + 1, roff);
1326
1327    adp->va_disp_start.x = x;
1328    adp->va_disp_start.y = y;
1329    return 0;
1330}
1331
1332#ifndef VGA_NO_MODE_CHANGE
1333#if defined(__i386__) || defined(__amd64__)	/* XXX */
1334static void
1335fill(int val, void *d, size_t size)
1336{
1337    u_char *p = d;
1338
1339    while (size-- > 0)
1340	*p++ = val;
1341}
1342#endif /* __i386__ */
1343
1344static void
1345filll_io(int val, vm_offset_t d, size_t size)
1346{
1347    while (size-- > 0) {
1348	writel(d, val);
1349	d += sizeof(u_int32_t);
1350    }
1351}
1352#endif /* !VGA_NO_MODE_CHANGE */
1353
1354/* entry points */
1355
1356#if 0
1357static int
1358vga_nop(void)
1359{
1360    return 0;
1361}
1362#endif
1363
1364static int
1365vga_error(void)
1366{
1367    return ENODEV;
1368}
1369
1370static int
1371vga_probe(int unit, video_adapter_t **adpp, void *arg, int flags)
1372{
1373    probe_adapters();
1374    if (unit >= biosadapters)
1375	return ENXIO;
1376
1377    *adpp = &biosadapter[unit];
1378
1379    return 0;
1380}
1381
1382static int
1383vga_init(int unit, video_adapter_t *adp, int flags)
1384{
1385    if ((unit >= biosadapters) || (adp == NULL) || !probe_done(adp))
1386	return ENXIO;
1387
1388    if (!init_done(adp)) {
1389	/* nothing to do really... */
1390	adp->va_flags |= V_ADP_INITIALIZED;
1391    }
1392
1393    if (!config_done(adp)) {
1394	if (vid_register(adp) < 0)
1395		return ENXIO;
1396	adp->va_flags |= V_ADP_REGISTERED;
1397    }
1398    if (vga_sub_configure != NULL)
1399	(*vga_sub_configure)(0);
1400
1401    return 0;
1402}
1403
1404/*
1405 * get_info():
1406 * Return the video_info structure of the requested video mode.
1407 *
1408 * all adapters
1409 */
1410static int
1411vga_get_info(video_adapter_t *adp, int mode, video_info_t *info)
1412{
1413    int i;
1414
1415    if (!vga_init_done)
1416	return ENXIO;
1417
1418    mode = map_gen_mode_num(adp->va_type, adp->va_flags & V_ADP_COLOR, mode);
1419#ifndef VGA_NO_MODE_CHANGE
1420    if (adp->va_flags & V_ADP_MODECHANGE) {
1421	/*
1422	 * If the parameter table entry for this mode is not found,
1423	 * the mode is not supported...
1424	 */
1425	if (get_mode_param(mode) == NULL)
1426	    return EINVAL;
1427    } else
1428#endif /* VGA_NO_MODE_CHANGE */
1429    {
1430	/*
1431	 * Even if we don't support video mode switching on this adapter,
1432	 * the information on the initial (thus current) video mode
1433	 * should be made available.
1434	 */
1435	if (mode != adp->va_initial_mode)
1436	    return EINVAL;
1437    }
1438
1439    for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) {
1440	if (bios_vmode[i].vi_mode == NA)
1441	    continue;
1442	if (mode == bios_vmode[i].vi_mode) {
1443	    *info = bios_vmode[i];
1444	    /* XXX */
1445	    info->vi_buffer_size = info->vi_window_size*info->vi_planes;
1446	    return 0;
1447	}
1448    }
1449    return EINVAL;
1450}
1451
1452/*
1453 * query_mode():
1454 * Find a video mode matching the requested parameters.
1455 * Fields filled with 0 are considered "don't care" fields and
1456 * match any modes.
1457 *
1458 * all adapters
1459 */
1460static int
1461vga_query_mode(video_adapter_t *adp, video_info_t *info)
1462{
1463    int i;
1464
1465    if (!vga_init_done)
1466	return ENXIO;
1467
1468    for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) {
1469	if (bios_vmode[i].vi_mode == NA)
1470	    continue;
1471
1472	if ((info->vi_width != 0)
1473	    && (info->vi_width != bios_vmode[i].vi_width))
1474		continue;
1475	if ((info->vi_height != 0)
1476	    && (info->vi_height != bios_vmode[i].vi_height))
1477		continue;
1478	if ((info->vi_cwidth != 0)
1479	    && (info->vi_cwidth != bios_vmode[i].vi_cwidth))
1480		continue;
1481	if ((info->vi_cheight != 0)
1482	    && (info->vi_cheight != bios_vmode[i].vi_cheight))
1483		continue;
1484	if ((info->vi_depth != 0)
1485	    && (info->vi_depth != bios_vmode[i].vi_depth))
1486		continue;
1487	if ((info->vi_planes != 0)
1488	    && (info->vi_planes != bios_vmode[i].vi_planes))
1489		continue;
1490	/* XXX: should check pixel format, memory model */
1491	if ((info->vi_flags != 0)
1492	    && (info->vi_flags != bios_vmode[i].vi_flags))
1493		continue;
1494
1495	/* verify if this mode is supported on this adapter */
1496	if (vga_get_info(adp, bios_vmode[i].vi_mode, info))
1497		continue;
1498	return 0;
1499    }
1500    return ENODEV;
1501}
1502
1503/*
1504 * set_mode():
1505 * Change the video mode.
1506 *
1507 * EGA/VGA
1508 */
1509
1510#ifndef VGA_NO_MODE_CHANGE
1511#ifdef VGA_WIDTH90
1512static void
1513set_width90(adp_state_t *params)
1514{
1515    /*
1516     * Based on code submitted by Kelly Yancey (kbyanc@freedomnet.com)
1517     * and alexv@sui.gda.itesm.mx.
1518     */
1519    params->regs[5] |= 1;		/* toggle 8 pixel wide fonts */
1520    params->regs[10+0x0] = 0x6b;
1521    params->regs[10+0x1] = 0x59;
1522    params->regs[10+0x2] = 0x5a;
1523    params->regs[10+0x3] = 0x8e;
1524    params->regs[10+0x4] = 0x5e;
1525    params->regs[10+0x5] = 0x8a;
1526    params->regs[10+0x13] = 45;
1527    params->regs[35+0x13] = 0;
1528}
1529#endif /* VGA_WIDTH90 */
1530#endif /* !VGA_NO_MODE_CHANGE */
1531
1532static int
1533vga_set_mode(video_adapter_t *adp, int mode)
1534{
1535#ifndef VGA_NO_MODE_CHANGE
1536    video_info_t info;
1537    adp_state_t params;
1538
1539    prologue(adp, V_ADP_MODECHANGE, ENODEV);
1540
1541    mode = map_gen_mode_num(adp->va_type,
1542			    adp->va_flags & V_ADP_COLOR, mode);
1543    if (vga_get_info(adp, mode, &info))
1544	return EINVAL;
1545
1546#if VGA_DEBUG > 1
1547    printf("vga_set_mode(): setting mode %d\n", mode);
1548#endif
1549
1550    params.sig = V_STATE_SIG;
1551    bcopy(get_mode_param(mode), params.regs, sizeof(params.regs));
1552
1553    switch (mode) {
1554#ifdef VGA_WIDTH90
1555    case M_VGA_C90x60: case M_VGA_M90x60:
1556	set_width90(&params);
1557	/* FALLTHROUGH */
1558#endif
1559    case M_VGA_C80x60: case M_VGA_M80x60:
1560	params.regs[2]  = 0x08;
1561	params.regs[19] = 0x47;
1562	goto special_480l;
1563
1564#ifdef VGA_WIDTH90
1565    case M_VGA_C90x30: case M_VGA_M90x30:
1566	set_width90(&params);
1567	/* FALLTHROUGH */
1568#endif
1569    case M_VGA_C80x30: case M_VGA_M80x30:
1570	params.regs[19] = 0x4f;
1571special_480l:
1572	params.regs[9] |= 0xc0;
1573	params.regs[16] = 0x08;
1574	params.regs[17] = 0x3e;
1575	params.regs[26] = 0xea;
1576	params.regs[28] = 0xdf;
1577	params.regs[31] = 0xe7;
1578	params.regs[32] = 0x04;
1579	goto setup_mode;
1580
1581#ifdef VGA_WIDTH90
1582    case M_VGA_C90x43: case M_VGA_M90x43:
1583	set_width90(&params);
1584	/* FALLTHROUGH */
1585#endif
1586    case M_ENH_C80x43: case M_ENH_B80x43:
1587	params.regs[28] = 87;
1588	goto special_80x50;
1589
1590#ifdef VGA_WIDTH90
1591    case M_VGA_C90x50: case M_VGA_M90x50:
1592	set_width90(&params);
1593	/* FALLTHROUGH */
1594#endif
1595    case M_VGA_C80x50: case M_VGA_M80x50:
1596special_80x50:
1597	params.regs[2] = 8;
1598	params.regs[19] = 7;
1599	goto setup_mode;
1600
1601#ifdef VGA_WIDTH90
1602    case M_VGA_C90x25: case M_VGA_M90x25:
1603	set_width90(&params);
1604	/* FALLTHROUGH */
1605#endif
1606    case M_VGA_C40x25: case M_VGA_C80x25:
1607    case M_VGA_M80x25:
1608    case M_B40x25:     case M_C40x25:
1609    case M_B80x25:     case M_C80x25:
1610    case M_ENH_B40x25: case M_ENH_C40x25:
1611    case M_ENH_B80x25: case M_ENH_C80x25:
1612    case M_EGAMONO80x25:
1613
1614setup_mode:
1615	vga_load_state(adp, &params);
1616	break;
1617
1618    case M_VGA_MODEX:
1619	/* "unchain" the VGA mode */
1620	params.regs[5-1+0x04] &= 0xf7;
1621	params.regs[5-1+0x04] |= 0x04;
1622	/* turn off doubleword mode */
1623	params.regs[10+0x14] &= 0xbf;
1624	/* turn off word addressing */
1625	params.regs[10+0x17] |= 0x40;
1626	/* set logical screen width */
1627	params.regs[10+0x13] = 80;
1628	/* set 240 lines */
1629	params.regs[10+0x11] = 0x2c;
1630	params.regs[10+0x06] = 0x0d;
1631	params.regs[10+0x07] = 0x3e;
1632	params.regs[10+0x10] = 0xea;
1633	params.regs[10+0x11] = 0xac;
1634	params.regs[10+0x12] = 0xdf;
1635	params.regs[10+0x15] = 0xe7;
1636	params.regs[10+0x16] = 0x06;
1637	/* set vertical sync polarity to reflect aspect ratio */
1638	params.regs[9] = 0xe3;
1639	goto setup_grmode;
1640
1641    case M_BG320:     case M_CG320:     case M_BG640:
1642    case M_CG320_D:   case M_CG640_E:
1643    case M_CG640x350: case M_ENH_CG640:
1644    case M_BG640x480: case M_CG640x480: case M_VGA_CG320:
1645
1646setup_grmode:
1647	vga_load_state(adp, &params);
1648	break;
1649
1650    default:
1651	return EINVAL;
1652    }
1653
1654    adp->va_mode = mode;
1655    info.vi_flags &= ~V_INFO_LINEAR; /* XXX */
1656    update_adapter_info(adp, &info);
1657
1658    /* move hardware cursor out of the way */
1659    vidd_set_hw_cursor(adp, -1, -1);
1660
1661    return 0;
1662#else /* VGA_NO_MODE_CHANGE */
1663    return ENODEV;
1664#endif /* VGA_NO_MODE_CHANGE */
1665}
1666
1667#ifndef VGA_NO_FONT_LOADING
1668
1669static void
1670set_font_mode(video_adapter_t *adp, u_char *buf)
1671{
1672    u_char *mp;
1673    int s;
1674
1675    s = splhigh();
1676
1677    /* save register values */
1678    if (adp->va_type == KD_VGA) {
1679	outb(TSIDX, 0x02); buf[0] = inb(TSREG);
1680	outb(TSIDX, 0x04); buf[1] = inb(TSREG);
1681	outb(GDCIDX, 0x04); buf[2] = inb(GDCREG);
1682	outb(GDCIDX, 0x05); buf[3] = inb(GDCREG);
1683	outb(GDCIDX, 0x06); buf[4] = inb(GDCREG);
1684	inb(adp->va_crtc_addr + 6);
1685	outb(ATC, 0x10); buf[5] = inb(ATC + 1);
1686    } else /* if (adp->va_type == KD_EGA) */ {
1687	/*
1688	 * EGA cannot be read; copy parameters from the mode parameter
1689	 * table.
1690	 */
1691	mp = get_mode_param(adp->va_mode);
1692	buf[0] = mp[5 + 0x02 - 1];
1693	buf[1] = mp[5 + 0x04 - 1];
1694	buf[2] = mp[55 + 0x04];
1695	buf[3] = mp[55 + 0x05];
1696	buf[4] = mp[55 + 0x06];
1697	buf[5] = mp[35 + 0x10];
1698    }
1699
1700    /* setup vga for loading fonts */
1701    inb(adp->va_crtc_addr + 6);			/* reset flip-flop */
1702    outb(ATC, 0x10); outb(ATC, buf[5] & ~0x01);
1703    inb(adp->va_crtc_addr + 6);			/* reset flip-flop */
1704    outb(ATC, 0x20);				/* enable palette */
1705
1706#ifdef VGA_SLOW_IOACCESS
1707#ifdef VGA_ALT_SEQACCESS
1708    outb(TSIDX, 0x00); outb(TSREG, 0x01);
1709#endif
1710    outb(TSIDX, 0x02); outb(TSREG, 0x04);
1711    outb(TSIDX, 0x04); outb(TSREG, 0x07);
1712#ifdef VGA_ALT_SEQACCESS
1713    outb(TSIDX, 0x00); outb(TSREG, 0x03);
1714#endif
1715    outb(GDCIDX, 0x04); outb(GDCREG, 0x02);
1716    outb(GDCIDX, 0x05); outb(GDCREG, 0x00);
1717    outb(GDCIDX, 0x06); outb(GDCREG, 0x04);
1718#else /* VGA_SLOW_IOACCESS */
1719#ifdef VGA_ALT_SEQACCESS
1720    outw(TSIDX, 0x0100);
1721#endif
1722    outw(TSIDX, 0x0402);
1723    outw(TSIDX, 0x0704);
1724#ifdef VGA_ALT_SEQACCESS
1725    outw(TSIDX, 0x0300);
1726#endif
1727    outw(GDCIDX, 0x0204);
1728    outw(GDCIDX, 0x0005);
1729    outw(GDCIDX, 0x0406);               /* addr = a0000, 64kb */
1730#endif /* VGA_SLOW_IOACCESS */
1731
1732    splx(s);
1733}
1734
1735static void
1736set_normal_mode(video_adapter_t *adp, u_char *buf)
1737{
1738    int s;
1739
1740    s = splhigh();
1741
1742    /* setup vga for normal operation mode again */
1743    inb(adp->va_crtc_addr + 6);			/* reset flip-flop */
1744    outb(ATC, 0x10); outb(ATC, buf[5]);
1745    inb(adp->va_crtc_addr + 6);			/* reset flip-flop */
1746    outb(ATC, 0x20);				/* enable palette */
1747
1748#ifdef VGA_SLOW_IOACCESS
1749#ifdef VGA_ALT_SEQACCESS
1750    outb(TSIDX, 0x00); outb(TSREG, 0x01);
1751#endif
1752    outb(TSIDX, 0x02); outb(TSREG, buf[0]);
1753    outb(TSIDX, 0x04); outb(TSREG, buf[1]);
1754#ifdef VGA_ALT_SEQACCESS
1755    outb(TSIDX, 0x00); outb(TSREG, 0x03);
1756#endif
1757    outb(GDCIDX, 0x04); outb(GDCREG, buf[2]);
1758    outb(GDCIDX, 0x05); outb(GDCREG, buf[3]);
1759    if (adp->va_crtc_addr == MONO_CRTC) {
1760	outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x08);
1761    } else {
1762	outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x0c);
1763    }
1764#else /* VGA_SLOW_IOACCESS */
1765#ifdef VGA_ALT_SEQACCESS
1766    outw(TSIDX, 0x0100);
1767#endif
1768    outw(TSIDX, 0x0002 | (buf[0] << 8));
1769    outw(TSIDX, 0x0004 | (buf[1] << 8));
1770#ifdef VGA_ALT_SEQACCESS
1771    outw(TSIDX, 0x0300);
1772#endif
1773    outw(GDCIDX, 0x0004 | (buf[2] << 8));
1774    outw(GDCIDX, 0x0005 | (buf[3] << 8));
1775    if (adp->va_crtc_addr == MONO_CRTC)
1776        outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x08)<<8));
1777    else
1778        outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x0c)<<8));
1779#endif /* VGA_SLOW_IOACCESS */
1780
1781    splx(s);
1782}
1783
1784#endif /* VGA_NO_FONT_LOADING */
1785
1786/*
1787 * save_font():
1788 * Read the font data in the requested font page from the video adapter.
1789 *
1790 * EGA/VGA
1791 */
1792static int
1793vga_save_font(video_adapter_t *adp, int page, int fontsize, int fontwidth,
1794	      u_char *data, int ch, int count)
1795{
1796#ifndef VGA_NO_FONT_LOADING
1797    u_char buf[PARAM_BUFSIZE];
1798    vm_offset_t segment;
1799    int c;
1800#ifdef VGA_ALT_SEQACCESS
1801    int s;
1802    u_char val = 0;
1803#endif
1804
1805    prologue(adp, V_ADP_FONT, ENODEV);
1806
1807    if (fontsize < 14) {
1808	/* FONT_8 */
1809	fontsize = 8;
1810    } else if (fontsize >= 32) {
1811	fontsize = 32;
1812    } else if (fontsize >= 16) {
1813	/* FONT_16 */
1814	fontsize = 16;
1815    } else {
1816	/* FONT_14 */
1817	fontsize = 14;
1818    }
1819
1820    if (page < 0 || page >= 8 || fontwidth != 8)
1821	return EINVAL;
1822    segment = FONT_BUF + 0x4000*page;
1823    if (page > 3)
1824	segment -= 0xe000;
1825
1826#ifdef VGA_ALT_SEQACCESS
1827    if (adp->va_type == KD_VGA) {	/* what about EGA? XXX */
1828	s = splhigh();
1829	outb(TSIDX, 0x00); outb(TSREG, 0x01);
1830	outb(TSIDX, 0x01); val = inb(TSREG);	/* disable screen */
1831	outb(TSIDX, 0x01); outb(TSREG, val | 0x20);
1832	outb(TSIDX, 0x00); outb(TSREG, 0x03);
1833	splx(s);
1834    }
1835#endif
1836
1837    set_font_mode(adp, buf);
1838    if (fontsize == 32) {
1839	bcopy_fromio((uintptr_t)segment + ch*32, data, fontsize*count);
1840    } else {
1841	for (c = ch; count > 0; ++c, --count) {
1842	    bcopy_fromio((uintptr_t)segment + c*32, data, fontsize);
1843	    data += fontsize;
1844	}
1845    }
1846    set_normal_mode(adp, buf);
1847
1848#ifdef VGA_ALT_SEQACCESS
1849    if (adp->va_type == KD_VGA) {
1850	s = splhigh();
1851	outb(TSIDX, 0x00); outb(TSREG, 0x01);
1852	outb(TSIDX, 0x01); outb(TSREG, val & 0xdf);	/* enable screen */
1853	outb(TSIDX, 0x00); outb(TSREG, 0x03);
1854	splx(s);
1855    }
1856#endif
1857
1858    return 0;
1859#else /* VGA_NO_FONT_LOADING */
1860    return ENODEV;
1861#endif /* VGA_NO_FONT_LOADING */
1862}
1863
1864/*
1865 * load_font():
1866 * Set the font data in the requested font page.
1867 * NOTE: it appears that some recent video adapters do not support
1868 * the font page other than 0... XXX
1869 *
1870 * EGA/VGA
1871 */
1872static int
1873vga_load_font(video_adapter_t *adp, int page, int fontsize, int fontwidth,
1874	      u_char *data, int ch, int count)
1875{
1876#ifndef VGA_NO_FONT_LOADING
1877    u_char buf[PARAM_BUFSIZE];
1878    vm_offset_t segment;
1879    int c;
1880#ifdef VGA_ALT_SEQACCESS
1881    int s;
1882    u_char val = 0;
1883#endif
1884
1885    prologue(adp, V_ADP_FONT, ENODEV);
1886
1887    if (fontsize < 14) {
1888	/* FONT_8 */
1889	fontsize = 8;
1890    } else if (fontsize >= 32) {
1891	fontsize = 32;
1892    } else if (fontsize >= 16) {
1893	/* FONT_16 */
1894	fontsize = 16;
1895    } else {
1896	/* FONT_14 */
1897	fontsize = 14;
1898    }
1899
1900    if (page < 0 || page >= 8 || fontwidth != 8)
1901	return EINVAL;
1902    segment = FONT_BUF + 0x4000*page;
1903    if (page > 3)
1904	segment -= 0xe000;
1905
1906#ifdef VGA_ALT_SEQACCESS
1907    if (adp->va_type == KD_VGA) {	/* what about EGA? XXX */
1908	s = splhigh();
1909	outb(TSIDX, 0x00); outb(TSREG, 0x01);
1910	outb(TSIDX, 0x01); val = inb(TSREG);	/* disable screen */
1911	outb(TSIDX, 0x01); outb(TSREG, val | 0x20);
1912	outb(TSIDX, 0x00); outb(TSREG, 0x03);
1913	splx(s);
1914    }
1915#endif
1916
1917    set_font_mode(adp, buf);
1918    if (fontsize == 32) {
1919	bcopy_toio(data, (uintptr_t)segment + ch*32, fontsize*count);
1920    } else {
1921	for (c = ch; count > 0; ++c, --count) {
1922	    bcopy_toio(data, (uintptr_t)segment + c*32, fontsize);
1923	    data += fontsize;
1924	}
1925    }
1926    set_normal_mode(adp, buf);
1927
1928#ifdef VGA_ALT_SEQACCESS
1929    if (adp->va_type == KD_VGA) {
1930	s = splhigh();
1931	outb(TSIDX, 0x00); outb(TSREG, 0x01);
1932	outb(TSIDX, 0x01); outb(TSREG, val & 0xdf);	/* enable screen */
1933	outb(TSIDX, 0x00); outb(TSREG, 0x03);
1934	splx(s);
1935    }
1936#endif
1937
1938    return 0;
1939#else /* VGA_NO_FONT_LOADING */
1940    return ENODEV;
1941#endif /* VGA_NO_FONT_LOADING */
1942}
1943
1944/*
1945 * show_font():
1946 * Activate the requested font page.
1947 * NOTE: it appears that some recent video adapters do not support
1948 * the font page other than 0... XXX
1949 *
1950 * EGA/VGA
1951 */
1952static int
1953vga_show_font(video_adapter_t *adp, int page)
1954{
1955#ifndef VGA_NO_FONT_LOADING
1956    static u_char cg[] = { 0x00, 0x05, 0x0a, 0x0f, 0x30, 0x35, 0x3a, 0x3f };
1957    int s;
1958
1959    prologue(adp, V_ADP_FONT, ENODEV);
1960    if (page < 0 || page >= 8)
1961	return EINVAL;
1962
1963    s = splhigh();
1964    outb(TSIDX, 0x03); outb(TSREG, cg[page]);
1965    splx(s);
1966
1967    return 0;
1968#else /* VGA_NO_FONT_LOADING */
1969    return ENODEV;
1970#endif /* VGA_NO_FONT_LOADING */
1971}
1972
1973/*
1974 * save_palette():
1975 * Read DAC values. The values have expressed in 8 bits.
1976 *
1977 * VGA
1978 */
1979static int
1980vga_save_palette(video_adapter_t *adp, u_char *palette)
1981{
1982    int bits;
1983    int i;
1984
1985    prologue(adp, V_ADP_PALETTE, ENODEV);
1986
1987    /*
1988     * We store 8 bit values in the palette buffer, while the standard
1989     * VGA has 6 bit DAC .
1990     */
1991    outb(PALRADR, 0x00);
1992    bits = (adp->va_flags & V_ADP_DAC8) != 0 ? 0 : 2;
1993    for (i = 0; i < 256*3; ++i)
1994	palette[i] = inb(PALDATA) << bits;
1995    inb(adp->va_crtc_addr + 6);	/* reset flip/flop */
1996    return 0;
1997}
1998
1999static int
2000vga_save_palette2(video_adapter_t *adp, int base, int count,
2001		  u_char *r, u_char *g, u_char *b)
2002{
2003    int bits;
2004    int i;
2005
2006    prologue(adp, V_ADP_PALETTE, ENODEV);
2007
2008    outb(PALRADR, base);
2009    bits = (adp->va_flags & V_ADP_DAC8) != 0 ? 0 : 2;
2010    for (i = 0; i < count; ++i) {
2011	r[i] = inb(PALDATA) << bits;
2012	g[i] = inb(PALDATA) << bits;
2013	b[i] = inb(PALDATA) << bits;
2014    }
2015    inb(adp->va_crtc_addr + 6);		/* reset flip/flop */
2016    return 0;
2017}
2018
2019/*
2020 * load_palette():
2021 * Set DAC values.
2022 *
2023 * VGA
2024 */
2025static int
2026vga_load_palette(video_adapter_t *adp, u_char *palette)
2027{
2028    int bits;
2029    int i;
2030
2031    prologue(adp, V_ADP_PALETTE, ENODEV);
2032
2033    outb(PIXMASK, 0xff);		/* no pixelmask */
2034    outb(PALWADR, 0x00);
2035    bits = (adp->va_flags & V_ADP_DAC8) != 0 ? 0 : 2;
2036    for (i = 0; i < 256*3; ++i)
2037	outb(PALDATA, palette[i] >> bits);
2038    inb(adp->va_crtc_addr + 6);	/* reset flip/flop */
2039    outb(ATC, 0x20);			/* enable palette */
2040    return 0;
2041}
2042
2043static int
2044vga_load_palette2(video_adapter_t *adp, int base, int count,
2045		  u_char *r, u_char *g, u_char *b)
2046{
2047    int bits;
2048    int i;
2049
2050    prologue(adp, V_ADP_PALETTE, ENODEV);
2051
2052    outb(PIXMASK, 0xff);		/* no pixelmask */
2053    outb(PALWADR, base);
2054    bits = (adp->va_flags & V_ADP_DAC8) != 0 ? 0 : 2;
2055    for (i = 0; i < count; ++i) {
2056	outb(PALDATA, r[i] >> bits);
2057	outb(PALDATA, g[i] >> bits);
2058	outb(PALDATA, b[i] >> bits);
2059    }
2060    inb(adp->va_crtc_addr + 6);		/* reset flip/flop */
2061    outb(ATC, 0x20);			/* enable palette */
2062    return 0;
2063}
2064
2065/*
2066 * set_border():
2067 * Change the border color.
2068 *
2069 * CGA/EGA/VGA
2070 */
2071static int
2072vga_set_border(video_adapter_t *adp, int color)
2073{
2074    prologue(adp, V_ADP_BORDER, ENODEV);
2075
2076    switch (adp->va_type) {
2077    case KD_EGA:
2078    case KD_VGA:
2079	inb(adp->va_crtc_addr + 6);	/* reset flip-flop */
2080	outb(ATC, 0x31); outb(ATC, color & 0xff);
2081	break;
2082    case KD_CGA:
2083	outb(adp->va_crtc_addr + 5, color & 0x0f); /* color select register */
2084	break;
2085    case KD_MONO:
2086    case KD_HERCULES:
2087    default:
2088	break;
2089    }
2090    return 0;
2091}
2092
2093/*
2094 * save_state():
2095 * Read video register values.
2096 * NOTE: this function only reads the standard EGA/VGA registers.
2097 * any extra/extended registers of SVGA adapters are not saved.
2098 *
2099 * VGA
2100 */
2101static int
2102vga_save_state(video_adapter_t *adp, void *p, size_t size)
2103{
2104    video_info_t info;
2105    u_char *buf;
2106    int crtc_addr;
2107    int i, j;
2108    int s;
2109
2110    if (size == 0) {
2111	/* return the required buffer size */
2112	prologue(adp, V_ADP_STATESAVE, 0);
2113	return sizeof(adp_state_t);
2114    } else {
2115	prologue(adp, V_ADP_STATESAVE, ENODEV);
2116	if (size < sizeof(adp_state_t))
2117	    return EINVAL;
2118    }
2119
2120    ((adp_state_t *)p)->sig = V_STATE_SIG;
2121    buf = ((adp_state_t *)p)->regs;
2122    bzero(buf, V_MODE_PARAM_SIZE);
2123    crtc_addr = adp->va_crtc_addr;
2124
2125    s = splhigh();
2126
2127    outb(TSIDX, 0x00); outb(TSREG, 0x01);	/* stop sequencer */
2128    for (i = 0, j = 5; i < 4; i++) {
2129	outb(TSIDX, i + 1);
2130	buf[j++]  =  inb(TSREG);
2131    }
2132    buf[9]  =  inb(MISC + 10);			/* dot-clock */
2133    outb(TSIDX, 0x00); outb(TSREG, 0x03);	/* start sequencer */
2134
2135    for (i = 0, j = 10; i < 25; i++) {		/* crtc */
2136	outb(crtc_addr, i);
2137	buf[j++]  =  inb(crtc_addr + 1);
2138    }
2139    for (i = 0, j = 35; i < 20; i++) {		/* attribute ctrl */
2140        inb(crtc_addr + 6);			/* reset flip-flop */
2141	outb(ATC, i);
2142	buf[j++]  =  inb(ATC + 1);
2143    }
2144    for (i = 0, j = 55; i < 9; i++) {		/* graph data ctrl */
2145	outb(GDCIDX, i);
2146	buf[j++]  =  inb(GDCREG);
2147    }
2148    inb(crtc_addr + 6);				/* reset flip-flop */
2149    outb(ATC, 0x20);				/* enable palette */
2150
2151    splx(s);
2152
2153#if 1
2154    if (vga_get_info(adp, adp->va_mode, &info) == 0) {
2155	if (info.vi_flags & V_INFO_GRAPHICS) {
2156	    buf[0] = info.vi_width/info.vi_cwidth; /* COLS */
2157	    buf[1] = info.vi_height/info.vi_cheight - 1; /* ROWS */
2158	} else {
2159	    buf[0] = info.vi_width;		/* COLS */
2160	    buf[1] = info.vi_height - 1;	/* ROWS */
2161	}
2162	buf[2] = info.vi_cheight;		/* POINTS */
2163    }
2164#else
2165    buf[0] = readb(BIOS_PADDRTOVADDR(0x44a));	/* COLS */
2166    buf[1] = readb(BIOS_PADDRTOVADDR(0x484));	/* ROWS */
2167    buf[2] = readb(BIOS_PADDRTOVADDR(0x485));	/* POINTS */
2168    buf[3] = readb(BIOS_PADDRTOVADDR(0x44c));
2169    buf[4] = readb(BIOS_PADDRTOVADDR(0x44d));
2170#endif
2171
2172    return 0;
2173}
2174
2175/*
2176 * load_state():
2177 * Set video registers at once.
2178 * NOTE: this function only updates the standard EGA/VGA registers.
2179 * any extra/extended registers of SVGA adapters are not changed.
2180 *
2181 * EGA/VGA
2182 */
2183static int
2184vga_load_state(video_adapter_t *adp, void *p)
2185{
2186    u_char *buf;
2187    int crtc_addr;
2188    int s;
2189    int i;
2190
2191    prologue(adp, V_ADP_STATELOAD, ENODEV);
2192    if (((adp_state_t *)p)->sig != V_STATE_SIG)
2193	return EINVAL;
2194
2195    buf = ((adp_state_t *)p)->regs;
2196    crtc_addr = adp->va_crtc_addr;
2197
2198#if VGA_DEBUG > 1
2199    dump_buffer(buf, V_MODE_PARAM_SIZE);
2200#endif
2201
2202    s = splhigh();
2203
2204    outb(TSIDX, 0x00); outb(TSREG, 0x01);	/* stop sequencer */
2205    for (i = 0; i < 4; ++i) {			/* program sequencer */
2206	outb(TSIDX, i + 1);
2207	outb(TSREG, buf[i + 5]);
2208    }
2209    outb(MISC, buf[9]);				/* set dot-clock */
2210    outb(TSIDX, 0x00); outb(TSREG, 0x03);	/* start sequencer */
2211    outb(crtc_addr, 0x11);
2212    outb(crtc_addr + 1, inb(crtc_addr + 1) & 0x7F);
2213    for (i = 0; i < 25; ++i) {			/* program crtc */
2214	outb(crtc_addr, i);
2215	outb(crtc_addr + 1, buf[i + 10]);
2216    }
2217    inb(crtc_addr+6);				/* reset flip-flop */
2218    for (i = 0; i < 20; ++i) {			/* program attribute ctrl */
2219	outb(ATC, i);
2220	outb(ATC, buf[i + 35]);
2221    }
2222    for (i = 0; i < 9; ++i) {			/* program graph data ctrl */
2223	outb(GDCIDX, i);
2224	outb(GDCREG, buf[i + 55]);
2225    }
2226    inb(crtc_addr + 6);				/* reset flip-flop */
2227    outb(ATC, 0x20);				/* enable palette */
2228
2229#ifdef notyet /* a temporary workaround for kernel panic, XXX */
2230#ifndef VGA_NO_BIOS
2231    if (adp->va_unit == V_ADP_PRIMARY) {
2232	writeb(BIOS_PADDRTOVADDR(0x44a), buf[0]);	/* COLS */
2233	writeb(BIOS_PADDRTOVADDR(0x484), buf[1] + rows_offset - 1); /* ROWS */
2234	writeb(BIOS_PADDRTOVADDR(0x485), buf[2]);	/* POINTS */
2235#if 0
2236	writeb(BIOS_PADDRTOVADDR(0x44c), buf[3]);
2237	writeb(BIOS_PADDRTOVADDR(0x44d), buf[4]);
2238#endif
2239    }
2240#endif /* VGA_NO_BIOS */
2241#endif /* notyet */
2242
2243    splx(s);
2244    return 0;
2245}
2246
2247/*
2248 * set_origin():
2249 * Change the origin (window mapping) of the banked frame buffer.
2250 */
2251static int
2252vga_set_origin(video_adapter_t *adp, off_t offset)
2253{
2254    /*
2255     * The standard video modes do not require window mapping;
2256     * always return error.
2257     */
2258    return ENODEV;
2259}
2260
2261/*
2262 * read_hw_cursor():
2263 * Read the position of the hardware text cursor.
2264 *
2265 * all adapters
2266 */
2267static int
2268vga_read_hw_cursor(video_adapter_t *adp, int *col, int *row)
2269{
2270    u_int16_t off;
2271    int s;
2272
2273    if (!vga_init_done)
2274	return ENXIO;
2275
2276    if (adp->va_info.vi_flags & V_INFO_GRAPHICS)
2277	return ENODEV;
2278
2279    s = spltty();
2280    outb(adp->va_crtc_addr, 14);
2281    off = inb(adp->va_crtc_addr + 1);
2282    outb(adp->va_crtc_addr, 15);
2283    off = (off << 8) | inb(adp->va_crtc_addr + 1);
2284    splx(s);
2285
2286    *row = off / adp->va_info.vi_width;
2287    *col = off % adp->va_info.vi_width;
2288
2289    return 0;
2290}
2291
2292/*
2293 * set_hw_cursor():
2294 * Move the hardware text cursor.  If col and row are both -1,
2295 * the cursor won't be shown.
2296 *
2297 * all adapters
2298 */
2299static int
2300vga_set_hw_cursor(video_adapter_t *adp, int col, int row)
2301{
2302    u_int16_t off;
2303    int s;
2304
2305    if (!vga_init_done)
2306	return ENXIO;
2307
2308    if ((col == -1) && (row == -1)) {
2309	off = -1;
2310    } else {
2311	if (adp->va_info.vi_flags & V_INFO_GRAPHICS)
2312	    return ENODEV;
2313	off = row*adp->va_info.vi_width + col;
2314    }
2315
2316    s = spltty();
2317    outb(adp->va_crtc_addr, 14);
2318    outb(adp->va_crtc_addr + 1, off >> 8);
2319    outb(adp->va_crtc_addr, 15);
2320    outb(adp->va_crtc_addr + 1, off & 0x00ff);
2321    splx(s);
2322
2323    return 0;
2324}
2325
2326/*
2327 * set_hw_cursor_shape():
2328 * Change the shape of the hardware text cursor. If the height is
2329 * zero or negative, the cursor won't be shown.
2330 *
2331 * all adapters
2332 */
2333static int
2334vga_set_hw_cursor_shape(video_adapter_t *adp, int base, int height,
2335			int celsize, int blink)
2336{
2337    int s;
2338
2339    if (!vga_init_done)
2340	return ENXIO;
2341
2342    s = spltty();
2343    switch (adp->va_type) {
2344    case KD_VGA:
2345    case KD_CGA:
2346    case KD_MONO:
2347    case KD_HERCULES:
2348    default:
2349	if (height <= 0) {
2350	    /* make the cursor invisible */
2351	    outb(adp->va_crtc_addr, 10);
2352	    outb(adp->va_crtc_addr + 1, 32);
2353	    outb(adp->va_crtc_addr, 11);
2354	    outb(adp->va_crtc_addr + 1, 0);
2355	} else {
2356	    outb(adp->va_crtc_addr, 10);
2357	    outb(adp->va_crtc_addr + 1, celsize - base - height);
2358	    outb(adp->va_crtc_addr, 11);
2359	    outb(adp->va_crtc_addr + 1, celsize - base - 1);
2360	}
2361	break;
2362    case KD_EGA:
2363	if (height <= 0) {
2364	    /* make the cursor invisible */
2365	    outb(adp->va_crtc_addr, 10);
2366	    outb(adp->va_crtc_addr + 1, celsize);
2367	    outb(adp->va_crtc_addr, 11);
2368	    outb(adp->va_crtc_addr + 1, 0);
2369	} else {
2370	    outb(adp->va_crtc_addr, 10);
2371	    outb(adp->va_crtc_addr + 1, celsize - base - height);
2372	    outb(adp->va_crtc_addr, 11);
2373	    outb(adp->va_crtc_addr + 1, celsize - base);
2374	}
2375	break;
2376    }
2377    splx(s);
2378
2379    return 0;
2380}
2381
2382/*
2383 * blank_display()
2384 * Put the display in power save/power off mode.
2385 *
2386 * all adapters
2387 */
2388static int
2389vga_blank_display(video_adapter_t *adp, int mode)
2390{
2391    u_char val;
2392    int s;
2393
2394    s = splhigh();
2395    switch (adp->va_type) {
2396    case KD_VGA:
2397	switch (mode) {
2398	case V_DISPLAY_SUSPEND:
2399	case V_DISPLAY_STAND_BY:
2400	    outb(TSIDX, 0x01);
2401	    val = inb(TSREG);
2402	    outb(TSIDX, 0x01);
2403	    outb(TSREG, val | 0x20);
2404	    outb(adp->va_crtc_addr, 0x17);
2405	    val = inb(adp->va_crtc_addr + 1);
2406	    outb(adp->va_crtc_addr + 1, val & ~0x80);
2407	    break;
2408	case V_DISPLAY_BLANK:
2409	    outb(TSIDX, 0x01);
2410	    val = inb(TSREG);
2411	    outb(TSIDX, 0x01);
2412	    outb(TSREG, val | 0x20);
2413	    break;
2414	case V_DISPLAY_ON:
2415	    outb(TSIDX, 0x01);
2416	    val = inb(TSREG);
2417	    outb(TSIDX, 0x01);
2418	    outb(TSREG, val & 0xDF);
2419	    outb(adp->va_crtc_addr, 0x17);
2420	    val = inb(adp->va_crtc_addr + 1);
2421	    outb(adp->va_crtc_addr + 1, val | 0x80);
2422	    break;
2423	}
2424	break;
2425
2426    case KD_EGA:
2427	/* no support yet */
2428	splx(s);
2429	return ENODEV;
2430
2431    case KD_CGA:
2432	switch (mode) {
2433	case V_DISPLAY_SUSPEND:
2434	case V_DISPLAY_STAND_BY:
2435	case V_DISPLAY_BLANK:
2436	    outb(adp->va_crtc_addr + 4, 0x25);
2437	    break;
2438	case V_DISPLAY_ON:
2439	    outb(adp->va_crtc_addr + 4, 0x2d);
2440	    break;
2441	}
2442	break;
2443
2444    case KD_MONO:
2445    case KD_HERCULES:
2446	switch (mode) {
2447	case V_DISPLAY_SUSPEND:
2448	case V_DISPLAY_STAND_BY:
2449	case V_DISPLAY_BLANK:
2450	    outb(adp->va_crtc_addr + 4, 0x21);
2451	    break;
2452	case V_DISPLAY_ON:
2453	    outb(adp->va_crtc_addr + 4, 0x29);
2454	    break;
2455	}
2456	break;
2457    default:
2458	break;
2459    }
2460    splx(s);
2461
2462    return 0;
2463}
2464
2465/*
2466 * mmap():
2467 * Mmap frame buffer.
2468 *
2469 * all adapters
2470 */
2471static int
2472vga_mmap_buf(video_adapter_t *adp, vm_ooffset_t offset, vm_paddr_t *paddr,
2473   	     int prot, vm_memattr_t *memattr)
2474{
2475    if (adp->va_info.vi_flags & V_INFO_LINEAR)
2476	return -1;
2477
2478#if VGA_DEBUG > 0
2479    printf("vga_mmap_buf(): window:0x%jx, offset:0x%jx\n",
2480	   (uintmax_t)adp->va_info.vi_window, (uintmax_t)offset);
2481#endif
2482
2483    /* XXX: is this correct? */
2484    if (offset > adp->va_window_size - PAGE_SIZE)
2485	return -1;
2486
2487    *paddr = adp->va_info.vi_window + offset;
2488    return 0;
2489}
2490
2491#ifndef VGA_NO_MODE_CHANGE
2492
2493static void
2494planar_fill(video_adapter_t *adp, int val)
2495{
2496    int length;
2497    int at;			/* position in the frame buffer */
2498    int l;
2499
2500    outw(GDCIDX, 0x0005);		/* read mode 0, write mode 0 */
2501    outw(GDCIDX, 0x0003);		/* data rotate/function select */
2502    outw(GDCIDX, 0x0f01);		/* set/reset enable */
2503    outw(GDCIDX, 0xff08);		/* bit mask */
2504    outw(GDCIDX, (val << 8) | 0x00);	/* set/reset */
2505    at = 0;
2506    length = adp->va_line_width*adp->va_info.vi_height;
2507    while (length > 0) {
2508	l = imin(length, adp->va_window_size);
2509	vidd_set_win_org(adp, at);
2510	bzero_io(adp->va_window, l);
2511	length -= l;
2512	at += l;
2513    }
2514    outw(GDCIDX, 0x0000);		/* set/reset */
2515    outw(GDCIDX, 0x0001);		/* set/reset enable */
2516}
2517
2518static void
2519packed_fill(video_adapter_t *adp, int val)
2520{
2521    int length;
2522    int at;			/* position in the frame buffer */
2523    int l;
2524
2525    at = 0;
2526    length = adp->va_line_width*adp->va_info.vi_height;
2527    while (length > 0) {
2528	l = imin(length, adp->va_window_size);
2529	vidd_set_win_org(adp, at);
2530	fill_io(val, adp->va_window, l);
2531	length -= l;
2532	at += l;
2533    }
2534}
2535
2536static void
2537direct_fill(video_adapter_t *adp, int val)
2538{
2539    int length;
2540    int at;			/* position in the frame buffer */
2541    int l;
2542
2543    at = 0;
2544    length = adp->va_line_width*adp->va_info.vi_height;
2545    while (length > 0) {
2546	l = imin(length, adp->va_window_size);
2547	vidd_set_win_org(adp, at);
2548	switch (adp->va_info.vi_pixel_size) {
2549	case sizeof(u_int16_t):
2550	    fillw_io(val, adp->va_window, l/sizeof(u_int16_t));
2551	    break;
2552	case 3:
2553	    /* FIXME */
2554	    break;
2555	case sizeof(u_int32_t):
2556	    filll_io(val, adp->va_window, l/sizeof(u_int32_t));
2557	    break;
2558	}
2559	length -= l;
2560	at += l;
2561    }
2562}
2563
2564static int
2565vga_clear(video_adapter_t *adp)
2566{
2567    switch (adp->va_info.vi_mem_model) {
2568    case V_INFO_MM_TEXT:
2569	/* do nothing? XXX */
2570	break;
2571    case V_INFO_MM_PLANAR:
2572	planar_fill(adp, 0);
2573	break;
2574    case V_INFO_MM_PACKED:
2575	packed_fill(adp, 0);
2576	break;
2577    case V_INFO_MM_DIRECT:
2578	direct_fill(adp, 0);
2579	break;
2580    }
2581    return 0;
2582}
2583
2584#ifdef notyet
2585static void
2586planar_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
2587{
2588    int banksize;
2589    int bank;
2590    int pos;
2591    int offset;			/* offset within window */
2592    int bx;
2593    int l;
2594
2595    outw(GDCIDX, 0x0005);		/* read mode 0, write mode 0 */
2596    outw(GDCIDX, 0x0003);		/* data rotate/function select */
2597    outw(GDCIDX, 0x0f01);		/* set/reset enable */
2598    outw(GDCIDX, 0xff08);		/* bit mask */
2599    outw(GDCIDX, (val << 8) | 0x00); /* set/reset */
2600
2601    banksize = adp->va_window_size;
2602    bank = -1;
2603    while (cy > 0) {
2604	pos = adp->va_line_width*y + x/8;
2605	if (bank != pos/banksize) {
2606	    vidd_set_win_org(adp, pos);
2607	    bank = pos/banksize;
2608	}
2609	offset = pos%banksize;
2610	bx = (x + cx)/8 - x/8;
2611	if (x % 8) {
2612	    outw(GDCIDX, ((0xff00 >> (x % 8)) & 0xff00) | 0x08);
2613	    writeb(adp->va_window + offset, 0);
2614	    ++offset;
2615	    --bx;
2616	    if (offset >= banksize) {
2617		offset = 0;
2618		++bank;		/* next bank */
2619		vidd_set_win_org(adp, bank*banksize);
2620	    }
2621	    outw(GDCIDX, 0xff08);	/* bit mask */
2622	}
2623	while (bx > 0) {
2624	    l = imin(bx, banksize);
2625	    bzero_io(adp->va_window + offset, l);
2626	    offset += l;
2627	    bx -= l;
2628	    if (offset >= banksize) {
2629		offset = 0;
2630		++bank;		/* next bank */
2631		vidd_set_win_org(adp, bank*banksize);
2632	    }
2633	}
2634	if ((x + cx) % 8) {
2635	    outw(GDCIDX, (~(0xff00 >> ((x + cx) % 8)) & 0xff00) | 0x08);
2636	    writeb(adp->va_window + offset, 0);
2637	    ++offset;
2638	    if (offset >= banksize) {
2639		offset = 0;
2640		++bank;		/* next bank */
2641		vidd_set_win_org(adp, bank*banksize);
2642	    }
2643	    outw(GDCIDX, 0xff08);	/* bit mask */
2644	}
2645	++y;
2646	--cy;
2647    }
2648
2649    outw(GDCIDX, 0xff08);		/* bit mask */
2650    outw(GDCIDX, 0x0000);		/* set/reset */
2651    outw(GDCIDX, 0x0001);		/* set/reset enable */
2652}
2653
2654static void
2655packed_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
2656{
2657    int banksize;
2658    int bank;
2659    int pos;
2660    int offset;			/* offset within window */
2661    int end;
2662
2663    banksize = adp->va_window_size;
2664    bank = -1;
2665    cx *= adp->va_info.vi_pixel_size;
2666    while (cy > 0) {
2667	pos = adp->va_line_width*y + x*adp->va_info.vi_pixel_size;
2668	if (bank != pos/banksize) {
2669	    vidd_set_win_org(adp, pos);
2670	    bank = pos/banksize;
2671	}
2672	offset = pos%banksize;
2673	end = imin(offset + cx, banksize);
2674	fill_io(val, adp->va_window + offset,
2675		(end - offset)/adp->va_info.vi_pixel_size);
2676	/* the line may cross the window boundary */
2677	if (offset + cx > banksize) {
2678	    ++bank;		/* next bank */
2679	    vidd_set_win_org(adp, bank*banksize);
2680	    end = offset + cx - banksize;
2681	    fill_io(val, adp->va_window, end/adp->va_info.vi_pixel_size);
2682	}
2683	++y;
2684	--cy;
2685    }
2686}
2687
2688static void
2689direct_fill_rect16(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
2690{
2691    int banksize;
2692    int bank;
2693    int pos;
2694    int offset;			/* offset within window */
2695    int end;
2696
2697    /*
2698     * XXX: the function assumes that banksize is a muliple of
2699     * sizeof(u_int16_t).
2700     */
2701    banksize = adp->va_window_size;
2702    bank = -1;
2703    cx *= sizeof(u_int16_t);
2704    while (cy > 0) {
2705	pos = adp->va_line_width*y + x*sizeof(u_int16_t);
2706	if (bank != pos/banksize) {
2707	    vidd_set_win_org(adp, pos);
2708	    bank = pos/banksize;
2709	}
2710	offset = pos%banksize;
2711	end = imin(offset + cx, banksize);
2712	fillw_io(val, adp->va_window + offset,
2713		 (end - offset)/sizeof(u_int16_t));
2714	/* the line may cross the window boundary */
2715	if (offset + cx > banksize) {
2716	    ++bank;		/* next bank */
2717	    vidd_set_win_org(adp, bank*banksize);
2718	    end = offset + cx - banksize;
2719	    fillw_io(val, adp->va_window, end/sizeof(u_int16_t));
2720	}
2721	++y;
2722	--cy;
2723    }
2724}
2725
2726static void
2727direct_fill_rect24(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
2728{
2729    int banksize;
2730    int bank;
2731    int pos;
2732    int offset;			/* offset within window */
2733    int end;
2734    int i;
2735    int j;
2736    u_int8_t b[3];
2737
2738    b[0] = val & 0x0000ff;
2739    b[1] = (val >> 8) & 0x0000ff;
2740    b[2] = (val >> 16) & 0x0000ff;
2741    banksize = adp->va_window_size;
2742    bank = -1;
2743    cx *= 3;
2744    while (cy > 0) {
2745	pos = adp->va_line_width*y + x*3;
2746	if (bank != pos/banksize) {
2747	    vidd_set_win_org(adp, pos);
2748	    bank = pos/banksize;
2749	}
2750	offset = pos%banksize;
2751	end = imin(offset + cx, banksize);
2752	for (i = 0, j = offset; j < end; i = (++i)%3, ++j) {
2753	    writeb(adp->va_window + j, b[i]);
2754	}
2755	/* the line may cross the window boundary */
2756	if (offset + cx >= banksize) {
2757	    ++bank;		/* next bank */
2758	    vidd_set_win_org(adp, bank*banksize);
2759	    j = 0;
2760	    end = offset + cx - banksize;
2761	    for (; j < end; i = (++i)%3, ++j) {
2762		writeb(adp->va_window + j, b[i]);
2763	    }
2764	}
2765	++y;
2766	--cy;
2767    }
2768}
2769
2770static void
2771direct_fill_rect32(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
2772{
2773    int banksize;
2774    int bank;
2775    int pos;
2776    int offset;			/* offset within window */
2777    int end;
2778
2779    /*
2780     * XXX: the function assumes that banksize is a muliple of
2781     * sizeof(u_int32_t).
2782     */
2783    banksize = adp->va_window_size;
2784    bank = -1;
2785    cx *= sizeof(u_int32_t);
2786    while (cy > 0) {
2787	pos = adp->va_line_width*y + x*sizeof(u_int32_t);
2788	if (bank != pos/banksize) {
2789	    vidd_set_win_org(adp, pos);
2790	    bank = pos/banksize;
2791	}
2792	offset = pos%banksize;
2793	end = imin(offset + cx, banksize);
2794	filll_io(val, adp->va_window + offset,
2795		 (end - offset)/sizeof(u_int32_t));
2796	/* the line may cross the window boundary */
2797	if (offset + cx > banksize) {
2798	    ++bank;		/* next bank */
2799	    vidd_set_win_org(adp, bank*banksize);
2800	    end = offset + cx - banksize;
2801	    filll_io(val, adp->va_window, end/sizeof(u_int32_t));
2802	}
2803	++y;
2804	--cy;
2805    }
2806}
2807
2808static int
2809vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
2810{
2811    switch (adp->va_info.vi_mem_model) {
2812    case V_INFO_MM_TEXT:
2813	/* do nothing? XXX */
2814	break;
2815    case V_INFO_MM_PLANAR:
2816	planar_fill_rect(adp, val, x, y, cx, cy);
2817	break;
2818    case V_INFO_MM_PACKED:
2819	packed_fill_rect(adp, val, x, y, cx, cy);
2820	break;
2821    case V_INFO_MM_DIRECT:
2822	switch (adp->va_info.vi_pixel_size) {
2823	case sizeof(u_int16_t):
2824	    direct_fill_rect16(adp, val, x, y, cx, cy);
2825	    break;
2826	case 3:
2827	    direct_fill_rect24(adp, val, x, y, cx, cy);
2828	    break;
2829	case sizeof(u_int32_t):
2830	    direct_fill_rect32(adp, val, x, y, cx, cy);
2831	    break;
2832	}
2833	break;
2834    }
2835    return 0;
2836}
2837#else /* !notyet */
2838static int
2839vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
2840{
2841    return ENODEV;
2842}
2843#endif /* notyet */
2844
2845static int
2846vga_bitblt(video_adapter_t *adp,...)
2847{
2848    /* FIXME */
2849    return ENODEV;
2850}
2851
2852#endif /* !VGA_NO_MODE_CHANGE */
2853
2854static int
2855get_palette(video_adapter_t *adp, int base, int count,
2856	    u_char *red, u_char *green, u_char *blue, u_char *trans)
2857{
2858    u_char *r;
2859    u_char *g;
2860    u_char *b;
2861
2862    if (count < 0 || base < 0 || count > 256 || base > 256 ||
2863	base + count > 256)
2864	return EINVAL;
2865
2866    r = malloc(count*3, M_DEVBUF, M_WAITOK);
2867    g = r + count;
2868    b = g + count;
2869    if (vga_save_palette2(adp, base, count, r, g, b)) {
2870	free(r, M_DEVBUF);
2871	return ENODEV;
2872    }
2873    copyout(r, red, count);
2874    copyout(g, green, count);
2875    copyout(b, blue, count);
2876    if (trans != NULL) {
2877	bzero(r, count);
2878	copyout(r, trans, count);
2879    }
2880    free(r, M_DEVBUF);
2881
2882    return 0;
2883}
2884
2885static int
2886set_palette(video_adapter_t *adp, int base, int count,
2887	    u_char *red, u_char *green, u_char *blue, u_char *trans)
2888{
2889    u_char *r;
2890    u_char *g;
2891    u_char *b;
2892    int err;
2893
2894    if (count < 0 || base < 0 || count > 256 || base > 256 ||
2895	base + count > 256)
2896	return EINVAL;
2897
2898    r = malloc(count*3, M_DEVBUF, M_WAITOK);
2899    g = r + count;
2900    b = g + count;
2901    err = copyin(red, r, count);
2902    if (!err)
2903        err = copyin(green, g, count);
2904    if (!err)
2905        err = copyin(blue, b, count);
2906    if (!err)
2907        err = vga_load_palette2(adp, base, count, r, g, b);
2908    free(r, M_DEVBUF);
2909
2910    return (err ? ENODEV : 0);
2911}
2912
2913static int
2914vga_dev_ioctl(video_adapter_t *adp, u_long cmd, caddr_t arg)
2915{
2916    switch (cmd) {
2917    case FBIO_GETWINORG:	/* get frame buffer window origin */
2918	*(u_int *)arg = 0;
2919	return 0;
2920
2921    case FBIO_SETWINORG:	/* set frame buffer window origin */
2922	return ENODEV;
2923
2924    case FBIO_SETDISPSTART:	/* set display start address */
2925	return (set_display_start(adp,
2926				  ((video_display_start_t *)arg)->x,
2927			  	  ((video_display_start_t *)arg)->y)
2928		? ENODEV : 0);
2929
2930    case FBIO_SETLINEWIDTH:	/* set scan line length in pixel */
2931	return (set_line_length(adp, *(u_int *)arg) ? ENODEV : 0);
2932
2933    case FBIO_GETPALETTE:	/* get color palette */
2934	return get_palette(adp, ((video_color_palette_t *)arg)->index,
2935			   ((video_color_palette_t *)arg)->count,
2936			   ((video_color_palette_t *)arg)->red,
2937			   ((video_color_palette_t *)arg)->green,
2938			   ((video_color_palette_t *)arg)->blue,
2939			   ((video_color_palette_t *)arg)->transparent);
2940
2941    case FBIO_SETPALETTE:	/* set color palette */
2942	return set_palette(adp, ((video_color_palette_t *)arg)->index,
2943			   ((video_color_palette_t *)arg)->count,
2944			   ((video_color_palette_t *)arg)->red,
2945			   ((video_color_palette_t *)arg)->green,
2946			   ((video_color_palette_t *)arg)->blue,
2947			   ((video_color_palette_t *)arg)->transparent);
2948
2949    case FBIOGTYPE:		/* get frame buffer type info. */
2950	((struct fbtype *)arg)->fb_type = fb_type(adp->va_type);
2951	((struct fbtype *)arg)->fb_height = adp->va_info.vi_height;
2952	((struct fbtype *)arg)->fb_width = adp->va_info.vi_width;
2953	((struct fbtype *)arg)->fb_depth = adp->va_info.vi_depth;
2954	if ((adp->va_info.vi_depth <= 1) || (adp->va_info.vi_depth > 8))
2955	    ((struct fbtype *)arg)->fb_cmsize = 0;
2956	else
2957	    ((struct fbtype *)arg)->fb_cmsize = 1 << adp->va_info.vi_depth;
2958	((struct fbtype *)arg)->fb_size = adp->va_buffer_size;
2959	return 0;
2960
2961    case FBIOGETCMAP:		/* get color palette */
2962	return get_palette(adp, ((struct fbcmap *)arg)->index,
2963			   ((struct fbcmap *)arg)->count,
2964			   ((struct fbcmap *)arg)->red,
2965			   ((struct fbcmap *)arg)->green,
2966			   ((struct fbcmap *)arg)->blue, NULL);
2967
2968    case FBIOPUTCMAP:		/* set color palette */
2969	return set_palette(adp, ((struct fbcmap *)arg)->index,
2970			   ((struct fbcmap *)arg)->count,
2971			   ((struct fbcmap *)arg)->red,
2972			   ((struct fbcmap *)arg)->green,
2973			   ((struct fbcmap *)arg)->blue, NULL);
2974
2975    default:
2976	return fb_commonioctl(adp, cmd, arg);
2977    }
2978}
2979
2980static void
2981dump_buffer(u_char *buf, size_t len)
2982{
2983    int i;
2984
2985    for(i = 0; i < len;) {
2986	printf("%02x ", buf[i]);
2987	if ((++i % 16) == 0)
2988	    printf("\n");
2989    }
2990}
2991
2992/*
2993 * diag():
2994 * Print some information about the video adapter and video modes,
2995 * with requested level of details.
2996 *
2997 * all adapters
2998 */
2999static int
3000vga_diag(video_adapter_t *adp, int level)
3001{
3002    u_char *mp;
3003#if FB_DEBUG > 1
3004    video_info_t info;
3005    int i;
3006#endif
3007
3008    if (!vga_init_done)
3009	return ENXIO;
3010
3011#if FB_DEBUG > 1
3012#ifndef VGA_NO_BIOS
3013    printf("vga: RTC equip. code:0x%02x, DCC code:0x%02x\n",
3014	   rtcin(RTC_EQUIPMENT), readb(BIOS_PADDRTOVADDR(0x488)));
3015    printf("vga: CRTC:0x%x, video option:0x%02x, ",
3016	   readw(BIOS_PADDRTOVADDR(0x463)),
3017	   readb(BIOS_PADDRTOVADDR(0x487)));
3018    printf("rows:%d, cols:%d, font height:%d\n",
3019	   readb(BIOS_PADDRTOVADDR(0x44a)),
3020	   readb(BIOS_PADDRTOVADDR(0x484)) + 1,
3021	   readb(BIOS_PADDRTOVADDR(0x485)));
3022#endif /* VGA_NO_BIOS */
3023#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
3024    printf("vga: param table EGA/VGA:%p", video_mode_ptr);
3025    printf(", CGA/MDA:%p\n", video_mode_ptr2);
3026    printf("vga: rows_offset:%d\n", rows_offset);
3027#endif
3028#endif /* FB_DEBUG > 1 */
3029
3030    fb_dump_adp_info(VGA_DRIVER_NAME, adp, level);
3031
3032#if FB_DEBUG > 1
3033    if (adp->va_flags & V_ADP_MODECHANGE) {
3034	for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) {
3035	    if (bios_vmode[i].vi_mode == NA)
3036		continue;
3037	    if (get_mode_param(bios_vmode[i].vi_mode) == NULL)
3038		continue;
3039	    fb_dump_mode_info(VGA_DRIVER_NAME, adp, &bios_vmode[i], level);
3040	}
3041    } else {
3042	vga_get_info(adp, adp->va_initial_mode, &info);	/* shouldn't fail */
3043	fb_dump_mode_info(VGA_DRIVER_NAME, adp, &info, level);
3044    }
3045#endif /* FB_DEBUG > 1 */
3046
3047    if ((adp->va_type != KD_EGA) && (adp->va_type != KD_VGA))
3048	return 0;
3049#if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE)
3050    if (video_mode_ptr == NULL)
3051	printf("vga%d: %s: WARNING: video mode switching is not "
3052	       "fully supported on this adapter\n",
3053	       adp->va_unit, adp->va_name);
3054#endif
3055    if (level <= 0)
3056	return 0;
3057
3058    if (adp->va_type == KD_VGA) {
3059	printf("VGA parameters upon power-up\n");
3060	dump_buffer(adpstate.regs, sizeof(adpstate.regs));
3061	printf("VGA parameters in BIOS for mode %d\n", adp->va_initial_mode);
3062	dump_buffer(adpstate2.regs, sizeof(adpstate2.regs));
3063    }
3064
3065    mp = get_mode_param(adp->va_initial_mode);
3066    if (mp == NULL)	/* this shouldn't be happening */
3067	return 0;
3068    printf("EGA/VGA parameters to be used for mode %d\n", adp->va_initial_mode);
3069    dump_buffer(mp, V_MODE_PARAM_SIZE);
3070
3071    return 0;
3072}
3073