1294660Smmel/*- 2294660Smmel * Copyright 2016 Michal Meloun <mmel@FreeBSD.org> 3294660Smmel * All rights reserved. 4294660Smmel * 5294660Smmel * Redistribution and use in source and binary forms, with or without 6294660Smmel * modification, are permitted provided that the following conditions 7294660Smmel * are met: 8294660Smmel * 1. Redistributions of source code must retain the above copyright 9294660Smmel * notice, this list of conditions and the following disclaimer. 10294660Smmel * 2. Redistributions in binary form must reproduce the above copyright 11294660Smmel * notice, this list of conditions and the following disclaimer in the 12294660Smmel * documentation and/or other materials provided with the distribution. 13294660Smmel * 14294660Smmel * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15294660Smmel * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16294660Smmel * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17294660Smmel * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18294660Smmel * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19294660Smmel * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20294660Smmel * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21294660Smmel * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22294660Smmel * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23294660Smmel * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24294660Smmel * SUCH DAMAGE. 25294660Smmel * 26294660Smmel * $FreeBSD$ 27294660Smmel */ 28294660Smmel 29294660Smmel#ifndef _DEV_EXTRES_CLK_FIXED_H_ 30294660Smmel#define _DEV_EXTRES_CLK_FIXED_H_ 31294660Smmel 32294660Smmel#include <dev/extres/clk/clk.h> 33294660Smmel 34294660Smmel/* 35294660Smmel * A fixed clock can represent several different real-world objects, including 36294660Smmel * an oscillator with a fixed output frequency, a fixed divider (multiplier and 37294660Smmel * divisor must both be > 0), or a phase-fractional divider within a PLL 38294660Smmel * (however the code currently divides first, then multiplies, potentially 39294660Smmel * leading to different roundoff errors than the hardware PLL). 40294660Smmel */ 41294660Smmel 42294660Smmelstruct clk_fixed_def { 43294660Smmel struct clknode_init_def clkdef; 44294660Smmel uint64_t freq; 45294660Smmel uint32_t mult; 46294660Smmel uint32_t div; 47294660Smmel int fixed_flags; 48294660Smmel}; 49294660Smmel 50296903Smmelint clknode_fixed_register(struct clkdom *clkdom, struct clk_fixed_def *clkdef); 51294660Smmel 52294660Smmel#endif /*_DEV_EXTRES_CLK_FIXED_H_*/ 53